KR102704743B1 - Etching apparatus and method of etching using the same - Google Patents

Abstract

An etching method according to some embodiments of the present invention comprises an etching method comprising: providing a substrate in a process chamber, the process chamber including a first chamber portion and a second chamber portion, the substrate being provided in the second chamber portion; supplying a high-density gas plasma to the first chamber portion; supplying an ultra-low-temperature electron temperature plasma to the second chamber portion using at least a portion of the high-density gas plasma; causing radicals of the ultra-low-temperature electron temperature plasma to adsorb onto a surface of the substrate; and applying a bias to the substrate to accelerate at least one of ions or electrons of the ultra-low-temperature electron temperature plasma to collide with the substrate.

Description

{ETCHING APPARATUS AND METHOD OF ETCHING USING THE SAME}

The present invention relates to an etching device and an etching method, and more specifically, to an etching device and an etching method using ultra-low temperature electron temperature plasma.

Plasma is an ionized gas composed of positive ions, negative ions, electrons, excited atoms, molecules, and chemically highly active radicals. It has electrical and thermal properties that are very different from those of ordinary gases, so it is also called the fourth state of matter. Since this plasma contains ionized gas, it is very useful in the semiconductor manufacturing process, such as accelerating it using electric or magnetic fields, or causing a chemical reaction to clean, etch, or deposit wafers or substrates.

Recently, semiconductor manufacturing processes are using plasma generators that generate high-density gas plasma, and there are various plasma modules for generating plasma. Representative examples include capacitively coupled plasma (CCP) and inductively coupled plasma (ICP) using radio frequency.

The etching step using plasma is performed sequentially by an adsorption process that adsorbs radicals and a desorption process that desorbs the etching target. Since the types of gases used in the adsorption process and the desorption process are different, a 'purge process' is sometimes performed between the two processes.
The prior art is disclosed in Korean Patent Publication No. 10-0633167 (October 11, 2006).

The problem to be solved by the present invention is to provide an etching method and device capable of solving the problem of causing physical and electrical damage to a specific material layer of a substrate during an etching process while simultaneously shortening the process time by omitting a purge step in the etching process.

The problem to be solved by the present invention is to provide an etching method and device capable of shortening the process time by forming an ultra-low temperature electron temperature plasma in a plasma chamber where an etching process takes place and thereby performing the adsorption process more quickly.

The problems to be solved by the present invention are not limited to the problems mentioned above, and other problems not mentioned will be clearly understood by those skilled in the art from the description below.

According to one embodiment of the present invention, an etching device comprises: a first chamber portion in which high-density gas plasma is formed; a second chamber portion in which ultra-low-temperature electron temperature plasma is formed; a substrate disposed in the second chamber portion and capable of controlling voltage; and a plurality of grids between the first chamber portion and the second chamber portion, wherein the plurality of grids are configured such that a potential of the plurality of grids is lower than a potential of the ultra-low-temperature electron temperature plasma, so that high-energy electrons pass through the grids and low-energy electrons are blocked by the grids, and the plasma potential above the substrate is lower than the plasma potential of the first chamber portion, and the voltage applied to the plurality of grids is controlled so that electrons or ions are accelerated or blocked.

An etching method according to one embodiment of the present invention comprises: providing a substrate in a process chamber, the process chamber including a first chamber portion and a second chamber portion, the substrate being provided in the second chamber portion; supplying a high-density gas plasma to the first chamber portion; supplying an ultra-low-temperature electron temperature plasma to the second chamber portion using at least a portion of the high-density gas plasma; allowing radicals of the ultra-low-temperature electron temperature plasma to be adsorbed onto a surface of the substrate; and applying a bias to the substrate to accelerate at least one of ions or electrons of the ultra-low-temperature electron temperature plasma to collide with the substrate.

According to one embodiment of the present invention, an etching method comprises: providing a substrate in a process chamber, the process chamber including a first chamber portion and a second chamber portion, and a first grid, a second grid, and a third grid disposed between the first chamber portion and the second chamber portion; supplying a high-density gas plasma to the first chamber portion of the process chamber; blocking low-energy electrons and negative ions of the high-density gas plasma with the first grid; blocking positive ions of the high-density gas plasma with the second grid; accelerating electrons with a potential difference between the first grid and the second grid; blocking plasma of the second chamber portion from moving to the first chamber portion with the third grid; colliding high-energy electrons of the high-density gas plasma passing through the first grid, the second grid, and the third grid with ions of the second chamber portion to form an ultra-low-temperature electron temperature plasma; adsorbing radicals of the ultra-low-temperature electron temperature plasma onto a surface of the substrate; And an etching method including applying a bias to the substrate to accelerate at least one of ions or electrons of an ultra-low temperature electron temperature plasma and cause them to collide with the substrate.

Specific details of other embodiments are included in the detailed description and drawings.

According to an etching apparatus and an etching method according to embodiments of the present invention, an ultra-low temperature electron temperature plasma can be supplied by controlling the voltage of a plurality of grids and a substrate.

According to the etching apparatus and etching method according to embodiments of the present invention, etching can be performed with less substrate damage due to the low sheath potential in the ultra-low temperature electron temperature plasma region.

According to the etching apparatus and etching method according to embodiments of the present invention, the energy of particles incident on a substrate can be controlled by adjusting the substrate voltage size, and only the energy necessary for a surface reaction of the substrate can be supplied, thereby enabling an etching process without damaging the substrate.

The effects of the present invention are not limited to the effects mentioned above, and other effects not mentioned will be clearly understood by those skilled in the art from the description below.

FIG. 1 is a cross-sectional view illustrating an etching device according to some embodiments.
FIG. 2 is an enlarged view of portion P of FIG. 1 according to some embodiments.
FIG. 3 is an enlarged view of an etching device according to some embodiments.
Figure 4 is an enlarged view of an etching device according to some embodiments.
FIG. 5a is a flowchart illustrating an etching method according to some embodiments.
FIG. 5b is a flowchart illustrating an etching method according to some embodiments.
FIG. 5c is a flowchart illustrating an etching method according to some embodiments.
FIG. 5d is a flowchart illustrating an etching method according to some embodiments.
FIGS. 6a and 6b are diagrams showing examples of an etching method using ultra-low temperature electron temperature plasma according to some embodiments.
FIG. 7 is a flowchart illustrating an etching method according to some embodiments.

Hereinafter, embodiments of the present invention will be described in detail with reference to the attached drawings.

Methods and devices for etching a semiconductor substrate and layers formed thereon during the manufacture of semiconductor devices are presented in embodiments of the present invention.

For example, etching can etch the treatment layer one at a time at atom by repeatedly adsorbing radicals on the surface of the material to be etched (adsorption process) and then colliding ions or electrons with the material to be etched to which the radicals have been adsorbed to remove them (desorption process).

In etching, ion bombardment can be used to give a physical impact to the etching target. In this case, plasma having a very low electron temperature of 1.0 eV or less (cryogenic electron temperature plasma) can be used. In etching using ions, if an ultra-low electron temperature plasma is created on the substrate, a very low sheath potential can be formed on the substrate. In this case, the energy of bombarding the substrate with ions is lowered, so that the ion bombardment may not have an unnecessary effect on the surface. Since the electron temperature is low in the ultra-low electron temperature plasma, various unnecessary chemical reactions may not occur. If a pulse voltage is applied to the substrate in the ultra-low electron temperature plasma, the etching process can proceed quickly without damaging the substrate by ion bombardment.

In the embodiments of the present invention below, since ultra-low temperature electron temperature plasma is used when removing the treatment layer, structural deformation of the material to be etched can be minimized, and since adsorption can proceed quickly within the plasma, the process time can be shortened through shortening the adsorption time, and changes in electrical characteristics can be minimized.

FIG. 1 is a cross-sectional view illustrating an etching device according to some embodiments.

Referring to Fig. 1, an etching device (1) is provided. The etching device (1) can etch various objects. For example, the etching device (1) can etch a substrate or a mask. That is, the etching device (1) can be a device that etches one side of a substrate or a mask to form a pattern thereon.

The etching equipment (1) may include a process chamber (CB), a grid (GR), a first power supply (104), a second power supply (105), an RF coil (111) support (101), and a pump (PM).

The process chamber (CB) may include a first chamber portion (CB1) and a second chamber portion (CB2). The first chamber portion (CB1) may be positioned above the second chamber portion (CB2). A grid (GR) may be positioned between the first chamber portion (CB1) and the second chamber portion (CB2).

Gas can be injected into the process chamber (CB). Gas can be supplied into the first chamber section (CB1).

A high-density gas plasma (PS_H) can be formed within a first chamber portion (CB1) of a process chamber (CB). The first chamber portion (CB1) can be a high-density gas plasma region. The high-density gas plasma (PS_H) can include radicals, electrons, and ions of a gas. The high-density gas plasma (PS_H) can be generated by injecting gas into the first chamber portion (CB1) and applying power to an RF coil (111) through a first power source (104) to induce an electric field within the first chamber portion (CB1).

The method for generating high-density gas plasma (PS_H) within the first chamber (CB1) is not limited to the embodiment described above, and the first chamber (CB1) can have various configurations to generate high-density gas plasma (PS_H). For example, the first chamber (CB1) can induce high-density gas plasma (PS_H) using various sources such as capacitively coupled plasma (CCP), inductively coupled plasma (ICP), electron beam source, and microwave plasma. The high-density gas plasma (PS_H) can include adsorption gas plasma and etching gas plasma.

A first chamber portion (CB1) and a second chamber portion (CB2) can be defined based on a grid (GR). A grid (GR) can be positioned between the first chamber portion (CB1) and the second chamber portion (CB2). The second chamber portion (CB2) can be an ultra-low temperature electron temperature plasma region.

In one embodiment, the grid (GR) can include a metal. The grid (GR) can include, for example, graphite or molybdenum. The grid (GR) can be voltage-applied or not. The voltage applied to the grid (GR) can accelerate high-energy electrons within the high-density gas plasma (PS_H).

In some embodiments, a single grid (GR) may include multiple through-holes.

A support (101) may be positioned within the second chamber portion (CB2). The support (101) may support a substrate (102). The support (101) may include a metal. Any voltage may be applied to the support (101). The voltage may or may not be applied to the support (101).

A substrate (102) may be placed within the second chamber (CB2) and may be voltage-controlled. The substrate (102) may be placed on a support (101). The substrate (102) may include a metal or a metal compound. The substrate (102) may include at least one of copper (Cu), chromium (Cr), nickel (Ni), aluminum (Al), or other metals, or alloys thereof. In some embodiments, the substrate (102) may include silicon (Si). For example, the substrate (102) may include a silicon wafer.

The second chamber (CB2) can be supplied with ultra-low-temperature electron temperature plasma using at least a portion of the high-density gas plasma. The ultra-low-temperature electron temperature plasma described in the present disclosure refers to plasma having a low electron temperature, and hereinafter, the ultra-low-temperature electron temperature plasma is defined and described as plasma having an electron temperature of 1.0 eV or less.

The second power supply (105) can apply voltage to the support (101). Power from the second power supply (105) can be applied to the substrate (102) through the support (101).

By controlling the bias applied to the substrate (102), radicals included in the ultra-low temperature electron temperature plasma (PS_L) can be adsorbed onto the surface of the substrate (102), and by applying a bias through at least a part of the substrate (102), at least one of electrons or ions included in the ultra-low temperature electron temperature plasma can be accelerated to collide with the substrate (102), thereby etching the etching target.

For example, when a bias of 0 V is applied to the substrate (102), and the potential of the substrate (102) is 0 V, a sheath potential is not formed on the substrate (102) due to the very low electron temperature, and even if it is formed, it has a very low sheath potential. Accordingly, an electric field that can accelerate charged particles such as ions or electrons included in the ultra-low-temperature electron temperature plasma (PS_L) to the substrate (102) is not formed. Therefore, only electrically neutral radicals can attach to the substrate (102) by diffusion, and an adsorption reaction can occur.

In addition, when a bias such as RF or DC voltage is applied through at least a part of the substrate (102), depending on the polarity of the voltage, electrons in the case of + voltage and (positive) ions in the case of - voltage are directed to the substrate (102), and a reaction may occur in which a part of the substrate (102) surface that has been combined with the radicals adsorbed by the energy they possess is detached.

Since the ultra-low-temperature electron temperature plasma (PS_L) has a very low electron temperature, the sheath potential is also very low, so the energy of the ions accelerated through the sheath is very small. If etching is performed using this, there is an advantage in that the electrons or ions do not etch the surface of the substrate (102) during the adsorption step. Therefore, when a pulse voltage is applied to the substrate (102), the purge step required in the existing etching process can be omitted.

A pump (PM) is connected to the process chamber (CB) to enable vacuum control during the etching process and to remove gaseous byproducts from the process chamber (CB). In one embodiment, in a purge process, gaseous byproducts in the process chamber (CB) can be exhausted through the pump.

FIG. 2 is an enlarged view of portion P of FIG. 1 according to some embodiments.

Referring to Fig. 2, an ultra-low temperature electron temperature plasma (PS_L) can be supplied to the second chamber section (CB2) through a grid (GR).

The high-density gas plasma (PS_H) of the first chamber (CB1) may include low-energy electrons (131) and high-energy electrons (132). A voltage may be applied to the grid (GR).

The grid (GR) may be configured such that the potential of the grid (GR) is lower than the potential of the ultra-low temperature electron temperature plasma beneath the grid (GR), such that high energy electrons (132) pass through the grid (GR) and low energy electrons (131) are blocked by the grid (GR). This may also be the case when the grid (GR) includes a plurality of grids (GR).

According to some embodiments, a voltage power supply capable of applying a high voltage of tens to hundreds of V may be connected to the grid (GR). A potential difference may be created between the plasma and the electrode or insulator, and a region where this potential difference is created may be defined as a sheath, and a potential difference appearing in the sheath may be defined as a sheath potential. Through this, a sheath potential of the first chamber portion (CB1) may be created on the grid (GR) in contact with the high-density gas plasma of the first chamber portion (CB1). Only high-energy electrons (132) exceeding the sheath potential energy of the first chamber portion (CB1) may move to the second chamber portion (CB2).

High energy electrons (132) of the high-density gas plasma (PS_H) can exceed the sheath potential energy of the first chamber portion (CB1) generated on the grid (GR) and move to the second chamber portion (CB2). Low energy electrons (131) of the high-density gas plasma (PS_H) cannot exceed the sheath potential energy of the first chamber portion (CB1) generated on the grid (GR) and move to the second chamber portion (CB2). The sheath potential of the second chamber portion (CB2) can be generated under the grid (GR). Unlike the sheath potential of the first chamber portion (CB1), the sheath potential of the second chamber portion (CB2) can accelerate electrons. Therefore, when the plasma potential of the second chamber part (CB2) is made larger than the plasma potential of the first chamber part (CB1) to amplify the electron energy of the high-energy electrons (132) passing through the grid (GR), the neutral gases (135) existing in the second chamber part (CB2) that collide with these high-energy electrons (132) can be ionized to generate ultra-low-temperature electrons (133) and ions (134) having very low electron temperatures. A sheath potential can be formed on the substrate (102) through the potential difference between the ultra-low-temperature electron temperature plasma (PS_L) of the second chamber part (CB2) and the substrate (102). In this case, the sheath potential on the substrate (102) can be smaller than the sheath potential of the first chamber part (CB1).

The ultra-low temperature electrons (133) generated through ionization in the second chamber (CB2) and the electrons that have gained energy in the first chamber (CB1) and come down below the grid but have lost energy by participating in the ionization reaction can form a very low electron temperature. In this case, an ultra-low temperature electron temperature plasma (PS_L) can be formed in the second chamber (CB2).

According to one embodiment, for the etching device and method, electrons may have a very low electron temperature of 1.0 eV or less. In such an ultra-low electron temperature plasma (PS_L), a low sheath potential is formed above the substrate (102), and because of the low sheath potential, the energy of the accelerated ions (134) is low, so that damage to the substrate (102) due to the ion energy may be reduced.

According to one embodiment, the second chamber portion (CH2) can be formed in a structure in which no external electric field exists or is very small so that electrons can maintain a very low electron temperature without acquiring energy by the electric field.

Fig. 3 is an enlarged view of an etching device according to some embodiments. Fig. 3 may correspond to Fig. 2.

Referring to FIG. 3, the grid (GRa) may include a plurality of grids (GRa). The grid (GRa) may include a first grid (GR1a) and a second grid (GR2a). The first grid (GR1a) may be a grid adjacent to the first chamber portion (CB1). The second grid (GR2a) may be a grid adjacent to the second chamber portion (CB2). An ultra-low temperature electron temperature plasma (PS_La) may be supplied to the second chamber portion (CB2) through the first grid (GR1a) and the second grid (GR2a).

The high-density gas plasma (PS_Ha) of the first chamber (CB1) may include low-energy electrons (131) and high-energy electrons (132). Voltage may be applied to the first grid (GR1a) and the second grid (GR2a).

According to some embodiments, a voltage power supply capable of applying a high voltage of several tens to several hundreds of V may be connected to the first grid (GR1a). A voltage power supply capable of applying a lower voltage than the first grid (GR1a) or a ground may be connected to the second grid (GR2a).

High-energy electrons (132) of the high-density gas plasma (PS_Ha) within the first chamber (CB1) are accelerated by the amount of potential difference between the first grid (GR1a) and the second grid (GR2a), so that only the desired amount of energy can be accelerated.

High energy electrons (132) passing through the grids (GR) collide with neutral gases (135) in the second chamber (CB2), and the neutral gases (135) are ionized, so that ultra-low temperature electrons (133) and ions (134) having very low electron temperatures can be generated.

The ultra-low temperature electrons (133) generated through ionization in the second chamber (CB2) and the electrons that have gained energy in the first chamber (CB1) and come down below the grid but have lost energy by participating in the ionization reaction can form a very low electron temperature. In this case, an ultra-low temperature electron temperature plasma (PS_La) can be formed in the second chamber (CB2).

By precisely controlling the energy of the accelerated electrons, it becomes possible to selectively control radical generation, etc. in the second chamber (CB2). In addition, the area where the process-used gas is injected can be used to control the etching/deposition process by injecting it at different locations depending on the gas.

Fig. 4 is an enlarged view of an etching device according to some embodiments. Fig. 4 may correspond to Fig. 2.

Referring to FIG. 4, the grid (GRb) may include a plurality of grids (GRb). The grid (GRb) may include a first grid (GR1b), a second grid (GR2b), and a third grid (GR3b). The first grid (GR1) may be a grid adjacent to the first chamber portion (CB1). The third grid (GR3) may be a grid adjacent to the second chamber portion (CB2). The second grid (GR2) may be located between the first grid (GR1) and the third grid (GR3). An ultra-low temperature electron temperature plasma (PS_Lb) may be supplied to the second chamber portion (CB2) through the first grid (GR1b), the second grid (GR2b), and the third grid (GR3b).

The high-density gas plasma (PS_Hb) of the first chamber (CB1) may include low-energy electrons (131) and high-energy electrons (132). A voltage of tens to hundreds of V may be applied to the first grid (GR1b), the second grid (GR2b), and the third grid (GR3b).

The voltage applied to the plurality of grids (GRb) can be adjusted to accelerate or block electrons or ions. The voltages of the first grid (GR1b), the second grid (GR2b), and the third grid (GR3b) can be adjusted. For example, when a negative voltage is applied to the first grid (GR1b), low energy electrons (131) and negative ions can be blocked. When a positive voltage is applied to the second grid (GR2b), positive ions can be blocked and electrons can be accelerated. The third grid (GR3b) can block the inflow of the ultra-low temperature electron temperature plasma (PS_Lb) of the second chamber (CB2) into the first chamber (CB1) and secure the flux of electrons.

The grid (GRb) including the first grid (GR1b), the second grid (GR2b), and the third grid (GR3b) can control electron energy relatively precisely and also increase the density of electrons, thereby efficiently generating an ultra-low-temperature electron temperature plasma (PS_L) within the second chamber section (CB2).

In one embodiment, when argon plasma is used, the difference in the substrate potential and the plasma potential of the second chamber portion can be about 5 times the electron temperature. For example, when the electron temperature is 3 eV, which is a typical electron temperature, the potential difference can be 15 V. For an ultra-low electron temperature plasma having an electron temperature of 1 eV or less, the potential difference can be 5 V or less. The potential difference between the ultra-low electron temperature plasma and the substrate can be 5.0 V or less. For an ultra-low electron temperature plasma having an electron temperature of 0.5 eV or less, the potential difference between the ultra-low electron temperature plasma and the substrate can be 2.5 V or less.

FIG. 5a is a flowchart illustrating an etching method according to some embodiments.

The etching method may mean a method of etching one side of an etching target using the etching equipment described with reference to FIGS. 1 to 4.

Referring to FIGS. 1, 2, and 5a, the etching method may include supplying a high-density gas plasma (PS_H) to a first chamber portion (CB1) (210), supplying an ultra-low-temperature electron temperature plasma (PS_L) to a second chamber portion (CB2) using at least a portion of the high-density gas plasma (PS_H) (220), adsorbing radicals of the ultra-low-temperature electron temperature plasma (PS_L) to a surface of a substrate (230), and applying a bias to the substrate (102) to accelerate at least one of an ion (134) or an electron (133) of the ultra-low-temperature electron temperature plasma (PS_L) to collide with the substrate (240). When at least one of the ions (134) or the electrons (133) of the ultra-low-temperature electron temperature plasma (PS_L) is accelerated and collides with the substrate, the etching target may be detached. Since the etching target is desorbed in a cryogenic electron temperature plasma (PS_L), incidental damage to the substrate (102) due to ions (134) or electrons (133) can be prevented.

FIG. 5b is a flowchart of an etching method according to some embodiments.

Referring to FIGS. 1, 2 and 5b, the etching method may include supplying high-density gas plasma (PS_H) to a first chamber portion (CB1) (310), allowing high-energy electrons (132) of the high-density gas plasma (PS_H) to pass through a grid (GR) (320), supplying ultra-low-temperature electron temperature plasma (PS_L) to a second chamber portion (CB2) (330), allowing radicals of the ultra-low-temperature electron temperature plasma (PS_L) to be adsorbed onto a surface of a substrate (102) (340), and applying a bias to the substrate (102) to accelerate at least one of ions (134) or electrons (133) of the ultra-low-temperature electron temperature plasma (PS_L) to collide with the substrate (102) (350).

FIG. 5c is a flowchart of an etching method according to some embodiments.

Referring to FIGS. 1, 3 and 5c, the etching method may include supplying a high-density gas plasma (PS_H) to a first chamber portion (CB1) (410), allowing high-energy electrons (132) of the high-density gas plasma (PS_H) to pass through a plurality of grids (GRa) and accelerating the electrons by a voltage difference between the plurality of grids (GRa) (420), supplying an ultra-low-temperature electron temperature plasma (PS_L) to a second chamber portion (CB2) (430), adsorbing radicals of the ultra-low-temperature electron temperature plasma (PS_L) onto a surface of a substrate (102) (440), and applying a bias to the substrate (102) to accelerate at least one of ions (134) or electrons (133) of the ultra-low-temperature electron temperature plasma (PS_L) to collide with the substrate (450).

FIG. 5d is a flowchart of an etching method according to some embodiments.

Referring to FIGS. 1, 4 and 5d, supplying high-density gas plasma (PS_H) to the first chamber (CB1) (510), blocking low-energy electrons (131) and negative ions of the high-density gas plasma (PS_H) with the first grid (GR1b) (520), blocking positive ions of the high-density gas plasma (PS_H) with the second grid (GR2b) (530), accelerating electrons (132) with the voltage difference between the first grid (GR1b) and the second grid (GR2b) (540), blocking plasma of the second chamber (CB2) from moving to the first chamber (CB1) with the third grid (GR3b) (550), supplying ultra-low-temperature electron temperature plasma (PS_L) to the second chamber (560), and applying radicals of the ultra-low-temperature electron temperature plasma (PS_L) to the surface of the substrate (102). It may include adsorbing (570), and applying a bias to the substrate (102) to accelerate at least one of the ions (134) or electrons (133) of the ultra-low temperature electron temperature plasma (PS_L) to collide with the substrate (102) (580).

FIGS. 6A and 6B are diagrams showing examples of an etching method using ultra-low temperature electron temperature plasma according to some embodiments.

① of FIG. 6A and FIG. 6B represents an RF pulse bias applied to the substrate (604), ② represents a DC pulse bias applied to the substrate (604), and ③ represents an RF pulse bias applied to the substrate (604).

Referring to Fig. 6a, an etching method using an ion (602) beam is provided. When no bias is applied to the substrate (604) and the potential of the substrate is 0 V, the sheath potential on the substrate (604) may be very low or not formed due to the very low electron temperature. In this case, electrically neutral radicals (601) may be adsorbed on the surface of the substrate (604).

Thereafter, when a negative bias is applied through at least a part of the substrate (604), electrically positive ions (602) are attracted to the substrate (604). The electrically positive ions (602) can transfer the energy obtained while being attracted to the surface layer of the substrate (604) where the radicals (601) are adsorbed, so that the surface where the radicals (601) are adsorbed is etched. Under an ultra-low temperature electron temperature plasma, even if this method is repeated, since there is no or little damage to the substrate (604), the etching of the etching target can be implemented without a purge step.

In addition, by controlling the size of the negative bias applied to the substrate (604), the energy of ions directed to the substrate can be controlled, and the plasma process can be performed by selecting an ion energy suitable for the process, which has the advantage of allowing the process to proceed.

Referring to Fig. 6b, an etching method using electrons (603) is provided. When a positive bias is applied through at least a part of the substrate (604), electrons (603) with an electrically negative polarity are accelerated and receive energy to bombard the substrate. In this case, the electrons (603) that have gained energy become a medium for transferring energy to the substrate (604).

By controlling the size of the positive bias applied to the substrate (604), the energy of the electrons (603) heading to the substrate can be controlled, and the process can be performed by selecting the energy of the electrons (603) suitable for the process, which has the advantage of allowing the process to proceed.

In particular, since electrons have a much smaller mass than ions, they have the advantage of being able to transfer only the energy required for the desorption reaction without damaging the substrate even when a relatively high voltage is applied to the substrate.

FIG. 7 is a flowchart illustrating an etching method according to some embodiments.

Referring to Fig. 7, a substrate can be loaded into the processor chamber (510). For example, a substrate with an exposed etching layer can be placed on a support inside the process chamber. At this time, the substrate may have an etching mask formed on the upper portion for etching, so that a portion of the surface may be exposed.

The etching layer may be a silicon single crystal or polysilicon, or a semiconductor substrate containing at least silicon, or an etching layer formed with a certain thickness on the surface of the semiconductor substrate. The etching mask may be made of photoresist, but the present invention is not limited thereto.

Cryogenic electron temperature plasma can be supplied inside the process chamber (520).

In order to supply ultra-low temperature electron temperature plasma inside the process chamber, high-density gas plasma can be used. For example, if high energy electrons contained in the high-density gas plasma are moved inside the process chamber and the electron energy is amplified, neutral gases existing inside the process chamber can be ionized to discharge plasma.

Through this process, low-energy electrons generated through ionization in the process chamber and electrons that lose energy by participating in the ionization reaction form very low electron temperatures, and these electrons can form ultra-low-temperature electron temperature plasma.

Radicals of ultra-low temperature electron temperature plasma can be adsorbed on the surface of the substrate (530).

For example, when the potential of the substrate is 0 V, the sheath potential is not formed on the substrate due to the very low electron temperature, and even if the sheath potential is formed, it has a very low sheath potential. Accordingly, no electric field is formed that can accelerate charged particles such as ions or electrons contained in the ultra-low electron temperature plasma to the substrate, so only electrically neutral radicals can attach to the substrate by diffusion and cause an adsorption reaction.

A bias can be applied through at least a portion of the substrate to accelerate at least one of the electrons or ions contained in the ultra-low temperature electron temperature plasma to collide with the substrate (540).

For example, when a bias such as RF or DC voltage is applied across at least a part of the substrate, depending on the polarity of the voltage, electrons (+) and ions (-) will be directed toward the substrate, and a reaction can occur in which the energy of these electrons causes the portion of the substrate surface that has been adsorbed to combine with the radicals to be detached.

So far, we have looked in detail at the components and operating method of an etching device and method according to one embodiment through drawings.

An etching device and method according to one embodiment can control the energy of particles incident on a substrate by controlling the substrate voltage size, and can supply only the energy necessary for a surface reaction of the substrate, thereby enabling an etching process without damaging the substrate.

In addition, according to one embodiment, the etching device and method can significantly shorten the process time and increase productivity by shortening the time during the desorption process or omitting the purge step, unlike the conventional etching method or the etching method using a neutral beam.

Above, while the embodiments of the present invention have been described with reference to the attached drawings, those skilled in the art to which the present invention pertains will understand that the present invention can be implemented in other specific forms without changing the technical idea or essential features thereof. Therefore, it should be understood that the embodiments described above are exemplary in all respects and not restrictive.

Claims (20)

A first chamber section in which a high-density gas plasma is formed;
A second chamber section in which an ultra-low temperature electron temperature plasma is formed;
A substrate positioned within the second chamber and capable of controlling voltage; and
Including a plurality of grids between the first chamber portion and the second chamber portion,
The above plurality of grids are configured such that the potential of the plurality of grids is lower than the potential of the ultra-low temperature electron temperature plasma, so that high energy electrons pass through the grids and low energy electrons are blocked by the grids.
The plasma potential on the above substrate is smaller than the plasma potential of the first chamber portion,
An etching device in which electrons or ions are accelerated or blocked by controlling the voltage applied to the plurality of grids.
In paragraph 1,
An etching device in which the energy of ions or electrons incident on the substrate is controlled by controlling the voltage applied to the substrate.
In paragraph 1,
An etching device in which a pulse voltage is applied to the substrate, thereby omitting a purge step.
In paragraph 1,
The above ultra-low temperature electron temperature plasma is an etching device containing electrons having an electron temperature of 1.0 eV or less.
In paragraph 1,
An etching device, wherein the substrate is configured to be subjected to a 0 V bias so that radicals are adsorbed onto the substrate.
In paragraph 1,
The above plurality of grids include a first grid for blocking low energy electrons; and
Including a second grid for accelerating electrons,
An etching device in which electrons are accelerated by the difference in potential between the first grid and the second grid.
In paragraph 1,
The above plurality of grids include a first grid for blocking low energy electrons and negative ions;
A second grid that blocks positive ions and accelerates electrons; and
An etching device comprising a third grid for blocking the ultra-low temperature electron temperature plasma of the second chamber section from flowing into the first chamber section.
delete delete In paragraph 1,
An etching device, wherein the substrate is configured to adsorb radicals onto a surface of the substrate by applying a 0 V bias through at least a portion of the substrate.
Providing a substrate to a process chamber, the process chamber including a first chamber portion and a second chamber portion, and the substrate is provided to the second chamber portion;
Supplying high-density gas plasma to the first chamber section;
Supplying an ultra-low temperature electron temperature plasma to the second chamber section using at least a portion of the high-density gas plasma;
Adsorbing radicals of the above ultra-low temperature electron temperature plasma onto the surface of the substrate; and
An etching method comprising applying a bias to the substrate to accelerate at least one of ions or electrons of the ultra-low temperature electron temperature plasma and cause them to collide with the substrate.
In Article 11,
Supplying ultra-low temperature electron temperature plasma to the second chamber section is:
High energy electrons of the high-density gas plasma pass through the grid between the first chamber section and the second chamber section;
Voltage is applied to the above grid;
An etching method comprising: forming an ultra-low temperature electron temperature plasma by colliding high energy electrons passing through the grid with ions in the second chamber portion.
In Article 11,
Supplying ultra-low temperature electron temperature plasma to the second chamber section is:
High energy electrons of the high-density gas plasma pass through a plurality of grids between the first chamber section and the second chamber section; and
An etching method comprising accelerating high-energy electrons by a difference in potential between the plurality of grids.
In Article 11,
A first grid, a second grid, and a third grid are arranged between the first chamber portion and the second chamber portion,
Supplying ultra-low temperature electron temperature plasma to the second chamber section is:
Blocking low energy electrons and negative ions of the high-density gas plasma of the first chamber section with the first grid;
Blocking the positive ions of the high-density gas plasma with the second grid; and
An etching method comprising blocking the ultra-low temperature electron temperature plasma of the second chamber portion from moving to the first chamber portion by the third grid.
In Article 11,
Applying a bias to the above substrate is:
An etching method comprising applying a pulse voltage.
In Article 14,
Supplying ultra-low temperature electron temperature plasma to the second chamber section is:
An etching method further comprising accelerating electrons by a difference in potential between the first grid and the second grid.
In Article 11,
The electrons contained in the above ultra-low temperature electron temperature plasma are,
An etching method characterized by including electrons having an electron temperature of 1.0 eV or less.
In Article 11,
Adsorption of radicals of the above ultra-low temperature electron temperature plasma onto the surface of the substrate is performed.
An etching method, characterized by comprising the step of applying a 0 V bias through at least a portion of the substrate.
In Article 16,
An etching method wherein the difference in potential between the first grid and the second grid is 5.0 V or less.
Providing a substrate to a process chamber, the process chamber including a first chamber portion and a second chamber portion, wherein a first grid, a second grid, and a third grid are arranged between the first chamber portion and the second chamber portion;
Supplying high-density gas plasma to the first chamber section of the process chamber;
Blocking low energy electrons and negative ions of the high-density gas plasma with the first grid;
Blocking the positive ions of the high-density gas plasma with the second grid;
Accelerating electrons by the difference in potential between the first grid and the second grid;
The plasma of the second chamber part is blocked from moving to the first chamber part by the third grid;
High energy electrons of the high-density gas plasma passing through the first grid, the second grid, and the third grid collide with ions in the second chamber section to form an ultra-low temperature electron temperature plasma;
Adsorbing radicals of the above ultra-low temperature electron temperature plasma onto the surface of the substrate; and
An etching method comprising applying a bias to the substrate to accelerate at least one of ions or electrons of an ultra-low temperature electron temperature plasma and cause them to collide with the substrate.