KR102527723B1 - Chip resistor and chip resistor assembly - Google Patents

Abstract

One embodiment of the present invention, an insulating substrate having a first surface and a second surface facing each other; a resistor disposed on the first surface; and first and second terminals disposed on the insulating substrate at both ends of the first surface in the longitudinal direction and respectively connected to the resistor, wherein the resistor has a first region and has a first resistance value. A first resistor comprising a material having a; and a second resistor having a second region overlapping the first region and including a material having a second resistance value different from the first resistance value.

Description

Chip resistive element and chip resistive element assembly {CHIP RESISTOR AND CHIP RESISTOR ASSEMBLY}

The present invention relates to chip resistive elements and chip resistive element assemblies.

A chip resistor element is a chip component for realizing precision resistance, and serves to control current and drop voltage in an electronic circuit.

Recently, as electronic devices are gradually miniaturized and refined, the size of electronic circuits used in electronic devices is gradually miniaturized, and the size of chip resistance elements is also gradually miniaturized. In addition, in order to match the resistance value of the miniaturized chip resistance element to a target value, the importance of trimming the resistor of the chip resistance element by laser processing is gradually increasing. However, as the resistors of miniaturized chip resistors are trimmed, the width of the resistors gradually decreases, and when a high voltage is applied to the chip resistors, the resistors are damaged.

Therefore, in order to prevent damage to the chip resistor element, which is gradually being miniaturized, in order to minimize the length to be trimmed, research is needed to increase the change in resistance value of the resistor.

Japanese Laid-open Patent No. 2012-222012

An object of one embodiment of the present invention is to provide a chip resistor device and assembly thereof, which can minimize the trimmed length and increase the change in the resistance value of the resistor.

One embodiment of the present invention, an insulating substrate having a first surface and a second surface facing each other; a resistor disposed on the first surface; and first and second terminals disposed on the insulating substrate at both ends of the first surface in the longitudinal direction and respectively connected to the resistor, wherein the resistor has a first region and has a first resistance value. A first resistor comprising a material having a; and a second resistor having a second region overlapping the first region and including a material having a second resistance value different from the first resistance value.

One embodiment of the present invention, a printed circuit board having a plurality of electrode pads; and a chip resistance element disposed on the printed circuit board and electrically connected to the plurality of electrode pads, wherein the chip resistance element comprises: an insulating substrate having first and second surfaces facing each other; a first resistor disposed on the first surface, connecting the first and second terminals and made of a material having a first resistance value, and a region connecting the first and second terminals and overlapping the first resistor; a resistor including a second resistor made of a material having a second resistance value different from the first resistance value; and first and second terminals disposed on the insulating substrate at both ends of the first surface in the longitudinal direction and respectively connected to the resistor, wherein the overlapping region includes at least one groove formed by laser trimming. It provides a chip resistor element assembly characterized in that it has.

According to one embodiment of the present invention, it is possible to provide a chip resistor element and a chip resistor element assembly with a minimized length to be trimmed.

The various beneficial advantages and effects of the present invention are not limited to the above, and will be more easily understood in the process of describing specific embodiments of the present invention.

1 is a perspective view illustrating a chip resistance device according to an exemplary embodiment of the present invention.
FIG. 2 is a side cross-sectional view of the chip resistance element shown in FIG. 1 taken along line II'.
FIG. 3 is a plan view of the resistor of the chip resistance element shown in FIG. 1 viewed from the direction II.
4 is a diagram comparing a resistance graph of a chip resistance element according to an embodiment of the present invention and a resistance graph of a comparative example.
FIG. 5 is a modified example of the resistor of FIG. 1 .
6 is a perspective view illustrating a chip resistance element assembly having a substrate on which a chip resistance element is mounted according to an exemplary embodiment of the present invention.
FIG. 7 is a cross-sectional side view of the chip resistance element assembly shown in FIG. 6 taken along line III-III'.

Hereinafter, preferred embodiments of the present invention will be described with reference to the accompanying drawings. However, the embodiments of the present invention can be modified in many different forms, and the scope of the present invention is not limited to the embodiments described below. In addition, the embodiments of the present invention are provided to more completely explain the present invention to those skilled in the art. In addition, the shapes and sizes of elements in the drawings may be exaggerated for clarity.

1 is a perspective view showing a chip resistance element according to an embodiment of the present invention, and FIG. 2 is a side cross-sectional view of the chip resistance element shown in FIG. 1 taken along line II', and FIG. It is a plan view of the resistor of the illustrated chip resistance element viewed from the II direction.

1 and 2 , a chip resistance device 100 according to an embodiment of the present invention includes an insulating substrate 110, a resistor 120, a resistance protection layer 130, and first and second terminals 140. , 150).

The insulating substrate 110 may have first and second surfaces A and B facing each other, and the resistor 120 may be disposed on the first surface A. The insulating substrate 110 may be formed in a thin plate shape having a predetermined thickness. The insulating substrate 110 supports the resistor 120 formed with a relatively thin thickness and may be made of a material capable of securing the strength of the resistor element 100 . The insulating substrate 110 is made of a material having excellent heat conduction, so that when the chip resistance element 100 is used, heat generated from the resistor 120 can be effectively dissipated to the outside. For example, the insulating substrate 110 may be a ceramic or polymer substrate such as alumina (Al ₂ O ₃ ). In a specific example, the insulating substrate 110 may be an alumina substrate obtained by anodizing the surface of thin aluminum.

The resistor 120 may be disposed on the first surface (A) of the insulating substrate 110 . Depending on the embodiment, the resistor 120 may be disposed on the second surface (B) of the insulating substrate 110 . The resistor 120 may be used as an electrical resistance element connecting between the first and second terminals 140 and 150 spaced apart from each other.

As shown in FIGS. 1 and 2 , the resistor 120 may include a plurality of resistors arranged side by side in the longitudinal direction of the insulating substrate 110 . In this embodiment, the case where the resistor 120 is composed of the first resistor 121 and the second resistor 122 arranged side by side has been described, but is not limited thereto, and may be composed of three or more resistors.

The first resistor 121 and the second resistor 122 are arranged side by side in the longitudinal direction on the first surface A of the insulating substrate 110 and have a rectangular shape having predetermined widths W1 and W2, respectively. , It may be arranged to connect the first and second terminals 140 and 150 in parallel, respectively.

The first region of the first resistor 121 and the second region of the second resistor 122 may be disposed to have an overlapping region OA that overlaps with a predetermined width W3. The overlapping area OA may be disposed along a central area of the first surface A of the insulating substrate 110 in the width direction. The overlapping area OA may be an area in which the second resistor 122 is stacked on the first resistor 121 .

The first resistor 121 and the second resistor 122 may be made of a material having different resistance values, i.e., a first resistance value and a second resistance value. The first resistance value may be greater than the second resistance value.

The first resistor 121 and the second resistor 122 may include various metals or alloys having specific resistance values, or compounds such as oxides. For example, the first resistor 121 and the second resistor 122 may include at least one of a Cu-Ni-based alloy, a Ni-Cr-based alloy, a Ru oxide, a Si oxide, Mn, and a Mn-based alloy. The first resistor 121 and the second resistor 122 apply a paste in which a mixture of the metal, alloy, or compound such as oxide is applied to the surface of the insulating substrate 110 through a method such as screen printing, and a predetermined temperature It can be formed by firing in In this embodiment, after screen-printing the paste for forming the first resistor 121 on the surface of the insulating substrate 110, screen-printing the paste for forming the second resistor 122 so that a partial area overlaps, , can be formed by firing at once.

The overlapping area OA where the first resistor 121 and the second resistor 122 come into contact is an area where the resistance value of the chip resistor 100 is precisely adjusted by forming a groove T by trimming. can be used A resistance value of the resistor 120 of the chip resistor 100 may be determined by trimming. Trimming refers to a process of partially removing the resistor 120 to obtain a target resistance value after forming the resistor 120 . Although various fine cutting methods may be used for trimming, in the present embodiment, laser trimming in which a region of the resistor 120 is removed using a YAG laser may be applied.

However, laser trimming may cause cracks in the resistor in the process of removing the resistor by laser heat, thereby deteriorating the distribution of resistance values and noise characteristics. In addition, as the length to be trimmed increases, the width of the remaining resistor gradually decreases, and when an overvoltage is applied, current is concentrated in the resistor, increasing the risk of damage to the resistor.

In the chip resistance element 100 of the present embodiment, the first resistor 121 and the second resistor 122 are disposed in parallel to have an overlapping area OA in a predetermined area. The resistance value can be precisely adjusted by forming the groove T by laser trimming in the area included.

Referring to FIG. 3 , a process of precisely adjusting the resistance value by forming a groove T by laser trimming in an area including the overlapping area OA will be described. FIG. 3 is a plan view of the resistor of the chip resistance element shown in FIG. 1 viewed from the direction II.

In this embodiment, it can be seen that the groove T by laser trimming is formed over one area of the first resistor 121 , the overlapping area OA, and one area of the second resistor 122 . The groove T may be formed by irradiating a laser beam starting from the second resistor 122, which is a low-resistance region, toward the first resistor 121, which is a high-resistance region. In the process of trimming the second resistor 121, which is a low-resistance area, the resistance value quickly approaches the target value, and in the process of trimming the overlapping area (OA), the resistance value rises gently, so the resistance value can be precisely adjusted. there is In the process of trimming the second resistor 121, which is a low-resistance region, since the resistance value quickly approaches the target value, an effect of reducing the trimmed length compared to the conventional method can be expected.

The effects of the present embodiment will be described by comparing the chip resistance element according to the present embodiment and the comparative example. 4 is a diagram comparing a resistance graph G1 of a chip resistance element according to an embodiment of the present invention and a resistance graph G2 of a comparative example.

The comparative example is a case in which only one resistor is disposed on an insulating substrate, and a resistor having a resistance value corresponding to the parallel resistance value of the resistance value of the first resistor and the resistance value of the second resistor according to this embodiment is disposed.

Trim length (%) Resistance value of G1 (%) Resistance value of G2 (%) 0 58 58 5 62 60 7 66 62 9 71 64 11 76 67 13 82 69 15 88 72 17 95 75 19 99 78 21 102 81 23 105 85

Referring to FIG. 4 and Table 1, in the case of the comparative example, it can be seen that the resistance value constantly increases in proportion to the trimming length, and it can be seen that the increase rate of the resistance value is generally lower than that of the present embodiment.

On the other hand, in this embodiment, the resistance value increases rapidly compared to the comparative example, but it can be seen that the resistance value gradually increases from the range (±5%) corresponding to the tolerance of the resistance value RT. This is because, in the case of the present embodiment, the trimming process starts with the second resistor 122, which is a low resistance region, and the overlapping region where the second resistor 122, which is a low resistance region, and the first resistor 121, which is a high resistance region, are stacked ( OA), while trimming the second resistor 122 whose resistance value is lower than that of Comparative Example, the resistance value rises rapidly compared to that of Comparative Example, and the first resistor 121 and the second resistor ( 122) while trimming the overlapping region OA, the resistance value of the resistor increases gently. Therefore, compared to the comparative example, the present embodiment has the advantage of being able to adjust the resistance value more precisely while the length to be trimmed is short. Referring to Table 1, when the resistor is trimmed by 19%, the resistance value of this embodiment is adjusted to a value corresponding to 99% of the target resistance value (RT), whereas the value of the comparative example is only 78% of the target resistance value. , and it was investigated that additional trimming was necessary.

FIG. 5 is a modified example of the resistor 120 of FIG. 1 , wherein the resistor 220 disposed between the first and second internal electrodes 241 and 251 is overlapped with each other in a predetermined area. It is the same as the embodiment of FIG. 1 in that it consists of the second resistor 222, but the center region 222a where trimming is made protrudes from the second resistor 222, and the trimming groove T penetrates the central region 222a. There are differences that are formed so as not to deviate. Therefore, the area in which the trimming groove T can be formed on the second resistor 222 is further widened, so that the overall width of the first and second resistors 221 and 222 is not changed, and the overlapping area OA ) has the advantage of increasing the area of

As shown in FIGS. 1 and 2 , the first and second terminals 140 and 150 are disposed on both ends of the insulating substrate 110 and are connected to the first resistor 121 of the resistor 120. 2 may be connected to both sides of the resistor 122, respectively.

The first and second terminals 140 and 150 include first and second internal electrodes 141 and 151 disposed on the first resistor 121 and the second resistor 122, respectively, and the first and second internal electrodes 141 and 151 respectively. First and second back electrodes 142 and 152 may be disposed on the other surface of the insulating substrate 110 to face the second internal electrodes 141 and 151 . When the first and second back electrodes 142 and 152 are disposed on the other surface of the insulating substrate 110 as described above, the first and second internal electrodes 141 and 151 and the first and second back electrodes 142 , 152) can prevent the insulating substrate 110 from being bent by the resistor 120 by canceling the force exerted by the resistor 120 on the insulating substrate 110 in the firing process. Although not limited thereto, the first and second back electrodes 142 and 152 may be formed by printing a conductive paste.

The first and second internal electrodes 141 and 151 may be formed using a printing process using a conductive paste (sintering after printing) or a deposition process. The first and second internal electrodes 141 and 151 may serve as seeds in a plating process for the first and second external electrodes 142 and 152 . For example, the first and second internal electrodes 141 and 151 may include at least one of silver (Ag), copper (Cu), nickel (Ni), and platinum (Pt). Although not limited thereto, the first and second external electrodes 142 and 152 may be formed by a plating process. The first and second external electrodes 142 and 152 may include at least one of nickel (Ni), tin (Sn), lead (Pd), and chromium (Cr). For example, the first and second external electrodes 142 and 152 may have a double layer of a Ni plating layer and a Sn plating layer. The Ni plating layer may prevent internal electrode components (eg, Ag) from being leached into the solder component during device mounting, and the Sn plating layer may be provided to facilitate bonding with the solder component during device mounting.

According to an embodiment of the present invention, the first and second internal electrodes 141 and 151 and the first and second back electrodes 142 and 152 are connected to the side end surface of the insulating substrate 110, respectively. and second side electrodes 143 and 153 may be selectively disposed.

The first and second side electrodes 143 and 153 are connected so that the first internal electrode 141 and the first back electrode 142 and the second internal electrode 151 and the second back electrode 152 are connected, respectively. can be placed. Accordingly, the problem of current concentration on one surface of the insulating substrate 110 between the first and second side electrodes 143 and 153 can be improved.

The first and second side electrodes 143 and 153 may be formed by sputtering a conductive material for forming the first and second side electrodes 143 and 153 on both end surfaces of the insulating substrate 110. can However, it is not necessarily limited thereto.

According to embodiments, the first and second internal electrodes 141 and 151, the first and second back electrodes 142 and 152, the first and second side electrodes 143 and 153, and the first And each of the second external electrodes 144 and 154 may be composed of multiple layers.

A resistance protective layer 130 may be disposed on a surface of the resistor 120 to prevent the resistor 120 from being exposed to the outside and to protect it from external impact.

The resistance protection layer 130 is formed by disposing the first and second internal electrodes 141 and 151, and then applying a material material paste to cover the exposed surface of the resistor 120 by a method such as screen printing, It can be formed by drying. The resistance protection layer 130 is made of a polymer having high surface strength and acid resistance, so that the resistor 120 is damaged by a strongly acidic plating solution in the plating process of forming the first and second external electrodes 144 and 154. can prevent it from happening.

6 is a perspective view showing a chip resistance element assembly having a substrate on which a chip resistance element is mounted according to an embodiment of the present invention, and FIG. 7 is a cut along line III-III′ of the chip resistance element assembly shown in FIG. 6 This is a cross-sectional side view.

6 and 7, the chip resistance element assembly 1 according to the present embodiment includes the chip resistance element 100 shown in FIG. 1 and a circuit board 10 on which the chip resistance element 100 is mounted. includes

The circuit board 10 includes first and second electrode pads 11 and 12 in the device mounting area. The first and second electrode pads 11 and 12 are land patterns connected to circuit patterns implemented on the circuit board 10 and provided for device mounting.

The chip resistive element 100 shown in FIG. 6 can be understood as being similar to the chip resistive element 100 shown in FIG. 1 . In addition, components of this embodiment may be understood with reference to descriptions of the same or similar components of the chip resistance element 100 shown in FIG. 1 unless otherwise stated.

As shown in FIG. 6, the chip resistance element 100 includes an insulating substrate 110, a resistor 120 disposed on one surface of the insulating substrate and having a first resistor 121 and a second resistor 122, It may include a resistance protection layer 130 covering the resistor 120 and first and second terminals 140 and 150 spaced apart from each other and disposed on the resistor 120 .

The circuit board 10 is a part where electronic circuits are formed, and integrated circuits (ICs) for specific operation or control of electronic devices are formed so that current supplied from a separate power source can flow.

In this case, the circuit board 10 may include various wiring lines or may further include other types of semiconductor devices such as transistors. In addition, the circuit board 10 may be configured in various ways as necessary, such as including a conductive layer or a dielectric layer.

The first and second electrode pads 11 and 12 are spaced apart from each other on the circuit board 10 and connected to the first and second terminals 140 and 150 of the resistance element through solder 14, respectively. It can be. In this embodiment, the heat of the resistor 120 is dissipated to the first and second terminals 140 and 150 through the second resistor protection layer 132, so that the electric power of the chip resistor element can be improved. there is.

In the chip resistance element assembly 1, the first and second terminals 140 and 150 are electrically connected to the electric circuit through the first and second electrode pads 11 and 12, so that the first and second terminals ( A resistor 120 between 140 and 150 may be connected to the circuit.

Although the embodiments of the present invention have been described in detail above, the scope of the present invention is not limited thereto, and various modifications and variations are possible without departing from the technical details of the present invention described in the claims. It will be obvious to those skilled in the art.

100: chip resistor element
110: insulating substrate
120: resistor
121: first resistor
122: second resistor
130: resistance protective layer
140: first terminal
150: second terminal
1: chip resistor element assembly
T: trimming groove

Claims (12)

an insulating substrate having first and second surfaces facing each other;
a resistor disposed on the first surface; and
First and second terminals disposed on the insulating substrate at both ends of the first surface in the longitudinal direction and respectively connected to the resistor,
The resistor is
a first resistor having a first region and including a material having a first resistance value; and
a second resistor having a second region overlapping the first region, including a material having a second resistance value different from the first resistance value, and having a protruding portion protruding in a direction of the first resistor;
the resistor has at least one groove penetrating the first region and the second region;
The chip resistance element of claim 1 , wherein the at least one groove extends to a region of the second resistor body excluding the first region and to each of the protrusions of the second resistor body.
According to claim 1,
The chip resistance element according to claim 1 , wherein the first region is a partial region of the first resistor body, and the second region is a partial region of the second resistor body.
According to claim 1,
Each of the first resistor and the second resistor has a width smaller than that of the first surface.
According to claim 1,
The chip resistance element according to claim 1 , wherein each of the first resistor and the second resistor has a rectangular shape disposed parallel to each other in a longitudinal direction of the first surface.
According to claim 1,
The first resistance value is greater than the second resistance value.
According to claim 5,
The chip resistance element according to claim 1 , wherein the second region is disposed on the first region.
According to claim 1,
At least one of the first region and the second region extends in a longitudinal direction of the first surface.
delete delete delete According to claim 1,
The chip resistance element further comprising a resistance protection layer covering the resistor.
A printed circuit board having a plurality of electrode pads; and
A chip resistance element disposed on the printed circuit board and electrically connected to the plurality of electrode pads;
The chip resistance element,
an insulating substrate having first and second surfaces facing each other;
a first resistor disposed on the first surface, connecting the first and second terminals and made of a material having a first resistance value, and a region connecting the first and second terminals and overlapping the first resistor; a resistor including a second resistor having a protruding portion protruding in a direction of the first resistor and made of a material having a second resistance value different from the first resistor; and
First and second terminals disposed on the insulating substrate at both ends of the first surface in the longitudinal direction and respectively connected to the resistor,
The overlapping area has at least one groove formed by laser trimming and penetrating the first area and the second area,
The chip resistance element assembly of claim 1 , wherein the at least one groove extends to a region of the second resistor body excluding the first region and to each of the protrusions of the second resistor body.

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