KR102506098B1 - Method and system of estimating wafer crystalline orientation - Google Patents

Abstract

The method includes: receiving a first wafer; defining a first zone and a second zone on the first wafer; defining a plurality of first areas and second areas for the first area and the second area, respectively; projecting a first ion beam onto a first area and receiving a first heat wave in response to the first ion beam; rotating the first wafer by a twist angle; projecting a second ion beam onto a second area and receiving a second heat wave in response to the second ion beam; and estimating a first crystal orientation angle of the first wafer based on the first ion beam, the second ion beam, the first thermal wave, and the second thermal wave.

Description

Method and system for estimating wafer crystal orientation {METHOD AND SYSTEM OF ESTIMATING WAFER CRYSTALLINE ORIENTATION}

[Claim Priority and Cross-Reference] This application claims priority from US Provisional Application No. 62/898,828, filed September 11, 2019, the contents of which are incorporated herein by reference in their entirety.

The semiconductor integrated circuit (IC) industry has achieved rapid growth. Technological advances in IC materials and design have created generations of ICs, each with smaller and more complex circuits than the previous generation. In order to manufacture advanced IC devices, ion implantation is widely used to form N-type wells or P-type wells by doping a workpiece, such as a semiconductor wafer, with impurities. To introduce conductivity into the well, the amount of impurities in the workpiece is altered using ion implantation. The desired impurity material can be ionized and accelerated by the ion source to form an ion beam having a defined energy. The ion beam is directed at the front surface of the workpiece and can penetrate into the bulk of the workpiece. The implanted ions may be distributed according to the depth of the wafer area, and the distribution and concentration of the ions may be controlled by adjusting, for example, an implantation angle and beam energy.

Aspects of the present disclosure are best understood by reading the detailed description below in conjunction with the accompanying drawings. Note that, in accordance with the standard practice in the industry, various features are not drawn to scale. In fact, the dimensions of various features may be arbitrarily increased or decreased for clarity of explanation.
1A is a schematic diagram illustrating a method of forming a semiconductor wafer, in accordance with some embodiments.
1B is a schematic diagram illustrating an ion beam projected onto a semiconductor wafer, in accordance with some embodiments.
2 is a flow diagram of a method of estimating a crystal orientation angle of a semiconductor wafer, in accordance with some embodiments.
3 is a schematic diagram showing a surface of a semiconductor wafer with divided regions, in accordance with some embodiments.
4 is a schematic diagram illustrating ion beam projection, in accordance with some embodiments.
5 is a schematic graph showing thermal wave intensity versus wafer tilt angle, in accordance with some embodiments.
6 is a flow diagram of a method of estimating a crystal orientation angle of a semiconductor wafer, in accordance with some embodiments.
7 is a flow diagram of a method of manufacturing a semiconductor device, in accordance with some embodiments.
8 is a schematic diagram of a system implementing a crystal orientation angle estimation method, in accordance with some embodiments.

The following disclosure provides many different embodiments or examples for implementing different features of the presented subject matter. Specific examples of components and arrangements are described below to simplify the present disclosure. Of course, these descriptions are by way of example only and are not intended to be limiting. For example, formation of a first feature over or on a second feature in the following description may include embodiments in which the first feature and the second feature are formed in direct contact, and the first feature and the second feature are formed in direct contact with each other. Embodiments may also be included in which additional features are formed between the features so that the first and second features do not come into direct contact. In addition, the disclosure may repeat reference numerals and/or letters in the various examples. This repetition is for the purpose of brevity and clarity and does not in itself dictate a relationship between the various embodiments and/or configurations discussed.

Moreover, spatially relative terms such as "below", "beneath", "below", "above", "above", etc. are used to describe one element(s) or feature(s) relative to another element(s) or feature(s) as shown in the figures. or may be used herein to describe a relationship of features, for ease of explanation. Spatially relative terms are intended to include different orientations of the device in use or operation as well as the orientation shown in the figures. The device may be otherwise oriented (rotated 90 degrees or at other orientations) and the spatially relative descriptors used herein may likewise be understood accordingly.

Although numerical ranges and parameters representing the broad scope of this disclosure are approximations, numerical values presented in specific examples are reported as accurately as possible. Any numerical value, however, inherently contains certain errors resulting from the normal deviations found in their respective testing measurements. Also, as used herein, the terms "about", "substantially" or "substantially" generally mean within 10%, 5%, 1% or 0.5% of a given value or range. Alternatively, the terms "about", "substantially" or "substantially" mean within an acceptable standard error of the mean as considered by one skilled in the art. Except for operating/operational examples, or unless expressly stated otherwise, all numerical ranges, amounts, values, and percentages of materials disclosed herein, such as quantities, durations, temperatures, operating conditions, percentages of amounts, etc., are expressed as "about" , as modified in all instances by the terms “substantially” or “substantially”. Accordingly, unless indicated to the contrary, the numerical parameters set forth in this disclosure and appended claims are approximations that may vary as desired. At the very least, each numerical parameter should be interpreted in light of the reported number of significant digits and applying conventional rounding techniques. A range can be expressed from one endpoint to the other endpoint, or as being between two endpoints. Unless otherwise specified, all ranges disclosed herein are inclusive of the endpoints.

As will be appreciated by those skilled in the art, embodiments of the present disclosure may be implemented as a system, method, or computer program product. Accordingly, embodiments of the present disclosure may be in the form of an entire hardware embodiment, in the form of an entire software embodiment (including firmware, resident software, microcode, etc.), or generally referred to herein as a "circuit", "block", "module" or It may take the form of an embodiment combining a software aspect and a hardware aspect, which may both be referred to as a "system". Further, embodiments of the present disclosure may take the form of a computer program product embodied in any tangible representation medium having program code embodied on the medium and executable by a computer.

A semiconductor wafer is used as a substrate of a semiconductor device, where a doped region can be formed in the bulk of the semiconductor wafer. A semiconductor ingot or wafer is formed with a crystal lattice structure having parallel lattice planes. The lattice plane of a semiconductor ingot determines the crystal orientation (or lattice orientation) angle of the ingot or semiconductor wafer. Generally, semiconductor ingots are grown with substantially the same crystal orientation angle throughout the ingot, and angle differences are generally negligible. However, as the size of semiconductor devices continues to decrease, the fabrication of semiconductor devices needs to be performed with more precise operating parameters. Otherwise, manufacturing operations performed with insufficient parameter accuracy will cause quality uniformity problems in manufactured semiconductor devices.

In this disclosure, a method and system for estimating the crystal orientation angle of a semiconductor wafer is provided. The estimation method is performed on a single test wafer. The proposed estimation method is more accurate than alternative estimation methods using multiple test wafers because it eliminates the effect of angular variation between different test wafers. Also, test wafer costs are reduced because only one test wafer is used per semiconductor ingot. Fabrication operations such as ion implantation can be performed with more accurate projection angles that better match the crystal orientation angle of the semiconductor, and doped regions can be formed by ion implantation with better profile control. The proposed method also reduces the cost of estimating crystal orientation angles of groups of wafers from the same lot, since in some scenarios a minimum of two test wafers or only one test wafer is required, thereby reducing the overhead of wafer quality control. and improve the correction efficiency of the crystal orientation angle.

1A is a schematic diagram illustrating a method 100 of forming a semiconductor wafer, in accordance with some embodiments. Method 100 begins with crystal growing operation 102 . Thus, the semiconductor ingot 103 is formed. Semiconductor ingot 103 may be formed using any crystal growth method known in the art, such as the Czochralski (Cz) method. In some embodiments, the semiconductor ingot 103 is grown to include a single crystal lattice structure. In some embodiments, semiconductor ingot 103 is an ingot made of silicon or other suitable semiconductor material. After the semiconductor ingot 103 is formed, an operation 104 is performed to fabricate several slices of semiconductor wafer 110, such as semiconductor wafers 110a, 110b or 110c, from the semiconductor ingot 103. Operation 104 involves slicing the semiconductor ingot 103 into green wafers, and beveling, lapping, etching, and polishing the green wafer to obtain a finished semiconductor wafer 110. ). In some embodiments, semiconductor wafers 110 belong to the same wafer lot if formed from the same semiconductor ingot 103 . In some embodiments, the finished semiconductor wafer 110 has a diameter of about 1 inch to about 12 inches. In some embodiments, the finished semiconductor wafer 110 has a thickness of about 100 μm to about 500 μm.

In some embodiments, since the semiconductor wafer 110 is made from the same semiconductor ingot 103, it may have a similar crystal structure having the same crystal orientation relative to a crystal plane, e.g., a (100), (110), or (111) crystal plane. have Regarding ion implantation (also referred to as ion beam projection) operation, the penetration depth and distribution of the implant is determined at least in part by the included angle between the incident ion beam and the crystal orientation angle of the lattice structure. As a result, the electrical behavior of a well region formed on a semiconductor wafer using ion beam projection and a semiconductor device including the well region is affected by the control accuracy of the crystal orientation angle.

In some embodiments, each semiconductor wafer, eg, semiconductor wafer 110a, 110b, and 110c has a respective normal N1, N2, and N3 perpendicular to the surface of semiconductor wafer 110a, 110b, or 110c. have Ideally, each semiconductor wafer 110a, 110b or 110c has a crystallographic orientation in the same direction parallel to the longitudinal axis 103L of the semiconductor ingot 103 associated with a particular crystallographic plane (e.g., (100) plane). Share. However, in most cases, when the semiconductor ingot 103 is sliced, the cutting blade may not be exactly perpendicular to the longitudinal axis 103L. As a result, the normals N1, N2 or N3 are not parallel to the directions of the respective crystal orientation lines 110L1, 110L2 and 110L3. The included angle (β ₁ , β 2 or β ₃ ) between the direction of the crystal orientation line 110L1 , 110L2 or 110L3 and the respective normal line N1 , _N2 or N3 is referred to herein as the semiconductor wafer 110a , 110b or 110c It is referred to as the crystal orientation angle. In some embodiments, the included angles β ₁ , β ₂ and β ₃ are substantially zero degrees.

In some embodiments, during crystal growth of the semiconductor ingot 103 , the orientation of the crystal plane may rotate about the longitudinal axis 103L as the crystal lattice structure grows upward. In other words, the actual crystal orientation lines 110L1, 110L2, and 110L3 at locations 108a, 108b, and 108c may each point in slightly different directions. Also, the included angles β ₁ , β ₂ and β ₃ may not be the same. In some embodiments, the rotation of the crystal plane during crystal growth is proportional to the grown height of the semiconductor ingot 103 . Thus, the included angles β ₁ , β ₂ and β ₃ , or equivalently, the crystal orientation angles of the semiconductor wafer 110 are expressed in approximately linear equations. In some other embodiments, the included angle (eg, β ₁ ) or equivalently the crystal orientation angle of the semiconductor wafer 110 is the included angle of two or more other semiconductor wafers 110 from the same semiconductor ingot 103 (eg, For example, it can be estimated by β ₂ and β ₃ ).

1B is a schematic diagram illustrating an ion beam 120 projected onto a semiconductor wafer 110, in accordance with some embodiments. Referring to plot A of FIG. 1B , a semiconductor wafer 110 having a surface 110S parallel to the xy plane is disposed. Plot A of FIG. 1B also shows a normal N extending in the direction of the z axis and perpendicular to surface 110S. In some embodiments, the crystal plane of the semiconductor wafer 110 may not be parallel to the surface 110S of the semiconductor wafer 110 as shown by the crystal orientation line 110L representing the crystal orientation of the semiconductor wafer 110 . can A crystal orientation angle β is formed between the normal line N and the crystal orientation line 110L. As the semiconductor wafer 110 rotates about normal N perpendicular to the xy plane, the crystal planes and crystal orientation lines 110L also rotate with the rotation of the semiconductor wafer 110 . In some embodiments, as semiconductor wafer 110 rotates about normal N, crystal orientation line 110L rotates about normal N. The notch 130N functions as a reference point, and the semiconductor wafer 110 can be rotated to the target coordinates (x ₀ , y ₀ ) by an angle rotated from the notch 130, and the reference line 110R and the target line 110T ) is referred to herein as the twist angle θ, where the reference line 110R is drawn from the center of the surface 110S to the notch 130N, and the target line 110T is the surface 110S. ) to the target coordinates (x ₀ , y ₀ ). In some embodiments, the twist angle θ represents a change in crystal plane orientation of the semiconductor wafer 110 .

Ion beam 120 is projected by an ion implantation source (not separately shown), such as an implanter used for ion implantation operations. Ion beam 120 and normal N form an included angle α, referred to herein as the incidence angle of the implanter. The ion beam 120 is projected onto a location such as the center of the surface 110S of the semiconductor wafer 110 along a path 120P.

Referring to plot B of FIG. 1B , top and side views of a semiconductor wafer 110 are shown. During the ion beam projection operation, the semiconductor wafer 110 may be tilted at a wafer tilt angle ω with respect to the xy plane. In some embodiments, a wafer stage (not separately shown) is provided to support and hold the semiconductor wafer 110, where the semiconductor wafer 110 is tilted by tilting the wafer stage. Assuming that the target coordinates (x ₀ , y ₀ ) have been selected as the tilt point, the semiconductor wafer 110 is tilted by tilting the wafer stage, where the target line 110T associated with the target coordinates (x ₀ , y ₀ ) is It forms a wafer tilt angle ω with the xy plane. The wafer tilt angle ω can be positive or negative depending on whether the target line 110T is above or below the xy plane. In some embodiments, the direction of crystal orientation line 110L varies by the amount of wafer tilt angle ω. Based on the above, the wafer tilt angle ω, twist angle θ, and projection angle α together determine the included angle between the ion beam 120 and the crystal orientation line 110L of the semiconductor wafer 110, whereby An implantation angle of the ion beam 120 into the semiconductor wafer 110 is determined by

In some embodiments, the angular difference (α-β) between the angle of incidence α of the ion beam 120 and the crystal orientation angle β is one of the factors determining the profile of the implanted well region. Further, when the implanted well regions have a reduced pitch, for example less than about 1 μm, the variation of the well region profile is greater. For example, in applications of advanced CMOS image sensors, sensing pixels are formed with a pixel pitch of less than 0.8 μm. In this situation, one or more wells are implanted to form a sensing pixel, where the deviation of the impact angle must be less than 0.05 degrees. As previously discussed, the actual impact angle is determined by the crystal orientation angle in addition to the implant angle of the injector. However, in a mass production process, it is difficult to have different lots of blank semiconductor wafers having the same crystal orientation angle. Even the same lot of semiconductor wafers made from the same semiconductor ingot 103, e.g., the semiconductor wafer 110 of FIG. , which exceeds the accuracy tolerance of advanced CMOS image sensors. Accordingly, there is a need to provide accurate estimates of crystal orientation angles in order to eliminate or reduce the interference of crystal orientation angle fluctuations.

2 is a flow diagram of a method 200 of estimating a crystal orientation angle of a semiconductor wafer, in accordance with some embodiments. Note that additional steps may be provided before, during, and after the steps shown in FIG. 2 , and that some of the steps described below may be replaced or eliminated for other embodiments of the method 200 . You have to understand. The order of steps may be interchangeable.

At step 202, a first wafer 110 is received. A first wafer 110 is also shown in FIG. 3 . In some embodiments, the first wafer 110 is selected from a wafer lot and serves as the test wafer of the wafer lot. In some embodiments, the first wafer 110 is placed on a wafer stage or platen (not separately shown). In some embodiments, a notch 110N is formed or marked on the first wafer. When the first wafer 110 is rotated by the wafer stage, a marker 302 pointing to the notch 110N of the first wafer 110 provides a reference point of the first wafer 110 for the notch 110N. .

In step 204 , a first zone 310 and a second zone 320 are defined on the first wafer 110 , as shown in plot A of FIG. 3 . In addition, a plurality of first regions 312, eg, first regions 312a, 312b, 312c, 312d, and 312e, and a plurality of second regions 322, eg, second regions 322a, 322b , 322c, 322d and 322e) are defined in the first zone and the second zone, respectively. In some embodiments, first zone 310 and second zone 320 represent two halves of first wafer 110 . In some embodiments, first zone 310 and second zone 320 are symmetrical to each other about symmetry line S1. In some embodiments, the first zone 310 and the second zone 320 have substantially the same area, each equal to half the total area of the first wafer 110 . In some embodiments, the first zone 310 is adjacent to the second zone 320; However, in some other embodiments, the first zone 310 and the second zone 320 are separated by a third zone between the first zone 310 and the second zone 320, and the first zone ( 310) and the second zone 320 each have an area less than half of the total area of the first wafer 110. In the illustrated embodiment, either the first section 310 or the second section 320 has a semi-circular shape; However, other shapes such as polygonal or circular shapes are also possible. The shapes and areas of the first region 310 and the second region 320 shown in plot A of FIG. 3 are for illustration purposes only. Other configurations of the first zone 310 and the second zone 320 are also within the contemplated scope of the present disclosure.

A first area 312 is defined in a first zone 310 . A second area 322 is defined in the second zone 320 . In some embodiments, first area 312 has a different shape or area. For example, the first region 312a has a semicircular shape, and each of the remaining first regions 312b, 312c, 312d, and 312e has an arc shape; However, other shapes such as polygonal shapes, pie shapes or circular shapes are also possible. In some embodiments, the first region 312a is adjacent to the remaining first regions 312b, 312c, 312d and 312e. The first area 312a may be laterally surrounded by the first areas 312b, 312c, 312d and 312e and the first area 322a of the second area 320. In some embodiments, the first regions 312a to 312e are adjacent to each other. In some embodiments, the first regions 312a to 312e are spaced apart from each other. In the illustrated example, the first zone 310 is divided into five first zones 312a to 312e. However, other numbers of first regions 312 are also possible.

In some embodiments, second area 322 has a different shape or area. For example, the second region 322a has a semicircular shape, and each of the remaining second regions 322b, 322c, 322d, and 322e has an arc shape; However, other shapes such as polygonal shapes, pie shapes or circular shapes are also possible. In some embodiments, the second region 322a is adjacent to the remaining second regions 322b, 322c, 322d and 322e. The second region 322a may be laterally surrounded by the second regions 322b , 322c , 322d , and 322e and the first region 312a of the first region 310 . In some embodiments, the second regions 322a to 322e are adjacent to each other. In some embodiments, the second regions 322a to 322e are spaced apart from each other. In the illustrated example, the second zone 320 is divided into five second zones 322a to 322e. However, other numbers of second regions 322 are also possible.

In some embodiments, one of the first regions 312, eg, first region 312a, and one of the second regions 322, eg, second region 322a, are paired. In some embodiments, the paired first region 312a and second region 322a are symmetric about symmetry line S1. In some embodiments, the paired first area 312a and second area 322a have the same area and shape. Similarly, the first region 312b (312c, 312d or 312e) is paired with the second region 322b (322c, 322d or 322e), and the first region 312b (312c, 312d or 312e) and The second region 322b (322c, 322d or 322e) is symmetric about the symmetry line S1.

In step 206, a first ion beam projection in which the first ion beam 402 is projected onto the first area 312 is performed, as shown in plot A of FIG. 4 . A first thermal wave 404 is received in response to the first ion beam 402 . In some embodiments, the implanter is configured to project individual first ion beams 402 one at a time onto a respective first region 312, wherein each first ion beam 402 is of the same energy and of the same Projected at different times with an implantation angle α, each individual first region 312 receives a respective first ion beam 402 at a respective wafer tilt angle ω. In some embodiments, the implanter repeatedly projects the first ion beam 402 at different tilt angles ω, where the tilt angle ω has an angular difference K ₁ . For example, the angle difference (K ₁ ) is 0.2°, and the injectors are applied to the first regions 312a to 312e at respective wafer tilt angles ω of -0.4 degrees, -0.2 degrees, 0 degrees, 0.2 degrees, and 0.4 degrees, respectively. and project the first ion beam 402 5 times. In some embodiments, second zone 320 is prevented from receiving first ion beam 402 during first ion beam projection.

When the first ion beam 402 is projected onto the surface 110S of the first wafer 110, the ionized particles of the first ion beam 402 are accelerated by the implanter and the inside of the first wafer 110 Penetrate into the lattice structure. Some of the ionized particles of the first ion beam 402 collide with atoms in the lattice structure to create a first thermal wave 404 that propagates outward. A heat wave detector, such as a thermometer, is used to receive the first heat wave 404 resulting from the collision of the first ion beam 402 with the grating structure. The intensity or temperature of the first thermal wave 404 is determined by the degree of impact, which is related to the actual impact angle of the first ion beam 402 . Because the first ion beam 402 is projected onto the individual first regions 312 at different wafer tilt angles ω, the first thermal wave 404 for different wafer tilt angles ω has different wave intensities.

In some embodiments, the first ion beam 402 impinges on each first region 312 at an impact angle expressed as an angle difference (α-β), assuming a wafer tilt angle (ω) of 0 degrees. By tuning the wafer tilt angle (ω), the actual collision angle can be made smaller than (α-β) to achieve greater ion penetration and fewer collisions between ionized particles and lattice atoms, thus making each first column Wave 414 may have a reduced wave intensity. In some embodiments, when the wafer tilt angle ω is tuned to compensate for the included angle (α-β) between the implantation angle α and the crystal orientation angle β, the first ion beam 402 has the smallest It impacts the crystal plane at an impact angle (substantially 0 degrees), resulting in a minimum wave intensity of the first thermal wave 404.

In step 208, also referring to plot B of FIG. 3, the first wafer 110 is rotated by a twist angle θ using a wafer stage. In some embodiments, the twist angle θ is set to 180 degrees; However, other values of twist angle θ are also possible. In an embodiment in which the twist angle θ is set to 180 degrees, the first wafer 110 is rotated by 180 degrees so that the notch 110N moves away from the marker 302 and the first regions 312a to 312e and The relative positions of the two regions 322a to 322e are interchanged with respect to the symmetry line S1.

In step 210, again referring to plot B of FIG. 4, second ion beam projection in which the second ion beam 412 is projected onto the second area 322 is performed. A second thermal wave 414 is received in response to the second ion beam 412 . In some embodiments, the implanter is configured to project individual second ion beams 412 one at a time onto a respective second region 322, wherein each second ion beam 412 is of the same energy and Projected at different times with an implant angle α, each individual second region 322 receives a separate second ion beam 412 at a respective wafer tilt angle ω. In some embodiments, first ion beam 402 and second ion beam 412 have the same implantation energy and implantation angle α. In some embodiments, the wafer tilt angle ω has an angular difference K ₂ . For example, the angle difference (K ₂ ) is 0.2°, and the injector has five inclination angles on the second regions 322a to 322e with respective wafer tilt angles of -0.4 degrees, -0.2 degrees, 0 degrees, 0.2 degrees, and 0.4 degrees. configured to project the second ion beam 412 . In some embodiments, the angular difference K ₁ is the same as or different from the angular difference K ₂ . In some embodiments, first zone 310 is prevented from receiving second ion beam 412 during second ion beam projection.

When the second ion beam 412 is projected onto the surface 110S of the first wafer 110, the ionized particles of the second ion beam 412 are accelerated by the implanter and the inside of the first wafer 110 Penetrate into the lattice structure. Some of the ionized particles of the second ion beam 412 collide with atoms in the lattice structure to create a second thermal wave 414 that propagates outward. A heat wave detector, such as a thermometer, is used to receive the second heat wave 414 resulting from the collision of the second ion beam 412 with the grating structure. The intensity or temperature of the second thermal wave 414 is determined by the degree of impact, which is related to the actual impact angle of the second ion beam 412 . Because the second ion beam 412 is projected onto the individual second regions 322 at different wafer tilt angles ω, the second thermal waves 414 for different wafer tilt angles ω have different wave intensities.

Referring to plots A and B of FIG. 4 , due to rotation of the first wafer 110 by a twist angle θ of 180 degrees, the crystal orientation angles β and -β are distinguished by signs. In some embodiments, assuming a wafer tilt angle ω of 0 degrees, the second ion beam 412 impinges on the second region 322 at an impact angle of (α+β). By tuning the wafer tilt angle ω, the actual collision angle can be made smaller than (α+β) to achieve greater ion penetration and fewer collisions between the ionized particles and lattice atoms, thus making each second column Reduce the wave intensity of the wave 414. In some embodiments, when the wafer tilt angle ω is tuned to compensate for the included angle α+β, the second ion beam 412 impinges on the crystal plane at the smallest impact angle (substantially 0 degrees), This results in the minimum wave intensity of the second thermal wave 414.

In step 212, the first crystal orientation angle β of the first wafer 110 is determined by the first ion beam 402, the second ion beam 412, the first thermal wave 404 and the second thermal wave. It is estimated based on (414). In some embodiments, the implantation angle of the implanter is also estimated based on the first ion beam 402 , the second ion beam 412 , the first thermal wave 404 and the second thermal wave 414 . Referring to FIG. 5 , a schematic graph 500 depicts thermal wave intensity versus wafer tilt angle (ω), in accordance with some embodiments. The intensities of the first heat wave 404 and the second heat wave 414 are plotted in graph 500 . The diamond markers represent the intensity of the first thermal wave 404 at different wafer tilt angles ω, and the square markers represent the intensity of the second thermal wave 414 at different wafer tilt angles ω.

As shown by the dotted lines, a curve fitting operation is performed to generate a curve that best fits the measurement of the first heat wave 404 . Similarly, another curve fitting operation is performed to generate a curve that best fits the measurement of the second heat wave 414, as shown by the solid line. Then, the wafer tilt angle ω ₁ that achieves the minimum intensity of the first thermal wave 404 is determined. Similarly, another wafer tilt angle ω ₂ that achieves the minimum intensity of the second thermal wave 414 is determined. In some embodiments, the value of the wafer tilt angle (ω ₁ or ω ₂ ) is determined by solving an equation describing the curve of the first thermal wave 404 or the second thermal wave 414 .

As previously discussed, the wafer tilt angle (ω ₁ ) leading to the minimum wave intensity of the first thermal wave 404 corresponds to the angle difference (α-β), whereas the minimum wave intensity of the second thermal wave 414 The wafer tilt angle (ω ₂ ) leading to corresponds to the angle difference (α+β). Therefore, the values of implantation angle α and crystal orientation angle β can be estimated through linear logarithm, and can be expressed as follows.

α = (ω1 + ω2 )/2

β = (ω2 - ω1 )/2

6 is a flow diagram of a method 600 of manufacturing a semiconductor device, in accordance with some embodiments. Note that additional steps may be provided before, during, and after the steps shown in FIG. 6, and that some of the steps described below may be replaced or eliminated for other embodiments of the method 600. You have to understand. The order of steps may be interchangeable.

At step 602, a first wafer is received. In some embodiments, the first wafer is wafer 110a of FIG. 1A and wafer 110 of FIGS. 3 and 4 . In step 604, a first zone and a second zone are defined on the first wafer. In some embodiments, the first zone and the second zone are the first zone 310 and the second zone 320 of FIG. 3 . In some embodiments, a first region 312 is defined in a first region 310 and a second region 322 is defined in a second region 320 .

In step 606, projection of the first ion beam and projection of the second ion beam are performed, wherein by respectively projecting the first ion beam and projecting the second ion beam, the first ion beam and the second ion beam are projected into a first ion beam. Projected onto the first zone and the second zone of the wafer, respectively. In some embodiments, the first ion beam and the second ion beam are first ion beam 402 and second ion beam 412, respectively. In some embodiments, the first region and the second region respectively receive the first ion beam projection and the second ion beam projection at respective injector tilt angles. In some embodiments, a first thermal wave and a second thermal wave are received in response to the first ion beam projection and the second ion beam projection, respectively. In some embodiments, projecting the first ion beam or projecting the second ion beam in step 606 is performed in a manner similar to that of steps 206 , 208 and 210 .

In step 608, a first crystal orientation angle of the first wafer is estimated based on the first ion beam and the second ion beam. In some embodiments, the first crystal orientation angle of the first wafer is further estimated based on the first thermal wave and the second thermal wave. In some embodiments, an implantation angle of the implanter is also estimated at step 608 based on the first ion beam, the second ion beam, the first thermal wave, and the second thermal wave. In some embodiments, the estimation of the first crystal orientation angle of the first wafer and the implant angle of the implanter in step 608 is performed in a manner similar to that of step 212 .

At step 610, a second wafer is received. In some embodiments, the second wafer is wafer 110b of FIG. 1A and wafer 110 of FIGS. 3 and 4 . In some embodiments, the first wafer and the second wafer are test wafers. In some embodiments, the first wafer and the second wafer are made from the same semiconductor ingot and are separated from the semiconductor ingot by one or more other wafers. In some embodiments, the first wafer and the second wafer belong to the same wafer lot and are separated by one or more other wafers.

In step 612, a third zone and a fourth zone are defined on the second wafer. In some embodiments, the third zone and the fourth zone are the first zone 310 and the second zone 320 of FIG. 3 . In some embodiments, a first region 312 is defined in a first region 310 and a second region 322 is defined in a second region 320 .

In step 614, projection of the third ion beam and projection of the fourth ion beam are performed, where by respectively projecting the third ion beam and projecting the fourth ion beam, the third ion beam and the fourth ion beam are projected into the second ion beam. Projected onto the third and fourth zones of the wafer, respectively. In some embodiments, the third ion beam and the fourth ion beam are first ion beam 402 and second ion beam 412 , respectively. In some embodiments, first region 312 and second region 322 of the second wafer receive the third ion beam projection and the fourth ion beam projection, respectively, at respective implanter tilt angles. In some embodiments, a third thermal wave and a fourth thermal wave are received in response to the third ion beam projection and the fourth ion beam projection, respectively. In some embodiments, projecting the third ion beam or projecting the fourth ion beam in step 614 is performed in a manner similar to that of steps 206 , 208 and 210 .

In step 616, a second crystal orientation angle of the second wafer is estimated based on the third ion beam and the fourth ion beam. In some embodiments, the second crystal orientation angle of the second wafer is further estimated based on the third thermal wave and the fourth thermal wave. In some embodiments, an implantation angle of the implanter is also estimated at step 616 based on the third ion beam, fourth ion beam, third thermal wave, and fourth thermal wave. In some embodiments, the estimation of the implant angle of the implanter and the second crystal orientation angle of the second wafer in step 616 is performed in a manner similar to that of step 212 .

At step 618, a third wafer is received. In some embodiments, the third wafer is a wafer prepared for fabricating a semiconductor device. In some embodiments, the third wafer is fabricated from the semiconductor ingot from which the first wafer and the second wafer are fabricated. In some embodiments, the third wafer belongs to the same wafer lot as the first wafer and the second wafer. In some embodiments, the third wafer is at a location in the semiconductor ingot between the first and second wafers.

In step 620, a third crystal orientation angle of the third wafer is determined based on the first crystal orientation angle and the second crystal orientation angle. In some embodiments, the third crystal orientation angle of the third wafer is an interpolation of the first crystal orientation angle and the second crystal orientation angle based on the distance between the first wafer, the second wafer and the third wafer in the semiconductor ingot; or determined by extrapolation. In some embodiments, the third crystal orientation angle of the third wafer is an arithmetic mean of the first wafer crystal orientation angle and the second wafer crystal orientation angle. In some embodiments, a fourth crystal orientation angle of a fourth wafer in the same semiconductor ingot is received, and a third crystal orientation angle of a third wafer is the first crystal orientation angle, the second crystal orientation angle, and the fourth crystal orientation angle. Based on , it is determined through a suitable approximation method, such as, for example, curve fitting or linear regression.

In some embodiments, the implanter used to perform the ion beam projection in steps 606 and 614 is the same implanter and the final implantation angle of the implanter is an estimate of the implantation angle of the implanter performed in steps 608 and 616. determined based on the results. In some embodiments, the final implant angle is determined by averaging the implant angle estimates for the first wafer and the second wafer performed in steps 608 and 616 .

In step 622, ion implantation is performed on a third wafer according to a third crystal orientation angle. In some embodiments, the third wafer is not a test wafer, and ion implantation is performed to fabricate a well region in the third wafer to fabricate a semiconductor device. In some embodiments, ion implantation is performed on the third wafer according to an implant angle of the implanter.

7 is a flow diagram of a method 700 of manufacturing a semiconductor device, in accordance with some embodiments. Note that additional steps may be provided before, during, and after the steps shown in FIG. 7 , and that some of the steps described below may be replaced or eliminated for other embodiments of the method 700 . You have to understand. The order of steps may be interchangeable.

At step 702, a plurality of wafers are received. In some embodiments, multiple wafers belong to the same wafer lot or different wafer lots. In some embodiments, multiple wafers are fabricated from the same semiconductor ingot or different semiconductor ingots. In step 704, the crystal orientation angles of the plurality of wafers are estimated. In some embodiments, the crystal orientation angle of each of the plurality of wafers is determined by method 200 in which the crystal orientation angle is estimated in step 212 or the crystal orientation angle is estimated in step 620 based on the crystal orientation angle of another wafer. is determined using method 600. In some embodiments, the crystal orientation angle is estimated by another suitable method. In some embodiments, the injection angle of the injector is also estimated at step 704 . In some embodiments, the plurality of wafers includes one or more test wafers, and the test wafer's crystal orientation angle is estimated. The crystal orientation angles of the remaining plurality of wafers are determined based on the estimated crystal orientation angles of the test wafers.

In step 706, the plurality of wafers excluding the test wafer, if any, are classified into one or more wafer groups according to the crystal orientation angle. In some embodiments, each wafer group is identified by a representative crystal orientation angle. In some embodiments, the number of wafer groups is determined based on the granularity of the sorted crystal orientation angles. The smaller the standard deviation of the crystal orientation angles of the wafers in a group of wafers, the more wafer groups may be needed that result in more accurate representative crystal orientation angles for each group of wafers. The wafers of each wafer group may originate from the same or different semiconductor ingots.

At step 708, at least one wafer is selected from a particular group of wafers. At step 710, an ion implantation operation is performed on at least one selected wafer. In some embodiments, the ion implantation operation is performed using an implanter according to an estimated tilt angle of the implanter and a crystal orientation angle representative of a group of wafers from which at least one wafer is selected. Since the selected wafers share a common representative crystal orientation angle, ion implantation operations can be performed with more accurate tilt angles for these wafers by minimizing or eliminating variations in crystal orientation angles between different wafers in a mass production process.

8 is a schematic diagram of a system 800 implementing a crystal orientation angle estimation method, in accordance with some embodiments. System 800 includes one or more processor 801 , network interface 803 , input/output (I/O) device 805 , storage 807 , memory 809 , and bus 808 . Bus 808 couples network interface 803 , I/O device 805 , storage 807 , memory 809 and processor 801 together.

The processor 801 is configured to execute program instructions including tools configured to perform the methods described and illustrated with reference to the figures of this disclosure. Accordingly, the tool is configured to perform the steps of estimating and providing crystal orientation angles of one or more semiconductor processing devices, and tuning parameters such as the inclination angle of an injector.

Network interface 803 is configured to access program instructions stored remotely over a network (not shown) and data accessed by the program instructions.

I/O devices 805 include input devices and output devices configured to enable user interaction with system 800 . In some embodiments, input devices include, for example, keyboards, mice, and other devices. Output devices include, for example, displays, printers, and other devices.

The storage device 807 is configured to store program instructions and data accessed by the program instructions. In some embodiments, storage device 807 includes non-transitory computer readable storage media, such as magnetic disks and optical disks.

The memory 809 is configured to store program instructions to be executed by the processor 801 and data accessed by the program instructions. In some embodiments, memory 809 may include any combination of random access memory (RAM), some other volatile storage device, read only memory (ROM), and some other non-volatile storage device. include

According to one embodiment, a method includes: receiving a first wafer; defining a first zone and a second zone on the first wafer; defining a plurality of first areas and second areas for the first area and the second area, respectively; projecting a first ion beam onto a first area and receiving a first heat wave in response to the first ion beam; rotating the first wafer by a twist angle; projecting a second ion beam onto a second area and receiving a second heat wave in response to the second ion beam; and estimating a first crystal orientation angle of the first wafer based on the first ion beam, the second ion beam, the first thermal wave, and the second thermal wave.

According to one embodiment, a method includes: defining a first zone and a second zone on a first wafer; projecting the first ion beam and the second ion beam onto the first zone and the second zone, respectively; estimating a first crystal orientation angle of the first wafer based on the first ion beam and the second ion beam; defining a third zone and a fourth zone on the second wafer; projecting a third ion beam and a fourth ion beam onto a third zone and a fourth zone, respectively; estimating a second crystal orientation angle of the second wafer based on the third ion beam and the fourth ion beam; and estimating a third crystal orientation angle of the third wafer based on the first crystal orientation angle and the second crystal orientation angle.

According to one embodiment, a method includes: receiving a plurality of wafers; estimating crystal orientation angles of the plurality of wafers; classifying a plurality of wafers into wafer groups according to crystal orientation angles; selecting at least one wafer from one of the wafer groups; and performing an ion implantation operation on at least one wafer according to a representative crystal orientation angle of one of the wafer group.

The foregoing has outlined features of several embodiments so that those skilled in the art may better understand the aspects of the present disclosure. Those skilled in the art will recognize that they can readily use the present disclosure as a basis for designing or modifying other processes and structures for carrying out the same purposes and/or achieving the same advantages of the embodiments introduced herein. You need to know. Those skilled in the art also know that such equivalent constructions do not depart from the spirit and scope of the present disclosure, and that various changes, replacements, and variations may be made in the present invention.

[Example 1]

in the method,

receiving the first wafer;

defining a first zone and a second zone on the first wafer;

defining a plurality of first and second regions for the first region and the second region, respectively;

projecting a first ion beam onto the first region and receiving a first thermal wave in response to the first ion beam;

rotating the first wafer by a twist angle;

projecting a second ion beam onto the second region and receiving a second thermal wave in response to the second ion beam; and

estimating a first crystal orientation angle of the first wafer based on the first ion beam, the second ion beam, and the first thermal wave and the second thermal wave;

How to include.

[Example 2]

In Example 1,

Projecting the first ion beam onto the first region includes projecting each of the first ion beams onto each of the first regions at different times and tilting the first wafer by a respective first tilt angle; , wherein the first inclination angle has an angular difference.

[Example 3]

In Example 1,

Projecting the second ion beam onto the second region includes projecting each of the second ion beams to each of the second regions at different times and tilting the first wafer by each second tilt angle; , The second inclination angle is distinguished by a second difference value.

[Example 4]

In Example 1,

wherein the twist angle is substantially 180 degrees.

[Example 5]

In Example 1,

The method of claim 1 , wherein the estimating the first crystal orientation angle of the first wafer includes measuring first and second intensities of the first thermal wave and the second thermal wave, respectively.

[Example 6]

In Example 1,

receiving a second wafer and defining a third zone and a fourth zone on the second wafer, wherein the first wafer and the second wafer are made of the same ingot;

projecting a third ion beam and a fourth ion beam onto the third zone and the fourth zone, respectively; and

estimating a second crystal orientation angle of the second wafer according to the third ion beam and the fourth ion beam;

How to include more.

[Example 7]

In Example 6,

receiving a third wafer from the ingot; and

estimating a crystal orientation angle of the third wafer based on the first crystal orientation angle and the second crystal orientation angle;

How to include more.

[Example 8]

In Example 7,

Wherein the crystal orientation angle of the third wafer includes an arithmetic average of the first crystal orientation angle and the second crystal orientation angle.

[Example 9]

In Example 1,

estimating an implantation angle of an implanter projecting the first ion beam and the second ion beam based on the first ion beam, the second ion beam, and the first thermal wave and the second thermal wave;

How to include more.

[Example 10]

In Example 9,

performing ion implantation on a third wafer according to a third crystal orientation angle and the implantation angle;

How to include more.

[Example 11]

In Example 1,

wherein the first zone and the second zone have a semi-circular shape.

[Example 12]

In Example 1,

wherein the first region comprises a first central region flanked by a remainder of the first region and the second region.

[Example 13]

in the method,

defining a first zone and a second zone on the first wafer;

projecting a first ion beam and a second ion beam onto the first zone and the second zone, respectively;

estimating a first crystal orientation angle of the first wafer based on the first ion beam and the second ion beam;

defining a third zone and a fourth zone on the second wafer;

projecting a third ion beam and a fourth ion beam onto the third zone and the fourth zone, respectively;

estimating a second crystal orientation angle of the second wafer based on the third ion beam and the fourth ion beam; and

estimating a third crystal orientation angle of a third wafer based on the first crystal orientation angle and the second crystal orientation angle;

How to include.

[Example 14]

In Example 13,

Forming a semiconductor ingot and slicing the semiconductor ingot to form the first wafer, the second wafer, and the third wafer

How to include more.

[Example 15]

In Example 13,

Projecting the first ion beam and the second ion beam onto the first zone and the second zone comprises projecting one of the first ion beams onto a first zone of the first zone and onto the second zone. projecting one of the second ion beams onto a second area of the region, wherein the one of the first ion beams and the one of the second ion beams have the same energy and an implantation angle.

[Example 16]

In Example 15,

wherein the first region and the second region are symmetric about the symmetry line of the first wafer.

[Example 17]

in the method,

receiving a plurality of wafers;

estimating crystal orientation angles of the plurality of wafers;

classifying the plurality of wafers into wafer groups according to the crystal orientation angle;

selecting at least one wafer from one of the groups of wafers; and

performing an ion implantation operation on the at least one wafer according to a representative crystal orientation angle of one of the groups of wafers;

How to include.

[Example 18]

In Example 17,

Estimating an implantation angle of an implanter performing the ion implantation operation

Further comprising, wherein the ion implantation operation is performed according to the implantation angle.

[Example 19]

In Example 17,

Wherein the plurality of wafers include a test wafer, and estimating the crystal orientation angles of the plurality of wafers includes estimating the crystal orientation angles of the test wafers before estimating the crystal orientation angles of the remaining wafers. which way.

[Example 20]

In Example 19,

wherein estimating the crystal orientation angle of the test wafer comprises projecting the ion beam onto different regions of the test wafer at different wafer tilt angles.

Claims (10)

in the method,
receiving the first wafer;
defining a first zone and a second zone on the first wafer;
defining a plurality of first and second regions for the first region and the second region, respectively;
projecting a first ion beam onto the first region and receiving a first thermal wave in response to the first ion beam;
rotating the first wafer by a twist angle;
projecting a second ion beam onto the second region and receiving a second thermal wave in response to the second ion beam; and
estimating a first crystal orientation angle of the first wafer based on the first ion beam, the second ion beam, and the first thermal wave and the second thermal wave;
How to include. According to claim 1,
Projecting the first ion beam onto the first region includes projecting each of the first ion beams onto each of the first regions at different times and tilting the first wafer by a respective first tilt angle; , wherein the first inclination angle has an angular difference. According to claim 1,
Projecting the second ion beam onto the second region includes projecting each of the second ion beams to each of the second regions at different times and tilting the first wafer by each second tilt angle; , The second inclination angle is distinguished by a second difference value. According to claim 1,
The method of claim 1 , wherein the estimating the first crystal orientation angle of the first wafer includes measuring first and second intensities of the first thermal wave and the second thermal wave, respectively. According to claim 1,
receiving a second wafer and defining a third zone and a fourth zone on the second wafer, wherein the first wafer and the second wafer are made of the same ingot;
projecting a third ion beam and a fourth ion beam onto the third zone and the fourth zone, respectively; and
estimating a second crystal orientation angle of the second wafer according to the third ion beam and the fourth ion beam;
How to include more. According to claim 1,
estimating an implantation angle of an implanter projecting the first ion beam and the second ion beam based on the first ion beam, the second ion beam, and the first thermal wave and the second thermal wave;
How to include more. According to claim 1,
wherein the first zone and the second zone have a semi-circular shape. According to claim 1,
wherein the first region comprises a first central region flanked by a remainder of the first region and the second region. in the method,
defining a first zone and a second zone on the first wafer;
projecting a first ion beam and a second ion beam onto the first zone and the second zone, respectively;
estimating a first crystal orientation angle of the first wafer based on the first ion beam and the second ion beam;
defining a third zone and a fourth zone on the second wafer;
projecting a third ion beam and a fourth ion beam onto the third zone and the fourth zone, respectively;
estimating a second crystal orientation angle of the second wafer based on the third ion beam and the fourth ion beam; and
estimating a third crystal orientation angle of a third wafer based on the first crystal orientation angle and the second crystal orientation angle;
How to include. in the method,
receiving a plurality of wafers;
estimating crystal orientation angles of the plurality of wafers, the estimating step comprising projecting an ion beam onto a first area and a second area of a first wafer; is symmetric about the line of symmetry of the first wafer;
classifying the plurality of wafers into wafer groups according to the crystal orientation angle;
selecting at least one wafer from one of the groups of wafers; and
performing an ion implantation operation on the at least one wafer according to a representative crystal orientation angle of one of the groups of wafers;
How to include.

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