KR102492365B1 - Organic light emitting display device - Google Patents

Abstract

An organic light emitting display device includes a display panel including first to nth pixel-rows connected to first to nth scan lines, a driving integrated circuit that drives the display panel, and a high power supply voltage and a low power supply voltage to the display panel. and a power supply circuit for supplying the driving power supply voltage to the driving integrated circuit. At this time, each of the pixel circuits constituting the first to nth pixel-rows performs a threshold voltage compensation operation on the driving transistor, and the first to nth scan times for the first to nth pixel-rows are The distance between the 1st to nth pixel-rows and the power supply circuit becomes shorter as the distance increases.

Description

Organic light emitting display device {ORGANIC LIGHT EMITTING DISPLAY DEVICE}

The present invention relates to a display device. More specifically, the present invention relates to an organic light emitting display device having a pixel circuit performing a threshold voltage compensation operation for a driving transistor.

In general, since an organic light emitting display device includes an organic light emitting diode that emits light by itself to display an image, unlike a liquid crystal display device, it does not require a separate light source and has a relatively small thickness and weight. In addition, since the organic light emitting display device is advantageous compared to the liquid crystal display device in terms of power consumption, luminance, and response speed, the organic light emitting display device is widely used as a display device included in electronic devices. In general, an organic light emitting diode included in each pixel circuit in an organic light emitting diode display emits light based on a current controlled by a driving transistor between a high power supply voltage ELVDD and a low power supply voltage ELVSS. Therefore, assuming all conditions are the same, when the high power supply voltage is high, the current flowing through the organic light emitting diode is large (i.e., the luminance is high), and when the high power supply voltage is low, the current flowing through the organic light emitting diode is small (i.e., low luminance). However, since the current flowing through the organic light emitting diode must be controlled by the data signal (ie, data voltage) applied to each pixel circuit, the high power supply voltage applied to all pixel circuits must be basically the same. However, since the high power supply voltage is applied from the power supply circuit to each pixel circuit via the power line, a voltage drop (IR-DROP) generated as the high power supply voltage passes through the power line reduces the distance from the power supply circuit. A relatively low high power supply voltage is applied to the farthest pixel circuit. As a result, even when the same data signal is applied to all pixel circuits, since the luminance of a pixel circuit that is far from the power supply circuit is lower than that of a pixel circuit that is close to the power supply circuit, the high power supply voltage is applied to each pixel. When applied to a circuit, non-uniformity in luminance of a display panel due to a voltage drop occurring as it passes through a power line must be compensated for.

One object of the present invention is to provide an organic light emitting display device capable of displaying high-quality images by compensating for luminance non-uniformity of a display panel due to a voltage drop occurring when a high power voltage is applied to each pixel circuit via a power line. is to provide However, the object of the present invention is not limited to the above object, and may be expanded in various ways without departing from the spirit and scope of the present invention.

In order to achieve one object of the present invention, an organic light emitting display device according to embodiments of the present invention provides first to n-th pixel-rows connected to first to n-th scan lines (where n is an integer greater than or equal to 2). A display panel including (pixel-rows), a driving integrated circuit driving the display panel, and a power supply circuit supplying a high power supply voltage and a low power supply voltage to the display panel and supplying a driving power supply voltage to the driving integrated circuit can include In this case, each of the pixel circuits constituting the first to n th pixel-rows performs a threshold voltage compensation operation on a driving transistor, and the first to n th scan times for the first to n th pixel-rows are performed. s may be shortened as distances between the first to n-th pixel-rows and the power supply circuit increase.

According to an exemplary embodiment, each of the pixel circuits includes an organic light emitting diode including a cathode connected to the low power supply voltage, a gate terminal connected to a first node, a first terminal connected to an anode of the organic light emitting diode, and a second node. A second transistor including a second terminal connected thereto and operating as the driving transistor, a gate terminal to which a scan signal is applied, a first terminal to which a data signal is applied, and a second terminal connected to the second node. , a third transistor including a gate terminal to which the scan signal is applied, a first terminal connected to the first node, and a second terminal connected to the anode of the organic light emitting diode, a gate terminal to which an emission control signal is applied, the third transistor A fourth transistor including a first terminal connected to two nodes and a second terminal connected to the high power supply voltage, and a storage capacitor including a first terminal connected to the first node and a second terminal connected to the high power supply voltage. can include

According to an embodiment, the first to n-th scan times may be determined by adjusting the length of a scan-on period of each of the first to n-th scan signals applied to the first to n-th pixel-rows.

According to an embodiment, as the length of the scan-on section becomes shorter, the first through n-th scan times may become shorter, and as the length of the scan-on section becomes longer, the first through n-th scan times may become longer. there is.

According to an embodiment, the first to n th scan times may be determined by adjusting an RC delay of each of the first to n th scan lines connected to the first to n th pixel-rows.

According to an embodiment, as the RC delay increases, the first through nth scan times may become shorter, and as the RC delay decreases, the first through nth scan times may become longer.

According to an embodiment, the RC delay of each of the first to nth scan lines may be adjusted by changing the type of materials included in each of the first to nth scan lines.

According to an embodiment, the RC delay of each of the first to nth scan lines may be adjusted by changing a mixing ratio of materials included in each of the first to nth scan lines.

According to an embodiment, the RC delay of each of the first to n th scan lines may be adjusted by changing a length of each of the first to n th scan lines.

In order to achieve one object of the present invention, an organic light emitting display device according to embodiments of the present invention provides first to n-th pixel-rows connected to first to n-th scan lines (where n is an integer greater than or equal to 2). A display panel including (pixel-rows), a driving integrated circuit driving the display panel, and a power supply circuit supplying a high power supply voltage and a low power supply voltage to the display panel and supplying a driving power supply voltage to the driving integrated circuit can include At this time, each of the pixel circuits constituting the first to n th pixel-rows performs a threshold voltage compensation operation for a driving transistor, and the first to n th pixel-rows have first to k th (provided that, k is an integer of 2 or more) pixel-blocks are grouped, and the first to k th scan times for the first to k th pixel-blocks correspond to the first to k th pixel-blocks and the The distance between the power supply circuits may be shortened as the distance increases.

According to an embodiment, each of the first to k th pixel-blocks may include the same number of pixel-rows.

According to an embodiment, at least two or more pixel-blocks among the first to k-th pixel-blocks may include different numbers of pixel-rows.

According to an exemplary embodiment, each of the pixel circuits includes an organic light emitting diode including a cathode connected to the low power supply voltage, a gate terminal connected to a first node, a first terminal connected to an anode of the organic light emitting diode, and a second node. A second transistor including a second terminal connected thereto and operating as the driving transistor, a gate terminal to which a scan signal is applied, a first terminal to which a data signal is applied, and a second terminal connected to the second node. , a third transistor including a gate terminal to which the scan signal is applied, a first terminal connected to the first node, and a second terminal connected to the anode of the organic light emitting diode, a gate terminal to which an emission control signal is applied, the third transistor A fourth transistor including a first terminal connected to two nodes and a second terminal connected to the high power supply voltage, and a storage capacitor including a first terminal connected to the first node and a second terminal connected to the high power supply voltage. can include

According to an embodiment, the first to k th scan times may be determined by adjusting a length of a scan-on period of each of the first to n th scan signals applied to the first to n th pixel-rows.

According to an embodiment, as the length of the scan on section becomes shorter, the first to k th scan times may be shorter, and as the length of the scan on section is longer, the first to k th scan times may be longer. there is.

According to an embodiment, the first to k th scan times may be determined by adjusting an RC delay of each of the first to n th scan lines connected to the first to n th pixel-rows.

According to an embodiment, as the RC delay increases, the first to kth scan times may become shorter, and as the RC delay decreases, the first to kth scan times may become longer.

According to an embodiment, the RC delay of each of the first to nth scan lines may be adjusted by changing the type of materials included in each of the first to nth scan lines.

According to an embodiment, the RC delay of each of the first to nth scan lines may be adjusted by changing a mixing ratio of materials included in each of the first to nth scan lines.

According to an embodiment, the RC delay of each of the first to n th scan lines may be adjusted by changing a length of each of the first to n th scan lines.

In the organic light emitting diode display according to embodiments of the present invention, scan times for pixel circuits in a display panel are set for each pixel-row or pixel-block based on a distance between the pixel circuits and a power supply circuit that supplies a high power supply voltage. different (that is, as the distance between the power supply circuit and the pixel circuits increases, the scan times for the pixel circuits become shorter, and as the distance between the power supply circuit and the pixel circuits decreases, the scan times for the pixel circuits decrease) When the high power voltage is applied to each pixel circuit, a high-quality image may be displayed by compensating for luminance non-uniformity of the display panel due to a voltage drop occurring as the high power voltage is applied to each pixel circuit. However, the effects of the present invention are not limited to the above-described effects, and may be variously extended within a range that does not deviate from the spirit and scope of the present invention.

1 is a block diagram illustrating an organic light emitting display device according to example embodiments.
FIG. 2 is a diagram illustrating an example in which scan times of pixel circuits are determined according to locations within a display panel in the organic light emitting diode display of FIG. 1 .
FIG. 3 is a diagram illustrating another example in which scan times of pixel circuits are determined according to positions within a display panel in the organic light emitting diode display of FIG. 1 .
FIG. 4 is a circuit diagram illustrating an example of a pixel circuit included in the organic light emitting diode display of FIG. 1 .
FIG. 5 is a timing diagram illustrating signals driving the pixel circuit of FIG. 4 .
6 is a diagram illustrating an example in which the organic light emitting diode display of FIG. 1 adjusts a scan time of each pixel circuit.
7 is a diagram illustrating another example in which the organic light emitting diode display of FIG. 1 adjusts a scan time of each pixel circuit.
FIG. 8 is a diagram illustrating a configuration of a scan line for adjusting a scan time of each pixel circuit in FIG. 7 .
FIG. 9 is a diagram illustrating another configuration of a scan line for adjusting a scan time of each pixel circuit in FIG. 7 .
FIG. 10 is a diagram illustrating another configuration of a scan line for adjusting a scan time of each pixel circuit in FIG. 7 .
11 is a block diagram illustrating an electronic device according to embodiments of the present invention.
12A is a diagram illustrating an example in which the electronic device of FIG. 11 is implemented as a television.
12B is a diagram illustrating an example in which the electronic device of FIG. 11 is implemented as a smart phone.

Hereinafter, embodiments of the present invention will be described in more detail with reference to the accompanying drawings. The same reference numerals are used for the same components in the drawings, and redundant descriptions of the same components will be omitted.

FIG. 1 is a block diagram illustrating an organic light emitting display device according to example embodiments, and FIG. 2 is an example in which scan times of pixel circuits are determined according to locations within a display panel in the organic light emitting display device of FIG. 1 . FIG. 3 is a diagram illustrating another example in which scan times of pixel circuits are determined according to positions within a display panel in the organic light emitting diode display of FIG. 1 .

Referring to FIGS. 1 to 3 , the organic light emitting diode display 100 may include a display panel 120 , a driving integrated circuit 140 and a power supply circuit 160 . At this time, the display panel 120 may be connected to the driving integrated circuit 140 through the scan lines SL(1), ..., SL(n), data lines, and emission control lines, and the power line It may be connected to the power supply circuit 160 through them. However, for convenience of description, only the scan lines SL(1), ..., SL(n) are shown in FIGS. 1 to 3 .

The display panel 120 may include pixel circuits P. Depending on the exemplary embodiment, the pixel circuits P may be arranged in a matrix form within the display panel 120 . The pixel circuits P constitute first through nth (where n is an integer greater than or equal to 2) pixel-rows PR(1), ..., PR(n), and the first through nth pixel-rows are (PR(1), ..., PR(n)) may be respectively connected to the first to nth scan lines SL(1), ..., SL(n). For example, the pixel circuits P constituting the first pixel-row PR(1) simultaneously apply the first scan signal from the driving integrated circuit 140 through the first scan line SL(1). and the pixel circuits P constituting the second pixel-row PR(2) simultaneously apply the second scan signal from the driving integrated circuit 140 through the second scan line SL(2). and the pixel circuits P constituting the n-th pixel-row PR(n) simultaneously apply the n-th scan signal from the driving integrated circuit 140 through the n-th scan line SL(n). can receive In an exemplary embodiment, each of the pixel circuits P may include an organic light emitting diode including an anode connected to the first terminal of the first transistor and a cathode connected to the low power supply voltage ELVSS, a gate terminal connected to the first node, and an organic light emitting diode. A first transistor (ie, driving transistor) including a first terminal connected to the anode of the diode and a second terminal connected to the second node, a gate terminal to which a scan signal is applied, a first terminal to which a data signal is applied, and a second node A second transistor including a second terminal connected to, a gate terminal to which a scan signal is applied, a third transistor including a first terminal connected to a first node and a second terminal connected to an anode of an organic light emitting diode, an emission control signal A fourth transistor including a gate terminal to be applied, a first terminal connected to the second node and a second terminal connected to the high power supply voltage ELVDD, and a first terminal connected to the first node and connected to the high power supply voltage ELVDD. A storage capacitor including a second terminal may be included. At this time, each of the pixel circuits P may perform a threshold voltage compensation operation for the first transistor. However, this will be described in detail with reference to FIGS. 4 and 5 .

The driving integrated circuit 140 may be connected to the display panel 120 to drive the display panel 120 . That is, the driving integrated circuit 140 may be connected to the display panel 120 through data lines and may be connected to the display panel 120 through scan lines SL(1), ..., SL(n). and can be connected to the display panel 120 through emission control lines. Specifically, the driving integrated circuit 140 may include a data driver, a scan driver, an emission control driver, a timing controller, and the like. The data driver may provide data signals (ie, data voltages) to the display panel 120 through data lines. The scan driver may provide scan signals to the display panel 120 through scan lines SL(1), ..., SL(n). The light emission control driver may provide light emission control signals to the display panel 120 through light emission control lines. The timing controller may generate various control signals to control the data driver, scan driver, and emission control driver. In this way, the driving integrated circuit 140 may drive the display panel 120 by providing scan signals, data signals, emission control signals, and the like to the pixel circuit P in the display panel 120 . The power supply circuit 160 may supply the high power supply voltage ELVDD and the low power supply voltage ELVSS to the display panel 120 and the driving power supply voltage VOL to the driving integrated circuit 140 . To this end, the power supply circuit 160 generates a high power supply voltage ELVDD, a low power supply voltage ELVSS, and a driving power supply voltage VOL required for the operation of the organic light emitting diode display 100 based on an external supply voltage. A DC-DC converter and the like may be included.

In general, the power supply circuit 160 is located on one side of the display panel 120 . Accordingly, as shown in FIGS. 2 and 3 , since the high power voltage ELVDD is applied from the power supply circuit 160 to each pixel circuit P in the display panel 120 via the power line, A relatively low high power supply voltage ELVDD is inevitably applied to a pixel circuit P far from the power supply circuit 160 due to a voltage drop generated as the source voltage ELVDD passes through the power supply line. As a result, in the conventional organic light emitting display device, the luminance of the pixel circuit P farther from the power supply circuit 160 is lower than the luminance of the pixel circuit P closer to the power supply circuit 160 under the same conditions. Therefore, uneven luminance of the display panel 120 is caused. To solve this problem, the organic light emitting display device 100 includes a power supply circuit 160 supplying a high power supply voltage ELVDD and a pixel circuit ( different for each pixel-row (PR(1), ..., PR(n)) or pixel-block (BLK(1), ..., BLK(k)) based on the distance between P) . In one embodiment, as shown in FIG. 2 , the first to nth scan times for the first to nth pixel-rows PR(1), ..., PR(n) are the first to nth scan times. As the distance between the n pixel-rows PR(1), ..., PR(n) and the power supply circuit 160 increases, the distance may be shortened (that is, represented by SHORT and LONG in FIG. 2). That is, scan times for the pixel circuits P in the display panel 120 are different for each pixel-row PR(1), ..., PR(n). For example, the first scan time for the first pixel-row PR(1) is shorter than the second scan time for the second pixel-row PR(2), and the second pixel-row PR( The second scan time for 2)) is shorter than the third scan time for the third pixel-row PR(3), and the n-th scan time for the n−1 th pixel-row PR(n−1) The -1 scan time may be shorter than the nth scan time for the nth pixel-row PR(n). As a result, due to the characteristics of the pixel circuit P performing the threshold voltage compensation operation for the driving transistor, as the scan time becomes shorter, the voltage of the node corresponding to the gate terminal of the driving transistor decreases, and the voltage of the corresponding node decreases. Since the current flowing through the organic light emitting diode increases accordingly, when the high power supply voltage ELVDD is applied to each pixel circuit P, the luminance non-uniformity of the display panel 120 due to the voltage drop occurring as it passes through the power line Compensation may be performed for each pixel-row (PR(1), ..., PR(n)).

In another embodiment, as shown in FIG. 3 , the first to nth pixel-rows PR(1), ..., PR(n) are the first to kth (where k is an integer greater than or equal to 2). ) grouped into pixel-blocks BLK(1), ..., BLK(k), and for the first to k th pixel-blocks BLK(1), ..., BLK(k) The first to k th scan times may become shorter as the distance between the first to k th pixel-blocks BLK(1), ..., BLK(k) and the power supply circuit 160 increases. (i.e. indicated by SHORT and LONG in FIG. 3). That is, scan times for the pixel circuits P in the display panel 120 are different for each pixel-block (BLK(1), ..., BLK(k)). Therefore, scan times for the pixel circuits P may be the same within the same pixel-block (BLK(1), ..., BLK(k)). For example, the first scan time for the first pixel-block BLK(1) is shorter than the second scan time for the second pixel-block BLK(2), and the second scan time for the second pixel-block BLK( 2)) is shorter than the third scan time for the third pixel-block BLK(3), and the kth scan time for the k−1 th pixel-block BLK(k−1) The -1 scan time may be shorter than the k th scan time for the k th pixel-block BLK(k). As a result, due to the characteristics of the pixel circuit P performing the threshold voltage compensation operation for the driving transistor, as the scan time becomes shorter, the voltage of the node corresponding to the gate terminal of the driving transistor decreases, and the voltage of the corresponding node decreases. Since the current flowing through the organic light emitting diode increases accordingly, when the high power supply voltage ELVDD is applied to each pixel circuit P, the luminance non-uniformity of the display panel 120 due to the voltage drop occurring as it passes through the power line Compensation may be performed for each pixel-block (BLK(1), ..., BLK(k)). In an embodiment, each of the first to kth pixel-blocks BLK(1), ..., BLK(k) has the same number of pixel-rows PR(1), ..., PR(n )) may be included. In another embodiment, at least two or more pixel-blocks (BLK(1), ..., BLK(k) among the first to kth pixel-blocks (BLK(1), ..., BLK(k)) )) may include different numbers of pixel-rows PR(1), ..., PR(n).

Meanwhile, the scan time for each pixel circuit P may be determined in various ways. In an embodiment, the scan time for each pixel circuit P may be determined by adjusting the length of a scan on period of a scan signal applied to each pixel circuit P. In general, since each pixel circuit P performs a scan operation during the scan-on period of the scan signal, the scan-on period of the scan signal can be regarded as the scan time of each pixel circuit P. Therefore, as the length of the scan-on period of the scan signal applied to each pixel circuit P becomes shorter, the scan time for each pixel circuit P becomes shorter, and the scan signal applied to each pixel circuit P becomes shorter. As the length of the scan-on period increases, the scan time for each pixel circuit P increases. In another embodiment, the scan time for each pixel circuit P may be determined by adjusting the RC delay of the scan lines SL(1), ..., SL(n) connected to each pixel circuit P. . In general, when the RC delay of the scan lines SL(1), ..., SL(n) increases, each pixel circuit P through the scan lines SL(1), ..., SL(n) The rising time and falling time of the scan signal applied to the pixel circuit P increase, and when the rising time and falling time of the scan signal applied to each pixel circuit P increase, the corresponding scan signal is scanned on. An effect of shortening the section appears, and accordingly, the scan time for each pixel circuit P may be shortened. Therefore, as the RC delay of the scan lines SL(1), ..., SL(n) connected to each pixel circuit P increases, the scan time for each pixel circuit P decreases, and the scan time for each pixel circuit P decreases. As the RC delay of the scan lines SL(1), ..., SL(n) connected to the circuit P decreases, the scan time for each pixel circuit P increases. For example, the RC delay of the scan lines SL(1), ..., SL(n) connected to each pixel circuit P is the corresponding scan line SL(1), ..., SL(n) It can be controlled by changing the types of materials included in. As another example, the RC delay of the scan lines SL(1), ..., SL(n) connected to each pixel circuit P is the corresponding scan line SL(1), ..., SL(n) It can be adjusted by changing the mixing ratio of the substances included in. As another example, the RC delay of the scan lines SL(1), ..., SL(n) connected to each pixel circuit P is the corresponding scan line SL(1), ..., SL(n) ) can be adjusted by changing the length of However, this will be described in detail with reference to FIGS. 6 to 10 .

As such, the organic light emitting display device 100 determines the scan times for the pixel circuits P in the display panel 120 between the power supply circuit 160 supplying the high power supply voltage ELVDD and the pixel circuits P. It is different for each pixel-row (PR(1), ..., PR (n)) or pixel-block (BLK (1), ..., BLK (k)) based on the distance of As the distance between the supply circuit 160 and the pixel circuits P increases, scan times for the pixel circuits P become shorter, and the distance between the power supply circuit 160 and the pixel circuits P increases. When the high power supply voltage ELVDD is applied to each pixel circuit P, a voltage drop generated as the high power supply voltage ELVDD passes through the power line causes the display panel to become longer. A high-quality image can be displayed by compensating for the luminance non-uniformity of (120).

FIG. 4 is a circuit diagram illustrating an example of a pixel circuit included in the organic light emitting diode display of FIG. 1 , and FIG. 5 is a timing diagram illustrating signals driving the pixel circuit of FIG. 4 .

4 and 5 , each pixel circuit 200 included in the organic light emitting display device 100 includes an organic light emitting diode (OLED), a first transistor T1, a second transistor T2, and a third transistor. (T3), a fourth transistor T4, and a storage capacitor Cst. That is, since the pixel circuit 200 includes four transistors T1, ..., T4 and one capacitor Cst, it may be referred to as a 4T-1C pixel circuit. Meanwhile, in FIG. 4, the first to fourth transistors T1, ..., T4 are shown as p-type metal oxide semiconductor (PMOS) transistors, but the first to fourth transistors T1 , ..., the types of T4) are not limited thereto. For example, the first to fourth transistors T1, ..., T4 may be implemented as n-type metal oxide semiconductor (NMOS) transistors or a combination of PMOS transistors and NMOS transistors. there is.

The organic light emitting diode OLED may include an anode connected to the first terminal of the first transistor T1 and a cathode connected to the low power supply voltage ELVSS. The first transistor T1 may include a gate terminal connected to the first node N1, a first terminal connected to the anode of the OLED, and a second terminal connected to the second node N2. That is, the first transistor T1 may be referred to as a driving transistor. That is, the first transistor T1 can control the current flowing through the organic light emitting diode OLED based on the voltage applied to the gate terminal (ie, the voltage of the first node N1), and accordingly, the organic light emitting diode The luminance of the (OLED) may be adjusted to express gray levels. The second transistor T2 may include a gate terminal to which the scan signal SCAN is applied, a first terminal to which the data signal DATA is applied, and a second terminal connected to the second node N2. As shown in FIG. 5 , in the data writing period COMP in which the scan signal SCAN has a logic low level, the second transistor T2 responds to the scan signal SCAN applied to the gate terminal. When turned on, the data signal DATA applied to the first terminal of the second transistor T2 may be transferred to the second node N2 connected to the second terminal of the second transistor T2. That is, the second transistor T2 may be referred to as a switching transistor. The third transistor T3 may include a gate terminal to which the scan signal SCAN is applied, a first terminal connected to the first node N1 , and a second terminal connected to the anode of the organic light emitting diode OLED. As shown in FIG. 5 , in the data writing period COMP in which the scan signal SCAN has a logic low level, the third transistor T3 is turned on in response to the scan signal SCAN applied to the gate terminal. Accordingly, a threshold voltage compensation operation for the first transistor T1 may be performed. That is, the third transistor T3 may be referred to as a threshold voltage compensation transistor. The fourth transistor T4 may include a gate terminal to which the emission control signal EM is applied, a first terminal connected to the second node N2 , and a second terminal connected to the high power supply voltage ELVDD. As shown in FIG. 5 , in the emission period EMI in which the emission control signal EM has a logic low level, the fourth transistor T4 is turned on in response to the emission control signal EMI applied to the gate terminal. , Accordingly, a current flows through the organic light emitting diode OLED so that the organic light emitting diode OLED can emit light. That is, the fourth transistor T4 may be referred to as an emission control transistor. The storage capacitor Cst may include a first terminal connected to the first node N1 and a second terminal connected to the high power supply voltage ELVDD. Accordingly, the storage capacitor Cst may be charged with the voltage of the first node N1 during the data writing period COMP.

As described above, the organic light emitting diode display 100 includes the power supply circuit 160 supplying the high power supply voltage ELVDD and the pixel circuit 200 for scan times for the pixel circuits 200 in the display panel 120. different for each pixel-row or pixel-block based on the distance between them (that is, as the distance between the power supply circuit 160 and the pixel circuits 200 increases, the scan time for the pixel circuits 200 increases) are shortened, and as the distance between the power supply circuit 160 and the pixel circuits 200 becomes shorter, the scan times for the pixel circuits 200 become longer), so that the high power supply voltage ELVDD is When applied to the circuit 200 , non-uniformity in luminance of the display panel 120 due to a voltage drop occurring as it passes through the power line may be compensated for. This is done using the characteristics of the pixel circuit 200 . Specifically, during the data writing period COMP, the third transistor T3 is turned on in response to the scan signal SCAN, and accordingly, the first node N1 and the anode of the organic light emitting diode OLED may be connected to each other. there is. That is, the third transistor T3 may diode-connect the gate terminal and the first terminal of the first transistor T1 during the data writing period COMP. Meanwhile, as shown in [Equation 1] below, the current flowing through the organic light emitting diode OLED is determined based on the voltage difference between the gate terminal and the source terminal of the first transistor T1.

[Equation 1]

(However, Ioled is the current flowing through the organic light emitting diode (OLED), K is a constant value determined by the mobility and parasitic capacitance of the first transistor (T1), and Vgs is the gate terminal and source of the first transistor (T1) It is the voltage difference between the terminals, and Vth is the threshold voltage of the first transistor T1.)

As shown in [Equation 1], when the first transistor T1 is a PMOS transistor, the voltage applied to the gate terminal of the first transistor T1 (ie, the voltage at the first node N1) The smaller this value, the larger the current flowing through the organic light emitting diode OLED, and the larger the voltage applied to the gate terminal of the first transistor T1, the smaller the current flowing through the organic light emitting diode OLED. At this time, the voltage of the first node N1 is determined by [Equation 2] below.

[Equation 2]

(However, VN1 is the voltage of the first node N1, Vi is the initial voltage of the first node N1, t is the scan time (ie, data write time), R is the total resistance through which the data signal is transmitted , and C is the capacitance of the storage capacitor Cst.)

As shown in [Equation 2], the voltage applied to the gate terminal of the first transistor T1, that is, the voltage VN1 of the first node N1 increases as the scan time t increases, and the scan time ( The shorter t) is, the smaller it becomes. As a result, the current flowing through the organic light emitting diode OLED decreases as the scan time t increases, and increases as the scan time t decreases. Therefore, since the luminance of the pixel circuits 200 farther from the power supply circuit 160 is low under the same condition, the organic light emitting diode display 100 can control the pixel circuits 200 farther from the power supply circuit 160. luminance is increased by increasing the current flowing through the organic light emitting diode (OLED) by shortening the scan times (t) for By reducing the current flowing through the organic light emitting diode (OLED) to lower the luminance, when the high power supply voltage ELVDD is applied to each pixel circuit 200, the display panel due to the voltage drop caused by passing through the power line ( 120) can compensate for the luminance non-uniformity. In an exemplary embodiment, the organic light emitting display device 100 sets the scan times t for the pixel circuits 200 for each pixel-row or pixel-block to each of the scan signals SCAN applied to the pixel circuits 200 . It can be determined by adjusting the length of the scan-on section of . In another embodiment, the organic light emitting display device 100 sets the scan times t for the pixel circuits 200 for each pixel-row or pixel-block to the RC delay of each of the scan lines connected to the pixel circuits 200. can be determined by adjusting

6 is a diagram illustrating an example in which the organic light emitting diode display of FIG. 1 adjusts a scan time of each pixel circuit.

Referring to FIG. 6 , the organic light emitting diode display 100 determines scan times t for the pixel circuits 200 for each pixel-row or pixel-block by using scan signals SCAN applied to the pixel circuits 200 . It can be determined by adjusting the length of each scan-on section. As described above, the voltage applied to the gate terminal of the first transistor T1 in the pixel circuit 200, that is, the voltage VN1 of the first node N1 decreases as the scan time t increases, and the scan time t increases. The shorter the time t, the larger it becomes. Therefore, as shown in FIG. 6 , when the organic light emitting display device 100 reduces the length of the scan-on period of the scan signal SCAN applied to the specific pixel circuit 200 (that is, shortens the length from OP to CP) , the data writing period ST in which the pixel circuit 200 performs the data writing operation and the threshold voltage compensation operation decreases, and accordingly, the voltage applied to the gate terminal of the first transistor T1, that is, the first node The voltage (VN1) of (N1) decreases (i.e. denoted by DIF). As a result, the current flowing through the organic light emitting diode (OLED) within the corresponding pixel circuit 200 increases, and accordingly, the luminance of the corresponding pixel circuit 200 increases. In this way, the organic light emitting display device 100 shortens the scan times t for the pixel circuits 200 far from the power supply circuit 160 to increase the current flowing through the organic light emitting diode OLED, thereby increasing luminance. The high power supply voltage ELVDD ) is applied to each pixel circuit 200, it is possible to compensate for luminance non-uniformity of the display panel 120 due to a voltage drop occurring as it passes through the power line.

FIG. 7 is a diagram illustrating another example in which the organic light emitting diode display of FIG. 1 adjusts the scan time of each pixel circuit, and FIG. 8 shows a configuration of a scan line for adjusting the scan time of each pixel circuit in FIG. 7 . FIG. 9 is a diagram showing another configuration of a scan line for adjusting the scan time of each pixel circuit in FIG. 7 , and FIG. 10 is another configuration of a scan line for adjusting the scan time of each pixel circuit in FIG. 7 . A diagram showing the configuration.

Referring to FIGS. 7 to 10 , the organic light emitting diode display 100 may be determined by adjusting the RC delay of each scan line SL connected to the pixel circuits 200 for each pixel-row or pixel-block. . As shown in FIG. 7 , when the RC delay of the scan line SL connected to a specific pixel circuit 200 increases, the rise time and fall time of the scan signal SCAN applied to the pixel circuit 200 increase. (That is, the waveform moves from OC to CC), and when the rise time and fall time of the scan signal SCAN applied to the corresponding pixel circuit 200 increase, the scan-on period of the corresponding scan signal SCAN is shortened. Therefore, the scan time t for the corresponding pixel circuit 200 may be shortened. That is, the data writing period ST in which the pixel circuit 200 performs the data writing operation and the threshold voltage compensating operation decreases, and accordingly, the voltage applied to the gate terminal of the first transistor T1, that is, the first The voltage VN1 of node N1 decreases. As a result, the current flowing through the organic light emitting diode (OLED) within the corresponding pixel circuit 200 increases, and accordingly, the luminance of the corresponding pixel circuit 200 increases. Meanwhile, the organic light emitting diode display 100 may adjust the RC delay of the scan line SL connected to the specific pixel circuit 200 in various ways. 8 to 10 , each pixel circuit in the organic light emitting display device 100 includes various lines L1, ..., L6 (eg, ELVDD, ELVSS, VGH, VGL, INITIAL_CLK, EM, etc.). At this time, the scan line SL may be connected to the pixel circuit 200 in a different form (eg, high-resistance material, high-resistance combination ratio, increased length, etc.) from the other lines L1, ..., L6. can In one embodiment, as shown in FIG. 8 , an RC delay of a scan line SL connected to a specific pixel circuit 200 may be adjusted by changing the types of materials included in the corresponding scan line SL. In another embodiment, as shown in FIG. 9 , an RC delay of a scan line SL connected to a specific pixel circuit 200 may be adjusted by changing a mixing ratio of materials included in the corresponding scan line SL. . In another embodiment, as shown in FIG. 10 , the RC delay of a scan line SL connected to a specific pixel circuit 200 may be adjusted by changing the length of the corresponding scan line SL. In this way, the organic light emitting display device 100 shortens the scan times t for the pixel circuits 200 far from the power supply circuit 160 to increase the current flowing through the organic light emitting diode OLED, thereby increasing luminance. The high power supply voltage ELVDD ) is applied to each pixel circuit 200, it is possible to compensate for luminance non-uniformity of the display panel 120 due to a voltage drop occurring as it passes through the power line.

11 is a block diagram illustrating an electronic device according to embodiments of the present invention, FIG. 12A is a diagram illustrating an example in which the electronic device of FIG. 11 is implemented as a television, and FIG. 12B is a diagram showing the electronic device of FIG. 11 as a smartphone. It is a drawing showing an example implemented as

11 to 12B, the electronic device 500 includes a processor 510, a memory device 520, a storage device 530, an input/output device 540, a power supply 550, and an organic light emitting display device 560. ) may be included. In this case, the organic light emitting display device 560 may correspond to the organic light emitting display device 100 of FIG. 1 . The electronic device 500 may further include several ports capable of communicating with a video card, sound card, memory card, USB device, etc., or with other systems. In one embodiment, as shown in FIG. 12A , the electronic device 500 may be implemented as a television. In another embodiment, as shown in FIG. 12B , the electronic device 500 may be implemented as a smart phone. However, this is an example and the electronic device 500 is not limited thereto. For example, the electronic device 500 includes a mobile phone, a video phone, a smart pad, a smart watch, a tablet PC, a vehicle navigation system, a computer monitor, a laptop computer, and a head mounted display. ; HMD) and the like.

Processor 510 may perform certain calculations or tasks. Depending on the embodiment, the processor 510 may be a microprocessor, a central processing unit (CPU), an application processor (AP), or the like. The processor 510 may be connected to other components through an address bus, a control bus, and a data bus. According to an embodiment, the processor 510 may also be connected to an expansion bus such as a Peripheral Component Interconnect (PCI) bus. The memory device 520 may store data necessary for the operation of the electronic device 500 . For example, the memory device 520 may include an Erasable Programmable Read-Only Memory (EPROM) device, an Electrically Erasable Programmable Read-Only Memory (EEPROM) device, a flash memory device, and a PRAM. Phase Change Random Access Memory (PRAM) device, Resistance Random Access Memory (RRAM) device, Nano Floating Gate Memory (NFGM) device, Polymer Random Access Memory (PoRAM) device, MRAM (Magnetic Random Access Memory; MRAM), non-volatile memory devices such as FRAM (Ferroelectric Random Access Memory; FRAM) devices and/or DRAM (Dynamic Random Access Memory; DRAM) devices, SRAM (Static Random Access Memory; SRAM) devices, mobile A volatile memory device such as a DRAM device may be included. The storage device 530 may include a solid state drive (SSD), a hard disk drive (HDD), a CD-ROM, and the like. The input/output device 540 may include an input means such as a keyboard, a keypad, a touch pad, a touch screen, and a mouse, and an output means such as a speaker and a printer. The power supply 550 may supply power necessary for the operation of the electronic device 500 .

The OLED display 560 may be connected to other components through the buses or other communication links. According to exemplary embodiments, the organic light emitting display device 560 may be included in the input/output device 540 . As described above, the organic light emitting diode display 560 determines the scan times for pixel circuits in the display panel for each pixel-row or pixel-block based on the distance between the pixel circuits and the power supply circuit that supplies the high power supply voltage. By making them different (i.e., making the scan times for the pixel circuits shorter as the distance between the power supply circuit and the pixel circuits increases), as the high power supply voltage is applied to each pixel circuit via the power supply line, A high-quality image may be displayed by compensating for non-uniformity in luminance of the display panel due to a voltage drop. To this end, the organic light emitting display device 560 includes a display panel including first to nth pixel-rows connected to first to nth scan lines, a driving integrated circuit driving the display panel, and a high power supply to the display panel. and a power supply circuit supplying the voltage and the low power supply voltage and supplying the driving power supply voltage to the driving integrated circuit. In one embodiment, each of the pixel circuits constituting the first to nth pixel-rows performs a threshold voltage compensation operation on a driving transistor, and the first to nth scan times for the first to nth pixel-rows are performed. may be shortened as the distance between the first to n th pixel-rows and the power supply circuit increases. In another embodiment, each of the pixel circuits constituting the first to n th pixel-rows performs a threshold voltage compensation operation on the driving transistor, and the first to n th pixel-rows are configured to perform first to k th pixel-blocks. , and the first to k th scan times for the first to k th pixel-blocks may become shorter as the distance between the first to k th pixel-blocks and the power supply circuit increases. In this case, each of the first to k-th pixel-blocks may include the same number of pixel-rows, and at least two or more of the first to k-th pixel-blocks have different numbers of pixel-rows. may also include However, since this has been described above, overlapping description thereof will be omitted.

The present invention can be applied to an organic light emitting display device and various electronic devices including the same. For example, the present invention can be applied to mobile phones, smart phones, video phones, smart pads, smart watches, tablet PCs, car navigation systems, televisions, computer monitors, laptop computers, head mounted displays, and the like.

Although the above has been described with reference to exemplary embodiments of the present invention, those skilled in the art can make various modifications to the present invention within the scope not departing from the spirit and scope of the present invention described in the claims below. It will be understood that it can be modified and changed accordingly.

100: organic light emitting display device 120: display panel
140 driving integrated circuit 160 power supply circuit
200: pixel circuit T1: first transistor
T2: second transistor T3: third transistor
T4: fourth transistor Cst: storage capacitor
OLED: organic light emitting diode 500: electronic device
510: processor 520: memory device
530: storage device 540: input/output device
550: power supply 560: organic light emitting display device

Claims (20)

a display panel including first to nth pixel-rows connected to first to nth (where n is an integer of 2 or greater) scan lines;
a driving integrated circuit driving the display panel; and
a power supply circuit supplying a high power supply voltage and a low power supply voltage to the display panel and a driving power voltage to the driving integrated circuit;
Each of the pixel circuits constituting the first to nth pixel-rows performs a threshold voltage compensation operation for a driving transistor;
The first to nth scan times for the first to nth pixel-rows become shorter as the distance between the first to nth pixel-rows and the power supply circuit increases;
A time at which the pixel circuits constituting the ith pixel-row perform the threshold voltage compensation operation is determined according to an i-th scan time (where i is an integer greater than or equal to 1 and less than or equal to n) scan time;
The first to nth scan times are the lengths of scan-on intervals of the first to nth scan signals applied to the first to nth pixel-rows or the first to nth pixel-rows connected to the first to nth pixel-rows. An organic light emitting display device characterized in that the RC delay of each of the 1st to nth scan lines is determined by adjusting. 2. The method of claim 1, wherein each of the pixel circuits
an organic light emitting diode including a cathode connected to the low power supply voltage;
a first transistor including a gate terminal connected to a first node, a first terminal connected to an anode of the organic light emitting diode, and a second terminal connected to a second node, and operating as the driving transistor;
a second transistor including a gate terminal to which a scan signal is applied, a first terminal to which a data signal is applied, and a second terminal connected to the second node;
a third transistor including a gate terminal to which the scan signal is applied, a first terminal connected to the first node, and a second terminal connected to the anode of the organic light emitting diode;
a fourth transistor including a gate terminal to which an emission control signal is applied, a first terminal connected to the second node, and a second terminal connected to the high power supply voltage; and
and a storage capacitor including a first terminal connected to the first node and a second terminal connected to the high power supply voltage. delete The method of claim 1 , wherein the first to n th scan times decrease as the length of the scan on period decreases, and the first to n th scan times increase as the length of the scan on period increases. An organic light emitting display device characterized in that. delete The organic light emitting diode display of claim 1 , wherein the first to nth scan times decrease as the RC delay increases, and the first to nth scan times increase as the RC delay decreases. . The organic light emitting diode display of claim 6 , wherein the RC delay of each of the first to n th scan lines is adjusted by changing a type of materials included in each of the first to n th scan lines. . The organic light emitting display of claim 6 , wherein the RC delay of each of the first to n th scan lines is adjusted by changing a mixing ratio of materials included in each of the first to n th scan lines. Device. The organic light emitting diode display of claim 6 , wherein the RC delay of each of the first to n th scan lines is adjusted by changing a length of each of the first to n th scan lines. a display panel including first to nth pixel-rows connected to first to nth (where n is an integer of 2 or greater) scan lines;
a driving integrated circuit driving the display panel; and
a power supply circuit supplying a high power supply voltage and a low power supply voltage to the display panel and a driving power voltage to the driving integrated circuit;
Each of the pixel circuits constituting the first to nth pixel-rows performs a threshold voltage compensation operation for a driving transistor;
The first to nth pixel-rows are grouped into first to kth (where k is an integer greater than or equal to 2) pixel-blocks;
The first to kth scan times for the first to kth pixel-blocks become shorter as the distance between the first to kth pixel-blocks and the power supply circuit increases,
A time at which the pixel circuits constituting the ith pixel-block perform the threshold voltage compensation operation is determined according to an i-th scan time (where i is an integer greater than or equal to 1 and less than or equal to k) scan time;
The 1st to kth scan times are the lengths of scan-on intervals of the 1st to nth scan signals applied to the 1st to nth pixel-rows or the first to nth pixel-rows connected to the first to nth pixel-rows. An organic light emitting display device characterized in that the RC delay of each of the 1st to nth scan lines is determined by adjusting. 11 . The organic light emitting diode display of claim 10 , wherein each of the first to k th pixel-blocks includes the same number of pixel-rows. 11 . The organic light emitting diode display of claim 10 , wherein at least two or more pixel-blocks among the first to k-th pixel-blocks include different numbers of pixel-rows. 11. The method of claim 10, wherein each of the pixel circuits
an organic light emitting diode including a cathode connected to the low power supply voltage;
a first transistor including a gate terminal connected to a first node, a first terminal connected to an anode of the organic light emitting diode, and a second terminal connected to a second node, and operating as the driving transistor;
a second transistor including a gate terminal to which a scan signal is applied, a first terminal to which a data signal is applied, and a second terminal connected to the second node;
a third transistor including a gate terminal to which the scan signal is applied, a first terminal connected to the first node, and a second terminal connected to the anode of the organic light emitting diode;
a fourth transistor including a gate terminal to which an emission control signal is applied, a first terminal connected to the second node, and a second terminal connected to the high power supply voltage; and
and a storage capacitor including a first terminal connected to the first node and a second terminal connected to the high power supply voltage. delete 11 . The method of claim 10 , wherein the first to k th scan times decrease as the length of the scan on interval decreases, and the first to k th scan times increase as the length of the scan on interval increases. An organic light emitting display device characterized in that. delete 11. The organic light emitting diode display of claim 10, wherein the first to kth scan times decrease as the RC delay increases, and the first to kth scan times increase as the RC delay decreases. . 18. The organic light emitting diode display of claim 17, wherein the RC delay of each of the first to nth scan lines is adjusted by changing a type of materials included in each of the first to nth scan lines. . 18. The organic light emitting display of claim 17, wherein the RC delay of each of the first to nth scan lines is adjusted by changing a mixing ratio of materials included in each of the first to nth scan lines. Device. 18. The organic light emitting diode display of claim 17, wherein the RC delay of each of the first to nth scan lines is adjusted by changing a length of each of the first to nth scan lines.

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