KR102437177B1 - organic light emitting display device - Google Patents

Abstract

The present invention relates to an organic light emitting diode display capable of reducing power consumption by varying a high potential voltage. an organic light emitting display panel including sub-pixels; a power supply circuit outputting a high potential voltage EVDD for driving the organic light emitting display panel; a voltage variable circuit for varying the high potential voltage provided from the power supply circuit to the organic light emitting display panel in different forms; a pair of switching circuits selectively transferring the voltage output from the voltage variable circuit to the organic light emitting display panel according to a switching operation; and a timing controller for controlling the operation of the voltage variable circuit by analyzing the data of the input image to generate different types of voltages, and controlling the switching operation of the pair of switching circuits, wherein the linear region It is possible to reduce power consumption by alternately driving high potential voltages.

Description

Organic light emitting display device

The present invention relates to an organic light emitting display device, and to an organic light emitting display device capable of reducing power consumption by varying a high potential voltage.

As information technology develops, the market for display devices, which is a connection medium between users and information, is growing. Accordingly, the demand for organic light emitting displays (OLEDs) is increasing. The organic light emitting diode display includes a display panel including a plurality of sub-pixels, a driving unit outputting a driving signal for driving the display panel, and a power supply unit generating power to be supplied to the display panel and the driving unit. The driver includes a scan driver that supplies a scan signal (or a gate signal) to the display panel, and a data driver that supplies a data signal to the display panel.

In the organic light-emitting display device, when a driving signal, for example, a scan signal and a data signal, is supplied to sub-pixels formed in a display panel, the selected sub-pixel emits light, thereby displaying an image.

A method for reducing power consumption of such an organic light emitting display device is required.

1 is a circuit diagram of a conventionally proposed sub-pixel, and FIG. 2 is a current/voltage curve diagram of a driving transistor according to a conventional driving method.

As shown in FIGS. 1 and 2 , conventionally, a sub-pixel is implemented by driving a driving transistor DTFT in a saturation region, and thus a high driving voltage (Vds and EVDD as shown in FIGS. 1 and 2 ) is used. large) had to be used.

Since the conventionally proposed organic light emitting diode display uses the driving transistor DTFT to be limited to a saturation region, it consumes unnecessary power by using a high potential voltage EVDD. Also, there is no logic capable of driving the driving transistor by varying or alternating the high potential voltage EVDD applied to the driving transistor DTFT.

An object of the present invention is to provide an organic light emitting display device capable of reducing power consumption.

Another object of the present invention is to provide an organic light emitting diode display capable of reducing power consumption by alternately driving high potential voltages in a linear region.

An organic light emitting diode display according to an exemplary embodiment of the present invention for achieving the above object is an organic light emitting display panel including a plurality of sub-pixels in which a plurality of gate lines and a plurality of data lines are disposed and a plurality of sub-pixels are disposed in a region where the gate lines and the data lines intersect. ; a power supply for outputting a high potential voltage (EVDD) for driving the organic light emitting display panel; a voltage variable circuit for varying the high potential voltage provided from the power supply unit to the organic light emitting display panel in different forms; a pair of switching circuits selectively transferring the voltage output from the voltage variable circuit to the organic light emitting display panel according to a switching operation; and a timing controller for controlling the operation of the voltage variable circuit by analyzing the data of the input image to generate different types of voltages, and controlling the switching operation of the pair of switching circuits. .

In the organic light emitting diode display according to the present invention, the timing controller determines the output high potential voltage of the voltage variable circuit by extracting a luminance component of input image data.

In the organic light emitting diode display according to the present invention, the timing controller determines the output high potential voltage of the voltage variable circuit by assigning weights according to the display position of the input image.

In the organic light emitting diode display according to the present invention, the timing controller communicates with the power supply circuit to vary the output high potential voltage of the voltage variable circuit.

A feature of the detailed configuration of the organic light emitting display device according to the present invention is that the voltage variable circuit varies the high potential voltage EVDD received from the power supply unit according to the control signal of the timing control unit to obtain a first high potential voltage EVVD1. a first buck converter outputting to (Buck converter); and a second buck converter for outputting a second high potential voltage EVVD2 by varying the high potential voltage EVDD received from the power supply unit according to the control signal of the timing control unit.

In the organic light emitting diode display according to the present invention, both the output of the first buck converter and the output of the second buck converter may be used to cross each other in a linear area and a saturation area. .

In the organic light emitting diode display according to the present invention, while an operating voltage is supplied from one of the buck converters of the voltage variable circuit to the organic light emitting display panel, the other buck converter is the image data analysis result of the timing controller. It waits for output by changing the voltage for the next frame according to

In the organic light emitting diode display according to the present invention, the timing controller applies a high potential voltage to the organic light emitting display panel during a blanking period, a low period of a vertical synchronization signal or an off period of a global shutter signal. A switching operation of the pair of switching circuits may be controlled to alternate between .

The organic light emitting diode display according to the present invention can exhibit the following effects.

First, power consumption can be reduced by alternately driving high potential voltages in the linear region.

Second, the high potential voltage can be continuously alternated.

1 is a circuit configuration diagram of a conventionally proposed sub-pixel.
2 is a current/voltage curve diagram of a driving transistor according to a conventional driving method.
3 is a block diagram schematically illustrating an organic light emitting diode display according to an exemplary embodiment of the present invention.
FIG. 4 is a configuration diagram schematically illustrating the sub-pixel shown in FIG. 3 .
5 is a block diagram of a main part of an organic light emitting diode display according to an embodiment of the present invention.
6A and 6B are exemplary views for explaining an operation of applying different high potential voltages according to an embodiment of the present invention.
7 is a waveform diagram showing a relationship between a vertical synchronization signal and an output signal of a voltage variable circuit.
8 is a waveform diagram illustrating a relationship between a global shutter signal and an output signal of a voltage variable circuit.
9 is a current/voltage curve diagram of a driving transistor according to an embodiment of the present invention.

With respect to the embodiments of the present invention disclosed in the text, specific structural or functional descriptions are only exemplified for the purpose of describing the embodiments of the present invention, the embodiments of the present invention may be implemented in various forms and It should not be construed as being limited to the described embodiments.

The present invention may have various changes and may have various forms, and specific embodiments will be illustrated in the drawings and described in detail in the text. However, this is not intended to limit the present invention to the specific disclosed form, it should be understood to include all modifications, equivalents and substitutes included in the spirit and scope of the present invention.

Terms such as first, second, etc. may be used to describe various elements, but the elements are not limited by the terms. The above terms are used only for the purpose of distinguishing one component from another. For example, without departing from the scope of the present invention, a first component may be referred to as a second component, and similarly, a second component may also be referred to as a first component.

When a component is referred to as being “connected” or “connected” to another component, it may be directly connected or connected to the other component, but it is understood that other components may exist in between. it should be On the other hand, when it is said that a certain element is "directly connected" or "directly connected" to another element, it should be understood that there is no other element in the middle. Other expressions describing the relationship between elements, such as "between" and "immediately between" or "neighboring to" and "directly adjacent to", etc., should be interpreted similarly.

The terms used in the present application are only used to describe specific embodiments, and are not intended to limit the present invention. The singular expression includes the plural expression unless the context clearly dictates otherwise. In this application, terms such as "comprises" or "having" are intended to designate that the disclosed feature, number, step, action, component, part, or combination thereof is present, but includes one or more other features or numbers, It should be understood that the possibility of the presence or addition of steps, operations, components, parts or combinations thereof is not precluded in advance.

Unless defined otherwise, all terms used herein, including technical or scientific terms, have the same meaning as commonly understood by one of ordinary skill in the art to which this invention belongs. Terms such as those defined in commonly used dictionaries should be interpreted as indicating meanings consistent with the meanings in the context of the related art, and should not be interpreted in an ideal or excessively formal meaning unless explicitly defined in the present application. does not

On the other hand, when an embodiment can be implemented differently, functions or operations specified in a specific block may occur differently from the order specified in the flowchart. For example, two consecutive blocks may be performed substantially simultaneously, or the blocks may be performed in reverse according to a related function or operation.

Hereinafter, preferred embodiments of the present invention will be described with reference to the accompanying drawings.

The organic light emitting display device may be implemented in a top-emission method, a bottom-emission method, or a dual-emission method according to the emission direction of light. The organic light emitting diode display includes an inverted staggered type including a back channel etched (BCE) or an etch stopper (ES), and a staggered type according to a channel structure of a transistor. Alternatively, it may be implemented in a coplanar structure. The organic light emitting diode display may be implemented based on oxide, low-temperature polysilicon (LTPS), amorphous silicon (a-Si), or polysilicon (p-Si) depending on the semiconductor material of the transistor. The organic light emitting display device may be implemented as a TV, a navigation system, an image player, a personal computer (PC), a wearable (watch, glasses, etc.), a mobile phone (smartphone), and the like.

3 is a block diagram schematically illustrating an organic light emitting display device according to the present invention. 3 , the organic light emitting diode display includes a host system 10 , a timing controller 170 , a data driver 130 , a power supply circuit 140 , a gate driver 150 , and a display panel 110 . include

The host system 10 includes a system on chip (SoC) having a built-in scaler, and converts digital video data of an input image into a data signal having a format suitable for display on the display panel 110 . The host system 10 supplies various timing signals along with the data signal to the timing controller 170 .

The timing controller 170 performs operation timings of the data driver 130 and the gate driver 150 based on timing signals such as a vertical synchronization signal, a horizontal synchronization signal, a data enable signal, and a main clock input from the host system 10 . to control The timing controller 170 performs image processing (data compensation, etc.) of a data signal input from the host system 10 and supplies it to the data driver 130 .

The data driver 130 operates in response to the data control signal DDC output from the timing controller 170 . The data driver 130 converts the digital data signal DATA input from the timing controller 170 into an analog data signal and outputs it.

The data driver 130 converts the digital data signal DATA into an analog data signal in response to the gamma voltage of the gamma unit provided inside or outside. The data driver 130 supplies data signals to the data lines DL1 to DLn of the display panel 110 .

The gate driver 150 operates in response to the gate control signal GDC output from the timing controller 170 . The gate driver 150 outputs a gate signal (or a scan signal) of a gate high voltage or a gate low voltage.

The gate driver 150 may sequentially output the gate signal in a forward direction or sequentially output the gate signal in a reverse direction. The gate driver 150 supplies a gate signal to the gate lines GL1 to GLm of the display panel 110 .

The power supply circuit 140 includes a high potential voltage (drain voltage) and a low potential voltage (source voltage) (EVDD, EVSS) for driving the display panel 110 , and a collector voltage for driving the data driver 130 , and the like. Outputs the ground voltage (VCC, GND). In addition, the power supply circuit 140 generates a voltage necessary for driving the display device, such as a gate high voltage or a gate low voltage to be transmitted to the gate driver 150 .

The display panel 110 includes sub-pixels SP, data lines DL1 to DLn connected to the sub-pixels SP, and gate lines GL1 to GLm connected to the sub-pixels SP. The display panel 110 displays an image corresponding to the gate signal output from the gate driver 150 and the data signal DATA output from the data driver 130 . The display panel 110 includes a lower substrate and an upper substrate. The sub-pixels SP are formed between the lower substrate and the upper substrate. The gate driver 130 may be formed on the first side and the second side of the panel 110 .

As shown in FIG. 4 , one sub-pixel is supplied through the switching thin film transistor SW and the switching thin film transistor SW connected to (or formed at the intersection of) the gate line GL1 and the data line DL1. A pixel circuit PC operating in response to the data signal DATA is included. The pixel circuit PC includes a driving transistor, a storage capacitor, a circuit such as an organic light emitting diode, and a pixel compensation circuit for compensating one of them.

The pixel compensation circuit is provided to compensate for characteristics (threshold voltage, current mobility, etc.) of the driving transistor, characteristics (threshold voltage) of the organic light emitting diode, or deterioration thereof. The pixel compensation circuit operates by itself or in conjunction with an external circuit. The pixel compensation circuit is composed of one or more thin film transistors and capacitors. Since the pixel compensation circuit may be configured in many different ways depending on the compensation method, detailed examples and descriptions thereof will be omitted.

5 is a block diagram of a main part of an organic light emitting diode display according to an embodiment of the present invention.

an organic light emitting display panel 110 including a plurality of gate lines and a plurality of data lines and a plurality of sub-pixels disposed in a region where the gate lines and the data lines intersect; a power supply circuit 140 outputting a high potential voltage EVDD for driving the organic light emitting display panel 110 ; a voltage variable circuit 200 for varying the high potential voltage provided from the power supply circuit 140 to the organic light emitting display panel in different forms; a pair of switching circuits 300 selectively transferring the voltage output from the voltage variable circuit 200 to the organic light emitting display panel 110 according to a switching operation; A timing controller 170 for controlling the operation of the voltage variable circuit 200 by analyzing the data of the input image to generate different types of voltages, and controlling the switching operation of the pair of switching circuits 300 . is made including

The voltage variable circuit 200 varies the high potential voltage EVDD received from the power supply circuit 140 according to the control signal of the timing controller 170 and outputs a first high potential voltage EVVD1 . 1 converter 210; and a second converter 220 for varying the high potential voltage EVDD received from the power supply circuit according to the control signal of the timing controller 170 and outputting it as a second high potential voltage EVVD2. is done by

The timing controller 170 extracts the luminance component of the input image data and determines the level of the high potential voltage EVDD to be output from the voltage variable circuit 200 . In addition, the timing controller 170 determines the level of the high potential voltage EVDD to be output from the voltage variable circuit 200 by assigning weights according to the display position of the input image. The timing controller 170 performs a communication operation with the power supply circuit 140 to vary the high potential voltage EVDD. The alternating operation of the high potential voltage EVDD under the control of the timing controller 170 is not a discrete operation but a continuous operation.

6A and 6B are exemplary views for explaining an operation of applying different high potential voltages according to an embodiment of the present invention. 6A illustrates a case in which a switching operation signal is provided to the first switch SW1, and FIG. 6B illustrates a case in which a switching operation signal is provided to the second switch SW2.

The timing controller 170 analyzes transmitted image data and outputs a first switching control signal SS1 for operating the first switch SW1 of the switching circuit 300 . Accordingly, the first switch transfers the first high potential voltage EVVD1 provided through the first converter 210 to the display panel 110 . The first high potential voltage EVDD1 is a voltage changed by the first converter 210 according to the first voltage control signal VCS1 of the timing controller 170 . The timing controller 170 analyzes transmitted image data and outputs a second switching control signal SS1 for operating the second switch SW1 of the switching circuit 300 . Accordingly, the second switch transfers the second high potential voltage EVVD2 provided through the second converter 220 to the display panel 110 . The second high potential voltage EVDD2 is a voltage changed by the second converter 220 according to the second voltage control signal VCS1 of the timing controller 170 .

The timing control unit is configured to perform a blanking period, a low signal of the vertical synchronization signal Vsync as shown in FIG. 7, or an off period signal of a global shutter signal as shown in FIG. The power variable circuit 200 and the switching circuit 300 are controlled.

That is, in section (A), since the vertical synchronization signal Vsync is in a high state and the first switching signal SS1 output from the timing controller 170 is in a high state, the first switch SW1 ) to remain on. At this time, since the second switching signal SS2 indicates a low state, the second switch SW2 maintains an off state. Meanwhile, since the first voltage control signal VCS1 provided from the timing controller 170 to the first converter 210 of the power variable circuit 200 indicates a low state, the first converter 210 is powered The variable first high potential voltage EVDD1 received from the supply circuit 140 is provided to the display panel 110 through the first switch SW1 at the rear stage. At this time, since the second voltage control signal VCS2 provided from the timing controller 170 to the second converter 220 of the power variable circuit 200 indicates a high state, the second converter 220 is powered An operation of generating the second high potential voltage EVDD2 by varying the high potential voltage supplied from the supply circuit 140 is performed. Accordingly, the high potential voltage EVDD provided to the display panel 110 represents the first high potential voltage EVDD1 .

Meanwhile, in section (B), the vertical sync signal Vsync temporarily indicates a low state, and the global shutter signal temporarily indicates an on state. At a time when the vertical synchronization signal Vsync is converted to a low state or a time when the global shutter signal is converted to an on state, the timing controller 170 controls each of the switching signals SS1 and SS2 and the voltage control signal ( VCS1, VCS2) state is switched. That is, the first switching signal SS1 output from the timing controller 170 is switched from a high state to a low state, and the first switch SW1 is switched to an off state. At this time, since the second switching signal SS2 is switched from a low state to a high state, the second switch SW2 is turned on. Meanwhile, since the first voltage control signal VCS1 provided from the timing controller 170 to the first converter 210 of the power variable circuit 200 is switched from a low state to a high state, power is supplied An operation of generating the first high potential voltage EVDD1 by varying the high potential voltage supplied from the circuit 140 is performed. At this time, the second voltage control signal VCS2 provided from the timing controller 170 to the second converter 220 of the power variable circuit 200 is switched from a high state to a low state, and the second converter 210 provides the second high potential voltage EVDD2 obtained by varying the voltage received from the power supply circuit 140 during the period (A) to the display panel 110 through the second switch SW1 at the rear stage. Accordingly, the high potential voltage EVDD provided to the display panel 110 during the period (B) represents the second high potential voltage EVDD2 .

Following section (B), when the vertical sync signal Vsync temporarily represents a low signal or the global shutter signal temporarily represents an off state as shown in FIG. 8, each switching signal ( SS1, SS2) and the voltage control signals VCS1 and VCS2 show the same state as in section (A) as described above. That is, the state of each of the switches SW1 and SW2 and the high potential voltage supplied to the display panel have the same state as in section (A).

The timing controller 170 may control the power variable circuit 200 by including a weight according to the position of the image data on the display panel 110 to be output in the next frame. That is, while one converter 210 or 220 of the voltage variable circuit supplies an operating voltage to the organic light emitting display panel 110 , the other converter 220 or 210 analyzes image data by the timing controller 170 . Depending on the result, the voltage for the next frame is changed to wait for the output.

In this case, both the output of the first converter and the output of the second converter may be used to cross each other in a linear area and a saturation area. In addition, the shift from the section using the first high potential voltage EVDD1 to the section using the second high potential voltage EVDD2 is not implemented as a discretely separated operation, but is continuous. is implemented

9 is a current/voltage curve diagram of a driving transistor according to the present invention. As shown in FIG. 9 , a driving transistor DTFT of a sub-pixel is driven by mixing a saturation region and a linear region to reduce power consumption of the organic light emitting diode display.

In addition, in order to reduce power consumption of the organic light emitting diode display, the level of the high potential voltage EVDD is changed to a level lower than that of the data voltage VDATA constituting the data signal.

For example, according to the present invention, when the driving transistor generates the current I_oled for driving the organic light emitting diode, the level of the high potential voltage EVDD, which is one of the conditions for generating the target current I_target, is lowered from P2 to P1. . When the driving transistor DTFT of the sub-pixel is driven in a linear region, the level of the high potential voltage EVDD can be lowered compared to before, so that the stress on the transistor is also alleviated compared to before. As a result, the deterioration of the transistor is expected to be delayed to some extent compared to when driving in the saturation region.

Although the above has been described with reference to the preferred embodiment of the present invention, those skilled in the art can variously modify and change the present invention within the scope without departing from the spirit and scope of the present invention described in the claims below. You will understand that it can be done.

10: system 110: display panel
130: data driver 140: power supply circuit
150: gate driver 170: timing controller
200: power variable circuit 210: first converter
220: second converter 300: switching circuit unit

Claims (11)

an organic light emitting diode display panel including a plurality of gate lines and a plurality of data lines, the organic light emitting diode display including a plurality of sub-pixels disposed in a region where the gate lines and the data lines intersect;
a power supply circuit outputting a high potential voltage for driving the organic light emitting display panel;
a voltage variable circuit for varying the high potential voltage provided from the power supply circuit to the organic light emitting display panel to different voltage levels;
a pair of switching circuits selectively transferring the high potential voltage output from the voltage variable circuit to the organic light emitting display panel according to a switching operation;
A timing controller for controlling the operation of the voltage variable circuit based on the analysis result of the input image data to generate high potential voltages of different voltage levels, and controlling the switching operation of the pair of switching circuits,
In order to drive the driving transistor included in the sub-pixel in a linear region rather than a saturation region, the high potential voltage of the different voltage levels is varied within a voltage range lower than the data voltage applied to the sub-pixel. display device. The organic light emitting diode display of claim 1 , wherein the timing controller determines an output high potential voltage of the voltage variable circuit by extracting a luminance component of input image data. The organic light emitting diode display of claim 1 , wherein the timing controller determines the output high potential voltage of the voltage variable circuit by weighting the input image according to a display position of the input image. The organic light emitting display device of claim 1 , wherein the timing controller communicates with the power supply circuit to vary an output high potential voltage of the voltage variable circuit. According to claim 1, wherein the voltage variable circuit,
a first converter that varies the high potential voltage EVDD received from the power supply circuit according to a control signal of the timing controller and outputs a first high potential voltage EVVD1; and
and a second converter for outputting a second high potential voltage EVVD2 by varying the high potential voltage EVDD received from the power supply circuit according to the control signal of the timing controller. luminescent display. delete The method of claim 5, wherein while one converter of the voltage variable circuit supplies an operating voltage to the organic light emitting display panel, the other converter varies the voltage for the next frame according to the image data analysis result of the timing controller and outputs the voltage. An organic light emitting diode display, characterized in that it waits. The organic light emitting display device of claim 1 , wherein the timing controller outputs a control signal for controlling a switching operation of the pair of switching circuits and a control signal for controlling a power variable circuit during a blanking period. . The power variable circuit of claim 1 , wherein the timing controller controls the switching operation of the pair of switching circuits to alternate the high potential voltage applied to the organic light emitting display panel during a low period of the vertical synchronization signal, and An organic light emitting display device, characterized in that outputting a control signal for controlling the. The method of claim 1 , wherein the timing controller controls a switching operation of the pair of switching circuits to alternate the high potential voltage applied to the organic light emitting display panel in an off period of the global shutter signal, and controls the power variable circuit. An organic light emitting display device outputting a control signal. The organic light emitting diode display as claimed in claim 1 , wherein the alternating operation of the high potential voltage EVDD under the control of the timing controller is a continuous operation rather than a discrete operation.

Images