KR102390673B1 - Electroluminescence display - Google Patents

Abstract

The present invention relates to an electroluminescent display device, in which a data voltage of the display device is increased to a predetermined first voltage and then changed to a second voltage to initialize a pixel circuit. Accordingly, pixels can be initialized without a wiring to which an initialization voltage is applied and a transistor connected to the wiring.

Description

ELECTROLUMINESCENCE DISPLAY

The present invention relates to an electroluminescent display device in which pixels are initialized with a data voltage.

The electroluminescent display device is roughly classified into an inorganic light emitting display device and an organic light emitting display device according to the material of the light emitting layer. An active matrix type organic light emitting diode display includes an organic light emitting diode (hereinafter referred to as "OLED") that emits light by itself, and has a fast response speed and high luminous efficiency, luminance and viewing angle. There are advantages.

Pixels of an organic light emitting diode display include an OLED and a driving element that supplies a current to the OLED according to a gate-source voltage to drive the OLED. An OLED of an organic light emitting display device includes an anode and a cathode, and an organic compound layer formed between the electrodes. The organic compound layer includes a hole injection layer (HIL), a hole transport layer (HTL), an emission layer (EML), an electron transport layer (ETL) and an electron injection layer (Electron Injection layer, EIL). When a current flows in the OLED, holes passing through the hole transport layer (HTL) and electrons passing through the electron transport layer (ETL) move to the light emitting layer (EML) to form excitons, and as a result, the light emitting layer (EML) generates visible light .

The driving device may be implemented as a transistor having a metal oxide semiconductor field effect transistor (MOSFET) structure. Although the driving device should have uniform electrical characteristics among all pixels, there may be differences between pixels due to process variations and device characteristics variations and may change with the lapse of display driving time. In order to compensate for the deviation in the electrical characteristics of the driving element, an internal compensation method and an external compensation method may be applied to the electroluminescent display device. The internal compensation method samples the threshold voltage Vth of the driving device that varies according to the electrical characteristics of the driving device and compensates the data voltage by the threshold voltage Vth. The external compensation method compensates for variations in electrical characteristics of the driving element between pixels by sensing a voltage of a pixel that changes according to the electrical characteristics of the driving element, and modulating input image data in an external circuit based on the sensed voltage.

The pixel circuit of the organic light emitting diode display requires a separate transistor, a wiring to which a signal for controlling the transistor is applied, and a wiring for applying an initialization voltage, etc. to initialize the anode of the OLED before sensing the threshold voltage of the driving element. do it with Due to this, the circuit area of the pixel is increased, so that it is difficult to design a pixel with high resolution and high PPI (Pixel Per Inch).

The present invention provides an electroluminescent display device capable of initializing pixels without an initialization voltage line and a transistor connected thereto.

The electroluminescent display device of the present invention includes a display panel in which data lines and gate lines cross and a plurality of sub-pixels are disposed, a data driver supplying a data signal to the data lines, and a scan signal and a light emission control signal through a gate line It has a gate driver that supplies them.

Each of the sub-pixels includes a pixel circuit.

The pixel circuit includes a driving device for driving the light emitting device, a first switch device for applying a data voltage from the data line to a gate of the driving device according to the scan signal, a high potential voltage source according to the light emission control signal, and the A second switch element for switching a current path between the first electrode of the driving element, and a capacitor connected between the gate and the second electrode of the driving element.

The anode of the light emitting device is connected to the second electrode of the driving device.

In the initialization step of the pixel circuit, the data voltage is increased to a predetermined first voltage and then changed to a second voltage lower than the first voltage.

In order to initialize a pixel using the data voltage, the present invention includes the steps of raising the data voltage to a first voltage set to an appropriate voltage to increase the anode voltage of the OLED to exceed the OLED threshold voltage (Vth); Controls the data voltage by generating a current flowing through do.

According to the present invention, pixels may be initialized using a data voltage without a wiring to which an initialization voltage is applied and a transistor connected to the wiring.

The present invention has a simple circuit configuration and can implement a pixel circuit including a small internal compensation circuit, so it is advantageous for high resolution and high PPI (Pixel Per Inch) pixel design.

1 is a block diagram showing an electroluminescent display device according to an embodiment of the present invention.
FIG. 2 is a diagram illustrating one frame period of the display device shown in FIG. 1 .
3 is a circuit diagram illustrating a pixel circuit included in one block.
FIG. 4 is a waveform diagram illustrating a method of driving the pixels illustrated in FIG. 3 .
5 to 14 are diagrams showing step-by-step operations of a pixel circuit according to an embodiment of the present invention.
15 is a view showing a simulation result of the present invention.

Advantages and features of the present invention and methods of achieving them will become apparent with reference to the embodiments described below in detail in conjunction with the accompanying drawings. The present invention is not limited to the embodiments disclosed below, but will be implemented in various different forms, and only the embodiments allow the disclosure of the present invention to be complete, and those of ordinary skill in the art to which the present invention pertains It is provided to fully understand the scope of the invention, and the present invention is only defined by the scope of the claims.

The shape, size, ratio, angle, number, etc. disclosed in the drawings for explaining the embodiment of the present invention are exemplary, and therefore the present invention is not limited to the matters shown in the drawings. Like reference numerals refer to substantially identical elements throughout. In addition, in describing the present invention, if it is determined that a detailed description of a related known technology may unnecessarily obscure the subject matter of the present invention, the detailed description thereof will be omitted.

When "includes", "includes", "having", "consisting of", etc. mentioned in this specification are used, other parts may be added unless 'only' is used. When a component is expressed in the singular, it may be interpreted as the plural unless otherwise explicitly stated.

In interpreting the components, it is construed as including an error range even if there is no separate explicit description.

In the case of a description of the positional relationship, for example, when the positional relationship between two components is described as 'on One or more other elements may be interposed between those elements in which 'directly' or 'directly' are not used.

1st, 2nd, etc. may be used to distinguish the components, but the functions or structures of these components are not limited to the ordinal number or component name attached to the front of the component.

The following embodiments can be partially or wholly combined or combined with each other, and technically various interlocking and driving are possible. Each of the embodiments may be implemented independently of each other or may be implemented together in a related relationship.

In the electroluminescent display device of the present invention, the pixel circuit includes a driving element and a switch element. The driving element and the switch element may be implemented by at least one of an n-channel transistor (NMOS) and a p-channel transistor (PMOS). On the display panel, the transistor may be implemented as a thin film transistor (TFT). The transistor may be implemented as an oxide transistor having an oxide semiconductor pattern or an LTPS transistor having a low temperature poly-silicon (LTPS) semiconductor pattern. A transistor is a three-electrode device including a gate, a source, and a drain. The source is an electrode that supplies a carrier to the transistor. In the transistor, carriers begin to flow from the source. The drain is an electrode through which carriers exit the transistor. In a transistor, the flow of carriers flows from source to drain. In the case of an n-channel transistor (NMOS), since carriers are electrons, the source voltage has a voltage lower than the drain voltage so that electrons can flow from the source to the drain. In an n-channel transistor (NMOS), the direction of current flows from the drain to the source. In the case of a p-channel transistor (PMOS), since carriers are holes, the source voltage is higher than the drain voltage so that holes can flow from the source to the drain. In a p-channel transistor (PMOS), current flows from the source to the drain because holes flow from the source to the drain. It should be noted that the source and drain of the transistor are not fixed. For example, the source and drain may be changed according to an applied voltage. Accordingly, the invention is not limited by the source and drain of the transistor. In the following description, the source and drain of the transistor will be referred to as first and second electrodes.

A gate signal of a transistor used as a switch element swings between a gate on voltage and a gate off voltage. The gate-on voltage is set to a voltage at which the transistor is turned on, and the gate-off voltage is set to a voltage at which the transistor is turned off. In the case of an n-channel transistor (NMOS), the gate-on voltage may be a gate high voltage (VGH), and the gate-off voltage may be a gate low voltage (VGL) lower than the gate high voltage (VGH). there is. In the case of the p-channel transistor PMOS, the gate-on voltage may be the gate low voltage VGL, and the gate-off voltage may be the gate high voltage VGH.

Hereinafter, various embodiments of the present invention will be described in detail with reference to the accompanying drawings. In the following embodiments, the electroluminescent display device will be mainly described with respect to the organic light emitting display device including the organic light emitting material. The technical spirit of the present invention is not limited to an organic light emitting display device, and may be applied to an inorganic light emitting display device including an inorganic light emitting material.

1 and 2 are diagrams illustrating an electroluminescent display device and a driving method thereof according to an embodiment of the present invention.

1 and 2 , an electroluminescent display device according to an embodiment of the present invention includes a display panel 100 and a display panel driving circuit.

The screen of the display panel 100 includes a pixel array AA that displays an input image. The pixel array AA includes a plurality of data lines 102 , a plurality of gate lines 104 intersecting the data lines 102 , and pixels arranged in a matrix form.

Each of the pixels may be divided into a red sub-pixel, a green sub-pixel, and a blue sub-pixel to implement color. Each of the pixels may further include a white sub-pixel. Each of the sub-pixels 101 includes a pixel circuit as shown in FIG. 3 . After the pixel circuit is initialized as shown in FIG. 2 , the Vth sensing and holding steps are followed, and then the data writing step and the light emitting step are performed. Pixel data is written to the addressed pixel.

Touch sensors may be disposed on the display panel 100 . The touch input may be sensed using separate touch sensors or may be sensed through pixels. The touch sensors may be implemented as in-cell type touch sensors arranged on the screen of the display panel as on-cell type or Add on channel type or embedded in a pixel array. can

The display panel driving circuits 110 and 120 include a data driver 110 and a gate driver 120 . A demultiplexer (DEMUX) (not shown) may be disposed between the data driver 110 and the data lines 102 .

The display panel driving circuits 110 and 120 write input image data to the pixels by addressing the pixel lines of the display panel 100 under the control of a timing controller (TCON) 130 , and transmit the pixels. light up The display panel driving circuits 110 and 120 may further include a touch sensor driver for driving the touch sensors. The touch sensor driver is omitted from FIG. 1 . In a mobile device or a wearable device, the data driver 110 , the timing controller 130 , and the like may be integrated into one integrated circuit.

The data driver 110 converts digital data of an input image received from the timing controller 130 into a gamma compensation voltage in every frame period using a digital-to-analog converter (hereinafter referred to as DAC) into a data signal of (hereinafter referred to as “data voltage”) is output. A data voltage is applied to the pixels via data line 102 . The demultiplexer is disposed between the data driver 110 and the data lines 102 using a plurality of switch elements to distribute the data voltage output from the data driver 110 to the data lines 102 . Since one channel of the data driver 110 is distributed to a plurality of data lines by the demultiplexer, the number of data lines 102 may be reduced.

The gate driver 120 may be implemented as a gate in panel (GIP) circuit formed directly on a bezel region of the display panel 100 together with a transistor array in the active region. The gate driver 120 outputs a gate signal to the gate lines 104 under the control of the timing controller 130 . The gate driver 120 may sequentially supply the gate signals to the gate lines 104 by shifting the gate signals using a shift register. As shown in FIG. 4 , the gate signal may include scan signals SCAN1 to SCAN4 and a light emission control signal (hereinafter, referred to as an “EM signal”). In FIG. 2, “EM ON” means that the second switch element S2 of the pixel circuit is turned on according to the EM signal EM of the gate-on voltage VGH, so that a current path is generated between VDD and the OLED. means the state of being formed. “EM OFF” is a ratio in which the second switch element S2 of the pixel circuit is turned off according to the EM signal EM of the gate-off voltage VGL, so that the current path between VDD and the OLED is blocked. means the luminous state.

The timing controller 130 receives digital video data DATA of an input image and a timing signal synchronized therewith from a host system (not shown). The timing signal includes a vertical synchronization signal Vsync, a horizontal synchronization signal Hsync, a clock signal DCLK, and a data enable signal DE.

The host system may be any one of a television (Television) system, a set-top box, a navigation system, a personal computer (PC), a home theater system, a mobile device, and a wearable device.

The timing controller 130 includes a data timing control signal for controlling the operation timing of the data driver 110 based on the timing signals Vsync, Hsync, and DE received from the host system, and a switch control for controlling the operation timing of the demultiplexer. By generating a signal and a gate timing control signal for controlling the operation timing of the gate driver 120 , the operation timing of the display panel driving circuits 110 and 120 may be controlled. The voltage level of the gate timing control signal output from the timing controller 130 may be converted into a gate-on voltage and a gate-off voltage through a level shifter (not shown) and supplied to the gate driver 120 . The level shifter converts a low level voltage of the gate timing control signal into a gate low voltage VGL and converts a high level voltage of the gate timing control signal into a gate high voltage VGH. .

The display device of the present invention can be driven by dividing the screen into a plurality of blocks as shown in FIG. 2 . 3 is a circuit diagram schematically illustrating a pixel circuit included in one block. In the example of FIG. 3 , four pixel lines L1 to L4 are disposed in one block, but the present invention is not limited thereto. Two or more pixel lines may be disposed in each block. FIG. 4 is a waveform diagram illustrating a method of driving the pixels shown in FIG. 3 .

2 to 4 , the display panel driving circuits 110 and 120 may be divided into at least two or more blocks BL1 to BL5. The blocks BL1 to BL5 include two or more pixel lines L1 to L4. Each of the pixel lines L1 to L4 includes pixels arranged along the gate line direction. Pixels of one pixel line share a gate line to which a scan signal is applied, and are simultaneously addressed according to a scan signal from the gate line to receive a data voltage of pixel data.

In the blocks BL1 to BL5, the gate line 104 is separated by one pixel line so that the scan signal can be sequentially applied. The gate line 104 is also separated between the blocks BL1 to BL5. On the other hand, all pixels in the blocks BL1 to BL5 share the EM line 103 to which the EM signal EM is applied, as shown in FIG. 3 . Since the EM line 103 is connected to all pixels in the block, the number of EM lines 103 is greatly reduced. The EM line 103 is separated between the blocks BL1 to BL5 so that the light emission timing can be shifted in units of blocks.

The scan signal is not divided in block units, but is divided in units of pixel lines, shifted by one pixel line, and sequentially supplied to the gate lines 104 to address pixel lines in which pixel data is to be written, one by one.

The EM signal is supplied to all pixels in the block simultaneously after all of the pixel lines in the block are addressed. The EM signal may be shifted between the blocks BL1 to BL5 . For example, after pixels are sequentially addressed to the first block BL1 line by line and pixel data is written to the pixels, the first EM signal is simultaneously applied to the pixels included in the first block BL1 . Next, after pixels are sequentially addressed to the second block BL2 by line by line and pixel data is written to the pixels, the EM signal is simultaneously applied to the pixels included in the second block BL2. Accordingly, after the pixels of the first block BL1 emit light at the same time, the pixels of the second block BL2 emit light at the same time.

The pixel circuit includes an OLED, a driving element DT, switch elements S1 and S2, and a capacitor Cst, as shown in FIG. 3 . The driving element DT and the switch elements S1 and S2 may be implemented as n-channel transistors in FIG. 3 .

A data voltage Vdata in each of the pixel circuits. The high potential voltage VDD, the low potential voltage VSS, the scan signals SCAN1 to SCAN4, and the EM signal EM are supplied.

The OLED includes an organic compound layer formed between an anode and a cathode. The organic compound layer may include, but is not limited to, a hole injection layer (HIL), a hole transport layer (HTL), a light emitting layer (EML), an electron transport layer (ETL), and an electron injection layer (EIL). The OLED is a light emitting device including an anode connected to the driving element DT through the second node n2 and a cathode connected to the VSS electrode. A low potential voltage (VSS) is applied to the cathode of the OLED through the VSS electrode. The OLED emits light by a current determined according to the gate-source voltage Vgs of the driving element DT.

The driving device DT drives the OLED by controlling the current of the OLED according to the gate-source voltage Vgs. The driving element DT includes a gate connected to the first node n1 , a first electrode (or drain) to which the high potential voltage VDD is supplied through the second switch element S2 , and the second node n2 . a second electrode (or source) connected to the anode of the OLED via The capacitor Cst is connected between the gate and the source of the driving device DT through the first and second nodes n1 and n2.

The first switch element S1 is turned on according to the scan signals SCAN1 to SCAN4 to supply the data voltage Vdata to the gate of the driving element DT connected to the first node n1. . The first switch element S1 has a gate connected to the gate line 104 to which the first scan signal SCAN1 is applied, a first electrode connected to the data line 102 , and a second electrode connected to the first node n1 . includes

The second switch element S2 switches a current path between the VDD line 105 and the driving element DT according to the EM signal EM. The high potential voltage VDD is supplied to the VDD line 105 . The second switch element S2 includes a gate connected to the EM line 103 to which the EM signal EM is applied, a first electrode connected to the VDD line 105 , and a second electrode connected to the first electrode of the driving element DT. including electrodes.

After the pixel circuit is initialized to the data voltage Vdata as shown in FIGS. 5 to 14 , the pixel circuit is driven by an internal compensation method by sensing the threshold voltage of the driving device DT.

When the anode voltage of the OLED exceeds the threshold voltage of the OLED, a current flows in the OLED and a uniform voltage is charged to the capacitor (Cst) regardless of the previous anode voltage. After that, when the data voltage is lowered, the anode voltage of the OLED is lowered by the capacitor Cst, so that the anode voltage of the OLED is uniformly initialized. According to the present invention, pixels can be initialized without an initialization voltage line and a transistor connected thereto by appropriately adjusting a data voltage applied to the pixel circuit through the data line 102 to initialize the OLED based on the initialization method.

The pixel circuit operates in an initialization phase, a Vth sensing phase, a Vth holding phase, a data writing phase, and a light emission phase. The initialization step lowers the anode voltage of the OLED to a predetermined voltage (Vref-Vth) or less. In the present invention, the anode voltage of the OLED is initialized by using the data voltage Vdata and capacitor coupling in the initialization step. If the anode voltage of the OLED is set low in the initialization step, the gate voltage (Vg) of the driving device is the reference voltage (Vref) in the Vth sensing step and the initial anode voltage of the OLED is such that the Vgs of the driving device (DT) exceeds the threshold voltage. Since it is low, a current is generated in the driving element DT, thereby increasing the anode voltage of the OLED. When the anode voltage of the OLED reaches Vref-Vth, the driving element DT is turned off. Therefore, no current is generated in the driving element DT and the threshold voltage Vth of the driving element DT is applied to the capacitor Cst. is saved The voltage set to lower the anode voltage of the OLED in the initialization step is the reference voltage Vref.

In the Vth holding step, the Vth sensing time and the time interval between the data writing step may vary between pixel lines in blocks. The Vth holding step reduces this deviation to improve block dim in the block division driving method.

The Vth holding step is a time interval between the Vth sensing time and the non-emission (EM OFF) step for data writing. Block dim that may occur due to the time difference from the Vth sensing step to the data writing step occurring between pixel lines in a block It can help to improve (block dim).

In the Vth sensing step, the anode voltage is formed differently according to the threshold voltage Vth of the driving element DT. In the data writing step, when the data voltage Vdata is applied to the gate and the capacitor Cst of the driving device DT, Vgs of the driving device DT is different according to the threshold voltage Vth of the driving device DT, so that the pixels The deviation of the inter-drive element DT is compensated. The Vgs of the driving element DT for which the threshold voltage Vth of the driving element is compensated is stored in the capacitor Cst, and the OLED is emitted with the Vgs of the driving element DT in the light-emitting step.

5 to 14 are diagrams showing step-by-step operations of a pixel circuit according to an embodiment of the present invention. 5 to 14 , “Vg” denotes a gate voltage of the driving device DT, “Vd” denotes a drain voltage of the driving device DT, and “Vs” denotes a source voltage of the driving device DT, respectively. The source voltage Vs of the driving element DT is the same as the anode voltage of the OLED. In FIG. 15, “Vanode” is the anode voltage of the OLED.

Referring to FIG. 5 , in step T01 , the data voltage (hereinafter referred to as) charged in the previous frame period charged in the capacitor Cst while the second switch element S2 maintains an on state according to the VGH of the EM signal EM. . The OLED emits light with a current generated according to the Vgs of the driving element DT determined according to the previous data voltage. In step T01, the driving element DT and the second switch element S2 are turned on to supply current to the OLED. On the other hand, in step T01, the voltage of the scan signals SCAN1 to SCAN4 maintains VGL so that the first switch element S1 is turned off.

In step T01, the main node voltages of the pixel circuit are Ve = VGH, Vd = VDD, and Vg and Vs depend on the previous data voltage Vdata.

6 to 8 show initialization steps T02 to T04 of the pixel circuit. During the initialization steps T02 to T04, the EM signal EM is inverted to VGL so that the second switch element T2 is turned off. The initialization steps T02 to T04 include a first initialization step T02 in which the EM signal EM is inverted to VGL, a second initialization step T03 in which the data voltage Vdata is increased to the highest gray level voltage Vw, and data It is divided into a second initialization step T04 in which the voltage Vdata is lowered to a predetermined reference voltage Vref.

Referring to FIG. 6 , step T02 is a first initialization step in which the EM signal EM is inverted to VGL and the scan signals SCAN1 to SCAN4 are maintained as VGL. In step T02, the first switch element S1 maintains an off state. In step T02, the data voltage Vdata maintains the previous data voltage. The second switch element S2 is turned off according to the VGL of the EM signal EM to block a current path flowing to the OLED. Accordingly, in step T02, the OLED is turned off and does not emit light.

In step T02, the main node voltage of the pixel circuit is Ve = VGL, and Vd and Vs are changed to the threshold voltage (Vth) of the OLED. And Vg maintains the previous data voltage Vdata.

On the other hand, in the light emission stage, the anode voltage of the OLED is greater than or equal to the threshold voltage (OLED Vth) of the OLED. At this time, when the EM signal EM is output to VGL, the anode voltage drops due to the OLED current. However, when the anode voltage of the OLED reaches the threshold voltage (OLED Vth), no more OLED current is generated, and the anode voltage becomes the threshold voltage (OLED Vth) of the OLED. The reason Vd is the anode voltage is because the driving element DT is in a turned-on state at this time.

Referring to FIG. 7 , step T03 is a second initialization step in which the data voltage Vdata rises to the turn-on voltage of the OLED. The turn-on voltage of the OLED may be the highest grayscale voltage (Vw), but any voltage may be used as long as the OLED can be turned on, so it is not limited to the highest grayscale voltage. At this time, the OLED is turned on and temporarily emits light. The highest gradation is the highest gradation (or white gradation) of pixel data. In the case of 8-bit data, the highest grayscale voltage Vw is a target voltage of grayscale 255.

In step T03, the EM signal EM maintains VGL, and the scan signals SCAN1 to SCAN4 are inverted to VGH. In step T03, the scan signals SCAN1 to SCNA4 of the first switch element S1 are turned on to apply the data voltage Vdata to the gate and the capacitor Cst of the driving element DT. Accordingly, in step T03, Vg rises to the highest grayscale voltage (Vw), the driving element DT is turned on, and Vs reaches the threshold voltage (OLED Vth) of the OLED due to capacitor coupling, and Vd is also the threshold of the OLED. It changes to voltage (OLED Vth). In step T03, Ve is VGL.

Referring to FIG. 8 , step T04 is a third initialization step in which the data voltage Vdata is lowered to a predetermined reference voltage Vref. At this time, the anode voltage of the OLED, ie, Vs, is initialized to the reference voltage Vref, so that the OLED is turned off. In step T04, the EM signal EM maintains VGL, and the scan signals SCAN1 to SCAN4 maintain VGH.

The reference voltage Vref increases when the threshold voltage Vth of the driving element DT is sensed, and the anode voltage Vref-Vth of the OLED increases. At this time, the anode voltage does not exceed the threshold voltage OLED Vth. It should be set to voltage. For example, the reference voltage Vref may be set to the lowest grayscale voltage at which the OLED is turned off, but is not limited thereto. The lowest gradation is the lowest gradation (or black gradation) of pixel data.

In step T04, Vg is Vref, and Vd is changed to a voltage lower than the OLED threshold voltage (OLED Vth). Vs is OLED Vth-(Cst/Ctot)(Vw-Vref). “Ctot” represents the total capacitance connected to the source of the driving element DT and the anode of the OLED. Ctot includes Cst and Coled. Cold is the parasitic capacitance between both ends of the OLED. Ve is VGL.

Referring to FIG. 9 , in step T05, the EM signal EM is inverted to VGH. Step T05 is a Vth sensing step in which the threshold voltage Vth of the driving element Vth is sensed when the EM signal EM and the scan signals SCAN1 to SCAN4 maintain VGH. The data voltage Vdata maintains Vref in step T05. At this time, the first and second switch elements S1 and S2 are turned on, and Vs is changed to Vref-Vth. Vth is the threshold voltage of the driving element DT. In step T05, Vg = Vref, Vd = VDD, Ve = VGH.

Referring to FIG. 10 , in step T06, the EM signal EM is inverted to VGH and the scan signals SCAN1 to SCAN4 are inverted to VGL. Step T06 is a period during which the threshold voltage Vth of the driving element sensed by the capacitor Cst is maintained. In this case, the data voltage Vdata is generated as a voltage of the gray level to be displayed in the pixels of the previous block, is converted to the highest gray level voltage Vw, and then changed to the reference voltage Vref. This data voltage Vdata does not affect main nodes of pixels included in the current block. The first switch elements S1 are turned off according to the VGL of the scan signals SCAN1 to SCAN4. Accordingly, the data voltage does not affect the gate voltage of the driving element DT in step T06.

In step T06, the main node voltages of the pixel circuit are Vg = Vref, Vd = VDD, Vs = Vref-Vth, Ve = VGH.

Referring to FIG. 11 , step T07 is a period immediately before data writing in which the EM signal EM is inverted to VGL and the scan signals SCAN1 to SCAN4 are maintained as VGL. The first and second switch elements S1 and S2 are turned off because the scan signals SCAN1 to SCAN4 and the EM signal EM are VGL. At this time, the data voltage Vdata maintains the reference voltage Vref, but does not affect main nodes of pixels belonging to the current block.

In step T07, Vd is changed to a voltage equal to or less than Vref-Vth. In step T07, Vg, Vs and Ve are Vg = Vref, Vs = Vref-Vth, Ve = VGL.

Referring to FIG. 12 , step T08 is a data writing period in which the EM signal EM is maintained at VGL and the scan signals SCAN1 to SCAN4 are sequentially changed to VGH. In step T08, pixel lines belonging to the current block are addressed according to pulses of the sequentially shifted scan signals SCAN1 to SCAN4, and pixel data to be sequentially displayed line by line is written to the pixels of the current block. In step T08, the second switch element S2 maintains an off state according to the VGL of the EM signal EM, and the first switch element S1 is turned on according to the VGH pulse of the scan signals SCAN1 to SCAN4. The data voltage Vdata is supplied to the gate of the driving element DT and the capacitor Cst. The data voltage Vdata is a pixel data voltage of current frame data. The data voltage Vdata is a grayscale voltage of pixel data between the highest grayscale voltage Vw and the reference voltage Vref. Accordingly, the data voltage Vdata varies according to the gray level of the pixel data.

In step T08, Vg is changed to Vdata, and Vd and Vs are changed to Vref-Vth+(Cst/Ctot)(Vdata-Vref). Ve holds VGL.

Referring to FIG. 13 , step T09 is a period immediately after data writing in which the EM signal EM is maintained at VGL and the scan signals SCAN1 to SCAN4 are changed to VGL. In step T09, the first and second switch elements S1 and S2 are turned off. At this time, the data voltage Vdata changes to the highest grayscale voltage Vw. The data voltage Vdata generated in step T09 is a data voltage for initialization of the next block that is not related to the current block data.

In step T09, Vg is Vdata, and Vd and Vs are maintained at Vref-Vth+(Cst/Ctot)(Vdata-Vref). Ve holds VGL.

Referring to FIG. 14 , step T10 is an emission step in which the EM signal EM is inverted to VGH and the scan signals SCAN1 to SCAN4 are maintained at VGL. In step T10, in step T08, the second switch element S2 is turned on according to VGH of the EM signal EM, and the driving element DT is turned on according to Vgs to supply current to the OLED. Accordingly, in step T10, the OLED emits light.

In step T10, Vg and Vs are Vdata, and Vd is VDD. Ve is VGH.

15 is a view showing a simulation result of the present invention.

As can be seen from FIG. 15, the present invention induces an increase in the anode voltage (Vanode) of the OLED by raising the data voltage (Vdata) to an appropriate voltage, so that the same voltage is applied regardless of the anode voltage (Vanode) of the previous frame. After it is stored in (Cst), the anode voltage is initialized by lowering the data voltage to the reference voltage (Vref) to lower the anode voltage of the OLED to a predetermined voltage or less. Accordingly, according to the present invention, pixels can be initialized without a wiring to which an initialization voltage is applied and a transistor connected to the wiring.

Those skilled in the art from the above description will be able to see that various changes and modifications are possible without departing from the technical spirit of the present invention. Accordingly, the technical scope of the present invention should not be limited to the contents described in the detailed description of the specification, but should be defined by the claims.

100: display panel 110: data driver
120: gate driver 130: timing controller
101: sub-pixel DT: driving element
S1, S2: switch element Cst: capacitor
OLED: organic light emitting diode

Claims (8)

a display panel in which data lines and gate lines intersect and a plurality of sub-pixels are disposed;
a data driver supplying a data signal to the data lines; and
a gate driver supplying a scan signal and a light emission control signal gate signal to the gate lines;
Each of the sub-pixels includes a pixel circuit,
The pixel circuit is
a driving device for driving the light emitting device;
a first switch device for applying a data voltage from the data line to a gate of the driving device according to the scan signal;
a second switch element for switching a current path between the high potential voltage source and the first electrode of the driving element according to the light emission control signal; and
a capacitor connected between the gate of the driving element and the second electrode;
The anode of the light emitting device is connected to the second electrode of the driving device,
After the data voltage is increased to a predetermined first voltage in the initialization of the pixel circuit, the electroluminescent display is changed to a second voltage lower than the first voltage. The method of claim 1,
The initialization step is
a first initialization step in which the light emission control signal is changed to a gate-off voltage, the second switch is turned off, and the scan signal is the gate-off voltage;
a second initialization step in which the light emission control signal is maintained at a gate-off voltage and the scan signal is inverted to a gate-on voltage to turn on the first switch device; and
a third initialization step in which the emission control signal is maintained at a gate-off voltage and the scan signal is maintained at the gate-on voltage;
The data voltage increases to the first voltage in the second initialization step and decreases to the second voltage in the third initialization step. 3. The method of claim 2,
The light emitting device is turned off in the first initialization step, then turned on in the second initialization step, and then turned off in the third initialization step. 4. The method of claim 3,
An electroluminescent display device in which the first voltage is set to a voltage at which the light emitting device is turned on. 5. The method of claim 4,
An electroluminescent display device in which the anode voltage of the light emitting device is set to a voltage that does not exceed the threshold voltage of the light emitting device when the second voltage is sensed by the threshold voltage of the driving device. 3. The method of claim 2,
The pixel circuit is
After being initialized in the initialization step, a threshold voltage sensing step, a holding step, a data writing step, and a light emitting step of the driving element are performed;
In the threshold voltage sensing step of the driving device, the emission control signal is inverted to the gate-on voltage and the scan signal is maintained as the gate-on voltage;
In the holding step, the emission control signal is maintained at the gate-on voltage and the scan signal is inverted to the gate-off voltage. 7. The method of claim 6,
In the data writing step, the light emission control signal is inverted to the gate-off voltage and the scan signal is generated as a pulse of the gate-on voltage sequentially shifted;
In the light emission step, the light emission control signal is inverted to the gate-on voltage and the scan signal is maintained at the gate-off voltage;
In the data writing step, the gate-on voltage of the scan signal is synchronized with the grayscale voltage of the data voltage;
The grayscale voltage is a voltage between the first voltage and the second voltage. The method of claim 1,
The screen of the display panel is divided and driven into two or more blocks,
The EM line to which the light emission control signal is applied is commonly connected to all pixel lines in the block,
a gate line to which the scan signal is applied is separated between pixel lines in the block and between the blocks;
The EM line is separated between blocks.

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