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KR102354062B1 - 직접 메모리 액세스 제어 장치 및 그 작동 방법 - Google Patents

직접 메모리 액세스 제어 장치 및 그 작동 방법 Download PDF

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Publication number
KR102354062B1
KR102354062B1 KR1020170081920A KR20170081920A KR102354062B1 KR 102354062 B1 KR102354062 B1 KR 102354062B1 KR 1020170081920 A KR1020170081920 A KR 1020170081920A KR 20170081920 A KR20170081920 A KR 20170081920A KR 102354062 B1 KR102354062 B1 KR 102354062B1
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KR
South Korea
Prior art keywords
control device
direct memory
memory access
access control
data
Prior art date
Application number
KR1020170081920A
Other languages
English (en)
Korean (ko)
Other versions
KR20180002535A (ko
Inventor
오이겐 벡커
요제프 네발트
악셀 아우에
Original Assignee
로베르트 보쉬 게엠베하
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
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Application filed by 로베르트 보쉬 게엠베하 filed Critical 로베르트 보쉬 게엠베하
Publication of KR20180002535A publication Critical patent/KR20180002535A/ko
Application granted granted Critical
Publication of KR102354062B1 publication Critical patent/KR102354062B1/ko

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    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/20—Handling requests for interconnection or transfer for access to input/output bus
    • G06F13/28—Handling requests for interconnection or transfer for access to input/output bus using burst mode transfer, e.g. direct memory access DMA, cycle steal
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00—Data switching networks
    • H04L12/28—Data switching networks characterised by path configuration, e.g. LAN [Local Area Networks] or WAN [Wide Area Networks]
    • H04L12/46—Interconnection of networks
    • H04L12/4604—LAN interconnection over a backbone network, e.g. Internet, Frame Relay
    • H04L12/462—LAN interconnection over a bridge based backbone
    • H04L12/4625—Single bridge functionality, e.g. connection of two networks over a single bridge

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Small-Scale Networks (AREA)
  • Computer And Data Communications (AREA)
  • Bus Control (AREA)
KR1020170081920A 2016-06-29 2017-06-28 직접 메모리 액세스 제어 장치 및 그 작동 방법 KR102354062B1 (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DE102016211768.8 2016-06-29
DE102016211768.8A DE102016211768A1 (de) 2016-06-29 2016-06-29 Speicherdirektzugriffssteuereinrichtung und Betriebsverfahren hierfür

Publications (2)

Publication Number Publication Date
KR20180002535A KR20180002535A (ko) 2018-01-08
KR102354062B1 true KR102354062B1 (ko) 2022-01-24

Family

ID=60662535

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1020170081920A KR102354062B1 (ko) 2016-06-29 2017-06-28 직접 메모리 액세스 제어 장치 및 그 작동 방법

Country Status (3)

Country Link
KR (1) KR102354062B1 (zh)
CN (1) CN107544928B (zh)
DE (1) DE102016211768A1 (zh)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE102020203663A1 (de) 2020-03-20 2021-09-23 Robert Bosch Gesellschaft mit beschränkter Haftung Integrierter Schaltkreis, eingebettetes System und Kraftfahrzeug

Family Cites Families (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5862407A (en) * 1996-03-15 1999-01-19 Rendition, Inc. System for performing DMA byte swapping within each data element in accordance to swapping indication bits within a DMA command
US6874039B2 (en) * 2000-09-08 2005-03-29 Intel Corporation Method and apparatus for distributed direct memory access for systems on chip
US7120708B2 (en) * 2003-06-30 2006-10-10 Intel Corporation Readdressable virtual DMA control and status registers
US7533195B2 (en) * 2004-02-25 2009-05-12 Analog Devices, Inc. DMA controller for digital signal processors
US7484016B2 (en) * 2004-06-30 2009-01-27 Intel Corporation Apparatus and method for high performance volatile disk drive memory access using an integrated DMA engine
CN100361107C (zh) * 2005-03-02 2008-01-09 华为技术有限公司 一种直接存储器访问控制器及传输数据的方法
KR20070082835A (ko) * 2006-02-17 2007-08-22 삼성전자주식회사 직접 메모리 액세스 제어장치 및 방법
US9141572B2 (en) * 2006-12-15 2015-09-22 Microchip Technology Incorporated Direct memory access controller
JP4974078B2 (ja) * 2007-07-26 2012-07-11 Ｎｅｃアクセステクニカ株式会社 データ処理装置
US7912997B1 (en) * 2008-03-27 2011-03-22 Xilinx, Inc. Direct memory access engine
CN101504633B (zh) * 2009-03-27 2012-09-05 无锡中星微电子有限公司 一种多通道dma控制器
CN102541780B (zh) * 2011-12-15 2014-10-22 苏州国芯科技有限公司 一种多数据流通道dma系统
DE102012010558A1 (de) * 2012-05-29 2013-12-05 Robert Bosch Gmbh Hardwarevorrichtung für ein system,system und speicherzugriffsverfahren

Also Published As

Publication number Publication date
KR20180002535A (ko) 2018-01-08
CN107544928B (zh) 2024-03-29
DE102016211768A1 (de) 2018-01-04
CN107544928A (zh) 2018-01-05

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