KR102301877B1 - Light emitting device - Google Patents

Abstract

The present disclosure provides a semiconductor light emitting device, comprising: a light-transmitting substrate; A semiconductor light emitting comprising a first semiconductor region having a first conductivity, an active region generating light by using recombination of electrons and holes, and a second semiconductor region having a second conductivity different from the first conductivity, which are sequentially grown A device chip; a first semiconductor light emitting device chip having a first electrode electrically connected to the first semiconductor region and a second electrode electrically connected to the second semiconductor region; a window through which the light-transmitting substrate emits light a first semiconductor light emitting device chip; and a first thin film transistor that controls light emission of the first semiconductor light emitting device chip and is deposited on a light-transmitting substrate.

Description

Semiconductor light emitting device {LIGHT EMITTING DEVICE}

The present disclosure relates to semiconductor light emitting devices as a whole, and in particular, semiconductor light emitting devices used in mini LED displays or micro LED displays (eg, mini LEDs (about 100 μm in width (300 μm or less)), micro LEDs (width devices of less than 100 μm)). Unlike the existing LED backlighting LCD, the micro LED display does not use a semiconductor light emitting device as a backlight, but uses it for direct light emission like an OLED display. Here, the semiconductor light emitting device means a semiconductor optical device that generates light through recombination of electrons and holes, and includes an AlGaInN based semiconductor light emitting device that emits ultraviolet light, blue and green light and an AlGaInP(As) based semiconductor light emitting device that emits red light. for example.

Herein, background information related to the present disclosure is provided, and they do not necessarily mean prior art (This section provides background information related to the present disclosure which is not necessarily prior art).

1 is a view showing an example of a semiconductor light emitting structure disclosed in US Patent Publication No. US2019/0067255, wherein the semiconductor light emitting structure includes a first semiconductor light emitting device 101 (eg, a red light emitting LED flip chip) and a second semiconductor light emitting structure. and a wiring board 107 on which the device 103 (eg, a blue light emitting LED flip chip), a third semiconductor light emitting device 105 (eg, a green light emitting LED flip chip), and three semiconductor light emitting devices 101, 103, and 105 are placed.

FIG. 2 is a view showing an example of a semiconductor light emitting device (an example of a semiconductor light emitting device that can be used in the semiconductor light emitting structure shown in FIG. 1) disclosed in US Patent Publication No. US2019/0067525, wherein the semiconductor light emitting device is a P-type a GaP window layer 104 , a P-type confinement layer 106 , an MQW active region 108 , an N-type confinement layer 110 , and an N-type current spreading layer 112 . In addition, the semiconductor light emitting device includes a metal reflective layer 164 , an N-side electrode 182 , and a P-side electrode 180 on a side from which the growth substrate is removed. In addition, the semiconductor light emitting device includes a P-type current diffusion layer 118 (eg, ITO), a transparent adhesive layer 130 , and a transparent support substrate 102 on the opposite side. Through this configuration, the semiconductor light emitting device may emit light of a red wavelength. However, when the N-type AlGaInP(As)-based semiconductor layer is disposed on the side where the electrodes 180 and 182 are positioned, that is, on the side where the flip-chip bonding is performed with the lead electrode, wiring or wiring board (so-called N-side up flip chip) In particular, as the size of the chip is miniaturized, the thick N-type semiconductor regions 110 and 112 and the MQW active region 108 are removed to inject current from the P-side electrode 180 to the P-type semiconductor regions 104 and 106 . It is known that excessive heat is generated by non-uniform current flow in the N-type semiconductor regions 110 and 112 along with difficulties in the MESA etching process and the electrical connection process. As a method to solve this problem, it may be considered to use a P-side up flip chip, and two methods have been proposed in the prior art.

3 is a view showing an example of a semiconductor light emitting device disclosed in US Patent No. 5,376,580, wherein the semiconductor light emitting device includes a P-type GaAs growth substrate 14, a P-type semiconductor region 11 (eg, AlGaAs); It may include an active region 12 and an N-type semiconductor region 13 (eg, AlGaAs). If the semiconductor light emitting device of this type (the P-type semiconductor region 11 is first grown during the epi growth process) undergoes the electrode formation process as shown in FIG. 2, a so-called P-side up flip chip can be manufactured. there will be However, whether the AlGaInN-based semiconductor light-emitting device or the AlGaInP(As)-based semiconductor light-emitting device is formed prior to growing the active region 12 , if the P-type semiconductor region 11 is grown before the N-type semiconductor region 13 , the surface When the active region 12 is grown due to its roughness, electrical/optical properties are deteriorated due to deterioration of the thin film quality of the active region 12. of semiconductor light emitting devices are difficult to find.

4 to 7 are views illustrating an example of a method for manufacturing a semiconductor light emitting device disclosed in US Patent No. US7,067,340. First, as shown in FIG. 4, a growth substrate 300 (eg: GaAs) An N-type semiconductor region 302, an active region 304, and a P-type semiconductor region 306 are sequentially grown on the substrate), and then a soft transparent adhesive layer 308 (Soft transparent adhesive layer; for example, BCB (Bisbenzocyclobutene)) , polyimide, glass, epoxy), a temporary substrate 310 (eg, glass, silicon, ceramic, Al ₂ O ₃ ) is attached to the P-type semiconductor region 306 . Next, as shown in FIG. 5 , the growth substrate 300 is removed using the temporary substrate 310 as a support substrate. Next, as shown in FIG. 6 , in the N-type semiconductor region 302 from which the growth substrate 300 is removed, a soft transparent adhesive layer 312 (eg, bisbenzocyclobutene (BCB), polyimide) is flexible and transparent. , glass, epoxy), attaching a light-transmitting substrate 314 (eg, a light-transmitting substrate (sapphire, glass, GaP, SiC)), and then attaching a flexible transparent adhesive layer 308 and a temporary substrate 310 Remove. Finally, as shown in FIG. 7 , a portion of the P-type semiconductor region 306 and the active region 304 is removed through etching, and then, the N-type semiconductor region 302 and the P-type semiconductor region 306 are respectively formed. , N-side electrodes 316 , 318 , and 320 and P-side electrodes 316 , 318 and 322 are formed to manufacture a semiconductor light emitting device. Electrode 316 is a metal reflective layer (eg, Au, Al, Ag, Ag alloy), electrode 318 is a barrier layer (eg, Ni, W, TiN, WN, Pt, ZnO, ITO), and electrodes 320 and 322 ) is a bonding pad layer (eg, Au, Al). The semiconductor light emitting device shown in FIGS. 4 to 7 is different from the semiconductor light emitting device shown in FIG. 3 in that the P-side up flip chip is manufactured through a chip process rather than an epitaxial growth process. However, in the attachment of the temporary substrate 310 and the attachment of the light-transmitting substrate 314 , since the transparent adhesive layers 308 and 312 having the same ductility as the attachment material are used, the ductility is improved in the process of attaching the light-transmitting substrate 314 . The transparent adhesive layer 308 may be deformed and a void may be generated in the local bonding interface. Also, the flexible and transparent adhesive layer 312 having ductility with the temporary substrate 310 and in the process of removing the transparent adhesive layer 308 . ) may be damaged, so it needs improvement. In addition, the growth substrate 300 (eg, a GaAs substrate) on which the N-type semiconductor region 302 , the active region 304 , and the P-type semiconductor region 306 are sequentially grown is formed with the growth substrate 300 and the grown materials 302 . , 304, 306) between the lattice constant (Lattice Constant) and the coefficient of thermal expansion (CTE) due to the stress (Stress) generated by the difference between the wafer bowing (Bowing) is a severe state, and the growth with such strong stress When the substrate 300 is attached to the temporary substrate 310 using the flexible and transparent adhesive layer 308, the weak bonding strength of the flexible transparent adhesive layer 308 and the void in the local bonding interface. Due to the occurrence, damage during the process, in particular, substrate breakage and micro-cracks, is a common occurrence.

12 is a view showing an example of a semiconductor light emitting device disclosed in U.S. Patent No. 7,262,436, in which the semiconductor light emitting device includes a growth substrate 100 and a first semiconductor region 300 grown on the growth substrate 100; for example: n-type semiconductor region), an active region 400 grown on the first semiconductor region 300 , a second semiconductor region 500 grown on the active region 400 (eg, a p-type semiconductor region), a second semiconductor region ( It includes electrodes 901 , 902 , and 903 serving as a reflective film formed on the 500 ) and an electrode 800 formed on the exposed first semiconductor region 300 by etching. It is possible for the first semiconductor region 300 and the second semiconductor region 500 to have opposite conductivity. Preferably, a buffer region (not shown) is provided between the growth substrate 100 and the first semiconductor region 300 . A chip having such a structure, that is, a chip in which all of the electrodes 901 , 902 , 903 and the electrode 800 are formed on the opposite side of the growth substrate 100 , and the electrodes 901 , 902 , and 903 function as a reflective film is called a flip chip. The electrodes 901, 902, and 903 include an electrode 901 having a high reflectance (eg, Ag), an electrode 903 for bonding (eg, Au), and an electrode 902 preventing diffusion between the material of the electrode 901 and the material of the electrode 903; Example: Ni). Such a metal reflective film structure has a high reflectance and an advantage in current diffusion. However, since the electrode 901, 902, 903 and the electrode 800 side are used for bonding, not the growth substrate 100 side, the structural inclination (height) to the flip chip during bonding due to the height difference between the electrodes 901, 902, 903 and the electrode 800. car) occurs.

13 is a view showing an example of a semiconductor light emitting device disclosed in U.S. Patent No. 9,466,768. The semiconductor light emitting device includes a growth substrate 100, a buffer region 200 grown on the growth substrate 100, and a buffer region ( 200), the first semiconductor region 300 is grown on the first semiconductor region 300, and the active region 400 is grown on the first semiconductor region 300 and generates light through recombination of electrons and holes, and the second is grown on the active region 400 A semiconductor region 500 is provided. Sapphire, SiC, Si, GaN, etc. are mainly used as the growth substrate 100 , the growth substrate 100 may be finally removed, and the buffer region 200 may be omitted. The positions of the first semiconductor region 300 and the second semiconductor region 500 may be changed, and in the group III nitride semiconductor light emitting device, they are mainly made of GaN. Each of the semiconductor layers 200 , 300 , 400 , and 500 may be composed of multiple layers, and additional layers may be provided. Meanwhile, unlike FIG. 12 , a non-conductive reflective film 910 is provided instead of the electrodes 901 , 902 , and 903 functioning as a reflective film. The non-conductive reflective film 910 is formed of a single-layer dielectric film (eg _{, SiO x} , TiO _x , Ta ₂ O ₅ , MgF ₂ ), a multi-layered dielectric film, or a DBR reflective film (eg, SiO ₂ /TiO ₂ ), or a combination thereof. can be made in combination. For the supply of current, electrodes 920 and 930 and electrodes 800 and 810 are provided, and an electrical connection 940 passing through the non-conductive reflective film 910 is formed to connect the electrode 920 and the electrode 930. have. A branch electrode 810 and a branch electrode 930 may be provided for current diffusion between the first semiconductor region 300 and the second semiconductor region 500 , and the current diffusion of the second semiconductor region 500 may be more smoothly A light-transmitting conductive film 600 (eg, ITO, TCO) is formed. However, also in this configuration, there is a structural inclination (height difference) between the electrode 920 and the electrode 800 . Unexplained reference numeral 950 denotes a current blocking layer (CBL).

14 is a view showing an example of a semiconductor light emitting device disclosed in Japanese Patent Application Laid-Open No. 2006-120913. The semiconductor light emitting device includes a growth substrate 100, a buffer region 200 grown on the growth substrate 100, and a buffer. A first semiconductor region 300 grown on the region 200 , an active region 400 grown on the first semiconductor region 300 , a second semiconductor region 500 grown on the active region 400 , and a second semiconductor A light-transmitting conductive film 600 (eg, ITO, TCO) formed on the region 500 and having a current diffusion function, an electrode 700 formed on the light-transmitting conductive film 600 , and a first semiconductor region 300 exposed by etching ) and an electrode 800 formed thereon. In addition, a distributed Bragg reflector (DBR) and a metal reflective film 904 are provided on the transmissive conductive film 600 . By forming the height of the electrode 800 to match the height of the electrode 700 , the structural inclination (height difference) of the flip chip during bonding can be eliminated. However, it has a disadvantage that the electrode 700 and the electrode 800 must be separately formed.

FIG. 15 is a view showing an example of a semiconductor light emitting device disclosed in US Patent No. 9,748,446. As shown in FIG. 2 , the semiconductor light emitting device includes a growth substrate 100, a buffer region 200, and a first semiconductor. The region 300, the active region 400, the second semiconductor region 500, the transmissive conductive film 600, the non-conductive reflective film 910, the electrodes 920, 930, 940, the electrodes 800, 810, and the current blocking layer 950 are formed. include However, in order to reduce the structural inclination (height difference) between the electrode 800 and the electrode 920 , the electrode 800 is formed on the non-conductive reflective film 920 , and the branch electrode 810 and the electrode 800 are electrically connected to each other. An electrical connection 820 penetrating through the non-conductive reflective film 910 is used for connection.

In addition, examples in which a via hole is formed by etching a semiconductor layer and an N-side electrode is formed therein to eliminate a height difference with the P-side electrode can be found in Japanese Patent Laid-Open No. S55-009442 or the like.

FIG. 16 is a view showing an example of the semiconductor light emitting device disclosed in US Patent No. 9,236,524. A semiconductor light emitting device having the same configuration as that shown in FIG. 15 is presented except for the configuration of the non-conductive reflective film 910. . The non-conductive reflective film 910 is provided with a thick dielectric film 910c in addition to the dielectric films 910d and 910e forming the DBR to reduce the structural inclination (height difference) between the electrode 800 and the electrode 920 . Remove. On the other hand, unlike the dielectric films 910d and 910e that form the DBR deposited by physical vapor deposition (PVD), the thick dielectric film 910c is formed by chemical vapor deposition (CVD). A technique for forming the overall stable non-conductive reflective film 910 by improving the step coverage is proposed.

29 is a view showing an example of a semiconductor light emitting device or a semiconductor light emitting device display disclosed in US Patent Publication No. 2017-0323873, wherein the semiconductor light emitting device 100f includes a substrate 10f functioning as an external power supply and an epi structure (120e). The epi structure 120e is transferred onto the substrate 10f by the carrier 110 provided with the adhesive 130 . A thin film transistor (TFT) structure 16f is formed on the substrate 10f, and the TFT structure 16f is a means for driving the epitaxial structure 120e. The epitaxial structure 120e is provided with electrodes 142e and 144e functioning as bonding pads, and the electrodes 142e and 144e are physically and electrically coupled to the circuit electrode 12f provided in the TFF structure 16f.

30 is a diagram illustrating an example of a micro LED display device disclosed in Korean Patent Application Laid-Open No. 10-2019-0078945, wherein the micro LED display device includes a substrate 110 and a micro LED 140 . TFTs 101 , 103 , 105 , and 107 are formed on a substrate 110 (eg, glass), and the TFTs 101 , 103 , 105 , 107 include a gate electrode 101 , a semiconductor layer 103 , a source electrode 105 , and a drain electrode 107 . An insulating layer 112 is provided between the gate electrode 101 and the electrodes 105 and 107 . The semiconductor layer 103 may be made of an amorphous semiconductor such as amorphous silicon, polysilicon such as LTPS, or an oxide semiconductor such as _{IGZO (Indium Gallium Zinc Oxide), TiO 2} , ZnO, WO ₃ , SnO _{2 .} have. When the semiconductor layer 103 is formed of an oxide semiconductor, the size of the thin film transistor (TFT) may be reduced, driving power may be reduced, and electric mobility may be improved.

TFTs 101, 103, 105, 107 are formed on the substrate 110, then the insulating layer 114 is formed, the micro LED 140 is transferred thereon, the insulating layer 116 is formed again, and then the hole 114a, 114b and 116a116b) are formed, the drain electrode 107 and the p-side electrode 141 are connected through the connection electrode 117a, and the n-type electrode 143 and the electrode 109 are connected through the connection electrode 117b. Connect. Finally, an insulating layer 118 is formed. When the gate electrode 101 is turned on, the semiconductor layer 103 is activated, the source electrode 105 and the drain electrode 107 conduct with each other, and a current is supplied to the micro LED 140 to emit light. Reference numeral 152 denotes an electrode, an operation signal is provided to the gate electrode 101 through the electrode 152 , and the current passing through the micro LED 140 flows through the electrode 109 .

As described above, a display combining a TFT and a mini LED or a micro LED has been proposed, and a technology for improving the electric mobility by using an oxide semiconductor as a TFT has been proposed. In the technique shown in FIGS. 29 and 30 , the TFT is provided on the side of the substrate 10f and 110 , which causes many problems when applied to a display device using an extremely small pixel such as a micro LED.

This will be described at the end of 'Specific Contents for Implementation of the Invention'.

Herein, a general summary of the present disclosure is provided, which should not be construed as limiting the scope of the present disclosure (This section provides a general summary of the disclosure and is not a comprehensive disclosure of its full scope or all of its features).

According to one aspect according to the present disclosure (According to one aspect of the present disclosure), in a method of manufacturing a flip-chip semiconductor light emitting device, light is emitted through a first semiconductor region having an N-type and recombination of electrons and holes. providing a growth substrate in which an active region and a second semiconductor region having a P-type are sequentially formed; bonding the first light-transmitting substrate to the side of the second semiconductor region; removing the growth substrate from the first semiconductor region side; attaching a second light-transmitting substrate to the side of the first semiconductor region from which the growth substrate is removed using an adhesive layer; laser ablation of the first light-transmitting substrate from the side of the second semiconductor region; removing a portion of the second semiconductor region and the active region to expose a portion of the first semiconductor region; and forming a first electrode of a flip chip and a second electrode of a flip chip on the exposed first semiconductor region and the second semiconductor region, respectively.

According to another aspect of the present disclosure (According to another aspect of the present disclosure), there is provided a semiconductor light emitting device, comprising: a first semiconductor region having a first conductivity; a second semiconductor region having a second conductivity different from the first conductivity; an active region interposed between the first semiconductor region and the second semiconductor region and generating light by recombination of electrons and holes; a first electrode positioned in the first semiconductor region exposed by removing a portion of the first semiconductor region, the active region, and the second semiconductor region, in electrical communication with the first semiconductor region, and functioning as a flip-chip bonding pad; In addition, a portion of the first semiconductor region, the active region, and the second semiconductor region are removed and located in another first semiconductor region exposed, insulated from the first semiconductor region through an insulating layer, and electrically connected to the second semiconductor region A semiconductor light emitting device including a second electrode communicating and functioning as a flip chip bonding pad is provided.

According to another aspect of the present disclosure (According to another aspect of the present disclosure), there is provided a semiconductor light emitting device, comprising: a first semiconductor region having a first conductivity; a second semiconductor region having a second conductivity different from the first conductivity; an active region interposed between the first semiconductor region and the second semiconductor region and generating light by recombination of electrons and holes; a first electrode positioned in the first semiconductor region exposed by removing a portion of the first semiconductor region, the active region, and the second semiconductor region, in electrical communication with the first semiconductor region, and functioning as a flip-chip bonding pad; The semiconductor light emitting device includes a second electrode in electrical communication with the second semiconductor region and functioning as a flip-chip bonding pad, wherein the first electrode extends over the second semiconductor region, which is a non-emission region.

According to another aspect of the present disclosure (According to another aspect of the present disclosure), there is provided a semiconductor light emitting device, comprising: a first semiconductor region having a first conductivity; a second semiconductor region having a second conductivity different from the first conductivity; an active region interposed between the first semiconductor region and the second semiconductor region and generating light by recombination of electrons and holes; a first electrode in electrical communication with the first semiconductor region exposed by removing a portion of the first semiconductor region, the active region, and the second semiconductor region, and functioning as a flip-chip bonding pad; a second electrode in electrical communication with the second semiconductor region and functioning as a flip-chip bonding pad; In addition, a portion of the first semiconductor region, the active region, and the second semiconductor region are removed to fill the exposed first semiconductor region, and an insulating layer disposed under the first electrode and the second electrode; A device is provided.

According to another aspect according to the present disclosure (According to another aspect of the present disclosure), in a semiconductor light emitting device, a light-transmitting substrate; A semiconductor light emitting comprising a first semiconductor region having a first conductivity, an active region generating light by using recombination of electrons and holes, and a second semiconductor region having a second conductivity different from the first conductivity, which are sequentially grown A device chip; comprising: a first semiconductor light emitting device chip having a first electrode electrically connected to a first semiconductor region and a second electrode electrically connected to a second semiconductor region; an adhesive layer bonding the light transmitting substrate and the first semiconductor region side of the first semiconductor light emitting device chip; and a passivation layer covering at least the first semiconductor light emitting device chip and the adhesive layer.

According to another aspect according to the present disclosure (According to another aspect of the present disclosure), in a semiconductor light emitting device, a light-transmitting substrate; A semiconductor light emitting comprising a first semiconductor region having a first conductivity, an active region generating light by using recombination of electrons and holes, and a second semiconductor region having a second conductivity different from the first conductivity, which are sequentially grown A device chip; a first semiconductor light emitting device chip having a first electrode electrically connected to the first semiconductor region and a second electrode electrically connected to the second semiconductor region; a window through which the light-transmitting substrate emits light a first semiconductor light emitting device chip; In addition, there is provided a semiconductor light emitting device comprising a; a first thin film transistor that controls the light emission of the first semiconductor light emitting device chip and is deposited on the light-transmitting substrate.

According to another aspect of the present disclosure (According to another aspect of the present disclosure), there is provided a semiconductor light emitting device, comprising: a light-transmitting substrate having a first surface and a second surface opposite to the first surface; A semiconductor light emitting comprising a first semiconductor region having a first conductivity, an active region generating light by using recombination of electrons and holes, and a second semiconductor region having a second conductivity different from the first conductivity, which are sequentially grown A device chip comprising: a semiconductor light emitting device chip having a first electrode electrically connected to a first semiconductor region and a second electrode electrically connected to a second semiconductor region; , a semiconductor light emitting device chip in which the second surface of the light-transmitting substrate is a window through which light generated in the active region is emitted; In addition, a semiconductor light emitting device including a black matrix material provided on at least one of the first surface and the second surface is provided.

According to another aspect according to the present disclosure (According to another aspect of the present disclosure), in a method of manufacturing a semiconductor light emitting device, each of an n-type semiconductor region, a p-type second semiconductor region, and an n-type semiconductor region and preparing three semiconductor light emitting device chips interposed between the p-type semiconductor regions and having an active region for generating light by recombination of electrons and holes; and bonding three semiconductor light emitting device chips to a light-transmitting substrate having an adhesive layer; bonding the n-type semiconductor regions of each of the three semiconductor light emitting device chips to be positioned on the adhesive layer side; A method of manufacturing a device is provided.

According to another aspect according to the present disclosure (According to another aspect of the present disclosure), in a method of manufacturing a semiconductor light emitting device, each of an n-type semiconductor region, a p-type semiconductor region, an n-type semiconductor region and a p-type semiconductor Preparing a plurality of semiconductor light emitting device chips having an active region interposed between the regions and generating light by recombination of electrons and holes, and a light-transmitting substrate on which the n-type semiconductor region, the active region, and the p-type semiconductor region are placed In at least one semiconductor light emitting device among the plurality of semiconductor light emitting device chips, the light-transmitting substrate is coupled after the corresponding n-type semiconductor region, the corresponding active region, and the corresponding p-type semiconductor region are grown. preparing a device chip; bonding a plurality of semiconductor light emitting device chips to a first substrate; And, there is provided a method of manufacturing a semiconductor light emitting device comprising; removing the light-transmitting substrate of each of the plurality of semiconductor light emitting device chips by laser ablation.

According to another aspect according to the present disclosure (According to another aspect of the present disclosure), in a method of manufacturing a micro LED display having a plurality of pixels, each of an n-type semiconductor region, a p-type semiconductor region, n A first electrode interposed between the p-type semiconductor region and the p-type semiconductor region, which functions as an active region that generates light by recombination of electrons and holes, and a bonding pad, and is electrically connected to the n-type semiconductor region and the p-type semiconductor region, respectively and preparing a plurality of semiconductor light emitting devices including a second electrode and a substrate on which the n-type semiconductor region, the active region, and the p-type semiconductor region are placed; and placing a plurality of semiconductor light emitting devices on one pixel among the plurality of pixels; including, a method for manufacturing a micro LED display is provided.

This will be described at the end of 'Specific Contents for Implementation of the Invention'.

1 is a view showing an example of a semiconductor light emitting structure presented in US Patent Publication No. US2019/0067255,
2 is a view showing an example of a semiconductor light emitting device presented in US Patent Publication No. US2019/0067525,
3 is a view showing an example of a semiconductor light emitting device presented in US Patent Publication No. US5,376,580;
4 to 7 are views showing an example of a method for manufacturing a semiconductor light emitting device presented in US Patent Publication No. US7,067,340;
8 to 11 are views showing an example of a method of manufacturing a semiconductor light emitting device according to the present disclosure;
12 is a view showing an example of a semiconductor light emitting device presented in US Patent No. 7,262,436;
13 is a view showing an example of a semiconductor light emitting device presented in US Patent No. 9,466,768;
14 is a view showing an example of a semiconductor light emitting device disclosed in Japanese Patent Application Laid-Open No. 2006-120913;
15 is a view showing an example of a semiconductor light emitting device presented in US Patent No. 9,748,446;
16 is a view showing an example of a semiconductor light emitting device presented in US Patent No. 9,236,524;
17 is a view showing an example of a semiconductor light emitting device according to the present disclosure;
18 is a view showing an example of a method of manufacturing the semiconductor light emitting device shown in FIG. 17;
19 is a view showing another example of a semiconductor light emitting device according to the present disclosure;
20 is a view showing another example of a semiconductor light emitting device according to the present disclosure;
21 is a view showing another example of a semiconductor light emitting device according to the present disclosure;
22 is a view showing an example of a method of manufacturing the semiconductor light emitting device shown in FIG. 21;
23 is a view showing another example of a semiconductor light emitting device according to the present disclosure;
24 and 25 are views showing another example of a semiconductor light emitting device according to the present disclosure;
26 is a view showing another example of a semiconductor light emitting device according to the present disclosure;
27 is a view showing another example of a semiconductor light emitting device according to the present disclosure;
28 is a view showing another example of a semiconductor light emitting device according to the present disclosure;
29 is a view showing an example of a semiconductor light emitting device or a semiconductor light emitting device display disclosed in US Patent Publication No. 2017-0323873;
30 is a view showing an example of a micro LED display device presented in Korean Patent Application Laid-Open No. 10-2019-0078945;
31 is a view showing another example of a semiconductor light emitting device according to the present disclosure;
32 is a view showing an example of the arrangement of the semiconductor light emitting device shown in FIG. 31;
33 is a view showing a modified example of the semiconductor light emitting device shown in FIG. 31;
34 is a view showing another example of a semiconductor light emitting device according to the present disclosure;
35 is a view showing another example of a semiconductor light emitting device according to the present disclosure;
36 to 38 are views showing an example of a method of manufacturing the semiconductor light emitting device shown in FIG. 28;
39 is a view for explaining another method of manufacturing a semiconductor light emitting device according to the present disclosure;
40 and 41 are views for explaining another method of manufacturing a semiconductor light emitting device according to the present disclosure;
42 is a view for explaining another method of manufacturing a semiconductor light emitting device according to the present disclosure;
43 is a view showing an example of application of a semiconductor light emitting device according to the present disclosure;
44 and 45 are views showing another example of application of the semiconductor light emitting device according to the present disclosure;

Hereinafter, the present disclosure will be described in detail with reference to the accompanying drawings (The present disclosure will now be described in detail with reference to the accompanying drawing(s)).

8 to 11 are views illustrating an example of a method of manufacturing a semiconductor light emitting device according to the present disclosure.

First, as shown in FIG. 8A , a first semiconductor region 30 (eg, an N-type semiconductor region), an active region 40 (eg, MQWs) and a second semiconductor region are sequentially formed on the growth substrate 10 . (50: P-type semiconductor region) is grown. Each of the first semiconductor region 30 , the active region 40 , and the second semiconductor region 50 may be formed of a single layer or multiple layers, and of course, necessary layers such as the buffer region 20 may be added. In the case of a semiconductor light emitting device that emits red light, a GaAs substrate and an AlGaInP(As) based semiconductor may be used, and in the case of a semiconductor light emitting device that emits green, blue, and ultraviolet light, a sapphire substrate and an AlGaInN based semiconductor may be used. have. For example, the buffer region 20 includes a seed layer 22 and an un-doped semiconductor region 23 in order to relieve stress and improve the quality of the thin film, and generally have a thickness of about 4 μm. can be composed of The first semiconductor region 30 may have a thickness of 2.5 μm, the active region 40 may have a thickness of several tens of nm, and the second semiconductor region 50 may have a thickness of several tens of nm to several μm, In general, it may have a thickness of about 6 μm to 10 μm overall. When laser ablation is used, a sacrificial layer (not shown) may be provided between the seed layer 22 and the undoped semiconductor region 23 , and the seed layer 22 may function as a sacrificial layer .

Next, as shown in FIG. 8B , a protective layer 60 is formed on the second semiconductor region 50 . The protective layer 60 is preferably formed of a dielectric material such as _{SiO 2} , SiN _x to protect the semiconductor regions 30 , 40 , and 50 in a subsequent process including an etching process.

Next, as shown in FIGS. 8( c ) and 8 ( d ), a first light-transmitting substrate 70 is prepared, and the first light-transmitting substrate 70 and the semiconductor regions 30 , 40 , and 50 are combined. do. Unlike the prior art using organic adhesives such as BCB and silicone for bonding the first light-transmitting substrate 70 and the semiconductor regions 30 , 40 , 50 , it has strong bonding strength and is etched by dry and wet etching (dry & wet). In subsequent processes including etching), metal bonding (eg, eutechnic) process is used to prevent changes in semiconductor area properties and mechanical damage (cracks, cracks) during the process. The metal bonding layer 71 is provided on at least one side, preferably on both sides, of the side of the first light-transmitting substrate 70 and the side of the semiconductor regions 30 , 40 , and 50 . In addition, the sacrificial layer 72 is always provided on the first light-transmitting substrate 70 in order to remove the first light-transmitting substrate 70 using laser ablation. It is important to prevent cracks and cracks in the semiconductor regions 30 , 40 , and 50 during the bonding process, the difference between the growth substrate 10 and the coefficient of thermal expansion is not large, and sapphire having light transmitting properties is used as the first light transmitting substrate 70 . it is preferable In general, eutectic materials with metal bonding can be classified according to temperature, and the present disclosure is limited to materials having a process temperature of 250 ° C or more and 350 ° C or less, AuSn (300 ° C), AuIn (275 ° C) , NiSn (300° C.), CuSn (270° C.), and the like are preferable. On the other hand, in the case of BCB organic adhesive, bonding at 250° C. or lower is preferable. For reference, there are many well-known organic adhesives for wafer bonding other than the BCB organic adhesive material. Polyimide (160℃), SU-8 (90℃), Parylene (230℃), and Epoxy (150℃) are representative. The sacrificial layer 72 strongly absorbs laser light incident through the rear surface of the first light-transmitting substrate 70 to easily cause an instantaneous photo-thermochemical decomposition interaction. Compounds (Epitaxial or Polycrystalline Compounds) that have an energy band gap of less than 6.2 eV and a single crystal or polycrystalline structure, especially oxide and nitride semiconductors, are representative compounds. Oxide semiconductors include In ₂ O ₃ , SnO ₂ , ITO, ZnO, CdO, PbO, PZT, and alloy compounds thereof are preferable, and as a nitride semiconductor, InN, GaN, AlN, and alloy compounds thereof are optimal.

The material of the first light-transmitting substrate 70 is not limited as long as it has a difference in thermal expansion coefficient of 2 ppm or less from the growth substrate (GaAs, Sapphire) and has optical transparency. For example, in the case of a GaAs (5.7ppm) growth substrate for a semiconductor light emitting device that emits red light, a thermal expansion coefficient of 3.7-7.7 ppm and an optically transparent material are used, and for a semiconductor light emitting device that emits blue, green, and ultraviolet rays In the case of a sapphire (Sapphire; single crystal Al ₂ O ₃ , 6.5 ppm) substrate, it is 4.5-8.5 ppm and an optically transparent material may be used. Representative materials that satisfy all of these include E glass (5.5ppm), AlN (4.5ppm), SiC (4.8ppm), and borosilicate glass (4.6ppm), in addition to _{sapphire (single crystal Al 2} O _{3 ) identical to the growth substrate.}

Next, as shown in FIG. 8( e ), the growth substrate 10 is removed. In the case of a GaAs substrate, wet etching may be used, and in the case of a sapphire substrate, laser ablation may be used. A metal bond is used for bonding the first light-transmitting substrate 70 and the semiconductor regions 30 , 40 , and 50 , and a protective layer 60 is provided on the semiconductor regions 30 , 40 and 50 , so that dry and wet etching or In the process of laser ablation, the metal bonding layer 71 and the semiconductor regions 30 , 40 , and 50 can withstand it. Preferably, prior to attaching the second light-transmitting substrate 80 (refer to FIG. 9) and the semiconductor regions 30, 40, 50, stress relief and performance (optical output, operating voltage) improvement of the light emitting device, and the formation of a passivation layer A process of removing (eg, etching) a part or all of the undoped semiconductor region 23 is performed for an easy subsequent process.

Next, as shown in FIG. 9A , a second light-transmitting substrate 80 is prepared, and at least one side of the second light-transmitting substrate 80 side and the semiconductor region 30, 40, 50 side, preferably Preferably, an adhesive layer 81 is provided on both sides. The adhesive layer 81 may be formed of a light-transmitting material, such as BCB resin, as in the prior art. Materials that can be used as the adhesive layer 81 include many well-known organic adhesives for wafer bonding other than the BCB organic adhesive material, Polyimide (160°C), SU-8 (90°C), Parylene (230°C), Epoxy (150 ℃), silicone (100-300℃), etc.

Next, as shown in FIG. 9B , the second light-transmitting substrate 80 and the semiconductor regions 30 , 40 , and 50 are attached. Although heat (the organic adhesive material process temperature used above) is generated during the bonding process, the first light-transmitting substrate 70 and the semiconductor regions 30, 40, 50 have strong bonding force through metal bonding, so their bonding There is no problem with maintaining this. On the other hand, by forming the first light-transmitting substrate 70 and the second light-transmitting substrate 80 with a material having the same coefficient of thermal expansion (eg, sapphire), the adhesive layer 81 is strongly compressed to form the second light-transmitting substrate 80 and the semiconductor There is no problem of damage including cracking in bonding the regions 30 , 40 , and 50 .

Next, as shown in FIG. 9C , the first light-transmitting substrate 70 is removed to be separated from the semiconductor regions 30 , 40 , and 50 using laser ablation. By using laser ablation, it is possible to prevent damage to the adhesive layer 81 in the separation process of the first light-transmitting substrate 70 .

Next, as shown in FIGS. 10(a) and 10(b), the metal bonding layer 71 and the protective layer 60 are sequentially removed to prepare a P-side up flip chip. . Until this process, the adhesive layer 81 is prevented from being damaged, and the photolithography process is not used, and without the formation of electrodes or the etching process of the semiconductor regions 30 , 40 , 50 which are the core of the light emitting device, the first By performing the operation at the wafer level, it is possible to minimize cracks and cracks in the semiconductor regions 30 , 40 , and 50 despite performing the wafer bonding process twice. In addition, there is an advantage in that the performance and quality of the finally fabricated light emitting device can be further improved by continuously etching some or all of the undoped semiconductor region 23 after the growth substrate 10 is removed. In this process, the formation of the protective layer 60, the use of the metal bonding layer 71, the removal of the first light-transmitting substrate 70 using laser ablation, and the first light-transmitting substrate 70 and the second light-transmitting substrate ( 80), it is important to minimize the difference in the thermal expansion coefficient (normally, the difference in the maximum thermal expansion coefficient ≤ 2ppm to prevent cracking during wafer bonding between dissimilar materials).

Next, as shown in FIGS. 11A and 11B , the second semiconductor region 50 and a portion of the active region 40 are removed to expose the first semiconductor region 30 .

Next, as shown in FIG. 11C , a light-transmitting electrode 91 , a first electrode 92 , and a second electrode 93 are formed. The light-transmitting electrode 91 functions to smoothly spread the current in the second semiconductor region 50 having poor current diffusion, and is mainly made of a transmissive conductive oxide film (TCO), typically made of ITO. The first electrode 92 and the second electrode 93 are electrically connected to the first semiconductor region 30 and the second semiconductor region 50, respectively, and have the same configuration as the electrodes 316, 318, 320, and 322 shown in FIG. can function as

Next, as shown in Fig. 11(d), the semiconductor light emitting device in a wafer state is isolated as an individual chip. At this time, by removing the adhesive layer 81 to expose the second light-transmitting substrate 80 , it is possible to facilitate the scribing & breaking process of the second light-transmitting substrate 80 .

Finally, as shown in FIG. 11E , a passivation layer 94 (eg _{, SiO 2} , Al ₂ O ₃ , SiN _x ) is formed to protect the device. Meanwhile, as shown, by reducing the size of the electrode 93 and providing a dielectric reflector (DBR reflector) in the passivation layer 94 , it can function as a reflector instead of the electrode 93 . An example of such a dielectric reflector is well presented in US Pat. No. 9,236,524. The passivation layer 94 is basically a dielectric material (eg _{, SiO 2} , Al ₂ O ₃ , SiN _x ) after covering the top and sides of the semiconductor regions 30 , 40 , 50 with a high reflectivity metal material (eg, A multilayer structure in which Ag, Al, Au, Cu, Pt, Cr, Ti, TiW) is continuously deposited and formed is also possible.

It goes without saying that the order of the processes shown in FIGS. 11(b) to 11(e) may be changed. In the case of a mini or micro LED chip, the area of the sidewall of the isolation process and the MESA process is smaller than the light emitting area compared to the size of the conventional chip (the length of one side is generally 300um or more). Since it occupies a large area compared to that, it is very important from the viewpoint of light brightness and reliability to isolate and prevent electrical flow through the sidewall of the mesa (electrical passivation). Therefore, it is desirable to perform an electrical passivation process immediately after the isolation and mesa processes so as not to be exposed to the atmosphere for a long time between processes after the isolation and mesa processes.

17 is a view illustrating an example of a semiconductor light emitting device according to the present disclosure, wherein the semiconductor light emitting device includes a light-transmitting substrate 1 , a first semiconductor region 2 , an active region 3 , a second semiconductor region 4 , an insulating layer (5), a current spreading electrode (6), a first electrode (7) and a second electrode (8).

The light-transmitting substrate 1 may be a growth substrate (eg, sapphire, SiC) or a light-transmitting substrate attached to the semiconductor regions 2 , 3 and 4 in a state in which the growth substrate is removed. The light-transmitting substrate may also be made of a material such as sapphire or SiC, and examples of such a substrate are shown in FIGS. 4 to 11 . The light-transmitting substrate 1 may be a growth substrate or may be formed of a second light-transmitting substrate 80 as shown in FIG. 11 .

The first semiconductor region 2 , the active region 3 , and the second semiconductor region 4 may be formed of n-type GaN, InGaN/(In)GaN MQWs, or p-type GaN, and emit ultraviolet, blue, and green light. In this case, it may be made of an AlGaInN-based semiconductor, and in the case of emitting red light, it may be made of an AlGaInP(As)-based semiconductor. Each region may consist of a single layer or multiple layers, and the conductivity may be interchanged. When the light-transmitting substrate 1 is a growth substrate, it is preferable that a buffer region 20 (refer to FIG. 8 ) is provided between the first semiconductor region 2 and the light-transmitting substrate 1 . Furthermore, when the semiconductor light emitting device is transferred to the upper part of a panel (a glass substrate in which a plurality of thin film transistors are aligned, PCB) that controls the brightness of light through electric injection to be used in a micro LED display by direct light emission and electrically connected, The light-transmitting substrate 1 is removed and the first semiconductor region 2 , the active region 3 , the second semiconductor region 4 , the insulating layer 5 , the current spreading electrode 6 , the first electrode 7 and A semiconductor light emitting device composed of the second electrode 8 is also possible.

The insulating layer 5 serves as a passivation and is made of a dielectric material (eg _{, SiO 2} , Al ₂ O ₃ , SiN _x ) to block the flow of current and minimize light absorption.

The current spreading electrode 6 supplies a current from the second electrode 8 to the second semiconductor region 5 and serves to provide an ohmic contact, a light-transmitting conductive film (eg, ITO), a metal having excellent reflectivity ( Examples: Ag, Au, Al, Ag/Ni/Au), a non-conductive reflective film (eg DBR), and a combination thereof (eg, ITO, ITO/Ag, ITO/DBR). In the case of including the non-conductive reflective film, as shown in FIG. 2 , an electrical connection 94 is provided for electrical communication between the second electrode 8 and the current spreading electrode 6 . It goes without saying that a non-conductive reflective layer may also be provided on the insulating layer 5 on the first semiconductor region 2 exposed by etching.

The first electrode 7 and the second electrode 8 may be formed in the same process, serve as a bonding pad, and may have, for example, a configuration such as Ti/Ni/Au.

Preferably, by providing an ohmic contact electrode 9 (eg, Cr/Al/Ni/Au, Ti/Al/Ni/Au) under the first electrode 7 , the driving voltage is lowered and the first electrode 7 is ) and the second electrode 8 may serve to reduce the structural inclination (height difference).

As shown, the second semiconductor region 4 , the active region 3 and a part of the first semiconductor region 2 not only in the region in which the first electrode 7 is placed but also in the region in which the second electrode 8 is placed By removing and forming them, it is possible to reduce the height difference between the first electrode 7 and the second electrode 8, and it is possible to solve the problem caused by the inclination of the semiconductor light emitting device during bonding. In the case of mini LED and micro LED, since the size is small and the same amount of bonding material is used when bonding the flip chip, there is a high possibility of causing quality risks including electrical short, and especially the flip without the light-transmitting substrate 1 In the case of a chip (when the light-transmitting substrate 1 is removed, the overall thickness of the semiconductor light emitting device becomes very thin from 150 to 200 μm to 10 μm or less), in addition to the above issues, the crack occurrence rate may be further increased. Above all, when used as a display light source, there is a high possibility of causing color deviation and color mixing due to the distortion of the light emitting pattern, and electrical and optical Quality issues may arise.

18 is a view showing an example of a method of manufacturing the semiconductor light emitting device shown in FIG. 17. First, as shown in FIG. 18(a), the first semiconductor region 2 on the light-transmitting substrate 1, the active A region 3 and a second semiconductor region 4 are prepared. Next, as shown in FIG. 18( b ), the second semiconductor region 4 and the active region 3 at positions A and B where the first electrode 7 and the second electrode 8 are to be formed. and a portion of the first semiconductor region 2 is removed through etching (eg, ICP). Next, as shown in FIG. 18C , an insulating layer 5 is formed, and a part of the insulating layer 5 is removed through a photolithography process. At this time, the insulating layer 5 at the position (C) where the first electrode 7 is to be placed is opened, and the insulating layer 5 at the position (D) where the second electrode 2 is to be placed is left as it is, and the current spreading electrode 6 ) removes the insulating layer 5 to secure a region E capable of electrically communicating with the second semiconductor region 4 , so that a portion of the second semiconductor region 4 is exposed. Next, as shown in FIG. 18(d), the current spreading electrode 6 and the ohmic contact electrode 9 are formed. Next, as shown in FIG. 18E , the first electrode 7 and the second electrode 8 are formed. Preferably, as shown in Fig. 11(e), a passivation layer 94 is added.

19 is a view showing another example of the semiconductor light emitting device according to the present disclosure. Compared with the semiconductor light emitting device shown in FIG. 17 , ① the second electrode 8 is etched into the semiconductor layers 2 , 3 and 4 . A point formed on the second semiconductor region 4 without the presence of a second semiconductor region 4, ② a point connected from the first semiconductor region 2 (F) exposed by etching the first electrode 1 to the second semiconductor region 4; G, ③ insulation The difference is that the formation order of the layer 5 and the current spreading electrode 6 is reversed. Through this configuration, the height difference between the first electrode 7 and the second electrode 8 can be reduced. By forming the width of the first electrode 7 and the ohmic contact electrode 9 to span the entire width W of the semiconductor light emitting device or to almost reach most of it, current is supplied from the second electrode 8 to the region G This blocked area (G) becomes a non-light-emitting area despite the presence of the active area (4). That is, in the semiconductor light emitting device shown in FIG. 19 , the non-emission region G; the first electrode 7 and the ohmic contact electrode 9 from the first semiconductor region 2 (F) exposed by etching the first electrode 1 . is formed to be at least 50% longer along the width (W) of the semiconductor light emitting device to block the current supply from the second electrode (8), while the insulating layer (5) under the first electrode (7) in the region (G) ) is positioned so that the supply of current is cut off), thereby resolving the height difference between the first electrode 7 and the second electrode 8 by configuring it to extend over the second semiconductor region 4 . For reference, the insulating layer 5 is not shown in the plan view.

20 is a view showing another example of the semiconductor light emitting device according to the present disclosure. Compared with the semiconductor light emitting device shown in FIG. 19 , ① the entire first electrode 7 is formed on the second semiconductor region 5 . Point, ② It has a difference in that the electrical connection 11 is formed through the via hole H in the insulating layer 5 for electrical communication between the first electrode 7 and the ohmic contact electrode 9 . Even in this case, the region I opposite the second electrode 8 with respect to the via hole H is a non-light-emitting region, and therefore, by forming the first electrode 7 in the non-light-emitting region G, the first The height difference between the electrode 7 and the second electrode 8 is reduced. For reference, the insulating layer 5 is not shown in the plan view.

21 is a view showing another example of a semiconductor light emitting device according to the present disclosure, wherein the insulating layer 5 is not formed along the entire exterior of the semiconductor layers 2, 3, and 4, but the semiconductor layers 2, 3, 4), the current spreading electrode 6 and the ohmic contact electrode 9 are covered with a difference in that they are formed flat as a whole. Through this configuration, it is possible to match the height of the first electrode 7 to the second electrode 8 regardless of the shape of the mesa-etched region J on the side of the first electrode 7 . This configuration is made possible by using a liquid insulating layer (5; thermosetting plastics such as BCB, SU-8, Acrylate, SOG). From a different point of view, the insulating layer 5 is made possible by using a method (eg, spin coating) other than the conventional deposition method (eg, CVD, PVD).

22 is a view showing an example of a method of manufacturing the semiconductor light emitting device shown in FIG. 21. First, as shown in FIG. 22(a), the first semiconductor region 2 on the light-transmitting substrate 1, the active A region 3 and a second semiconductor region 4 are prepared. Next, as shown in FIG. 22(b) , a region J in which the first electrode 7 is located is formed. Next, as shown in FIG. 22(c), the current spreading electrode 6 and the ohmic contact electrode 9 are formed. It is preferable that the current spreading electrode 6 and/or the ohmic contact electrode 9 have a reflective film structure (metal or DBR having excellent reflectivity), and photodiscoloration (photodegradation by light) of the insulating layer 5 formed subsequently It is particularly preferable to use a metal reflective film to prevent development). Next, as shown in FIG. 22( d ), the semiconductor regions 2 , 3 and 4 are isolated to expose the light-transmitting substrate 1 . Of course, this process may be performed before the process shown in FIGS. 22(b) and 22(c). Next, as shown in FIG. 11(e), in order to improve the reliability of the light emitting device, the insulating layer 5-1 (eg, SiO ₂ ) is formed using PVD or CVD (eg, sputtering, PECVD). desirable. Next, as shown in FIG. 22(f), an insulating layer 5 is formed. The insulating layer 5 may be formed through spin coating. In order to increase the flatness, spin coating 2 to 3 times may be used as needed. Next, as shown in FIG. 22( g ), after holes are formed in the insulating layer 5 , the first electrode 7 and the second electrode 8 are formed. If necessary, as shown in FIG. 22(h), the insulating layer 5 is removed in the region except where the first electrode 7 and the second electrode 8 are located (eg, oxygen (O ₂ ) Plasma etching containing components), except that the insulating layer 5 is formed only under the electrodes 7 and 9, to provide a semiconductor light emitting device that is not significantly different from the semiconductor light emitting device shown in FIG. be able to

23 is a view showing another example of the semiconductor light emitting device according to the present disclosure, and is substantially the same as the semiconductor light emitting device shown in FIG. 11(e). In the case of the semiconductor light emitting device shown in FIG. 7 , since the light-transmitting substrate 314 and the semiconductor regions 302 , 304 , and 306 are bonded by the flexible and transparent adhesive layer 312 , the bonding strength is not excellent. By introducing a rough surface of the N-type semiconductor region 302, the bonding area between the transparent adhesive layer 312 and the N-type semiconductor region 302 can be spread, but this is insufficient. Even in the case of the semiconductor light emitting device shown in FIG. 2 , the transparent support substrate 102 and the semiconductor regions 104 to 112 are coupled through the P-type current diffusion layer 118 (eg, ITO) and the transparent adhesive layer 130 as a medium. There is a problem in maintaining the bond between the two. That is, when the semiconductor regions 302, 304, and 306 are supported on the light-transmitting substrate 314 with the flexible and transparent adhesive 312 (organic adhesive such as BCB) through one or two wafer bonding, the semiconductor regions 302, 304, and 306 and the light-transmitting adhesive Due to the difference in the coefficient of thermal expansion of the substrate 314, peeling may occur at the upper and lower interfaces of the transparent adhesive 312 with weak adhesion due to thermo-mechanical stress during or after the SMT process. It is a structure that bonds to a non-transparent dissimilar substrate, and there is a very high possibility that peeling occurs in the organic adhesive bonding area, which is the weakest part. Like the semiconductor light emitting device shown in FIG. 11 , the semiconductor light emitting device includes a light-transmitting substrate 80 , an adhesive layer 81 , a first semiconductor region 30 , an active region 40 , a second semiconductor region 50 , and a first electrode. 92 , a second electrode 93 , and a passivation layer 94 . Unlike the semiconductor light emitting device shown in FIG. 11 , the passivation layer 94 is formed before the first electrode 92 and the second electrode 93 are formed, but may be formed in the reverse order. Preferably, the light-transmitting electrode 91 is included, and various types of electrode configurations shown in FIGS. 12 to 22 are possible. 7, by forming rough surfaces S and S in the first semiconductor region 30 and/or the light-transmitting substrate 80 region, the contact area of the adhesive layer 81 is widened, and the light extraction efficiency is increased. It is possible to raise In the example shown in FIG. 23 , the passivation layer 94 is removed from the second semiconductor region 50 , the active region 40 , the first semiconductor region 30 , and the adhesive layer 80 to the transparent substrate 80 exposed. is connected Accordingly, the passivation layer 94 is bonded to the light-transmitting substrate 80 , and through this bonding force, the adhesive layer 80 can be reliably prevented from being separated from the first semiconductor region 30 and/or the light-transmitting substrate 80 . there will be The passivation layer 94 may be formed of a single layer or a composite layer (eg, ODR, DBR), and may be formed of a material such as _{SiO 2} , SiN _x , TiO ₂ , Al ₂ O _{3 .} For example, by forming the passivation layer 94 to a thickness of 1 μm or more, it is possible to prevent peeling. The passivation layer 94 is basically a dielectric material (eg _{, SiO 2} , Al ₂ O ₃ , SiN _x ) to cover the top and sides of the semiconductor regions 30 , 40 , and 50 , and then a metal material having high reflectivity (eg, : Ag, Al, Au, Cu, Pt, Cr, Ti, TiW) is also preferred to form a multilayer structure by deposition continuously. The adhesive layer 81 may be BCB, Silicone, SU-8, SOG, Acrylate, Urethane, or the like, including the aforementioned materials.

24 and 25 are views showing another example of the semiconductor light emitting device according to the present disclosure, in which, unlike FIG. 23 , the first electrode 92 and the second electrode 93 pass through the passivation layer 94 to the light-transmitting substrate ( 80) continues upwards. This configuration (at least the passivation layer 94 covering the semiconductor regions 30, 40, 40 and the adhesive layer 81, and the first electrode 92 and the second electrode 93 connected thereon to the light-transmitting substrate 80) Through this, it is possible to prevent peeling from both sides of the adhesive layer 81 . In this case, the passivation layer 94 may extend over the light-transmitting substrate 80 , or may be formed only up to the interface between the adhesive layer 81 and the light-transmitting substrate 80 . Additionally, a first electrode post 92P and a second electrode post 93P may be provided on each of the first electrode 92 and the second electrode 93 formed on the light-transmitting substrate 80 . By having the first electrode post 92P and the second electrode post 93P, the semiconductor light emitting device has a shape as shown in FIG. 25 , and an external power supply 98 (submount, interposer, wiring board, display pixel). etc.) can be electrically and mechanically connected. The first electrode post 92P and the second electrode post 93P may be formed to have a height higher than the height of the semiconductor regions 30 , 40 , and 50 (about 4 to 5 μm) and less than 10 μm. Preferably, the space in which the first electrode post 92P and the second electrode post 93P are not formed is filled with an encapsulant 99 (eg, white silicone) (eg, screen printing), and the first electrode post 92P ) and the second electrode post 93P, while supporting the semiconductor light emitting device as a whole, it is possible to form a single package. The first electrode post 92P and the second electrode post 93P may be formed through copper plating. If necessary, a rough surface for light scattering may be formed on the surface U of the light-transmitting substrate 80 on the opposite side of the adhesive layer 81 , or a carbon-containing epoxy coating may be applied.

26 is a view showing still other examples of the semiconductor light emitting device according to the present disclosure. In FIG. 26(a), the first electrode post 92P and the second electrode post 93P are formed in semiconductor regions 30, 40, and 50. An example formed to overlap the first electrode 92 and the second electrode 93 formed on the above is presented, and in FIG. 26(b), the first electrode formed through PVD (eg, sputtering, e-beam evaporator) rather than plating is reinforced. The portion 92T and the second electrode reinforcement portion 93T are formed to overlap the first electrode 92 and the second electrode 93 formed on the semiconductor regions 30, 40, and 50 (the first electrode reinforcement portion 92T) ) and the second electrode reinforcement 93T are formed to conform to the overall shape of the semiconductor regions 30 , 40 , and 50 ). Through this configuration, it is possible to further prevent peeling of both sides of the adhesive layer 81 .

27 is a view showing another example of a semiconductor light emitting device according to the present disclosure, in which two semiconductor light emitting device chips AA and BB are provided on one light-transmitting substrate 80 through adhesive layers 81 and 81 . . The first electrode post 92P, the second electrode post 93PA, and the second electrode post 93PB are formed by the same method as the method shown in FIG. 24 . The first electrode post 92P is connected to the first electrode 92A of the semiconductor light emitting device chip AA and the first electrode 92B of the semiconductor light emitting device chip BB to function as a common electrode. The first electrode 92A and the first electrode 92B may be formed integrally or separately. The second electrode post 93PA is connected to the second electrode 93A of the semiconductor light emitting device chip AA, and the second electrode post 93PB is connected to the second electrode 93B of the semiconductor light emitting device chip BB. connected. Through this configuration, a plurality of semiconductor light emitting device chips may be combined into one package, and may be coupled to the external power supply unit 98 (submount, interposer, wiring board, display pixel, etc.) shown in FIG. 25 . Through this configuration, when the semiconductor light emitting device chips AA and BB are micro LED chips, each of the semiconductor light emitting device chips provided in each panel (pixel) is inspected and not replaced in case of failure, but is inspected at the package level. After that, it is fixed to the panel (pixel), and thereafter, even in case of failure, it has the advantage of replacing it in a package unit. When the two semiconductor light emitting device chips AA and BB emit the same color, they can be grown on one growth substrate and formed through the above-described processes, and the two semiconductor light emitting device chips AA and BB are In the case of emitting different colors, each semiconductor light emitting device chip (AA, BB), unlike the previous examples, uses various transfer process technologies (eg, pick & place that mechanically moves and arranges the chip, adhesive material (eg, : Stamp that moves and arranges chips by making a stamp structure patterned with silicon-based PDMS) The adhesive layer 81 over the light-transmitting substrate 80 using self-assembly, which moves the chip by combining a fluid with an electromagnetic force structure, and laser-induced forward transfer, which moves the chip by combining a laser light source and an explosive adhesive material. , 81) as a medium. Each of the semiconductor light emitting device chips AA and BB is in a state in which the growth substrates 1 and 10, the support substrate or the light-transmitting substrate 80 are removed in the state shown in FIGS. 11 (e) and 12 to 22 ( Preferably, as shown in FIGS. 11(e) and 23, a passivation layer 94 is formed on the upper surface and side surfaces of the semiconductor regions 30, 40, 50 in a state in which the growth substrate 10 is removed, In addition, in the state in which the electrodes 91, 92, and 93 are formed), they are transferred onto the light-transmitting substrate 80 . In order to prevent the semiconductor light emitting device chips AA and BB and/or the light-transmitting substrate 80 from being separated from the adhesive layer 81 in the state transferred to the light-transmitting substrate 80 via the adhesive layer 81 in this way, a passivation layer 94A is introduced, on which first electrodes 92A, 92B and second electrodes 93A, 93B run over the light-transmitting substrate 80, on which a first electrode post 92P and a second electrode post (93PA, 93PB) is formed. Materials of the adhesive layers 81 and 81 are widely known as organic adhesives for wafer bonding other than BCB (250℃) organic adhesive materials. Polyimide (160℃), SU-8 (90℃), Parylene (230℃), Epoxy (150℃), Silicone (100-300℃), SOG (spin on glass), etc. are representative.

28 is a view showing another example of a semiconductor light emitting device according to the present disclosure, in which three semiconductor light emitting device chips (AA, BB, CC; eg, RGB LED) are provided on one light-transmitting substrate 80 . The manner in which they are transferred to the light-transmitting substrate 80 has already been described in FIG. 27 . The semiconductor light emitting device includes a first electrode post 92PA, a second electrode post 93PA, a second electrode post 93PB, and a second electrode post 93PC. A first electrode 92A, 92B, 92C, a second electrode 93A, a second electrode 93B, and a second electrode 93C are formed on each of the three semiconductor light emitting device chips AA, BB, and CC. , the first electrodes 92A, 92B, and 92C may be integrally connected to each other. Of course, the first electrodes 92A, 92B, and 92C may be formed separately, and the second electrodes 93A, 93B, and 93C may be integrally connected to each other. The first electrode post 92PA is connected to the first electrodes 92A, 92B, and 92C to function as a common electrode, and the second electrodes 93A and 93B formed on the three semiconductor light emitting device chips AA, BB, and CC, respectively. , 93C), second electrode posts 93PA, 93PB, and 93PC are formed. As described above, each of the three semiconductor light emitting device chips AA, BB, and CC is attached to the light-transmitting substrate 80 using an adhesive layer 81 (refer to FIG. 27), and then the passivation layer 94A (refer to FIG. 27). Next, the first electrodes 92A, 92B, and 92C and the second electrodes 93A, 93B, and 93C are formed so as to be connected to the light-transmitting substrate 80, and then, the first electrode post 92PA and the second electrode post 92PA 2 Electrode posts 93PA, 93PB, and 93PC are formed (eg, plated). Preferably, as shown in FIG. 27 , a space between the first electrode post 92PA and the second electrode post 93PA, 93PB, and 93PC is filled with an encapsulant 99 .

① Through this configuration, it is possible to manufacture a mini or micro LED having a window (transmissive substrate 80) having a sufficient thickness.

② Through this configuration, the mini or micro LED is not put into the panel (pixel) as a chip, but is put into the panel (pixel) in the form of a package, thereby simplifying the operation and facilitating verification and replacement. .

③ Through this configuration (all RGB LED chips are composed of p-side up flip chips), the problem of using n-side up flip chips excess heat) can be eliminated.

④ This configuration (passivation layer 94 and/or first electrodes 92A, 92B, 92C and second electrodes 93A, 93B, 93C) leads to light-transmitting substrate 80 with or without adhesive layer 81 ), it is possible to manufacture mini or micro LEDs with high reliability (reducing the possibility of peeling of both sides of the adhesive layer 81).

⑤ Through the above configuration, it is possible to manufacture a package for mini or micro LED in which all of the RGB chips are p-side up flip chips while ensuring device reliability. At this time, the red LED chip may become a p-side up flip chip by going through wafer bonding 2 times, and the green and blue LED chips may become a p-side up flip chip by going through wafer bonding 0 or 2 times. . It is also possible to use 4 wafer bonding steps if necessary.

31 is a view showing another example of a semiconductor light emitting device according to the present disclosure. Unlike the semiconductor light emitting device shown in FIG. 27 , a semiconductor light emitting device chip AA and a thin film transistor 82 (TFT) on a light-transmitting substrate 80 . is provided. The thin film transistor 82 may be formed using a well-known deposition technique before the semiconductor light emitting device chip AA is transferred to the light-transmitting substrate 90 , and includes a gate electrode 83 , an insulating layer 84 , and a semiconductor layer ( 85), the first electrode 86; Example: a source electrode) and a second electrode 87 (eg, a drain electrode). Preferably, the insulating layer 88 is further included. The semiconductor layer 103 may be made of amorphous silicon (a-Si) or polysilicon (LTPS), and when the light-transmitting substrate 80 is made of a material that withstands a temperature of 500° C. or higher, such as sapphire, quartz, or glass, an oxide It may be made of a semiconductor (eg, Indium Gallium Zinc Oxide (IGZO), TiO ₂ , ZnO, WO ₃ , SnO ₂ ). After transferring the semiconductor light emitting device chip AA, as in FIG. 27 , a passivation layer 94A is formed, necessary openings or holes are formed through an etching process, and then the first electrode 92A, the first electrode 92A, Two electrodes 93A and a connection electrode 95A are formed. Subsequently, a first electrode post 92A, a second electrode post 93PA, and a third electrode post 94PA (refer to FIG. 32) are formed. Finally, the encapsulant 99 is formed. The passivation layer 94A may extend over the thin film transistor 82 , a first electrode 92A is connected to the first electrode 86 of the thin film transistor 82 , and the connection electrode 95A is connected to the thin film transistor 82 . ) and electrically connect the second electrode 87 to the second electrode post 92PA. The third electrode post 94PA is omitted from FIG. 31 for convenience of description. When an operation signal is input through the third electrode post 94PA (refer to FIG. 32 ), the semiconductor layer 85 is activated through the gate electrode 83 connected to the third electrode post 94PA, and the first electrode 86 is activated. ) and the second electrode 87 are conductive, so that the second electrode post 93PA, the second electrode 93A, the first electrode 92A, the first electrode 86 of the thin film transistor 82, the thin film transistor ( As a current flows through the second electrode 87 , the connection electrode 95A, and the first electrode post 92PA of the 82 , the semiconductor light emitting device chip AA emits light. When the light-transmitting substrate 80 is a growth substrate for the semiconductor light emitting device chip AA, it is also possible to form the thin film transistor 82 after the semiconductor light emitting device chip AA is formed. In this case, the adhesive layer 81 may be omitted. The light-transmitting substrate 80, such as a sapphire substrate, can withstand a temperature of 1000° C. or more in excess of 500° C., and thus, the LTPS can be formed at a higher temperature or the electric mobility can be improved by depositing an oxide semiconductor layer. Improving the electric mobility also means that the driving power can be reduced and the thin film transistor 82 can be further miniaturized, so this technology has more important meaning in mini LED and micro LED would. It also means that light absorption by the thin film transistor 82 can be reduced.

FIG. 32 is a view showing an example of the arrangement of the semiconductor light emitting device shown in FIG. 31 . A gate electrode post or a third electrode post 94PA connected to the gate electrode 83 of the thin film transistor 82 is shown, and the gate The electrode 83 and the third electrode post 94PA are electrically connected by a connection electrode 97A, and the connection electrode 97A may be formed separately, but when the gate electrode 93 is formed, the gate electrode ( 83). The first electrode 92A in the portion connecting the first electrode 92A and the first electrode 86 and the second electrode 93A in the portion connecting the second electrode post 93PA and the second electrode 93 Of course, as the silver connection electrode, it may be formed separately from the first electrode 92A and the second electrode 93A.

33 is a view showing a modified example of the semiconductor light emitting device shown in FIG. 31 . Unlike the semiconductor light emitting device shown in FIGS. 31 and 32 , the thin film transistor 82 includes a second electrode post 93PA and a semiconductor light emitting device chip ( It is provided between the 2nd electrodes 93A of AA). The first electrode 86 of the thin film transistor 82 is electrically connected to the second electrode post 93PA through a connection electrode, and the second electrode 87 of the thin film transistor 82 is connected to the semiconductor light emitting device chip AA. ) is electrically connected to the second electrode 93A, and the first electrode 92A of the semiconductor light emitting device chip AA is directly connected to the first electrode post 92PA.

34 is a view showing another example of a semiconductor light emitting device according to the present disclosure, in addition to the semiconductor light emitting device shown in FIG. 28, a thin film functioning as a switch of each of the three semiconductor light emitting device chips AA, BB, and CC Transistors 82A, 82B, and 82C are provided. In order to receive a signal for driving each of the thin film transistors 82A, 82B, and 82C from the external power supply 98 (refer to FIG. 25; for example, a submount, an interposer, a wiring board, a display pixel), a third electrode post or gate Electrode posts 94PA, 94PB, and 94PC are also provided. The third electrode posts or gate electrode posts 94PA, 94PB, and 94PC may be formed to have the same height as the first electrode posts 92PA, 92PB, and 92PC and the second electrode post 93PA in the same manner, and the second The electrode post 93PA functions as a common electrode. Of course, the configuration shown in FIG. 33 may be applied, and in this case, one of the first electrode posts 92PA, 92PB, and 92PC may be formed as a common electrode.

Through the semiconductor light emitting device shown in FIGS. 31 to 34 , not the external power supply 98 (refer to FIG. 25 ) side, but the semiconductor light emitting device mounted here in the form of a package, specifically, the light emitting side of the semiconductor light emitting device The thin film transistors 82A, 82B, and 82C can be formed on the light-transmitting substrate 80 (light window) side. On the other hand, even when it is required to form the semiconductor layer 84 with an oxide semiconductor, the external power supply ( 98; see FIG. 25). On the other hand, as shown in FIG. 34 , one semiconductor light emitting device may be individualized and coupled to the external power supply 98 (refer to FIG. 25 ), but the light-transmitting substrate 80 is not cut, cut to a specific size, or a wafer It is possible to transfer to the external power supply 98 (refer to FIG. 25) in a level state (a state in which two or more semiconductor light emitting devices of FIG. 34 are continuously connected), thereby reducing the time and resources required to transfer hundreds of thousands of chips or packages. have the advantage of being able to

Returning to FIG. 24 , the passivation layer 94 may be referred to as a non-conductive reflective film 94 by another name. As described with reference to FIGS. 15 and 16 , the non-conductive reflective film 94 may include a single- _{layered dielectric film (eg, SiO x} , TiO _x , Ta ₂ O ₅ , MgF ₂ ), a multi-layered dielectric film, and a DBR reflective film (eg, : SiO ₂ /TiO ₂ ) or may be made of a combination thereof.

FIG. 35 is a view showing another example of a semiconductor light emitting device according to the present disclosure, except that a black matrix material (BM) is formed on the light-transmitting substrate 80 of FIG. 24 . It is almost the same as the semiconductor light emitting device presented in Fig. The side surfaces LS of the semiconductor layers 30 , 40 , and 50 are inclined, and thus function to emit light generated in the active layer 40 toward the surface U of the light-transmitting substrate 80 . As described above, it is more effective when the non-conductive reflective film 94 includes a reflective film such as DBR. In order to increase the light extraction efficiency, a rough surface (S, S) may be formed on the surface (W) and/or the surface (U) of the light-transmitting substrate 80 , and the rough surface (S, S) is an adhesive layer 81 . and/or also provides a function of increasing the bonding area of the black matrix material (BM). Since the non-conductive reflective film 94 has a light reflection function, it is possible to minimize absorption of light by the black matrix material BM formed on the surface W of the light-transmitting substrate 80 . Through this configuration, when the display is not in operation, the screen looks black as a whole, and the black matrix material used is not the glass screen in front of the display, but the package or the interposer shown in FIG. be able to provide

36 to 38 are views showing an example of a method of manufacturing the semiconductor light emitting device shown in FIG. 28. First, as shown in FIG. 36, three semiconductor light emitting device chips AA, BB, and CC are prepared. do. The three semiconductor light emitting device chips AA, BB, and CC are in a form including a substrate ST; for example, the light-transmitting substrate 80 and the growth substrates 1 and 10), for example, in the form shown in FIG. 11 or It may have the form shown in FIG. 22 (the insulating layer 5 may be omitted). Next, each of the three semiconductor light emitting device chips (AA, BB, CC) is attached to a temporary substrate 73 (eg, PDMS stamp), and then the substrate ST is subjected to wet etching (GaAs substrate), laser ablation It is removed using laser ablation (sapphire substrate). Wet etching may also be used to remove the light-transmitting substrate 80 including the adhesive layer 81 .

Next, as illustrated in FIG. The semiconductor light emitting device chips AA, BB, and CC are transferred Next, as shown in Fig. 37(b), the adhesive layer ( 81) is removed to expose the light-transmitting substrate 80. The adhesive layer 81 may be completely removed through a dry and/or wet process. For example, in the case of the organic adhesive layer 81 containing a carbon (C) component can utilize a plasma containing oxygen (O _{2 ), while the inorganic adhesive layer 81 containing an SiO 2} component is a liquid phase or gas phase containing an activated acid component. ) material can be etched.

If necessary, as shown in FIG. 37(c), a black matrix material (BM; see FIG. 35) may be further formed. Formation of the BM 35 may utilize a photolithography process and spin coating, or may combine a shadow mask and a screen printing process.

Next, as shown in Fig. 38(a), a passivation layer 94A is formed.

Next, as shown in FIG. 38(b), necessary holes are formed in the passivation layer 94A, and the first electrodes 92A, 92B, and 92C are formed in each of the three semiconductor light emitting device chips AA, BB, and CC. ) and second electrodes 93A, 93B, and 93C are formed.

Next, as shown in FIG. 38(c) , a first post electrode 92PC and a second post electrode 93PA are formed as pad electrodes.

Common to three semiconductor light emitting device chips AA, BB, and CC, first electrodes 92A, 92B, and 92C, second electrodes 93A, 93B, and 93C, and first post electrodes 92PA, 92PB, and 92PC The second post electrode 93PA, which is an electrode, may have an arrangement as shown in FIG. 28 .

Finally, as shown in FIGS. 38(d) and 38(e), an encapsulant 99 (white or black silicone) is formed (eg, screen-printed) and planarized, and the first post electrode 92PC ) and the second post electrode 93PA are exposed.

FIG. 39 is a view for explaining another method of manufacturing a semiconductor light emitting device according to the present disclosure. First, as in FIG. 36 , three semiconductor light emitting device chips AA, BB, and CC are prepared. The three semiconductor light emitting device chips AA, BB, and CC are in a form including a substrate ST; for example, the light-transmitting substrate 80 and the growth substrates 1 and 10), for example, in the form shown in FIG. 11 or It may have the form shown in FIG. 22 (the insulating layer 5 may be omitted). Preferably, the substrates ST of each of the three semiconductor light emitting device chips AA, BB, and CC are prepared in a form capable of laser ablation so that all laser ablation can be used when the substrate ST is removed. . For example, in the case of a chip emitting ultraviolet light, blue light, and green light, a growth substrate (eg, a sapphire substrate) has light-transmitting properties, so it can be used as the substrate ST as it is. In the case of a chip that emits red light, the growth substrate (eg, a GaAs substrate) is opaque and laser ablation is impossible, so the substrate ST is prepared as a light-transmitting substrate 80 using the process shown in FIGS. 8 to 11 , but , as shown in FIG. 8(e), after removing the growth substrate 10, using the metal bonding layer 71 and the sacrificial layer 72 instead of the adhesive layer 81 shown in FIG. 9(a) The light-transmitting substrate 80 and the semiconductor regions 30 , 40 , and 50 are attached. As described above, it goes without saying that the chip emitting ultraviolet light, blue light, and green light can be manufactured by the process shown in FIGS. 8 to 11 .

Next, as shown in FIG. 39( a ), three semiconductor light emitting device chips AA, BB, and CC are attached to the temporary substrate 74 provided with the adhesive layer 75 . The temporary substrate 74 is preferably made of a material having a lattice constant similar to or identical to that of the substrate ST of each of the three semiconductor light emitting device chips AA, BB, and CC, for example, a sapphire substrate may be used. The adhesive layer 75 may be formed of an organic adhesive layer such as BCB, Polyimide, SU-8, Parylene, Epoxy, or Silicone. By transferring each of the three semiconductor light emitting device chips (AA, BB, CC) at the chip level including the substrate (ST), various transfer process technologies (e.g., Pick & Place, which move and arrange the chips mechanically, adhesion Stamp for moving and arranging chips by making a stamp structure patterned with a material (eg, silicon-based PDMS), a method for moving and arranging chips using electrostatic or electromagnetic force structures, and a predetermined uniform viscosity On the light-transmitting substrate 80 using self-assembly, which moves the chip by combining a fluid having a viscosity (viscosity) and an electromagnetic force structure, and laser-induced forward transfer, which moves the chip by combining a laser light source and an explosive adhesive material It can be transferred through the adhesive layers 81 and 81 as a medium. In addition, since the transfer is performed in the state in which the electrodes 92 and 93 (refer to FIG. 11(e)) are formed, there is an advantage in that the quality of the chip can be covered before transfer. In addition, since all high-temperature processes required for the chip process are performed up to the formation of the electrodes 92 and 93 (refer to FIG. 11(e)) before the transfer, the selection of the material of the adhesive layer 75 may be wider.

Next, as shown in FIG. 39(b), the substrate ST of each of the three semiconductor light emitting device chips AA, BB, and CC is removed through laser ablation. As pointed out in FIG. 9(c) , damage to the adhesive layer 75 can be prevented during the separation process of the substrate ST by using laser ablation. Thereafter, the metal bonding layer 71 is removed, and preferably, a part or all of the undoped semiconductor region 23 is removed (eg, etched), as indicated in FIG. 8(e), and the first semiconductor region A surface texturing process for increasing light extraction efficiency may be added to (30).

Next, as shown in FIG. 39(c), the adhesive layer 81 on the side of the three semiconductor light emitting device chips (AA, BB, CC); for example, OCA, OCR, Polyimide, SU-8, Parylene, Epoxy, Silicone , SiO ₂ , SOG) and the light-transmitting substrate 80 (eg, sapphire, quartz, glass) are attached, and then the temporary substrate 74 and the adhesive layer 75 are removed. The adhesive layer 81 is a transparent organic or inorganic adhesive, for example, made of a material such as OCA (Optical Clear Adhesive), OCR (Optical Clear Resin), Polyimide, SU-8, Parylene, Epoxy, Silicone, SiO ₂ , SOG. can be done Since the adhesive layer 81 finally remains in the Interposer (PKG, Module) product, a material having as much high temperature heat resistance and environmental resistance as possible is preferable in order to avoid quality issues.

Preferably, as shown in FIG. 39(d), a planarization layer 76 is formed, and the first electrodes 92A, 92B, 92C and Second electrodes 93A, 93B, and 93C are formed. The first electrodes 92A, 92B, and 92C and the second electrodes 93A, 93B, and 93C are shown in FIG. 92,93 (refer to FIG. 11(e)), may be referred to as wiring electrodes. The electrodes 92 and 93 (refer to FIG. 11(e)) may be made of only the light-transmitting electrode 91 (eg, ITO), and have a reflective electrode or reflective electrode structure made of a metal (eg, Ag, Al, Au) with excellent reflectivity. (eg Ti/Ag, Al/Au) or simply ohmic metal/barrier metal/bonding metal (eg, Cr/Ni/Au, Ti/Ni/Au), or a combination thereof. have. Accordingly, the electrodes 92 and 93 (refer to FIG. 11E ) should be understood as a concept encompassing various types of electrode materials, electrode structures, and electrode arrangements applied to the semiconductor light emitting device chip in FIGS. 1 to 38 . The planarization layer to the step reduction layer 76 is a liquid insulating layer 5 as shown in FIG. 21; for example, OCA, OCR, Polyimide, SU-8, Parylene, Epoxy, Silicone, BCB, Acrylate, thermosetting plastic such as SOG ), or simply a passivation layer or a non-conductive reflective film 94A as shown in FIG. 38 , or a combination thereof. As shown in FIG. 37(b) , the light-transmitting substrate 80 may be exposed by removing the adhesive layer 81 in a region where the three semiconductor light emitting device chips AA, BB, and CC are not provided. As shown, the wiring work of the micro LED is not carried out by an operation such as screen printing in a state where the micro LED is placed on the pixel (an error may occur in the posture and position of the micro LED in the placing operation), but at the wafer level, That is, by performing wiring work through deposition such as sputtering in a state in which a plurality of semiconductor light emitting device chips AA, BB, and CC are fixed to the light-transmitting substrate 80 , the accuracy of the wiring work can be improved. The plurality of semiconductor light emitting device chips AA, BB, and CC wired in this way can be transferred to the external power supply unit 98 (refer to FIG. 25 ) as it is. Although only three are shown in the plurality of semiconductor light emitting device chips AA, BB, and CC in FIG. 39, this should be understood as an example.

Finally, as shown in FIG. 39( e ), the electrode posts 92PC and 93PA are formed in the same arrangement as that shown in FIG. 28 , and the electrode posts 92PC and 93PA are supported with the encapsulant 99 . . The electrode posts 92PC and 93PA may be referred to as bonding pads in the sense of bonding to the external power supply 98 (refer to FIG. 25 ).

40 and 41 are views for explaining another method of manufacturing a semiconductor light emitting device according to the present disclosure. Unlike FIG. 39 , as shown in FIG. 40 (a), three semiconductor light emitting device chips AA, BB and CC) are each prepared in a form having only a light-transmitting electrode 91 (eg, ITO).

Next, the same steps as in FIGS. 40(b) to 41(a) and 39(b) to 39(d) are performed, and as shown in FIG. 41(b), n After the mesa process (refer to FIG. 11(b)) of exposing the type semiconductor region is performed, the electrodes 92 and 93 (refer to FIG. 11(e)) and the passivation layer 94A described with reference to FIG. 39 are formed. Of course, the formation order of the electrodes 92 and 93 (refer to FIG. 11(e)) and the passivation layer 94A may be changed.

Next, as shown in Fig. 41(c), first electrodes 92A, 92B, and 92C and second electrodes 93A, 93B, and 93C are formed as wiring electrodes. If necessary, the planarization layer or the step reduction layer 76 are first formed, and the first electrodes 92A, 92B, and 92C and the second electrodes 93A, 93B, and 93C are formed.

Finally, as shown in FIG. 41(d), as in FIG. 39(e), the electrode posts 92PC and 93PA are formed as bonding pads, and the electrode posts 92PC and 93PA are sealed with an encapsulant 99. supported by

Compared with the manufacturing method of the semiconductor light emitting device shown in FIG. 39, the manufacturing method of the semiconductor light emitting device shown in this 40 and 41 is first electrically and optically high-speed transfer of only high-quality large chips, the adhesive layer 75 is provided. After the process of attaching to the temporary substrate 74 and the laser ablation process of removing the substrate ST of each of the three semiconductor light emitting device chips AA, BB, and CC (FIG. 41(a)), the wafer level Since a semiconductor chip fabrication process including a photolithography process is performed on a substrate (eg, a circular or rectangular sapphire interposer), the size control of three semiconductor light emitting device chips (AA, BB, CC) is In addition to a high degree of freedom, it is possible to design a chip that is fixed in a precise position (eg, the same as the position of the chip on the photolitho mask). That is, in Fig. 41 (a), in the process of exposing the light-transmitting substrate 800 by removing the adhesive layer 81, in the process from Fig. 40 (a) to Fig. 40 (d), the semiconductor light emitting device chips AA, BB, By making the semiconductor light emitting device chips (AA, BB, CC) to be removed according to the shape of the etching mask (photolitho mask) used in the process of removing the adhesive layer 81 even if there is some error in the position and posture of CC). , it becomes possible to make the positions and postures of the semiconductor light emitting device chips AA, BB, and CC constant, and in this process, the light-transmitting electrode 91 is damaged in the etching process of the semiconductor light emitting device chips AA, BB, and CC. Additionally, as shown in Fig. 41(a'), each of the semiconductor light emitting device chips AA, BB, and CC is divided into two and etched to introduce the concept of redundancy, and the same color Without additional transfer of surplus chips that emit light, even if one of the semiconductor light emitting device chips (AA, BB, CC) fails, the device can be driven without any problem. , it is also possible to connect them in parallel and use them.

42 is a view for explaining another method of manufacturing a semiconductor light emitting device according to the present disclosure. In a state in which three semiconductor light emitting device chips AA, BB, and CC are attached to the external power supply 98, each A method of removing the substrate ST is exemplified. The external power supply 98 has a shape in which a conductive part CV is formed in a via hole, and may be formed of the same or similar material as the substrate ST (eg, sapphire). This type of external power supply 98 is presented in US Patent Publication No. 2017-0317230. Anisotropic Conductive Film (ACF) may be used as the adhesive layer 81 , and solder may also be used. The external power supply 98 in this example may also be viewed as one substrate ST.

43 is a view showing an example of application of the semiconductor light emitting device according to the present disclosure, in which three semiconductor light emitting devices E, F, and G are accommodated in one pixel (having a size of about 400 μm×400 μm) show the state of being Unlike the semiconductor light emitting device shown in FIG. 28 , each of the semiconductor light emitting device chips AA, BB, and CC does not use one light transmitting substrate, but has a difference in that each light transmitting substrate 80 is used. For example, each of the three semiconductor light emitting devices E, F, and G may have a size of 100 μm×200 μm, and each of the three semiconductor light emitting device chips AA, BB, and CC has a side of 50 μm or less. , the three semiconductor light emitting device chips (AA, BB, CC) may be disposed to occupy 300 μm as a whole by setting the spacing to 100 μm. The thickness of the light-transmitting substrate 80 may be 100 µm or less. Through this configuration, there is an advantage of reducing the effect of color interference (cross-talk) between the three semiconductor light emitting devices (E, F, G). In addition, three semiconductor light emitting devices (E, F, G) are combined into one by using an insulator (IM) such as a white or black resin material (eg, EMC, SMC, black matrix material). Pixels can be formed. At this time, since the light-transmitting substrate 80 is electrically insulative, it is an array in which the chips are in contact or a white or black resin material (EMC, SMC, Black Matrix) while maintaining a predetermined spacing between the chips. One pixel in a filled and bundled state is also possible. In this case, the height of the filled white or black resin material between the chips is at least the thickness of the light-transmitting substrate 80 .

By configuring at least one of the three semiconductor light emitting devices E, F, and G to have the shape shown in FIGS. 24 and 35 , a p-side up flip chip is used, while the first electrode post 92PC and the second electrode post 92PC are used. By using the electrode post 93PC, that is, by using a bonding pad having a large area, the bonding strength can also be improved. When the growth substrate is used as the light-transmitting substrate 80 as it is, the adhesive layer 81 is omitted.

In addition, at least one of the three semiconductor light emitting devices E, F, and G is configured to have the shape shown in FIGS. 27 and 41 ( b ), and the semiconductor light emitting device chips AA and BB are connected in series or in parallel with each other. By doing this (this is possible by connecting the first electrodes 92A and 93A and the second electrodes 92B and 93B in series or in parallel), even if one of the semiconductor light emitting device chips AA and BB fails, the It becomes possible to use without any repair. Similarly, when the growth substrate is used as the light-transmitting substrate 80 as it is, the adhesive layer 81 is omitted.

In addition, by configuring at least one of the three semiconductor light emitting devices (E, F, G) to have the shape shown in FIG. 31, the electrical wiring under the pixel or the electrical wiring of the entire display (the source line and the data line are arranged in a structure) This will give you some room to design. Of course, a non-light emitting device such as a Zener diode may be provided in addition to the thin film transistor 82 . Similarly, when the growth substrate is used as the light-transmitting substrate 80 as it is, the adhesive layer 81 is omitted.

44 and 45 are views showing another example of application of the semiconductor light emitting device according to the present disclosure. First, as shown in FIG. 44(a), the semiconductor regions 30, 40, and 50 on the substrate ST. ) is provided. Next, as shown in FIG. 44B , the semiconductor regions 30 , 40 , and 50 are etched while leaving the light emitting part M in the form of a mesa having a size applicable to the micro LED. At this time, the n-type semiconductor region 30 is left. Next, the first electrode 92 and the second electrode 93 are formed as ohmic electrodes. Next, as shown in FIG. 44(c) , a planarization layer or a step reduction layer 76 is formed. Next, as shown in FIG. 44(d), a semiconductor light emitting device chip AA is prepared by forming a first electrode 92B and a second electrode 93B as a wiring electrode and/or a bonding pad. Next, as shown in FIG. 45( a ), as shown in FIG. 42 , the semiconductor light emitting device chip AA is coupled to an external power supply 98 including an adhesive layer 81 (eg, ACF), and the substrate (ST) is removed. The external power supply 98 in this example may also be viewed as one substrate ST. Next, as shown in FIG. 45(b) , it is preferable to form the black matrix material BM in the n-type semiconductor region 30 except for the light emitting region L. The black matrix material BM also functions as a protective layer, and thus, a dielectric layer (SiO ₂ ), which may function as a protective layer in addition to the black matrix material BM, may be used, such as white silicon. As mentioned in FIG. 35 , a rough surface s may be formed in the n-type semiconductor region 30 through surface texturing after the substrate ST is removed. Finally, as shown in FIG. 45(c) , the semiconductor light emitting devices E, F, and G are arranged in one pixel in the form shown in FIG. 43 . In the semiconductor light emitting device shown in FIGS. 44 and 45 , compared to the form shown in FIG. 43 , the light-transmitting substrate 80 is divided, so that the color interference (cross-talk) effect can be reduced, especially in the case of the form shown in FIG. 45 . Since the light-transmitting substrate 80 is not provided, it has an advantage.

Hereinafter, various embodiments of the present disclosure will be described.

(1) In the method of manufacturing a semiconductor light emitting device that is a flip chip, a first semiconductor region having an N-type, an active region generating light through recombination of electrons and holes, and a second semiconductor region having a P-type are sequentially formed providing a formed growth substrate; bonding the first light-transmitting substrate to the side of the second semiconductor region; removing the growth substrate from the first semiconductor region side; attaching a second light-transmitting substrate to the side of the first semiconductor region from which the growth substrate is removed using an adhesive layer; laser ablating the first light-transmitting substrate from the second semiconductor region side; removing a portion of the second semiconductor region and the active region to expose a portion of the first semiconductor region; and forming a first electrode of a flip chip and a second electrode of a flip chip on the exposed first semiconductor region and the second semiconductor region, respectively.

(2) prior to bonding the first light-transmitting substrate, forming a protective layer in the second semiconductor region; a method of manufacturing a semiconductor light emitting device comprising a.

(3) A method of manufacturing a semiconductor light emitting device in which the first light-transmitting substrate includes a sacrificial layer, and the sacrificial layer and the protective layer are bonded by a metal bonding layer.

(4) A method of manufacturing a semiconductor light emitting device in which the metal bonding layer and the protective layer are sequentially removed after the step of removing the first light-transmitting substrate and before the step of exposing a portion of the first semiconductor region.

(5) A method of manufacturing a semiconductor light emitting device in which a portion of the adhesive layer is removed to expose the second light-transmitting substrate after the step of sequentially removing the metal bonding layer and the protective layer.

(6) A method of manufacturing a semiconductor light emitting device comprising the step of sequentially removing the metal bonding layer and the protective layer, and then forming a light-transmitting electrode in the second semiconductor region.

(7) In the providing step, an undoped semiconductor region is formed under the first semiconductor region, and prior to the attaching step, at least a part of the undoped semiconductor region is removed. A method of manufacturing a semiconductor light emitting device.

(8) A semiconductor light emitting device comprising: a first semiconductor region having a first conductivity; a second semiconductor region having a second conductivity different from the first conductivity; an active region interposed between the first semiconductor region and the second semiconductor region and generating light by recombination of electrons and holes; a first electrode positioned in the first semiconductor region exposed by removing a portion of the first semiconductor region, the active region, and the second semiconductor region, in electrical communication with the first semiconductor region, and functioning as a flip-chip bonding pad; In addition, a portion of the first semiconductor region, the active region, and the second semiconductor region are removed and located in another first semiconductor region exposed, insulated from the first semiconductor region through an insulating layer, and electrically connected to the second semiconductor region A semiconductor light emitting device comprising a; a second electrode communicating and functioning as a flip-chip bonding pad.

(9) A semiconductor light emitting device comprising: a first semiconductor region having a first conductivity; a second semiconductor region having a second conductivity different from the first conductivity; an active region interposed between the first semiconductor region and the second semiconductor region and generating light by recombination of electrons and holes; a first electrode positioned in the first semiconductor region exposed by removing a portion of the first semiconductor region, the active region, and the second semiconductor region, in electrical communication with the first semiconductor region, and functioning as a flip-chip bonding pad; and a second electrode in electrical communication with the second semiconductor region and functioning as a flip-chip bonding pad, wherein the first electrode extends over the second semiconductor region, which is a non-emission region.

(10) A semiconductor light emitting device comprising: a first semiconductor region having a first conductivity; a second semiconductor region having a second conductivity different from the first conductivity; an active region interposed between the first semiconductor region and the second semiconductor region and generating light by recombination of electrons and holes; a first electrode in electrical communication with the first semiconductor region exposed by removing a portion of the first semiconductor region, the active region, and the second semiconductor region, and functioning as a flip-chip bonding pad; a second electrode in electrical communication with the second semiconductor region and functioning as a flip-chip bonding pad; In addition, a portion of the first semiconductor region, the active region, and the second semiconductor region are removed to fill the exposed first semiconductor region, and an insulating layer disposed under the first electrode and the second electrode; device.

(11) an additional insulating layer; wherein the additional insulating layer is exposed by removing the insulating layer in a region excluding the lower regions of the first electrode and the second electrode.

(12) A semiconductor light emitting device comprising: a light-transmitting substrate; A semiconductor light emitting comprising a first semiconductor region having a first conductivity, an active region generating light by using recombination of electrons and holes, and a second semiconductor region having a second conductivity different from the first conductivity, which are sequentially grown A device chip; comprising: a first semiconductor light emitting device chip having a first electrode electrically connected to a first semiconductor region and a second electrode electrically connected to a second semiconductor region; an adhesive layer bonding the light transmitting substrate and the first semiconductor region side of the first semiconductor light emitting device chip; and a passivation layer covering at least the first semiconductor light emitting device chip and the adhesive layer.

(13) A semiconductor light emitting device in which the passivation layer is continued on an exposed light-transmitting substrate without an adhesive layer.

(14) A semiconductor light emitting device in which the first electrode and the second electrode are formed on the passivation layer and are continued on the exposed light-transmitting substrate without the adhesive layer.

(15) A semiconductor light emitting device comprising: a first electrode post formed higher than a height of the first semiconductor light emitting device chip on each of the first electrode and the second electrode connected on the light-transmitting substrate; and a second electrode post.

(16) A semiconductor light emitting device comprising a; encapsulant covering the first semiconductor light emitting device chip and supporting the first electrode post and the second electrode post.

(17) provided on a light-transmitting substrate, a second semiconductor light emitting device chip; including, wherein the second semiconductor light emitting device chip is sequentially grown using a first semiconductor region having a first conductivity and recombination of electrons and holes An active region generating light, a second semiconductor region having a second conductivity different from the first conductivity, a first electrode electrically connected to the first semiconductor region and extending over the light-transmitting substrate, and a second semiconductor region electrically connected to the light-transmitting region A second electrode connected to the substrate, and a first electrode post and a second electrode post formed higher than a height of a second semiconductor light emitting device chip on each of the first electrode and the second electrode connected on the light-transmitting substrate, the first semiconductor light emitting device comprising: One of the first electrode post of the device chip, the first electrode post of the second semiconductor light emitting device chip, and the second electrode post of the first semiconductor light emitting device chip and the second electrode post of the second semiconductor light emitting device chip is a common electrode. A semiconductor light emitting device that is integrally formed.

(18) covering the first semiconductor light emitting device chip and the second semiconductor light emitting device chip, the first electrode post of the first semiconductor light emitting device chip, the second electrode post of the first semiconductor light emitting device chip, and the second semiconductor light emitting device A semiconductor light emitting device comprising a; encapsulant for supporting the first electrode post of the chip and the second electrode post of the second semiconductor light emitting device chip.

(19) A semiconductor light emitting device in which a passivation layer covers the first semiconductor light emitting device chip and the second semiconductor light emitting device chip.

(20) provided on the light-transmitting substrate, a third semiconductor light emitting device chip; including, wherein the third semiconductor light emitting device chip is sequentially grown using a first semiconductor region having a first conductivity and recombination of electrons and holes An active region generating light, a second semiconductor region having a second conductivity different from the first conductivity, a first electrode electrically connected to the first semiconductor region and extending over the light-transmitting substrate, and a second semiconductor region electrically connected to the light-transmitting region A second electrode connected to the substrate, and a first electrode post and a second electrode post formed higher than a height of a third semiconductor light emitting device chip on each of the first electrode and the second electrode connected on the light-transmitting substrate, the first semiconductor light emitting device comprising: The first electrode post of the device chip, the first electrode post of the second semiconductor light emitting device chip and the first electrode post of the third semiconductor light emitting device chip, and the second electrode post of the first semiconductor light emitting device chip, the second semiconductor light emitting device A semiconductor light emitting device in which one of the second electrode post of the chip and the second electrode post of the third semiconductor light emitting device chip is integrally formed as a common electrode.

(21) covering the first semiconductor light emitting device chip, the second semiconductor light emitting device chip, and the third semiconductor light emitting device chip, the first electrode post of the first semiconductor light emitting device chip and the second electrode post of the first semiconductor light emitting device chip , the first electrode post of the second semiconductor light emitting device chip, the second electrode post of the second semiconductor light emitting device chip, and the first electrode post of the third semiconductor light emitting device chip and the second electrode post of the third semiconductor light emitting device chip A semiconductor light emitting device comprising a; encapsulant for supporting.

(22) The second semiconductor region of the first semiconductor light emitting device chip, the second semiconductor region of the second semiconductor light emitting device chip, and the second semiconductor region of the third semiconductor light emitting device chip are opposite to the light-transmitting substrate with respect to each active region A semiconductor light emitting device provided on the side.

(23) A semiconductor light emitting device in which the passivation layer covers the first semiconductor light emitting device chip, the second semiconductor light emitting device chip, and the third semiconductor light emitting device.

(24) A semiconductor light emitting device comprising: a light-transmitting substrate; A semiconductor light emitting comprising a first semiconductor region having a first conductivity, an active region generating light by using recombination of electrons and holes, and a second semiconductor region having a second conductivity different from the first conductivity, which are sequentially grown A device chip; a first semiconductor light emitting device chip having a first electrode electrically connected to the first semiconductor region and a second electrode electrically connected to the second semiconductor region; a window through which the light-transmitting substrate emits light a first semiconductor light emitting device chip; and a first thin film transistor that controls light emission of the first semiconductor light emitting device chip and is deposited on a light-transmitting substrate.

(25) The first electrode and the second electrode are connected to the light-transmitting substrate, and the first electrode post is formed higher than the height of the first semiconductor light emitting device chip on each of the first electrode and the second electrode connected to the light-transmitting substrate; and the second A semiconductor light emitting device comprising a; electrode post.

(26) the first thin film transistor includes a first gate electrode for controlling light emission of the first semiconductor light emitting device chip, and is electrically connected to the first gate electrode on the light-transmitting substrate, the first semiconductor light emitting device chip A semiconductor light emitting device comprising a; a first gate electrode post formed higher than the height.

(27) an encapsulant covering the first semiconductor light emitting device chip and supporting the first electrode post, the second electrode post, and the first gate electrode post;

(28) a second semiconductor light emitting device chip provided on the light-transmitting substrate; and a second thin film transistor that controls light emission of the second semiconductor light emitting device chip and is deposited on a light-transmitting substrate, wherein the second semiconductor light emitting device chip is sequentially grown, a first semiconductor region having a first conductivity, electrons and An active region generating light by recombination of holes, a second semiconductor region having a second conductivity different from the first conductivity, a first electrode electrically connected to the first semiconductor region and extending over the light-transmitting substrate, and a second semiconductor region A second electrode electrically connected to the light-transmitting substrate, and a first electrode post and a second electrode post formed higher than the height of the second semiconductor light emitting device chip on each of the first electrode and the second electrode connected on the light-transmitting substrate. and a second gate electrode for controlling light emission of the second semiconductor light emitting device chip, the second thin film transistor is electrically connected to the second gate electrode on the light-transmitting substrate, and a height of the second semiconductor light emitting device chip A semiconductor light emitting device comprising a; a second gate electrode post formed higher.

(29) a third semiconductor light emitting device chip provided on the light-transmitting substrate; and a third thin film transistor that controls light emission of the third semiconductor light emitting device chip and is deposited on a light-transmitting substrate, wherein the third semiconductor light emitting device chip is sequentially grown in a first semiconductor region having a first conductivity, electrons and An active region generating light by recombination of holes, a second semiconductor region having a second conductivity different from the first conductivity, a first electrode electrically connected to the first semiconductor region and extending over the light-transmitting substrate, and a second semiconductor region A second electrode electrically connected to the light-transmitting substrate, and a first electrode post and a second electrode post formed higher than the height of the third semiconductor light emitting device chip on each of the first electrode and the second electrode connected on the light-transmitting substrate. and a third gate electrode for controlling light emission of the third semiconductor light emitting device chip, the third thin film transistor is electrically connected to the third gate electrode on the translucent substrate, and a height of the third semiconductor light emitting device chip A semiconductor light emitting device comprising a; a third gate electrode post formed higher.

(30) the first electrode post of the first semiconductor light emitting device chip, the first electrode post of the second semiconductor light emitting device chip, the first electrode post of the third semiconductor light emitting device chip, and the second electrode of the first semiconductor light emitting device chip A semiconductor light emitting device in which one of the post, the second electrode post of the second semiconductor light emitting device chip and the second electrode post of the third semiconductor light emitting device chip is integrally formed as a common electrode.

(31) covering the first semiconductor light emitting device chip, the second semiconductor light emitting device chip, and the third semiconductor light emitting device chip, the first electrode post of the first semiconductor light emitting device chip and the second electrode post of the first semiconductor light emitting device chip , the first electrode post of the second semiconductor light emitting device chip and the second electrode post of the second semiconductor light emitting device chip, the first electrode post of the third semiconductor light emitting device chip and the second electrode post of the third semiconductor light emitting device chip, and A semiconductor light emitting device comprising a; encapsulant supporting the first gate electrode post, the second gate electrode post, and the third gate electrode post.

(32) a transparent adhesive layer for bonding each of the first semiconductor light emitting device chip, the second semiconductor light emitting device chip, and the third semiconductor light emitting device chip to the light-transmitting substrate;

(33) A semiconductor light emitting device comprising: a light-transmitting substrate having a first surface and a second surface opposite to the first surface; A semiconductor light emitting comprising a first semiconductor region having a first conductivity, an active region generating light by using recombination of electrons and holes, and a second semiconductor region having a second conductivity different from the first conductivity, which are sequentially grown A device chip comprising: a semiconductor light emitting device chip having a first electrode electrically connected to a first semiconductor region and a second electrode electrically connected to a second semiconductor region; , a semiconductor light emitting device chip in which the second surface of the light-transmitting substrate is a window through which light generated in the active region is emitted; and a black matrix material provided on at least one of the first surface and the second surface.

(34) The first electrode and the second electrode are connected on the light-transmitting substrate, and the first electrode post and the second electrode post formed on each of the first electrode and the second electrode connected on the light-transmitting substrate to be higher than the height of the semiconductor light emitting device chip; and the second electrode post A semiconductor light emitting device comprising;

(34) A semiconductor light emitting device comprising a black matrix material provided on a first surface, a black matrix material, and a non-conductive reflective film between the first electrode and the second electrode.

(35) In the method of manufacturing a semiconductor light emitting device, each of the n-type semiconductor region, the p-type second semiconductor region, and the n-type semiconductor region and the p-type semiconductor region is interposed between the n-type semiconductor region and the p-type semiconductor region, Preparing three semiconductor light emitting device chips having an active region for generating a; and bonding three semiconductor light emitting device chips to a light-transmitting substrate having an adhesive layer; bonding the n-type semiconductor regions of each of the three semiconductor light emitting device chips to be positioned on the adhesive layer side; A method of manufacturing the device.

(36) each of the three semiconductor light emitting device chips has a first electrode in electrical communication with the n-type semiconductor region and a second electrode in electrical communication with the p-type semiconductor region, and in the step of combining, the three semiconductor light emitting devices A method of manufacturing a semiconductor light emitting device, wherein the first electrode and the second electrode of each chip are coupled to be positioned on opposite sides of the n-type semiconductor region with respect to the active region.

(37) The n-type semiconductor region, the active region, and the p-type semiconductor region of each of the three semiconductor light emitting device chips are sequentially grown using a growth substrate, and in the bonding step, the n-type semiconductor of each of the three semiconductor light emitting device chips A method of manufacturing a semiconductor light emitting device, wherein the region is combined with an adhesive layer in a state in which the growth substrate is removed.

(38) The first electrode and the second electrode of each of the three semiconductor light emitting device chips are connected on the translucent substrate, and power is supplied to the three semiconductor light emitting device chips on the first and second electrodes of each of the three semiconductor light emitting device chips. Forming a plurality of electrode posts to supply; further comprising, a method of manufacturing a semiconductor light emitting device.

(39) A method of manufacturing a semiconductor light emitting device, wherein one of the plurality of electrode posts is a common electrode.

(40) The light-transmitting substrate has a first surface and a second surface opposite to the first surface, and forming a black matrix material on at least one of the first surface and the second surface; How to manufacture.

(41) In the method of manufacturing a semiconductor light emitting device, each of which is interposed between an n-type semiconductor region, a p-type semiconductor region, and an n-type semiconductor region and a p-type semiconductor region and generates light by using recombination of electrons and holes Preparing a plurality of semiconductor light emitting device chips having an active region and a light-transmitting substrate on which the n-type semiconductor region, the active region and the p-type semiconductor region are placed; preparing a plurality of semiconductor light emitting device chips in which the light-transmitting substrate is coupled after the corresponding n-type semiconductor region, the corresponding active region, and the corresponding p-type semiconductor region are grown; bonding a plurality of semiconductor light emitting device chips to a first substrate; and removing the light-transmitting substrate of each of the plurality of semiconductor light emitting device chips by laser ablation. Although three semiconductor light emitting device chips are exemplified in FIGS. 39 to 42 , the manufacturing method according to the present disclosure can be extended to applying two or more semiconductor light emitting device chips, and the chip itself has ultraviolet rays, blue, green, and red colors. may emit light, but it is also possible to use a form in which a phosphor or quantum dot (QD) is applied to a chip that emits light of the same wavelength.

(42) bonding the second substrate to the plurality of semiconductor light emitting device chips at the side from which the light-transmitting substrate is removed; And, removing the first substrate; Method of manufacturing a semiconductor light emitting device further comprising a.

(43) A method of manufacturing a semiconductor light emitting device, wherein in the step of bonding to the first substrate, the n-type semiconductor region of each of the plurality of semiconductor light emitting device chips is coupled to be positioned on the first substrate side.

(44) In the method of manufacturing a micro LED display having a plurality of pixels, each of which is interposed between an n-type semiconductor region, a p-type semiconductor region, and an n-type semiconductor region and a p-type semiconductor region, and recombination of electrons and holes first and second electrodes that function as an active region generating light using preparing a plurality of semiconductor light emitting devices having a substrate on which the regions are placed; and placing a plurality of semiconductor light emitting devices on one pixel among the plurality of pixels.

(45) The substrate is a light-transmitting substrate, and in the step of placing on the pixel, the first electrode and the second electrode are positioned on the pixel side, and the substrate is formed with the first electrode and the n-type semiconductor region, the active region and the p-type semiconductor region as a reference. A method of manufacturing a micro LED display, located on the opposite side of the second electrode.

(46) A method for manufacturing a micro LED display, wherein the first electrode and the second electrode are provided on a substrate on which the n-type semiconductor region, the active region and the p-type semiconductor region are not formed.

(47) A method of manufacturing a micro LED display, wherein at least one semiconductor light emitting device among the plurality of semiconductor light emitting devices includes two light emitting units on a corresponding substrate.

(48) A method of manufacturing a micro LED display, wherein at least one semiconductor light emitting device among the plurality of semiconductor light emitting devices includes a non-light emitting device on a corresponding substrate.

(49) the substrate has a conductive portion coupled to each of the first electrode and the second electrode, and in the step of placing on the pixel, the substrate is positioned on the pixel side, based on the n-type semiconductor region, the active region and the p-type semiconductor region A method of manufacturing a micro LED display, wherein the first electrode and the second electrode are positioned on the substrate side.

(50) A method of manufacturing a micro LED, wherein the n-type semiconductor region of each of the plurality of semiconductor light emitting devices is positioned on opposite sides of the first electrode and the second electrode with respect to the active region.

(51) A method of manufacturing a micro LED display, comprising a black matrix in an n-type semiconductor region.

(52) In the step of preparing a plurality of semiconductor light emitting devices, the n-type semiconductor region, the active region and the p-type semiconductor region are fixed to the light-transmitting substrate by a light-transmitting adhesive layer, and the n-type semiconductor region, the active region and the p-type semiconductor region A method of manufacturing a micro LED display, comprising the step of removing the light-transmitting adhesive layer so that the light-transmitting substrate is exposed while being fixed to the light-transmitting adhesive layer, wherein the first electrode and the second electrode are formed after the light-transmitting adhesive layer is removed.

(53) A method of manufacturing a micro LED display, in which a light-transmitting electrode is provided on the p-type semiconductor region in the process of removing the light-transmitting adhesive layer.

(54) a plurality of semiconductor light emitting devices each having an n-type semiconductor region, a p-type semiconductor region, and an active region interposed between the n-type semiconductor region and the p-type semiconductor region to generate light by recombination of electrons and holes preparing the chip; placing a plurality of semiconductor light emitting device chips on a light-transmitting substrate having a light-transmitting adhesive layer; removing the light-transmitting adhesive layer to expose the light-transmitting substrate; A method of manufacturing a semiconductor light emitting device comprising: forming a first electrode and a second electrode electrically connected to each of the n-type semiconductor region and the p-type semiconductor region.

(55) A method of manufacturing a semiconductor light-emitting device, wherein, in the step of removing the light-transmitting adhesive layer, a light-transmitting electrode is provided on the p-type semiconductor region.

According to the method of manufacturing a semiconductor light emitting device according to the present disclosure, it is possible to provide a flip chip semiconductor light emitting device with improved mass productivity by further improving yield and reliability. In particular, when applied to mini-LED or micro-LED, its mass productivity can be remarkably increased. According to the semiconductor light-emitting device according to the present disclosure, the structural inclination ( height difference) can be reduced. As a result, the direction of light emitted from the semiconductor light emitting device can be uniformly controlled, and finally, light quality in applications such as displays and lighting can be improved.

According to the semiconductor light emitting device according to the present disclosure, it is possible to manufacture a package for a mini or micro LED in which all of the RGB chips are p-side up flip chips while ensuring the reliability of the device.

According to the semiconductor light emitting device according to the present disclosure, a mini or micro LED package (so-called, inter ) used as a window (light emitting part) with a plate-shaped light-transmitting substrate (eg, sapphire, quartz, glass) rather than a transparent encapsulant in the prior art. poser) can be provided.

1: light-transmitting substrate, 2: first semiconductor region, 3: active region, 4: second semiconductor region, 5: insulating layer, 6: current diffusion electrode, 7: first electrode, 8: second electrode, 20: growth Substrate 30: first semiconductor region, 40: active region, 50: second semiconductor region, 60: protective layer, 70: first light-transmitting substrate, 80: second light-transmitting substrate, 92: first electrode, 93: second electrode

Claims (9)

delete delete In the semiconductor light emitting device,
light-transmitting substrate;
A semiconductor light emitting comprising a first semiconductor region having a first conductivity, an active region generating light by using recombination of electrons and holes, and a second semiconductor region having a second conductivity different from the first conductivity, which are sequentially grown A device chip; a first semiconductor light emitting device chip having a first electrode electrically connected to a first semiconductor region and a second electrode electrically connected to a second semiconductor region, wherein the light-transmitting substrate emits light a first semiconductor light emitting device chip that is a window; and,
A first thin film transistor that controls light emission of the first semiconductor light emitting device chip and is deposited on a light-transmitting substrate;
The first electrode and the second electrode are connected over the light-transmitting substrate,
A first electrode post formed higher than a height of the first semiconductor light emitting device chip on each of the first electrode and the second electrode connected to the light-transmitting substrate; and a second electrode post;
The first thin film transistor includes a first gate electrode for controlling light emission of the first semiconductor light emitting device chip;
A semiconductor light emitting device comprising a; a first gate electrode post electrically connected to the first gate electrode on the light-transmitting substrate and formed to be higher than a height of the first semiconductor light emitting device chip. 4. The method according to claim 3,
A semiconductor light emitting device comprising a; an encapsulant covering the first semiconductor light emitting device chip and supporting the first electrode post, the second electrode post, and the first gate electrode post. 4. The method according to claim 3,
a second semiconductor light emitting device chip provided on the translucent substrate; and a second thin film transistor that controls light emission of the second semiconductor light emitting device chip and is deposited on a light-transmitting substrate;
The second semiconductor light emitting device chip is a sequentially grown first semiconductor region having a first conductivity, an active region generating light by recombination of electrons and holes, and a second semiconductor having a second conductivity different from the first conductivity region, a first electrode electrically connected to the first semiconductor region and extending over the light-transmitting substrate, a second electrode electrically connected to the second semiconductor region and extending over the light-transmitting substrate, and a first electrode and a second electrode connected over the light-transmitting substrate, respectively and a first electrode post and a second electrode post formed higher than the height of the second semiconductor light emitting device chip on the
The second thin film transistor includes a second gate electrode for controlling light emission of the second semiconductor light emitting device chip,
A semiconductor light emitting device comprising a; a second gate electrode post electrically connected to the second gate electrode on the light-transmitting substrate and formed higher than a height of the second semiconductor light emitting device chip. 6. The method of claim 5,
a third semiconductor light emitting device chip provided on the translucent substrate; and a third thin film transistor that controls light emission of the third semiconductor light emitting device chip and is deposited on a light-transmitting substrate;
The third semiconductor light emitting device chip is a sequentially grown first semiconductor region having a first conductivity, an active region generating light using recombination of electrons and holes, and a second semiconductor having a second conductivity different from the first conductivity. region, a first electrode electrically connected to the first semiconductor region and extending over the light-transmitting substrate, a second electrode electrically connected to the second semiconductor region and extending over the light-transmitting substrate, and a first electrode and a second electrode connected over the light-transmitting substrate, respectively and a first electrode post and a second electrode post formed higher than the height of the third semiconductor light emitting device chip from above,
The third thin film transistor includes a third gate electrode for controlling light emission of the third semiconductor light emitting device chip;
A semiconductor light emitting device comprising a; a third gate electrode post electrically connected to the third gate electrode on the light transmitting substrate and formed higher than a height of the third semiconductor light emitting device chip. 7. The method of claim 6,
The first electrode post of the first semiconductor light emitting device chip, the first electrode post of the second semiconductor light emitting device chip and the first electrode post of the third semiconductor light emitting device chip, and the second electrode post of the first semiconductor light emitting device chip; 2 A semiconductor light emitting device in which one of the second electrode post of the semiconductor light emitting device chip and the second electrode post of the third semiconductor light emitting device chip is integrally formed as a common electrode. 8. The method of claim 7,
The first semiconductor light emitting device chip, the second semiconductor light emitting device chip, and the third semiconductor light emitting device chip are covered, and the first electrode post of the first semiconductor light emitting device chip and the second electrode post of the first semiconductor light emitting device chip, the second The first electrode post of the semiconductor light emitting device chip, the second electrode post of the second semiconductor light emitting device chip, the first electrode post of the third semiconductor light emitting device chip, the second electrode post of the third semiconductor light emitting device chip, and the first gate A semiconductor light emitting device comprising a; encapsulant for supporting the electrode post, the second gate electrode post, and the third gate electrode post. 9. The method of claim 8,
A semiconductor light emitting device comprising a; a transparent adhesive layer for bonding each of the first semiconductor light emitting device chip, the second semiconductor light emitting device chip, and the third semiconductor light emitting device chip to the light-transmitting substrate.

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