KR102262208B1 - Resistive wideband low noise amplifier with noise canceller - Google Patents

Abstract

The present invention relates to a resistive wideband low noise amplifier having a noise canceller, and more particularly, to a resistive wideband low noise amplifier (LNA) in which a noise canceller is configured using a resistor advantageous for impedance matching and the resistor.

Description

RESISTIVE WIDEBAND LOW NOISE AMPLIFIER WITH NOISE CANCELLER

The present invention relates to a resistive wideband low noise amplifier having a noise canceller, and more particularly, to a resistive wideband low noise amplifier (LNA) in which a noise canceller is configured using a resistor advantageous for impedance matching and the resistor.

Wideband receivers are tricky to design in nanoscale CMOS, but they support high data rate communications or multiple wireless standards. Digital TV has become widespread in many countries around the world. This has many advantages over the existing analog TV, such as improving image and sound quality and increasing the number of channels.

Interactive multimedia services and digital TV support the implementation of video reception in cell phones and multimedia portable devices. A key component of an advanced mobile TV-enabled cell phone is a silicon receiver that integrates all TV tuner functions on a silicon die. Low power, low cost and small physical size are required for cell phones and other multimedia mobile products. This feature calls for a move to lower cost technologies with smaller shapes.

The challenge in nanoscale CMOS technology is to achieve these key requirements by integrating higher performance radio frequency capabilities into a single silicon. In addition, cost, power and smaller size requirements, all sensitive isolation and intermodulation specifications of different standards must be achieved.

In the last few years, research on mobile TV systems has been extensively studied in industry and universities. The mobile TV architecture of the broadband TV band presents a number of implementation challenges for the silicon tuner required for mobile TV.

In order to support digital TV reception, a typical broadcast TV tuner requires several octaves (noise, linearity, power consumption, input/output impedance, gain, speed, voltage swing, supply voltage), i.e. interference cancellation of integer multiples of the desired signal; Issues such as in-band and out-of-band image rejection must be addressed. In addition to understanding the limitations of nanoscale CMOS technology, it is also important to understand that the TV architecture affects the RF front-end performance requirements.

The main challenges are TV architectures, limitations to CMOS technology and mobile TV standards. Popular architectures for integrated TV tuners are a direct conversion architecture (DCR) called zero-IF and a low-intermediate frequency (low-IF) double conversion architecture. DCR architectures are preferred over low IF because of their reduced complexity, fewer external components, and no image rejection. A recent study of mobile TV receivers showed that DCR was selected as a candidate for DVB-H tuners.

Among the mobile TV standards, DVB-H has the strictest sensitivity, which is the minimum signal a receiver can detect and block. The lower end of the tuner receiver dynamic range (DR) is the sensitivity level, which depends on the tuner noise figure (NF) as a measure of the drop in the output (signal-to-noise) ratio caused by the tuner circuit. do. In general, the receiver noise figure is controlled by the noise performance of the RF front-end, especially by the first stage of the RF front-end, which is a Low Noise Amplifier (LNA).

_{In nanoscale CMOS technology, transistors have excellent f T} to support wideband low noise amplifiers with low noise figure, high gain and high linearity. However, traditional low-noise amplifiers with on-chip inductors occupy a large area against the benefits of scaled digital CMOS. Inductors resonating with parasitic capacitors also lead to higher gain and better noise figure, but lack of accurate inductor modeling complicates circuit design, making it difficult to fabricate good performing chips. Therefore, in many applications, it is useful to employ a low-noise amplifier without an inductor. Low-noise amplifiers must accept large signals without distortion and provide matching to the input and output networks.

The present invention provides a broadband resistive low noise amplifier for a signal bandwidth of 40 MHz to 1 GHz. The simulation results are also described in detail about the power reduction technique to low power for nanoscale CMOS technology. In the present invention, a two-stage design is selected in which the front-end stage has a cascode common gate (CG) structure and the second stage has a common source (CS) structure to implement a noise cancellation technique. In addition, the third stage is an output driver that implements the common source (CS) architecture and implements local feedback.

Hereinafter, the prior art existing in the technical field of the present invention will be briefly described, and then, technical matters that the present invention intends to achieve differently from the prior art will be described.

Korea Patent Registration No. 1361622 (2014.02.05) relates to a technique for improving a low-noise amplifier having noise cancellation, wherein the low-noise amplifier is a first amplifier and a second amplifier that work together to remove noise generated in an input stage circuit. Includes amplifier. The removal of the AC coupling capacitors between the amplification stages of the low noise amplifier is characterized in that it allows current reuse, resulting in reduced current consumption.

Korea Patent No. 1616282 (2016.04.22) relates to a hybrid TV tuner, in particular, a single module that can be easily installed on a TV and can watch all TV broadcasts in the world, such as NTSC, PAL, QAM, DTMB, etc. It relates to a hybrid TV tuner that is implemented as a TV tuner, which enables automatic channel setting for each country, is strong against interference with wireless signals such as LTE, Bluetooth, and Wi-Fi, and has low power consumption. The hybrid TV tuner has a broadband low-noise amplifier, which removes noise using a common-source amplifier, a common-gate amplifier, and a combined network-based current radiation circuit.

Although the prior art has presented matters related to the low noise amplifier, the technical features of the resistive broadband low noise amplifier of the present invention are not presented.

Examining in more detail, the front-end of the low-noise amplifier adopts a cascode common gate (CG) structure. A common approach uses cross-coupled local feedback employed between a common gate (CG) and common source (CS) stage. Moderate gain at the source of the cascode transistor in the common source (CS) stage is used to increase the trans-conductance of the cascode common gate (CG) stage.

This leads to the proposed structure having a higher gain and a lower noise figure (NF) than a conventional low-noise amplifier (LNA) having an inductor. Also by adjusting the local open loop gain, the power consumption is distributed among the transistors and resistors, so that the noise figure NF can be further optimized. Finally, by designing a resistive network at the output considering the phase shift effect at high frequencies, an optimized DC gain value is obtained. The linearity of the low-noise amplifier (LNA) provided in the present invention was improved, which was confirmed by fabricating with SKHynix 180nm CMOS technology. Specifically, the low noise amplifier (LNA) according to the present invention achieves a voltage gain of 10.7 dB and a minimum noise figure of 1.6 to 1.9 dB for a signal bandwidth of 1 GHz to 40 MHz. The low-noise amplifier draws 10mA from a 1.8V supply in an active core area of 0.12 square meters (mm^2).

The present invention was created to solve the above problems, and it is to provide a wideband low-noise amplifier having a noise canceling function, and having an excellent impedance matching performance by enabling resistive feedback with the noise canceling function. The purpose.

A low-noise amplifier according to an embodiment of the present invention includes: a cascode common gate circuit; circuitry for providing active feedback to the gate of the cascode common gate circuit; and a circuit providing a resistive feedback and noise canceling function using a resistor and a capacitor in a path for providing the active feedback, wherein impedance matching is facilitated by the resistive feedback.

로 표현되며, 여기서, Rs는 소스 저항이며, Av는 개방 루프 이득이고, gmfb는 캐스코드 트랜지스터의 전달 콘덕턴스인 것을 특징으로 한다.Here, the condition for impedance matching is,

where Rs is the source resistance, Av is the open loop gain, and gmfb is the transfer conductance of the cascode transistor.

In addition, the cascode common gate circuit includes a CG transistor M2 and a cascode transistor M5 connected in series, and the circuit providing the active feedback includes a drain terminal of the CS transistor M1 and a CS stage. and being connected from the source terminal of the cascode transistor M3 to the gate of the CG transistor M2.

A current source is connected in parallel with the cascode transistor M3 of the CS stage, or a PMOS transistor M4 is connected instead of the current source.

The broadband low-noise amplifier is characterized in that an output resistor (RL2) is connected to the drain of the cascode transistor (M3) of the CS stage, or transistors (M6, M7) are connected,

The broadband low-noise amplifier is characterized in that the two low-noise amplifiers are provided, and a differential output is possible by complementary coupling to each other.

인 것을 특징으로 한다. 여기서 Rs는 소스 저항이며, gm1, gm4는 각각 캐스코드 CG 트랜지스터의 전달 콘덕턴스이며, RL1, RL2는 각각 캐스코드 CG 트랜지스터의 드레인에 연결된 출력저항이다.Also, the transconductance required for input impedance matching is reduced by (1 + Av), and the voltage gain in the negative feedback loop is

characterized by being. Here, Rs is the source resistance, gm1 and gm4 are the transfer conductances of the cascode CG transistor, respectively, and RL1 and RL2 are the output resistances connected to the drain of the cascode CG transistor, respectively.

일 때, 균형을 이루는 것을 특징으로 한다.Also, the differential output is

When , it is characterized in that it achieves a balance.

As described above, according to the resistive broadband low-noise amplifier with the noise canceling function of the present invention, the effect of removing the noise of the low-noise amplification, high linearity, low power consumption, and excellent input/output impedance matching performance have.

1 is a circuit diagram of a resistive feedback topology according to an embodiment of the present invention.
2 is a circuit diagram of an active feedback topology according to an embodiment of the present invention.
3 is a circuit diagram of a CG-CS topology according to an embodiment of the present invention.
4 is a CS circuit diagram with local feedback according to an embodiment of the present invention.
5 is a CG-CS circuit diagram with local feedback according to an embodiment of the present invention.
6 is a circuit diagram of a local feedback by a current source according to an embodiment of the present invention.
7 is a circuit diagram of a cascode CG stage according to an embodiment of the present invention.
8 is a circuit diagram of a low-noise amplifier having a noise canceling function according to an embodiment of the present invention.
9 is a circuit diagram of a low-noise amplifier having a cascode CG according to an embodiment of the present invention.
10 is a graph showing a DC voltage gain of 10.7 dB in the low-noise amplifier implemented according to an embodiment of the present invention.
11 is a graph illustrating a noise figure of a low noise amplifier according to an embodiment of the present invention.
12 is a graph illustrating S-parameters for S11, S12, S21, and S22 according to an embodiment of the present invention.
13 is a photograph showing the entire low-noise amplifier including the output buffer according to an embodiment of the present invention having an active core area of 0.12 mmw.

Hereinafter, a preferred embodiment of a resistive wideband low noise amplifier having a noise canceller of the present invention will be described in detail with reference to the accompanying drawings. Like reference numerals in each figure indicate like elements. In addition, specific structural or functional descriptions for the embodiments of the present invention are only exemplified for the purpose of describing the embodiments according to the present invention, and unless otherwise defined, all terms used herein, including technical or scientific terms They have the same meaning as commonly understood by those of ordinary skill in the art to which the present invention pertains. Terms such as those defined in a commonly used dictionary should be interpreted as having a meaning consistent with the meaning in the context of the related art, and should not be interpreted in an ideal or excessively formal meaning unless explicitly defined in the present specification. It is preferable not to

1 is a circuit diagram of a resistive feedback topology according to an embodiment of the present invention.

One of the important parameters in the design of a low-noise amplifier is impedance matching. Resistive feedback provides better impedance matching for CS as in FIG. 1 .

2 is a circuit diagram of an active feedback topology according to an embodiment of the present invention.

As shown in FIG. 2, by actively feeding back from the output of the low noise amplifier to the input, excellent performance is provided, but in the case of active feedback, the condition for impedance matching can be expressed as [Equation 1] as follows.

[Equation 1]

Here, Rs is the source resistance, gmfb is the transfer conductance of the transistor Mfb, and Av is the open loop gain with the output node open. As the feedback signal is taken from an output with high gain and low bandwidth, the impedance degrades due to gain-roll-off at high frequencies.

When designing a low-noise amplifier with nanoscale CMOS technology, it is possible to design a structure with or without an inductor. Also, when designing a wideband low noise amplifier with high linearity for application to a digital TV tuner, it can also be designed using a current amplifier. To improve linearity and take advantage of noise cancellation, a CG stage with positive current feedback is coupled in parallel with the CS stage using a current mirror amplifier. This positive current feedback is applied to achieve high gain and good linearity.

It is also applied to noise cancellation by constructing a current amplifier, and a current reuse technique with transconductance-boosting is used to design a resistive low-noise amplifier.

Since the CG structure matches the input well but does not provide high gain, a self-biased and Gm-boosted CG technique, an active feedback technique that lowers the CG's transconductance, can be applied to reduce noise and better match the input power. have. These circuits contain large-value inductors, so it is difficult to integrate them into a system-on-chip and apply them.

Low-noise amplifiers can also be implemented by increasing performance using Gm-boosted CG for system-on-chip applications. Noise can be effectively reduced by improving the on-chip noise figure, improving the input matching, and making it easier to integrate into the chip.

Also, to reduce power consumption in wireless sensor networks, a method of doubling Gm without an inductor is used, which provides high gain, reduced noise figure, and even low intrinsic gm of the transistor.

It is possible to configure a low-noise amplifier circuit by having a gm-boosted CG circuit instead of a CS amplifier, in which case the main CG amplifier is improved in performance by the gm-boosted amplifier. This design uses active and passive gm-boosting effects to reach a very low noise figure with much higher voltage gain. Active and passive gm-boosting effects are used to reach very low noise figure while having very high voltage gain. This design shows a good trade-off between noise and linearity. In addition, it has good stability as well as a small effective core area.

Also, for the design of efficient low noise amplifiers for wideband applications, the source degeneration topology used in cascode amplifiers can be used. The cascode amplifier is used together with a large inductor at the output and the input for precise matching. It is possible to use a conventional input matching network to achieve a low noise figure. A method to analyze a wideband low-noise amplifier with a source degeneration topology is to use a quasi-static transistor model, in which the transistor width is obtained by appropriately selecting the source degeneration reactance. It is possible to achieve the minimum noise figure independently of In addition, the width simply affects the gain of the low-noise amplifier at the cost of power consumption.

Because basic wideband amplifiers have a trade-off between the noise figure and the source impedance matching that limits the noise figure to values typically above 3 dB, a feedforward denoising technique can be used for wideband applications. This technique uses a global feedback approach to break the trade-off between noise figure and source impedance matching. This technique usually allows impedance-matching amplifiers to have a noise figure of less than 2.4 dB over a bandwidth of several megahertz to 2 GHz. The matching step uses shunt feedback in the CMOS inverter to provide input impedance matching. It is to reduce the sensitivity of the input impedance and gain due to changes in the supply voltage. The inverter is biased using a current mirror and uses a large transistor capacitor of about 13pF to ground the PMOS source. Configure an auxiliary voltage sense amplifier in the feedforward path to the next matching stage, which results in noise to the matching device being removed at the output only from the contribution of the remaining signal. A key contribution is that it removes both distortion and noise.

An inductorless low-noise amplifier with active balun circuitry can be designed for multi-standard wireless applications. That is, by using a combination of a CG stage and an admittance-scale CS stage, a replication bias that maximizes the balancing operation is used, and noise and distortion of the CG stage are removed. A balanced output can be achieved while eliminating the noise and distortion required for admittance scaling of the CS stage in relation to the CG stage.

By dramatically limiting the output noise from the matching device for the desired bandwidth, it is possible to design an ultra-wideband inductive low-noise amplifier. The purpose of noise removal here is to separate the input matching from the noise figure by removing the output noise from the matching device.

It is possible to design circuits capable of rejecting the noise of a wideband low-noise amplifier without the use of large on-chip inductors. The topology of this circuit consists of CG and CS with a local feedback mechanism between the stages to achieve a voltage gain of 19dB at a supply voltage of 1V. Appropriate gain at the source of the cascode transistor in the CS stage used to boost the transconductance of the CG transistor leads to higher gain and lower noise figure compared to the conventional CG-CS structure. Finally, by adjusting the local open-loop gain, the noise figure can be optimized by sharing power dissipation between passive and active components such as resistors and transistors.

A two-stage resistive feedback low-noise amplifier fully integrated into a TV tuner consists of two gain stages with resistive feedback loops. The first stage gain provides high loop gain, and the second stage eliminates the loading effect to ensure near-ideal feedback operation. Each stage is a CS amplifier cross-connected with a source follower to account for a stable loop gain over PVT fluctuations. In the first gain stage, the NMOS and PMOS essentially consist of an inverter-type amplifier that helps to cancel the second harmonic, improving the post-linearization process. Cross-coupled current bleeding transistors also increase loop gain.

By reducing the noise figure degradation due to lossy gate inductors, it is possible to design low noise amplifiers with capacitive load based noise and input matching techniques. It allows the design of high-linearity low-noise amplifiers with inductors for SAWless receiver applications. A large-signal transconductance linearization method employing body-bias control and complementary superposition is used to improve the gain compression point and third-order intercept point.

In the on-board low-noise amplifier, a dual-feedback technology employing a second-order inter-modulation distortion cancellation technology implemented as a wideband low-noise amplifier may be employed. Here, all the building blocks of the low-noise amplifier are designed to have a complementary configuration, and the body-bias control technique is applied to the inverter-based resistive feedback amplifier. A peaking inductor is also placed inside the feedback loop at the input gate of the transistor to improve bandwidth.

For application in TV receiver front-end, gm-enhanced capacitive cross-coupled CG low-noise amplifiers can be designed. The gm-enhanced technique removes noise and distortion from differential CG configurations. A gm-boosted resistive feedback low-noise amplifier can be designed using a series inductor matching network. Here, the gain is increased by the Q factor of the series RLC input network, and the noise figure is decreased by a similar factor.

For application in a TV tuner, a wideband variable gain low noise amplifier based on a single-to-differential stage can be designed. Gain control is performed using a single-differential circuit rather than an off-chip balun for the high gain mode.

A balanced noise cancellation technique can be realized using a current-voltage coupler implemented at the load of the main amplifier. It converts the output currents of the parallel CG and CS stages of the low-noise amplifier into voltages, equalizes the amplitudes of the voltages, and combines the voltages into a single output voltage. High linearity is achieved with passive components used to remove noise and distortion in the CS stage and CG stage. A voltage buffer is designed using a CS and source follower with high gain, high linearity and low noise figure used as a differential hybrid voltage buffer to increase the loop gain. Here, the resistive feedback low-noise amplifier has very high linearity and low noise figure.

Active shunt-shunt feedback techniques can be used for wideband low noise amplifiers. A cascode amplifier stage with source follower feedback is used as active shunt-shunt feedback with input matching, noise, linearity and stability.

With chip-on-board packaging, an ESD-protected wideband low-noise amplifier with a resistive feedback structure can be designed. Use feedback through the source follower method. It uses feedback through an R-C feedback network, a gate-peaking inductor in the feedback loop, and a neutralizing capacitor. I did. Additionally, bond-wire inductors and electrostatic devices can be co-designed to improve performance.

A 5 GHz resistive feedback low-noise amplifier for multi-standard applications consisting of a gm-enhanced cascode amplifier with a source follower feedback buffer can be designed. The dual feedback method can be used for wideband low-noise amplifiers. In this case, dual loop resistive feedback is used to achieve wideband matching. Here, the feedback circuit is configured to sense the output current, feed it back to the input, and compare it with the input current of one loop and the input voltage of the other loop. The first and second feedback loops determine current-to-current and voltage-to-current gain, respectively, under the condition that the output voltage is shorted.

An inductorless wideband low noise amplifier designed for wireless applications can be designed. It uses a current reuse technique to reduce power, and each gain block is loaded with a polysilicon resistor. Also to improve the linearity, the last two steps are degraded due to the polysilicon resistance, and the effective voltage at the gate is lowered. Also the output buffer is a degenerate cascade amplifier. This circuit uses an on-chip inductor-free circuit topology and requires no tuning or trimming to achieve the desired performance.

For application in TV tuners, a wideband low-noise amplifier with thermal noise cancellation technology can also be designed. It is also possible to design broadband low noise amplifiers with current amplification for application in multi-standard terrestrial and cable tuners. By using a structure in which a CS amplifier and a CG amplifier are combined by current amplification, the noise figure does not affect wideband input matching.

A differential fully integrated CMOS low-noise amplifier for ultra-wideband wireless receivers using a two-section ladder input network to achieve input matching may be designed. A fully integrated capacitor cross-coupled low-noise amplifier can also be designed using the Gm boosting technique. In addition, fully integrated ultra-wideband low-noise amplifiers with systematic design methodology can be designed. A feedback technique may be used here, in order to achieve a better design trade-off between gain and noise.

Due to the bandwidth, linearity, and stability of the CG topology compared to the CS topology, capacitor-cross-coupled negative feedback is used to increase the gm of the CG stage. It eliminates bandwidth and linearity and achieves high gain and low noise figure. Also, a differential gm-boosted CG low-noise amplifier designed with a positive-negative feedback scheme can be designed. In this case, it consists of a cross-connected capacitor and a PMOS transistor in a differential CG configuration.

An inductorless low-power gm-boost low-noise amplifier based on a CG topology can be designed. In this case, a high gain can be obtained by combining the gain-boost technique. Also

It allows the design of low-power wideband low-noise amplifiers employing NMOS CG with a PMOS shunt-shunt feedback topology used to create a wideband input impedance matching low power consumption. In this case, the input stage consists of a CG NMOS transistor, a CS shunt feedback PMOS transistor, and a resistor, and a shunt-shunt topology is used to perform wideband input impedance matching. Compared to simple CG or CS stage resistor architectures, the CG shunt-shunt feedback topology can achieve input impedance matching with much lower power consumption.

3 is a circuit diagram of a CG-CS topology according to an embodiment of the present invention.

Another approach using CG-CS combined with denoising yields good impedance matching and low noise figure as in FIG. 3 . gm of CG is set to 50Ω impedance matching. The balanced output and noise cancellation of the CG transistor (MCG-Mcas1 series connection) can achieve good performance under the condition _{of g mCG} R _L1 = g _mCS R _L2.

However, this topology requires a higher supply voltage to reduce the noise figure, which is a challenge in nanoscale CMOS. The problem of low-noise amplifiers with an output node in CS feedback is overloaded with limited bandwidth and large gain.

To overcome this problem, the present invention proposes a local feedback approach to replace global feedback.

4 is a CS circuit diagram with local feedback according to an embodiment of the present invention, FIG. 5 is a CG-CS circuit diagram with local feedback according to an embodiment of the present invention, and FIG. 6 is an embodiment of the present invention It is a circuit diagram of local feedback by a current source according to

The feedback signal is taken from point B, which is the source of the cascode transistor, instead of point A, which is the output, as in FIG. 4 . Because of the high bandwidth at point B, local feedback is effective up to high frequencies.

To solve the problem of the CG-CS low noise amplifier shown in FIG. 3 , the same local feedback as in FIG. 4 is applied to boost the CG transistor as shown in FIG. 5 . CG transconductance has the advantage of negative feedback, and the CG transistor is boosted by one factor, (1 + Av). Also, the current of the CG transistor can be reduced by the same factor as above, and a much larger resistance can be adopted. This topology can be used to implement noise cancellation of CG transistors.

The present invention intends to propose that a current source be added in parallel to M3 as shown in FIG. 6 to further improve this topology.

As shown in FIG. 6 , in the low noise amplifier, the CG transistor M2 and the cascode transistor M5 are connected in series, the drain terminal of the CS transistor M1 and the source of the cascode transistor M3 of the CS stage It is configured to be fed back from the terminal to the gate of the CG transistor M2. Here, the current source 60 is connected in parallel with the cascode transistor M3 of the CS stage.

7 is a circuit diagram of a cascode CG stage according to an embodiment of the present invention, and FIG. 8 is a circuit diagram of a low-noise amplifier having a noise canceling function according to an embodiment of the present invention.

In the present invention, the current source 60 of FIG. 6 is to be replaced with a PMOS 600 in order to reuse the current in the CS stage having an amplifier as shown in FIG. 7 .

As shown in FIG. 7 , in the low noise amplifier, the CG transistor M2 and the cascode transistor M5 are connected in series, the drain terminal of the CS transistor M1 and the source of the cascode transistor M3 of the CS stage It is configured to be fed back from the terminal to the gate of the CG transistor M2. Here, the transistor M4 is connected instead of the current source 60 in parallel with the cascode transistor M3 of the CS stage.

This circuit uses the noise canceling circuits Rb2 and Cc shown in Fig. 8 to cancel noise from the main CG transistor M2 and the cascode transistor M3. The channel noise of the transistor M2, the current source indicated by the dotted line, is two correlated, but is reduced at the output nodes outp and outn due to the _{out-of-phase noise voltages V X} and V _{outp .} In the CG stage, the gm of M2 provides the advantage of negative feedback and is boosted by a factor (1+Av).

As shown in FIG. 8 , in the low noise amplifier, a CG transistor M2 and a cascode transistor M5 are connected in series, the drain terminal of the CS transistor M1 and the source of the cascode transistor M3 of the CS stage It is configured to be fed back from the terminal to the gate of the CG transistor M2. Here, the cascode transistor M3 and the PMOS transistor M4 of the CS stage are connected in parallel. Here, to remove the noise, a capacitor Cc is connected to the feedback path, and a resistor Rb2 is connected between the circuit path between the capacitor Cc and the gate terminal of the CG transistor M2 and the bias voltage Vb. do.

In FIG. 8, Rs is expressed as [Equation 2].

[Equation 2]

where Rs is the source resistance, typically 50Ω. gm2 is the transconductance of the CG transistor M2, and Av is the open loop gain.

The transconductance required for input impedance matching is reduced by a factor of (1 + Av). The voltage gain in the negative feedback loop is as shown in [Equation 3].

[Equation 3]

The differential output will be balanced when a relationship such as [Equation 4] is established.

[Equation 4]

Also, [Equation 3] is a condition for noise removal. In order to further improve the performance, the present invention proposes to use cascode CG instead of the conventional CG stage.

The resistor in the third stage is completely removed and replaced with a PMOS. The NMOS also reuses the current in the PMOS stage. Adjust the width parameter of this stage to meet the low noise figure. A fully differential low-noise amplifier is designed using SKHynix 180nm CMOS at a supply voltage of 1.8V. The DC gain of the low-noise amplifier is first realized by considering the target of the required bandwidth and noise figure. Then, the transconductance and current of the cascode CG stage are adjusted according to the input impedance matching condition. The current in M4 is determined under the power constraint.

9 is a circuit diagram of a low-noise amplifier having a cascode CG according to an embodiment of the present invention.

A fully differential low noise amplifier is shown in FIG. 9 . With the low-noise amplifier laid out as a differential circuit, the sizing of all components is the last step to be performed before starting the simulation process. The passive elements are the values used for the low noise amplifier design shown in [Table 1]. In this design, the length of all transistors was set to 0.18 μm in order to keep the size of all transistors small to minimize and reduce the layout area.

[Table 1]

The fully differential low-noise amplifier is designed in SKHynix 0.18μm CMOS at a supply voltage of 1.8V. A single-to-differential balun is used at the input to facilitate single-ended simulation. On the other hand, a differential-to-single-ended output balun is used at the output of the low-noise amplifier. The DC gain of the low noise amplifier was first considered as the goal of the requirements for bandwidth up to 1 GHz and low noise figure.

10 is a graph showing a DC voltage gain of 10.7 dB in the low noise amplifier implemented according to an embodiment of the present invention.

As shown in FIG. 10, it was shown that a DC voltage gain of 10.7 dB was realized. On the other hand, Table 2 shows all the process corner values of DC gain for a fully differential low-noise amplifier.

[Table 2]

The DC gain of the low-noise amplifier is stable because the gain does not decrease rapidly at all process corner values.

11 is a graph illustrating a noise figure of a low noise amplifier according to an embodiment of the present invention.

11, the simulated noise figure shows that the low noise amplifier can achieve a minimum noise figure of 1.6 dB and a noise figure of up to 2.9 dB in a signal bandwidth of 40 MHz to 1 GHz.

12 is a graph illustrating S-parameters for S11, S12, S21, and S22 according to an embodiment of the present invention.

The S-parameter analysis and results performed using Cadence's RF tool are shown in FIG. 12 .

13 is a photograph showing the entire low-noise amplifier including the output buffer having an active core area of 0.12 mm.

The wideband low noise amplifier is designed without using an inductor in SKHynix 0.18μm CMOS for application to TV tuner. The proposed low-noise amplifier implements noise cancellation technology by utilizing a front-end cascode common gate (CG). The second stage uses a cascode structure to increase the gain. In the proposed structure, the thermal noise of the cascode common gate transistor is canceled in the second step. The low noise amplifier according to the present invention achieves high gain and much lower noise by implementing a noise cancellation technique.

In the present invention, a local cross-coupled feedback mechanism is adopted to improve the performance of the low-noise amplifier. A wideband low-noise amplifier can achieve a DC gain of 10.7dB. A minimum of NF 1.6 and a maximum of NF of 2.9 dB can be achieved for signal bandwidths from 40 MHz to 1 GHz. The manufactured low-noise amplifier consumes 10mA from a 1.8V power supply with a core size of 0.12mm.

As discussed so far, according to the resistive wideband low-noise amplifier equipped with the noise canceling function of the present invention, the noise of the low-noise amplification is removed, the linearity is high, the power consumption is low, and the input/output impedance matching performance is excellent. It works.

As described above, the present invention has been described with reference to the embodiment shown in the drawings, but this is only exemplary, and those skilled in the art can make various modifications and equivalent other embodiments therefrom. You will understand that it is possible. Therefore, the technical protection scope of the present invention should be determined by the following claims.

100: low noise amplifier 200: CS transistor
300: CG transistor 400: source resistance
500: cascode transistor 600: current source replacement transistor
700: cascode CG 60: current source

Claims (8)

cascode common gate circuit;
circuitry for providing active feedback to the gate of the cascode common gate circuit;
a circuit providing a resistive feedback and noise canceling function using a resistor and a capacitor in a path providing the active feedback;
The resistive feedback facilitates impedance matching,
The cascode common gate circuit includes a CG transistor M2 and a cascode transistor M5 connected in series,
wherein the circuit providing the active feedback comprises connecting from the drain terminal of a CS transistor (M1) and the source terminal of the cascode transistor (M3) of the CS stage to the gate of the CG transistor (M2). low noise amplifier. The method according to claim 1,
The condition for impedance matching is,

Wideband low noise amplifier, characterized in that expressed as.
where Rs is the source resistance, Av is the open loop gain, and gmfb is the transfer conductance of the cascode transistor. delete The method according to claim 1,
A broadband low noise amplifier, characterized in that a current source is connected in parallel with the cascode transistor (M3) of the CS stage, or a PMOS transistor (M4) is connected instead of the current source. 5. The method according to claim 4,
A broadband low-noise amplifier, characterized in that the output resistor (RL2) or the transistors (M6, M7) are connected to the drain of the cascode transistor (M3) of the CS stage. The method according to claim 1,
A wideband low noise amplifier, characterized in that by providing two of the low noise amplifiers so that they are complementary to each other, a differential output is possible. 7. The method of claim 6,
The transconductance required for input impedance matching is,
is reduced by (1 + Av),
The voltage gain in the negative feedback loop is

Wideband low noise amplifier, characterized in that.
Here, Rs is the source resistance, gm1 and gm4 are the transfer conductances of the cascode CG transistor, respectively, and RL1 and RL2 are the output resistances connected to the drain of the cascode CG transistor, respectively. 7. The method of claim 6,
The differential output is

A broadband low-noise amplifier, characterized in that it is balanced when the relationship of

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