KR102200650B1 - Power conversion device and control method to reduce RMS ripple current of DC Link capacitor - Google Patents

Abstract

A power conversion device and a control method for reducing the RMS current of a DC link capacitor thereof are disclosed. The power conversion device includes: a converter; inverter; A DC link capacitor positioned between the converter and the inverter; And a control unit that adjusts the switching timing of the converter and the inverter so that the difference between the output current of the converter and the input current of the inverter does not occur so that the effective value of the current of the DC link capacitor is minimized.

Description

Power conversion device and control method to reduce RMS current of DC link capacitor thereof {Power conversion device and control method to reduce RMS ripple current of DC Link capacitor}

The present invention relates to a power conversion device and a control method for reducing the RMS current of a DC link capacitor thereof.

The indirect power conversion method of the DC-DC-AC structure consisting of a boost converter and a three-phase inverter satisfies the requirements of step-up and step-down between input and output, and is a structure that is commonly used because of its excellent ease of use. Such a structure is widely used in the fields of solar power, energy storage systems, hybrid vehicles, and fuel cells to solve problems such as environmental problems and fossil fuel depletion.

The indirect power conversion method uses a DC link capacitor to reduce the effect of the instantaneous power imbalance between the structurally connected converters. Electrolytic capacitors and film capacitors are mainly used for DC link capacitors, and the lifespan is reduced due to heat generated by the effective value of the current flowing into the capacitor.

Many studies are being conducted to improve the life of the DC link capacitor, and as a method to reduce the current flowing into the capacitor without using an additional circuit, the difference between the current between the two converters is reduced through a feedback or feed forward method. There is a control method and a switching method that minimizes the difference between nonlinear currents such as harmonic currents generated by switching.

In the case of the conventional switching method, there is a problem of having a capacitor ripple current reduction performance limited to a situation where the inverter side is a unit power factor.

Korean Patent Publication No. 2011-0078221 (Publication date: July 7, 2011)

The present invention is to provide a power conversion device and a control method for reducing the RMS current of the DC link capacitor.

In addition, the present invention is to provide a power conversion device capable of increasing the lifetime of a DC link capacitor by reducing the RMS ripple current flowing into the DC link capacitor, and a control method for reducing the RMS current of the DC link capacitor.

In addition, the present invention is to provide a power conversion device capable of improving the overall reliability of a power conversion system as the life of a DC link capacitor increases, and a control method for reducing the RMS current of the DC link capacitor.

According to an aspect of the present invention, a device capable of reducing an RMS ripple current flowing into a DC link capacitor is provided.

According to an embodiment of the present invention, a converter; inverter; A DC link capacitor positioned between the converter and the inverter; And a control unit that adjusts the switching timing of the converter and the inverter so that a difference between the output current of the converter and the input current of the inverter does not occur so that the effective value of the current of the DC link capacitor is minimized. Can be provided.

The controller calculates coefficients of a Fourier series of output currents of the converter and Fourier series of input currents to the inverter according to the on-off operation of the converter and each switch of the inverter, and then the output current of the converter The switching timing of the converter and the inverter may be adjusted so that the effective value of the DC link capacitor current according to the relative position of the input current of the inverter and the inverter is minimized.

The control unit derives a synchronization time at which the effective value of the DC link capacitor becomes minimum in a section in which the inverter switching frequency is increased using the following equation,

는 컨버터의 스위칭 주기를 나타내며,

는 인버터 스위칭 주파수가 상승하는 구간에서의 인버터측 전류의 푸리에 급수의 계수를 나타낸다. here,

Represents the switching period of the converter,

Denotes the coefficient of the Fourier series of the current on the inverter side in the period in which the inverter switching frequency increases.

Using the following equation to derive a synchronization time at which the effective value of the DC link capacitor becomes the minimum in the section in which the inverter switching frequency falls,

는 컨버터의 스위칭 주기를 나타내며,

는 인버터의 스위칭 주파수가 하강하는 구간에서의 인버터측 전류의 푸리에 급수의 계수를 나타낸다. here,

Represents the switching period of the converter,

Denotes the coefficient of the Fourier series of the current on the inverter side in the section in which the switching frequency of the inverter falls.

According to another embodiment of the present invention, a first converter; A second converter; A DC link capacitor positioned between the first converter and the second converter; And adjusting the switching timing of the first converter and the second converter so that the difference between the output current of the first converter and the input current of the second converter does not occur so that the effective value of the current of the DC link capacitor is minimized. A power conversion device including a control unit may be provided.

The control unit includes a coefficient of a Fourier series of an output current of an output current of the converter and a coefficient of a Fourier series of an input current to the second converter according to an on-off operation of each switch of the first converter and the second converter. After calculating the values, the switching timing of the first converter and the second converter is determined so that the effective value of the current of the DC link capacitor according to the relative position of the output current of the first converter and the input current of the second converter is minimized. Can be adjusted.

According to another aspect of the present invention, there is provided a method of reducing the RMS current of the DC link capacitor in a power conversion device having a converter, a DC link capacitor, and a three-phase inverter structure.

According to an embodiment of the present invention, in a power conversion device having a converter, a DC link capacitor, and a three-phase inverter structure, in a method for minimizing the effective current of the DC link capacitor, (a) the output of the converter Calculating a coefficient of the Fourier series of current; (b) calculating a coefficient of the Fourier series of the input current of the inverter; And (c) adjusting the switching timing of each switch of the converter and the inverter so that the effective value of the DC link capacitor current according to the relative position of the output current of the converter and the input current of the inverter is minimized. A method of minimizing the effective current value of the DC link capacitor may be provided.

In the steps (a) and (b), coefficients of the Fourier series of the output current of the converter and the coefficients of the Fourier series of the input current to the inverter according to the on-off operation of the converter and each switch of the inverter are calculated. I can.

According to another embodiment of the present invention, in a power conversion device having a structure in which a DC link capacitor is connected between a plurality of converters, in a method for minimizing the effective value of the current of the DC link capacitor, the output current of the first converter Calculating the Fourier series of; Calculating a Fourier series of the input current of the second converter; And adjusting the switching timing of each switch of the first converter and the second converter so that the effective value of the DC link capacitor current according to the relative position of the output current of the first converter and the input current of the second converter is minimized. A method of minimizing the effective current value of the DC link capacitor may be provided, including the step of:

By providing a power conversion device according to an embodiment of the present invention and a control method for reducing RMS current of a DC link capacitor thereof, by reducing the RMS ripple current flowing into the DC link capacitor, the life of the DC link capacitor can be increased. There is an advantage.

In addition, the present invention has an advantage of improving the overall reliability of the power conversion system as the DC link capacitor life is increased.

1 is a block diagram showing a part of a circuit diagram of a power conversion device according to an embodiment of the present invention.
2 is a block diagram schematically showing the internal configuration of a power conversion device according to an embodiment of the present invention.
3 is a view showing the current waveforms of the converter and the inverter according to an embodiment of the present invention.
4 is a block diagram schematically showing the configuration of a power conversion device according to another embodiment of the present invention.
5 is a flow chart showing a control method for reducing the DC link capacitor RMS current according to an embodiment of the present invention.
6 is a graph showing a current attenuation rate of a DC link capacitor according to the prior art and an embodiment of the present invention.

The singular expression used in the present specification includes a plural expression unless the context clearly indicates otherwise. In the present specification, terms such as “consisting of” or “comprising” should not be construed as necessarily including all of the various elements or various steps described in the specification, and some of the elements or some steps It may not be included, or it should be interpreted that it may further include additional elements or steps. In addition, terms such as "... unit" and "module" described in the specification mean units that process at least one function or operation, which may be implemented as hardware or software, or as a combination of hardware and software. .

Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings.

The present invention relates to a power conversion device having a boost converter and a three-phase inverter structure, and a control method for reducing RMS current of a DC link capacitor, and for reducing current flowing into a DC link capacitor caused by a current difference between the converter and the inverter. It's about technology.

Power conversion device according to an embodiment of the present invention is a wide range of AC/DC modular inverters for renewable energy, solar power generation systems, wind power generation systems, energy storage systems, uninterruptible power systems, reactive power compensation systems, voltage compensation systems, etc. Can be used in the field.

The power conversion apparatus according to an embodiment of the present invention may reduce the RMS current flowing into the DC link capacitor by adjusting the timing of the switches of the converter and the inverter so that the current difference between the converter and the inverter approaches “0”. Hereinafter, a method of reducing the current flowing into the DC link capacitor is described assuming a power conversion device having a converter and an inverter structure, but it is natural that the same can be applied to a power conversion device composed of a converter and a converter. Do. This will be more clearly understood by the following description.

1 is a block diagram showing a part of a circuit diagram of a power conversion apparatus according to an embodiment of the present invention, and FIG. 2 is a block diagram schematically showing an internal configuration of a power conversion apparatus according to an embodiment of the present invention, 3 is a diagram showing the current waveforms of the converter and the inverter according to an embodiment of the present invention.

Referring to FIG. 1, a power conversion device 100 according to an embodiment of the present invention includes a converter 110, a DC link capacitor 120, an inverter 130, a load 140, and a control unit 150. Is composed. In FIG. 1, the converter 110 and the inverter 130 are shown as being one, respectively, for convenience of understanding and explanation, but the converter 110 and the inverter 130 may each be plural.

The converter 110 is an element that converts a voltage to DC (direct current). In an exemplary embodiment of the present invention, it is assumed that the converter 110 is a boost converter, but the description is not limited to a boost converter, and other types of converters such as a buck converter may be used.

In an embodiment of the present invention, it is assumed that the converter 110 is a boost converter, and this will be described mainly. For example, the converter 110 may charge current or generate and output a voltage greater than an input voltage according to a switch state.

The DC link capacitor 120 is an element used for voltage linkage of DC energy, voltage smoothing, and buffering of charge/recharge energy. The DC link capacitor 120 is positioned between the converter 110 and the inverter 130 for efficient power conversion between the converter 110 and the inverter 130. The current flowing into the DC link capacitor 120 is the output current of the converter 110 and the input current of the inverter 130

The detailed structure and operation of the DC link capacitor 120 itself are obvious to those skilled in the art, so a separate description thereof will be omitted.

The inverter 130 may be a DC/AC inverter.

The inverter 130 may output three-phase output currents Ia, Ib, and Ic according to a control signal output from the control unit 150. For example, as the on/off of the switches is controlled according to the control signal output from the control unit 150, the output voltage is determined, and thus the output current can be adjusted. That is, according to the first control signal output from the control unit 150, the first switch _Sap of the inverter 130 is turned on, and the second switch S _an is turned off, so that the output current ( Ia) can be regulated. That is, the switch is selected according to the control signal of the control unit 150 and is operated for a given sampling time, so that the desired output current Ia can be output. At this time, the switches (S _ap, S _an ) connected to the load a may be operated complementarily. Since each pair of switches connected to the load b-phase and c-phase has the same operation as the pair of switches connected to the a-phase, a detailed description thereof will be omitted.

The inverter 130 is an element that converts direct current into alternating current. Since the detailed structure of the inverter 130 itself is obvious to those skilled in the art, further detailed description thereof will be omitted.

The controller 150 serves to control the operation of the converter 110 and the inverter 130. For example, the controller 150 may control the operation of the converter 110 or/and elements in the inverter 130 to adjust the three-phase output currents ia, ib, and ic of the inverter 130.

The control unit 150 measures the voltage and current of the converter 110 and the inverter 130, and uses this to minimize the effective current of the DC link capacitor 120. The switch of the converter 110 and the inverter 130 It can be controlled to adjust the timing.

This will be described in more detail.

)는 인버터측 전류(

)와 컨버터측 전류(

)의 차이에 의해 발생된다. 즉, 다시 정리하면, 인버터측 전류(

)와 컨버터측 전류(

)의 차이가 "0"가 되는 경우 DC 링크 커패시터(120)로 전류가 유입되지 않는다. 1, the current flowing into the DC link capacitor 120 (

) Is the inverter-side current (

) And the converter-side current (

). In other words, again, the inverter-side current (

) And the converter-side current (

When the difference between) becomes “0”, current does not flow into the DC link capacitor 120.

3 shows a current waveform according to the switching of the converter 110 and the inverter 130. Referring to FIG. 3, it can be seen that the switching frequency of the converter 110 is twice that of the inverter 130 in order to synchronize the two currents according to the switching of the converter 110 and the inverter 130.

)을 고려한 컨버터(110)와 인버터(130)의 전류에 대한 수식은 수학식 1 및 수학식 2와 같이 나타낼 수 있다. Switching difference time between the converter 110 and the inverter 130 (

Equations for the current of the converter 110 and the inverter 130 in consideration of) can be expressed as Equations 1 and 2.

는 상위 위상, 중간 위상, 하위 위상의 "off" 타임에서 상부 스위치를 나타내며,

는 단위 스텝 함수를 나타낸다. 또한,

는

의 "on" 타임에서의 하부 스위치를 나타낸다. here,

Denotes the upper switch at the "off" time of the upper phase, middle phase, and lower phase,

Represents the unit step function. Also,

Is

Indicates the lower switch at the "on" time of.

는 수학식 2와 같이 나타낼 수 있다. here,

Can be expressed as in Equation 2.

는 인버터의 스위칭 주기를 나타내며,

는 인버터 캐리어를 나타내며,

는 각 인버터의 상전압(

) 중

전압을 나타낸다. here,

Represents the switching period of the inverter,

Represents the inverter carrier,

Is the phase voltage of each inverter (

) In

Indicates the voltage.

과

은 부스트 컨버터 인덕터 전류의 평균과 리플 전류를 나타낸다. 또한,

와

는

의 "off" 타임과 "on" 타임을 나타내며, 이를 수학식으로 나타내면 수학식 4와 같이 나타낼 수 있다. here,

and

Represents the average and ripple current of the boost converter inductor current. Also,

Wow

Is

It represents the "off" time and the "on" time of, and can be expressed as in Equation 4 when expressed by Equation 4.

는 컨버터 캐리어를 나타내며,

는 실효값이 최소가 되는 동기화 시간을 나타낸다. here,

Represents the converter carrier,

Represents the synchronization time at which the effective value becomes minimum.

The current flowing into the DC link capacitor 120 is a difference in current between the converter 110 and the inverter 130, and may be expressed as in Equation 5.

That is, the current flowing into the DC link capacitor 120 is the difference between the current between the converter 110 and the inverter 130, and expressed as an equation for the RMS current to obtain an effective value, Equation 5 can be expressed as Equation 6 I can.

After substituting Equation 1 and Equation 3 into Equation 5 and developing as a Fourier series, the point at which the effective value is minimum is obtained according to the period in which the carrier voltage rises and falls, it can be expressed as Equations 7 and 12 have.

는 컨버터의 스위칭 주기를 나타낸다. 또한,

는 인버터 캐리어 전압이 상승하는 구간에서의 인버터측 전류의 푸리에 급수의 계수를 나타내며, 수학식 8에 의해 도출될 수 있다. here,

Represents the switching period of the converter. Also,

Denotes the coefficient of the Fourier series of the inverter-side current in the period in which the inverter carrier voltage increases, and can be derived by Equation 8.

는 인버터의 스위칭 주기를 나타내며,

는 각각 인버터측 전압(

) 중 가장 큰 값과 가장 작은 값에 해당하는 상의 인덕터(

) 전류를 나타낸다. 또한,

는 하기 수학식 9 내지 수학식 11과 같이 계산될 수 있다. here,

Represents the switching period of the inverter,

Is the inverter-side voltage (

) Of the phase inductors corresponding to the largest and smallest values (

) Represents the current. Also,

May be calculated as in Equations 9 to 11 below.

는 각 인버터의 상전압(

) 중 가장 큰 전압과 가장 작은 전압을 의미하며,

는 각 계통전압(

) 중 가장 큰 전압과 가장 작은 전압을 각각 의미한다. here,

Is the phase voltage of each inverter (

) Means the largest voltage and the smallest voltage,

Is each grid voltage (

) Means the largest voltage and the smallest voltage, respectively.

는 인버터 캐리어 전압이 하강하는 구간에서의 인버터측 전류의 푸리에 급수의 계수를 나타내며, 수학식 13에 의해 도출될 수 있다.here,

Denotes the coefficient of the Fourier series of the inverter-side current in the period in which the inverter carrier voltage falls, and may be derived by Equation 13.

는 수학식 14를 이용하여 도출될 수 있다.

Can be derived using Equation 14.

That is, in summary, the power conversion device 100 according to an embodiment of the present invention may adjust the switching timing of the converter 110 and the inverter 130 so that the effective current of the DC link capacitor 120 is minimized. .

In an embodiment of the present invention, it is assumed that the switching timing of the inverter 130 is matched with the switching timing of the converter 110, and this is mainly described, but the switching timing of the converter 110 is matched with the switching timing of the inverter 130. It is natural that it can also be adjusted to match.

4 is a block diagram schematically showing the configuration of a power conversion device according to another embodiment of the present invention.

4, a power conversion device 400 according to another embodiment of the present invention includes a first converter 410, a DC link capacitor 420, a second converter 430, a load 440, and a control unit 450. ). In FIG. 4, the first converter 410 and the second converter 430 are shown as one, respectively, but at least one of the first converter 410 and the second converter 430 may be plural.

As shown in FIG. 4, the control unit 450 is a power conversion device 400 having a structure of a plurality of converters 410 and 430. The output current of the first converter 410 and the input current of the second converter 430 are The ripple current of the DC link capacitor may be reduced by adjusting the switching timing of the first converter 410 and the second converter 430 so that the difference is minimized. Since this is the same as described with reference to FIGS. 1 to 3, a duplicate description will be omitted.

5 is a flow chart showing a control method for reducing the DC link capacitor RMS current according to an embodiment of the present invention.

In step 510, the power conversion device 100 calculates the current and voltage of the converter 110 and the inverter 130, respectively. Here, the power conversion device 100 may calculate the output current and voltage of the converter 110 and the input current and voltage of the inverter 130, respectively.

In addition, the power conversion device 100 may calculate the current and voltage of the converter 110 and the inverter 130 according to the on-off operation of individual switches of the converter 110 and the inverter 130, respectively.

In step 515, the power conversion device 100 generates a control signal for determining the switching on-off time of the inverter 130 by using the current and voltage of the converter 110 and the inverter 130.

In step 520, the power conversion device 100 uses the control signal, the current and voltage of the converter 110 and the inverter 130 to minimize the RMS current of the DC link capacitor 120, the converter 110 and the inverter 130. ) To adjust the switching timing.

For example, when the difference between the output current of the converter 110 and the input current of the inverter 130 becomes "0", the RMS current of the DC link capacitor 120 may not be generated. It is very difficult to control the difference between the output current of the converter 110 and the input current of the inverter 130 to be "0" in real-time power control, so that the RMS current of the DC link capacitor 120 is minimized. ) And the switching timing of the inverter 130 can be adjusted.

Since this is the same as already described with reference to FIGS. 1 to 3, a duplicate description will be omitted.

In addition, although FIG. 5 illustrates a method of reducing the DC link capacitor RMS current in the power conversion device of the converter 110 and the three-phase inverter structure, it is natural that the same can be applied to the power conversion device of a plurality of converter structures.

6 is a graph showing a current attenuation rate of a DC link capacitor according to the prior art and an embodiment of the present invention. Referring to FIG. 6, in the conventional case, the current flowing into the DC link capacitor, that is, the effective value proportional to the area based on the zero current is large due to inconsistent synchronization between the inverter-side current and the converter-side current. It can be seen from the results according to the embodiment that the area is reduced. As a result, it can be seen that when the DC link capacitor RMS current reduction method according to an embodiment of the present invention is used, the current flowing into the DC link capacitor is reduced.

The apparatus and method according to an embodiment of the present invention may be implemented in the form of program instructions that can be executed through various computer means and recorded in a computer-readable medium. The computer-readable medium may include program instructions, data files, data structures, and the like alone or in combination. The program instructions recorded on the computer-readable medium may be specially designed and configured for the present invention, or may be known and usable to those skilled in the computer software field. Examples of computer-readable recording media include magnetic media such as hard disks, floppy disks, and magnetic tapes, optical media such as CD-ROMs and DVDs, and magnetic media such as floptical disks. -Includes hardware devices specially configured to store and execute program instructions such as magneto-optical media and ROM, RAM, flash memory, and the like. Examples of the program instructions include not only machine language codes such as those produced by a compiler, but also high-level language codes that can be executed by a computer using an interpreter or the like.

The above-described hardware device may be configured to operate as one or more software modules to perform the operation of the present invention, and vice versa.

So far, the present invention has been looked at around the embodiments. Those of ordinary skill in the art to which the present invention pertains will be able to understand that the present invention can be implemented in a modified form without departing from the essential characteristics of the present invention. Therefore, the disclosed embodiments should be considered from an illustrative point of view rather than a limiting point of view. The scope of the present invention is shown in the claims rather than the foregoing description, and all differences within the scope equivalent thereto should be construed as being included in the present invention.

100: power conversion device
110: converter
120: DC link capacitor
130: inverter
140: load
150: control unit

Claims (10)

Converter;
inverter;
A DC link capacitor positioned between the converter and the inverter; And
And a control unit for adjusting the switching timing of the converter and the inverter so that the difference between the output current of the converter and the input current of the inverter does not occur so that the effective value of the current of the DC link capacitor is minimized,
The control unit,
After calculating the coefficient of the Fourier series of the output current of the converter and the coefficient of the Fourier series of the input current to the inverter according to the on-off operation of each switch of the converter and the inverter, the output current of the converter and the inverter The power conversion device, characterized in that the switching timing of the converter and the inverter is adjusted so that the effective value of the DC link capacitor current according to the relative position of the input current is minimized.
delete delete delete A first converter;
A second converter;
A DC link capacitor positioned between the first converter and the second converter; And
Adjusting the switch timing of the first converter and the second converter so that the difference between the output current of the first converter and the input current of the second converter does not occur so that the effective value of the current of the DC link capacitor is minimized. Including a control unit,
The control unit,
After calculating the coefficient of the Fourier series of the output current of the converter and the coefficient of the Fourier series of the input current to the second converter according to the on-off operation of each switch of the first converter and the second converter, the first Power, characterized in that the switching timing of the first converter and the second converter is adjusted so that the effective value of the current of the DC link capacitor according to the relative position of the output current of the converter and the input current of the second converter is minimized. Conversion device.

delete delete In a power conversion device having a converter, a DC link capacitor, and a three-phase inverter structure, in the method of minimizing the effective value of the current of the DC link capacitor,
(a) calculating a coefficient of the Fourier series of the output current of the converter;
(b) calculating a coefficient of the Fourier series of the input current of the inverter; And
(c) DC including the step of adjusting the switching timing of each switch of the converter and the inverter so that the effective value of the DC link capacitor current according to the relative position of the output current of the converter and the input current of the inverter is minimized. How to minimize the RMS current value of the link capacitor.
In a power conversion apparatus having a structure in which a DC link capacitor is connected between a plurality of converters, in a method for minimizing an effective value of a current of the DC link capacitor,
Calculating a Fourier series of the output current of the first converter;
Calculating a Fourier series of the input current of the second converter; And
Adjusting the switching timing of each switch of the first converter and the second converter so that the effective value of the DC link capacitor current according to the relative position of the output current of the first converter and the input current of the second converter becomes minimum Method for minimizing the current RMS value of the DC link capacitor comprising the step.
A computer-readable recording medium product on which a program code for performing the method according to claim 8 or 9 is recorded.

Images