KR102205988B1 - SAW filter package and a method for manufacturing the same - Google Patents

Abstract

The present invention relates to a SAW filter package and a method of manufacturing the same, and more particularly, to a package substrate; And a SAW filter chip mounted on the package substrate. The package substrate includes: a first ceramic layer and a second ceramic layer sequentially stacked; And a metal line provided on the second ceramic layer and constituting an inductor, and a magnetic permeability of the second ceramic layer is greater than that of the first ceramic layer.

Description

SAW filter package and a method for manufacturing the same TECHNICAL FIELD

The present invention relates to a SAW filter package and a method of manufacturing the same, and more particularly, to a SAW filter package having resistance to electrostatic discharge and a method of manufacturing the same.

A surface acoustic wave filter (hereinafter referred to as “SAW filter”) is a core component for frequency signal processing and is widely used up to the GHz frequency band. In particular, due to the excellent characteristics of the SAW filter, such as mass production, selectivity, and stability, the range of applications for RF mobile communication is expanding. Currently, the size of the SAW filter continues to be miniaturized, and accordingly, it is being produced in a chip size package type (hereinafter referred to as “CSP type”).

Electrostatic discharge (ESD) is a discharge phenomenon caused by static electricity. Semiconductor integrated circuits are very sensitive to electrostatic discharge pulses, and are particularly susceptible to physical damage by high voltages and currents generated by electrostatic discharge pulses. Therefore, there is a need to develop a SAW filter that is resistant to electrostatic discharge.

The problem to be solved by the present invention is to provide a SAW filter package having resistance to electrostatic discharge.

Another problem to be solved by the present invention is to provide a method of manufacturing a SAW filter package having resistance to electrostatic discharge.

According to the concept of the present invention, a SAW filter package includes: a package substrate; And a SAW filter chip mounted on the package substrate. The package substrate includes: a first ceramic layer and a second ceramic layer sequentially stacked; And a metal line provided on the second ceramic layer and constituting an inductor. The permeability of the second ceramic layer may be greater than that of the first ceramic layer.

The SAW filter package according to the present invention can effectively protect the SAW filter chip from electrostatic discharge through an inductor built into the package substrate. Further, in the electrode of the SAW filter chip, since a high-density metal layer is interposed between a plurality of metal layers, the electrode can be prevented from being destroyed by electrostatic discharge.

1 is a perspective view showing a SAW filter package according to an embodiment of the present invention.
FIG. 2 is a cross-sectional view taken along line A-A' of FIG. 1.
3 is an enlarged cross-sectional view of area M of FIG. 2.
FIG. 4 is for explaining a SAW filter package according to another embodiment of the present invention, and is another example of a cross-sectional view taken along line AA′ of FIG. 1.
5 to 10 are perspective views illustrating a method of manufacturing a SAW filter package according to embodiments of the present invention.

In order to fully understand the configuration and effects of the present invention, preferred embodiments of the present invention will be described with reference to the accompanying drawings. However, the present invention is not limited to the embodiments disclosed below, but may be implemented in various forms and various modifications may be made. However, it is provided to complete the disclosure of the present invention through the description of the embodiments, and to completely inform the scope of the invention to those of ordinary skill in the art.

In the present specification, when a component is referred to as being on another component, it means that it may be formed directly on the other component or that a third component may be interposed between them. In addition, in the drawings, the thickness of the components is exaggerated for effective description of the technical content. Parts indicated by the same reference numerals throughout the specification represent the same elements.

Embodiments described herein will be described with reference to cross-sectional views and/or plan views, which are ideal exemplary views of the present invention. In the drawings, the thicknesses of films and regions are exaggerated for effective description of technical content. Accordingly, the regions illustrated in the drawings have schematic properties, and the shapes of the regions illustrated in the drawings are intended to illustrate a specific shape of a device region and are not intended to limit the scope of the invention. In various embodiments of the present specification, terms such as first, second, and third are used to describe various elements, but these elements should not be limited by these terms. These terms are only used to distinguish one component from another component. The embodiments described and illustrated herein also include complementary embodiments thereof.

The terms used in the present specification are for describing exemplary embodiments and are not intended to limit the present invention. In this specification, the singular form also includes the plural form unless specifically stated in the phrase. As used in the specification, "comprises" and/or "comprising" does not exclude the presence or addition of one or more other elements.

1 is a perspective view showing a SAW filter package according to an embodiment of the present invention. FIG. 2 is a cross-sectional view taken along line A-A' of FIG. 1. 3 is an enlarged cross-sectional view of area M of FIG. 2.

1 to 3, a package substrate (PSU) may be provided. The package substrate PSU may include first to fourth ceramic layers CRL1 to CRL4 sequentially stacked. The first to fourth ceramic layers CRL1 to CRL4 may be formed by firing stacked ceramic sheets. The second and third ceramic layers CRL2 and CRL3 may be interposed between the first and fourth ceramic layers CRL1 and CRL4.

The first and fourth ceramic layers CRL1 and CRL4 may include the same material. For example, the first and fourth ceramic layers CRL1 and CRL4 may include a low temperature co-fired ceramic.

The second and third ceramic layers CRL2 and CRL3 may include a material different from that of the first and fourth ceramic layers CRL1 and CRL4. Specifically, magnetic permeability of the second and third ceramic layers CRL2 and CRL3 may be greater than that of the first and fourth ceramic layers CRL1 and CRL4.

The second and third ceramic layers CRL2 and CRL3 may include the same material. The second and third ceramic layers CRL2 and CRL3 may include magnetic ceramic. For example, the second and third ceramic layers CRL2 and CRL3 may include ferrite.

A plurality of vias VI passing through each of the first and fourth ceramic layers CRL1 and CRL4 may be provided. The vias VI may perform vertical electrical connection in the package substrate PSU.

A plurality of metal lines ML1, ML2, ML3 and first pads PD1 may be interposed between the second and third ceramic layers CRL2 and CRL3. For example, the metal lines ML1, ML2, and ML3 may include a first metal line ML1, a second metal line ML2, and a third metal line ML3. The first pad PD1 may be connected to each of the first to third metal lines ML1, ML2, and ML3.

The metal lines ML1, ML2, and ML3 may have various planar shapes. The first metal line ML1 may have a zigzag shape, and the second metal line ML2 and the third metal line ML3 may have a straight line shape.

The first metal line ML1 may constitute an inductor IND. The second and third metal lines ML2 and ML3 may form a wiring for routing in the package substrate PSU. The inductor IND of the first metal line ML1 may protect the SAW filter package from electrostatic discharge (ESD). When an electrostatic discharge pulse having a high voltage and a high current is applied, the inductor IND may buffer the electrostatic discharge pulse.

Second pads PD2 may be provided on the fourth ceramic layer CRL4. For example, the second pad PD2 may be electrically connected to the inductor IND of the first metal line ML1 through the via VI and the first pad PD1. For example, the first terminal of the inductor IND of the first metal line ML1 may be electrically connected to the second pad PD2. The second terminal of the inductor IND of the first metal line ML1 may be connected to the second metal line ML2. The second metal line ML2 may be a ground line.

The SAW filter chip SFC may be mounted on the package substrate PSU. The SAW filter chip SFC may include a substrate SUB. The substrate SUB may be a piezoelectric substrate. The SAW filter chip SFC may further include electrodes IDT, reflectors REF, and third pads PD3 provided on the substrate SUB. The electrodes IDT may include a pair of electrodes in the shape of a comb. The electrodes IDT may be configured to function as a converter. The third pads PD3 may be connected to input terminals and output terminals of the electrodes IDT, respectively.

Referring again to FIG. 3, the electrode IDT may include a plurality of metal layers ME1 to ME4 sequentially stacked. For example, the metal layers ME1-ME4 may include a first metal layer ME1, a second metal layer ME2, a third metal layer ME3, and a fourth metal layer ME4.

The first metal layer ME1 may directly contact the upper surface of the substrate SUB. The first metal layer ME1 may serve as a bonding layer to allow the second to fourth metal layers ME2, ME3, and ME4 to adhere well to the substrate SUB. For example, the first metal layer ME1 may include titanium (Ti).

The second and fourth metal layers ME2 and ME4 may include the same material. The second and fourth metal layers ME2 and ME4 may include a low resistance metal. For example, the second and fourth metal layers ME2 and ME4 may include aluminum (Al).

A third metal layer ME3 may be interposed between the second and fourth metal layers ME2 and ME4. The third metal layer ME3 may include a metal having a higher density than the second and fourth metal layers ME2 and ME4. For example, the third metal layer ME3 may include Cu, Mo, Ag, or Pt.

Since the second and fourth metal layers ME2 and ME4 are made of aluminum (Al), which is a metal having a low density, when an electrostatic discharge pulse is applied to the electrode IDT of the SAW filter chip SFC, the second and fourth metal layers ME2 and ME4 The metal layers ME2 and ME4 can be easily destroyed. When the high-density third metal layer ME3 is interposed between the second and fourth metal layers ME2 and ME4, it is possible to prevent physical destruction of the second and fourth metal layers ME2 and ME4 from the electrostatic discharge pulse. I can.

According to the present embodiment, the SAW filter chip SFC may be mounted on the package substrate PSU in a wire bonding method. The third pads PD3 of the SAW filter chip SFC may be electrically connected to the second pads PD2 of the package substrate PSU, respectively, through the wire WI. In other words, the SAW filter chip SFC may be electrically connected to the inductor IND of the package substrate PSU. The inductor IND may protect the SAW filter chip SFC from electrostatic discharge.

According to embodiments of the present invention, the second and third ceramic layers CRL2 and CRL3 sandwiching the inductor IND may include a magnetic ceramic (eg, ferrite) having a relatively high magnetic permeability. . Accordingly, the inductance of the inductor IND can be increased. As a result, the inductor IND may more effectively protect the SAW filter chip SFC from electrostatic discharge. Further, in the case of the electrode IDT of the SAW filter chip SFC, since the high density third metal layer ME3 is interposed between the second and fourth metal layers ME2 and ME4 of low density, the electrode IDT from electrostatic discharge This can be prevented from being destroyed.

FIG. 4 is for explaining a SAW filter package according to another embodiment of the present invention, and is another example of a cross-sectional view taken along line AA′ of FIG. 1. In the present embodiment, detailed descriptions of technical features overlapping with the SAW filter package described with reference to FIGS. 1 to 3 will be omitted, and differences will be described in detail.

The SAW filter chip SFC may be mounted on the package substrate PSU in a flip chip bonding method. Specifically, the substrate SUB of the SAW filter chip SFC may include a first surface SUBa and a second surface SUBb facing the first surface SUBa. The electrodes IDT, the reflectors REF, and the third pads PD3 may be provided on the first surface SUBa. The SAW filter chip SFC may be mounted on the package substrate PSU such that the first surface SUBa of the substrate SUB faces the package substrate PSU.

Connection terminals SOL may be interposed between the third pads PD3 of the SAW filter chip SFC and the second pads PD2 of the package substrate PSU, respectively. For example, the connection terminals SOL may be solder balls. Through the connection terminals SOL, the SAW filter chip SFC and the package substrate PSU may be electrically connected to each other.

A protective film PF covering the package substrate PSU and the SAW filter chip SFC may be provided. The protective film PF may cover the second surface SUBb of the substrate SUB.

5 to 10 are perspective views illustrating a method of manufacturing a SAW filter package according to embodiments of the present invention.

Referring to FIG. 5, a ceramic sheet CRS may be provided. The ceramic sheet CRS shown in FIG. 5 may include magnetic ceramic (eg, ferrite). By punching the ceramic sheet CRS, a plurality of via holes VIH may be formed.

The vias VI may be formed by filling the via holes VIH with a conductive material. For example, the conductive material may include silver (Ag) paste, and thus the vias VI may include silver (Ag).

Referring to FIG. 6, a plurality of metal lines ML1, ML2 and ML3 and first pads PD1 may be formed on the ceramic sheet CRS on which the vias VI are formed. For example, the metal lines ML1, ML2, and ML3 and the first pads PD1 may be formed by screen printing. The first pads PD1 may be formed to overlap the vias VI, respectively. The first pad PD1 may be connected to each of the metal lines ML1, ML2, and ML3. The first metal line ML1 may be formed to have a zigzag shape. The first metal line ML1 may constitute an inductor IND. One end of the first metal line ML1 may be connected to the first pad PD1, and the other end of the first metal line ML1 may be connected to the second metal line ML2.

Referring to FIG. 7, first to fourth ceramic sheets CRS1 to CRS4 may be prepared by manufacturing a plurality of ceramic sheets CRS described above with reference to FIGS. 5 and 6. The first to fourth ceramic sheets CRS1 to CRS4 may be sequentially stacked so that they may be laminated.

The first and fourth ceramic sheets CRS1 and CRS4 may include a low-temperature co-fired ceramic. The second and third ceramic sheets CRS2 and CRS3 may include magnetic ceramic. The permeability of the second and third ceramic sheets CRS2 and CRS3 may be greater than that of the first and fourth ceramic sheets CRS1 and CRS4.

Referring to FIG. 8, a first shrinkage suppression sheet SIS1 may be attached under the first ceramic sheet CRS1, and a second shrinkage suppression sheet SIS2 may be attached over the fourth ceramic sheet CRS4. . In other words, the first and fourth ceramic sheets CRS1 and CRS4 may be interposed between the first and second shrinkage suppression sheets SIS1 and SIS2.

The first and second shrinkage suppression sheets SIS1 and SIS2 may include a material having a relatively high firing temperature. The first and second shrinkage suppression sheets SIS1 and SIS2 may be higher than the firing temperature of the first and fourth ceramic sheets CRS1 and CRS4. The first and second shrinkage suppressing sheets SIS1 and SIS2 may include a material having a firing temperature higher than 800°C. For example, the first and second shrinkage suppression sheets SIS1 and SIS2 may include aluminum oxide, zirconium oxide, or silicon carbide.

Referring to FIG. 9, by performing a firing process (FIR) on the resultant product of FIG. 8, the first to fourth ceramic sheets CRS1-CRS4 may be fired. The first to fourth ceramic sheets CRS1 to CRS4 may be fired to form first to fourth ceramic layers CRL1 to CRL4, respectively. The first to fourth ceramic layers CRL1 to CRL4 may constitute a package substrate PSU. During the firing process FIR, the first and second shrinkage inhibiting sheets SIS1 and SIS2 may not be fired.

Since the coefficients of thermal expansion of the first and fourth ceramic sheets CRS1 and CRS4 and the coefficients of thermal expansion of the second and third ceramic sheets CRS2 and CRS3 are different from each other, the first to fourth ceramics during the firing process (FIR) The sheets CRS1-CRS4 may be contracted. Meanwhile, according to embodiments of the present invention, the first and second shrinkage suppression sheets SIS1 and SIS2 are not fired during the firing process FIR, and the first to fourth ceramic layers CRL1-CRL4 shrink. It can be prevented from being bent by For example, due to the frictional force between the first shrinkage inhibiting sheet SIS1 and the first ceramic sheet CRS1, the first shrinkage inhibiting sheet SIS1 during the firing process FIR prevents the shrinkage of the first ceramic sheet CRS1. Can be prevented. For example, by the frictional force between the second shrinkage inhibiting sheet SIS2 and the fourth ceramic sheet CRS4, the second shrinkage inhibiting sheet SIS2 during the firing process FIR prevents the shrinkage of the fourth ceramic sheet CRS4. Can be prevented. As a result, according to the embodiments of the present invention, it is possible to prevent the package substrate PSU from bending due to firing of different materials.

Referring to FIG. 10, first and second shrinkage suppression sheets SIS1 and SIS2 on both surfaces of the package substrate PSU may be removed. After removing the first and second shrinkage suppression sheets SIS1 and SIS2, a polishing process may be performed on both surfaces of the package substrate PSU to remove surface residue. Second pads PD2 may be formed on both surfaces of the package substrate PSU.

The SAW filter chip SFC may be mounted on the package substrate PSU. In an embodiment, the SAW filter chip SFC may be mounted in a wire bonding method as shown in FIG. 2. In another embodiment, the SAW filter chip SFC may be mounted in a flip chip bonding method as shown in FIG. 4.

Claims (10)

Package substrate; And
Including a SAW filter chip mounted on the package substrate,
The package substrate is:
A first ceramic layer and a second ceramic layer sequentially stacked; And
It is provided on the second ceramic layer and includes a metal line constituting an inductor,
The permeability of the second ceramic layer is greater than that of the first ceramic layer,
The SAW filter chip includes a substrate and electrodes on the substrate,
Each of the electrodes includes first to fourth metal layers sequentially stacked on the substrate,
The first metal layer includes Ti,
The second and fourth metal layers contain Al,
The third metal layer is interposed between the second and fourth metal layers, and includes Cu, Mo, Ag, or Pt having a higher density than the second and fourth metal layers,
The third metal layer is a SAW filter package that protects the second and fourth metal layers from electrostatic discharge pulses.
delete delete The method of claim 1,
The first ceramic layer comprises a low temperature co-fired ceramic,
The second ceramic layer is a SAW filter package including a magnetic ceramic.
The method of claim 1,
The package substrate is:
A third ceramic layer on the second ceramic layer; And
Further comprising a fourth ceramic layer on the third ceramic layer,
The third ceramic layer includes the same material as the second ceramic layer,
The fourth ceramic layer is a SAW filter package including the same material as the first ceramic layer.
The method of claim 5,
The metal line is a SAW filter package interposed between the second and third ceramic layers.
The method of claim 1,
The package substrate is:
A via passing through the package substrate; And
Further comprising a pad on the package substrate,
The SAW filter chip is a SAW filter package electrically connected to the inductor through the pad and the via.
The method of claim 1,
The inductor is configured to buffer the electrostatic discharge pulse to protect the SAW filter chip from electrostatic discharge.
The method of claim 1,
The SAW filter package is mounted on the package substrate by wire bonding.
The method of claim 1,
The SAW filter chip is mounted on the package substrate by flip chip bonding.

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