KR102023944B1 - Organic luminescence emitted diode device and method for fabricating the same - Google Patents

Abstract

The present invention relates to an organic light emitting display device and a method of manufacturing the same. The disclosed invention provides a display area including a plurality of pixel areas and a substrate having a non-display area defined outside thereof; Forming a switching thin film transistor and a driving thin film transistor in each pixel area on the substrate; Forming a planarization layer on the substrate including the switching thin film transistor and the driving thin film transistor; Forming a first electrode connected to the drain electrode of the driving thin film transistor on the planarization layer; Forming a bank around each pixel region of the substrate including the first electrode and in a non-display region; Forming an organic emission layer on the first electrode of the pixel region; Forming a second electrode on an entire surface of the substrate including the organic light emitting layer; Forming a first passivation film on an entire surface of the substrate including the second electrode; Forming an organic film on the first passivation film; Curing the organic film at least twice; Forming a second passivation film on the organic film and the first passivation film; Forming a protective film facing the substrate; And forming an adhesive to adhere the substrate and the protective film between the substrate and the protective film to form a panel state.

Description

Organic electroluminescent device and its manufacturing method {ORGANIC LUMINESCENCE EMITTED DIODE DEVICE AND METHOD FOR FABRICATING THE SAME}

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an organic luminescence emitting diode device (hereinafter referred to as "OLED"), and more particularly, to an organic electric field that can improve moisture permeability caused in a reliable environment by applying a dual curing treatment method. A light emitting device and a method of manufacturing the same.

One of the flat panel displays (FPD), an organic light emitting display device has high luminance and low operating voltage characteristics. In addition, the self-luminous self-illuminating type provides high contrast ratio, enables ultra-thin display, easy response sphere with a response time of several microseconds (μs), no restriction on viewing angle, and low temperature. It is stable even in the case of driving at low voltage of DC 5-15V, so that the fabrication and design of the driving circuit is easy.

In addition, the manufacturing process of the organic electroluminescent device is very simple because the deposition (deposition) and encapsulation (encapsulation) equipment is all.

The organic light emitting diode having such characteristics is largely divided into a passive matrix type and a matrix type. In the passive matrix method, a scan line and a signal line cross each other to form a device in a matrix form, and each pixel In order to drive, the scanning lines are sequentially driven over time, and in order to represent the required average luminance, the instantaneous luminance must be equal to the average luminance multiplied by the number of lines.

However, in the active matrix method, a thin film transistor (TFT), which is a switching element for turning on / off a pixel area, is positioned for each pixel area, and is connected to the switching thin film transistor and the driving thin film transistor is connected to the driving thin film transistor. It is connected to a power supply wiring and an organic light emitting diode and is formed for each pixel region.

In this case, a first electrode connected to the driving thin film transistor is turned on / off in a pixel area unit, and a second electrode facing the first electrode serves as a common electrode to be interposed between these two electrodes. Together with the organic light emitting layer, the organic light emitting diode is formed.

In the active matrix method having this characteristic, the voltage applied to the pixel region is charged in the storage capacitor Cst, and the power is applied until the next frame signal is applied. Run continuously during the screen.

Therefore, since low luminance, high definition, and large size can be obtained even when a low current is applied, an active matrix type organic light emitting diode is mainly used in recent years.

The basic structure and operation characteristics of the active matrix organic light emitting diode will be described with reference to the accompanying drawings.

1 is a configuration circuit diagram of one pixel area of a general active matrix organic light emitting diode.

Referring to FIG. 1, one pixel area of a general active matrix organic light emitting diode includes a switching thin film transistor STr, a driving thin film transistor DTr, a storage capacitor Cst, and an organic light emitting diode E. .

A gate line GL is formed in a first direction, and is disposed in a second direction crossing the first direction to define a pixel region P together with the gate line GL, and a data line DL is formed. The power line PL is spaced apart from the data line DL to apply a power voltage.

In addition, a switching thin film transistor STr is formed at a portion where the data line DL and the gate wiring GL cross each other, and are electrically connected to the switching thin film transistor STr inside each pixel region P. FIG. The driving thin film transistor DTr is formed.

In this case, the driving thin film transistor DTr is electrically connected to the organic light emitting diode E. That is, the first electrode, which is one terminal of the organic light emitting diode E, is connected to the drain electrode of the driving thin film transistor DTr, and the second electrode, which is the other terminal, is connected to the power line PL. In this case, the power line PL transfers a power supply voltage to the organic light emitting diode E. In addition, a storage capacitor Cst is formed between the gate electrode and the source electrode of the driving thin film transistor DTr.

Therefore, when a signal is applied through the gate line GL, the switching thin film transistor STr is turned on, and the signal of the data line DL is transferred to the gate electrode of the driving thin film transistor DTr to drive the driving signal. Since the thin film transistor DTr is turned on, light is output through the organic light emitting diode E. At this time, when the driving thin film transistor DTr is in an on state, the level of the current flowing from the power supply line PL to the organic light emitting diode E is determined, and thus the organic light emitting diode E is It is possible to implement gray scale.

In addition, the storage capacitor Cst serves to maintain a constant gate voltage of the driving thin film transistor DTr when the switching thin film transistor STr is turned off, thereby turning off the switching thin film transistor STr. Even in the off state, the level of the current flowing through the organic light emitting diode E can be kept constant until the next frame.

On the other hand, Figure 2 is a schematic cross-sectional view showing an organic light emitting device according to the prior art.

2, in the organic light emitting diode according to the related art, the display area AA is defined on the substrate 11, the non-display area NA is defined outside the display area AA. The display area AA includes a plurality of pixel areas P, which are defined as areas captured by a gate wire (not shown) and a data wire (not shown), and are arranged in parallel with the data wires (not shown). Wiring (not shown) is provided.

In each of the plurality of pixel areas P, a switching thin film transistor (not shown) and a driving thin film transistor DTr are formed.

In the organic light emitting diode 10 according to the related art, the substrate 11 on which the driving thin film transistor DTr and the organic light emitting diode E is formed is encapsulated by a protective film (not shown).

Referring to the organic light emitting device 10 according to the related art in detail, as shown in FIG. 2, the display area AA is defined in the substrate 11, and the display area AA is not displayed outside the display area AA. An area NA is defined, and the display area AA includes a plurality of pixel areas P defined as areas captured by a gate line (not shown) and a data line (not shown). The power supply wiring (not shown) is provided in parallel with the data wiring (not shown).

Here, a plurality of driving circuit lines GIP, ground lines GND, and the like are formed on the substrate 11 of the non-display area NA.

Although not shown in the drawing, the driving thin film transistor DTr is formed on a semiconductor layer, a gate insulating film, a gate electrode formed on the gate insulating film on the semiconductor layer, and an interlayer insulating film formed on the gate insulating film including the gate electrode. And a source electrode and a drain electrode formed to be spaced apart from each other.

Meanwhile, an interlayer insulating layer 13 and an organic planarization layer having a drain contact hole (not shown) that expose a drain electrode of the driving thin film transistor DTr and the switching thin film transistor DTr. (15) is laminated.

In addition, the organic planarization layer 15 is contacted through a drain electrode (not shown) and the drain contact hole (not shown) of the driving thin film transistor DTr, and separated in each pixel area P. The first electrode 19 which is an anode is formed.

A bank 21 is formed on the first electrode 19 to separate the pixel regions P. In this case, the bank 21 is disposed between adjacent pixel regions P. In addition, the bank 21 is formed not only between adjacent pixel regions P, but a part 21 of the bank 21 is also formed in the outer portion of the panel, that is, the non-display region NA.

On the first electrode 19 in each pixel region P surrounded by the bank 21, an organic emission layer 23 formed of an organic emission pattern (not shown) that emits red, green, and blue colors is formed. .

In addition, a second electrode 25, which is a cathode, is formed on the entire surface of the display area AA and the non-display area NA on the organic emission layer 23 and the bank 21. In this case, the organic light emitting layer 23 interposed between the first electrode 19 and the second electrode 25 and the two electrodes 19 and 25 forms an organic light emitting diode (E).

The manufacturing process of the first passivation film, the polymer film, and the second passivation film for preventing moisture permeation after fabricating the organic light emitting diode device according to the prior art will be described with reference to FIG. 3.

3 is a flowchart illustrating a manufacturing process of a moisture permeation prevention first passivation film, a polymer film, and a second passivation film after fabrication of the organic light emitting diode device according to the related art.

Referring to FIG. 3, after fabricating the organic light emitting diode device according to the related art in the first step 51, the substrate is formed on the entire surface of the substrate including the organic light emitting diode device E as the second step 52. 1 passivation film 27 is deposited. In this case, the first passivation film 27 is formed of a silicon nitride film (SiNx) as an insulating film for preventing moisture permeation.

Next, in a third step 53, a polymer film 29 made of a polymer organic material is coated on the first passivation film 27 to compensate for the step difference of the foreign matter. At this time, the polymer film 29 is applied by a screen printing method.

Subsequently, as a fourth step 54, a second passivation film 31 is further formed to block the penetration of moisture (H ₂ O) on the polymer film 29.

Next, as a fifth step 55, a barrier film 35 for preventing encapsulation and upper moisture permeation of the organic light emitting diode E on the entire surface of the substrate including the second passivation layer 31. The pressure sensitive adhesive (hereinafter referred to as PSA) 33 is formed between the substrate 11 and the protective film 35 without an air layer. Intersect completely. In this case, the second passivation film 31, the adhesive 33, and the protective film 35 form a face seal structure.

Thus, the substrate 11 and the protective film 33 are fixed by the adhesive 35 to form a panel, thereby forming an organic light emitting diode according to the related art.

However, according to the organic light emitting device according to the related art, in the face seal structure, multi-passivation is performed by stacking the first passivation film / polymer film / second passivation film to block moisture from the outside. The polymer film, which has a function of compensating for the step difference caused by the foreign material, is applied by printing method and then thermally cured in vacuum or normal pressure, in which the temperature of the polymer film or the temperature in the thermal curing chamber is uniform. Failure to match will result in different levels of cure of the polymer film and may leave uncured portions. In particular, it is necessary to ensure the uniformity of the heater (heater) of the chamber and the curing temperature margin of the material. That is, due to the temperature nonuniformity in the chamber, the temperature applied to the cell is different for each position in the substrate. In particular, in the case of the outer cell, since a lower temperature is applied to the target temperature, a problem of hardening occurs.

This uncured polymer film portion is more likely to cause cracks, and a haze phenomenon in which the polymer surface is wrinkled due to plasma damage during a second CVD deposition process, for example, a second passivation film deposition process. Appears.

Figure 4 is a micrograph showing that cracks occur in the passivation film portion of the organic light emitting device according to the prior art.

Referring to FIG. 4, one of the factors causing moisture permeation in terms of reliability of the current face seal is a multi passivation crack, and the haze defect is likely to cause such a multi passivation film crack. The uniformity of the optical properties of the panel is also poor.

Accordingly, the present invention is to solve the problems of the prior art, an object of the present invention by applying two curing treatment methods to a single organic film, an organic light emitting device that can improve the poor moisture permeation generated in a reliable environment and its manufacture In providing a method.

According to an aspect of the present invention, there is provided an organic light emitting display device including: a display area including a plurality of pixel areas and a non-display area defined outside thereof; A switching thin film transistor and a driving thin film transistor formed in each pixel area on the substrate; A planarization film formed on a substrate including the switching thin film transistor and a driving thin film transistor; A first electrode formed on the planarization layer and connected to the drain electrode of the driving thin film transistor; Banks formed around and in a non-display area of each pixel area of the substrate including the first electrode; An organic emission layer formed on each of the pixel areas above the first electrode; A second electrode formed on an entire surface of the substrate including the organic light emitting layer; A first passivation film formed on an entire surface of the substrate including the second electrode; An organic film formed on the first passivation film and cured twice; A second passivation film formed on the second hardened organic film and the first passivation film; A protective film facing the substrate; And an adhesive interposed between the substrate and the protective film to form a panel state by adhering the substrate and the protective film.

According to an aspect of the present invention, there is provided a method of manufacturing an organic light emitting display device, including: providing a display area including a plurality of pixel areas and a substrate having a non-display area defined outside thereof; Forming a switching thin film transistor and a driving thin film transistor in each pixel area on the substrate; Forming a planarization layer on the substrate including the switching thin film transistor and the driving thin film transistor; Forming a first electrode connected to the drain electrode of the driving thin film transistor on the planarization layer; Forming a bank around each pixel region of the substrate including the first electrode; Forming an organic emission layer on the first electrode of the pixel region; Forming a second electrode on an entire surface of the substrate including the organic light emitting layer; Forming a first passivation film on an entire surface of the substrate including the second electrode; Forming an organic film on the first passivation film; Dividing the organic film into at least a primary and a secondary and performing curing treatment twice; Forming a second passivation film on the organic film and the first passivation film; Forming a protective film facing the substrate; Forming an adhesive to form a panel state by adhering the substrate and the protective film between the substrate and the protective film; characterized in that it comprises a.

According to the organic light emitting diode according to the present invention and a method for manufacturing the same, after fabricating the organic light emitting diode, the first passivation film for preventing moisture permeation is formed and the polymer film formed thereafter is subjected to at least two curing processes, for example, primary thermosetting. A stable polymer film can be formed by performing a secondary heat curing treatment after the UV curing treatment or the first heat curing treatment after the treatment.

In addition, according to the organic light emitting device according to the present invention and a method for manufacturing the same, after fabricating the organic light emitting diode to form a moisture-proof first passivation film and the polymer film formed thereafter at least two times of curing treatment process, for example, primary UV curing treatment after the heat curing treatment or secondary heat curing treatment after the first heat curing treatment, thereby causing multi-passivation that affects the wrinkle defects caused by the uncured polymer film, that is, the haze and the moisture permeability of the product. Cracking of the film can be prevented.

1 is a configuration circuit diagram of one pixel area of a general active matrix organic light emitting diode.
2 is a schematic cross-sectional view of an organic light emitting device according to the prior art.
3 is a flowchart illustrating a manufacturing process of a moisture permeation prevention first passivation film, a polymer film, and a second passivation film after fabrication of the organic light emitting diode device according to the related art.
Figure 4 is a micrograph showing that cracks occur in the passivation film portion of the organic light emitting device according to the prior art.
5 is a schematic plan view of an organic light emitting diode according to the present invention.
FIG. 6 is a cross-sectional view taken along line VI-VI of FIG. 5 and is a schematic cross-sectional view of an organic light emitting diode according to the present invention.
7 is a flowchart illustrating a manufacturing process of a moisture permeation prevention first passivation film, a polymer film, and a second passivation film after fabrication of the organic light emitting diode device according to the present invention.
8A to 8K are cross-sectional views illustrating a process of manufacturing an organic light emitting diode according to the present invention.

Hereinafter, an organic light emitting diode according to a preferred embodiment of the present invention will be described in detail with reference to the accompanying drawings.

The organic light emitting device according to the present invention is divided into a top emission type and a bottom emission type according to the transmission direction of the emitted light. Hereinafter, the top emission method will be described as an example. would.

5 is a schematic plan view of an organic light emitting diode according to the present invention.

FIG. 6 is a cross-sectional view taken along line VI-VI of FIG. 5 and is a schematic cross-sectional view of an organic light emitting diode according to the present invention.

5 and 6, in the organic light emitting device 100 according to the present invention, a substrate 101 on which a driving thin film transistor DTr and an organic light emitting device E is formed is encapsulated by a protective film 135. (encapsulation).

5 and 6, a substrate in which a display area AA including a plurality of pixel areas P and a non-display area NA are defined outside the organic light emitting device 100 according to the present invention. 101; A switching thin film transistor (not shown) and a driving thin film transistor DTr formed in each pixel area P on the substrate 101; A planarization layer 113 formed on the substrate 101 including the switching thin film transistor and the driving thin film transistor DTr, and having a water blocking unit 115b in the non-display area NA of the substrate; A first electrode 117 formed on the planarization film 113 and connected to the drain electrode 111 of the driving thin film transistor DTr; A bank 123 formed around each pixel region P of the substrate including the first electrode 117 and in the non-display region NA; An organic emission layer 125 formed on each of the pixel areas P on the first electrode 117; A second electrode 127 formed on an entire surface of the substrate including the organic light emitting layer 125; A first passivation film 129 formed on the entire surface of the substrate including the second electrode 127; An organic film 131 formed on the first passivation film 129 and cured twice; A second passivation layer 133 formed on the organic layer 131 and the first passivation layer 129; A protective film 137 positioned facing the substrate; And an adhesive 135 interposed between the substrate 101 and the protective film 137 to adhere the substrate 101 and the protective film 137 to form a panel state.

Referring to the organic light emitting device 100 according to the present invention in detail, as shown in FIGS. 5 and 6, the display area AA is defined in the substrate 101, and the display area AA is located outside the display area AA. A non-display area NA is defined, and the display area AA includes a plurality of pixel areas P defined as areas captured by a gate line (not shown) and a data line (not shown). A power supply wiring (not shown) is provided in parallel with the data wiring (not shown).

Here, a glass substrate or a flexible substrate may be used as the substrate 101. A flexible substrate may be used to maintain display performance even when a flexible organic light emitting diode (OLED) is bent like a paper. It is made of a flexible glass substrate or plastic material having a.

In addition, a buffer layer (not shown) made of an insulating material such as silicon oxide (SiO ₂ ) or silicon nitride (SiNx) is formed on the substrate 101. At this time, the reason why the buffer layer (not shown) is formed below the semiconductor layer 103 formed in a subsequent process is due to the release of alkali ions emitted from the inside of the substrate 101 during crystallization of the semiconductor layer 103. This is to prevent deterioration of the characteristics of the semiconductor layer 103.

In addition, each pixel area P in the display area AA above the buffer layer (not shown) is made of pure polysilicon corresponding to the driving area (not shown) and the switching area (not shown), respectively. The semiconductor layer 103 includes a first region 103a constituting a channel and second regions 103b and 103c doped with a high concentration of impurities on both sides of the first region 103a.

A gate insulating layer 105 is formed on a buffer layer (not shown) including the semiconductor layer 103, and the gate insulating layer 105 is disposed on the gate insulating layer 105 in the driving region (not shown) and the switching region (not shown). The gate electrode 107 is formed corresponding to the first region 103a of the semiconductor layer 103.

In addition, the gate insulating layer 105 is connected to the gate electrode 107 formed in the switching region (not shown) and extends in one direction to form a gate wiring (not shown). In this case, the gate electrode 107 and the gate wiring (not shown) is a first metal material having low resistance, for example, aluminum (Al), aluminum alloy (AlNd), copper (Cu), copper alloy, molybdenum ( Mo) may be made of any one of the molybdenum (MoTi) may have a single layer structure, or may be made of two or more of the first metal material to have a double layer or triple layer structure. In the drawing, the gate electrode 107 and the gate wiring (not shown) are illustrated as one example. In addition, when the gate electrode 107 is formed, a gate driving circuit wiring (GIP) 107a and a ground wiring (GND) 107b are formed in the non-display area NA of the substrate 101.

Meanwhile, an interlayer insulating layer made of an insulating material, for example, silicon oxide (SiO ₂ ) or silicon nitride (SiNx), which is an inorganic insulating material on the entire display area of the substrate including the gate electrode 107 and the gate wiring (not shown). 109 is formed. In this case, a semiconductor exposing each of the second regions 103b and 103c positioned on both sides of the first region 103a of each semiconductor layer 103 in the interlayer insulating layer 109 and the gate insulating layer 105 under the interlayer insulating layer 109. A layer contact hole (not shown) is provided.

An upper portion of the interlayer insulating layer 109 including the semiconductor layer contact hole (not shown) intersects with the gate wiring (not shown), defines the pixel region P, and defines a second metal material, for example, aluminum ( Al), aluminum alloy (AlNd), copper (Cu), copper alloy, molybdenum (Mo), molybdenum (MoTi), chromium (Cr), titanium (Ti) or a data wiring made of one or more materials (not shown) ) And a power supply wiring (not shown) are formed apart from each other. In this case, the power line (not shown) may be formed in parallel with the gate line (not shown) on the layer on which the gate line (not shown) is formed, that is, the gate insulating layer 105.

As shown in FIG. 6, each of the driving regions (not shown) and the switching regions (not shown) on the interlayer insulating layer 109 are spaced apart from each other and exposed through the semiconductor layer contact hole (not shown). The source electrode 111a and the drain electrode 111b are formed in contact with the 103b and 103c and made of the same second metal material as the data line (not shown). In this case, the source electrode 111a formed to be spaced apart from the semiconductor layer 103, the gate insulating layer 105, the gate electrode 107, and the interlayer insulating layer 109 sequentially stacked in the driving region (not shown), and The drain electrode 111b forms a driving thin film transistor DTr.

In the drawings, the data wiring (not shown), the source electrode 111a, and the drain electrode 111b all have a single layer structure. However, these components may form a double layer or triple layer structure. have.

In this case, although not shown in the drawing, a switching thin film transistor (not shown) having the same stacked structure as the driving thin film transistor DTr is also formed in the switching region (not shown). In this case, the switching thin film transistor (not shown) is electrically connected to the driving thin film transistor DTr, the gate line (not shown), and the data line (not shown). That is, the gate line (not shown) and the data line (not shown) are respectively connected to the gate electrode (not shown) and the source electrode (not shown) of the switching thin film transistor (not shown), the switching thin film transistor ( The drain electrode of the driving thin film transistor DTr is electrically connected to the gate electrode 107 of the driving thin film transistor DTr.

Meanwhile, although the driving thin film transistor DTr and the switching thin film transistor (not shown) have a semiconductor layer 103 of polysilicon and are configured as a top gate type, the driving switching thin film transistor is shown as an example. The DTr and the switching thin film transistor (not shown) may also be configured as a bottom gate type having a semiconductor layer of amorphous silicon.

When the driving thin film transistor DTr and the switching thin film transistor (not shown) have a bottom gate type, the stacked structure is spaced apart from the active layer of the gate electrode / gate insulating film / pure amorphous silicon and is an ohmic contact of impurity amorphous silicon. And a source electrode and a drain electrode spaced apart from each other and / or spaced apart from each other. In this case, the gate line is formed to be connected to the gate electrode of the switching thin film transistor on the layer where the gate electrode is formed, and the data line is formed to be connected to the source electrode on the layer where the source electrode of the switching thin film transistor is formed.

Meanwhile, a planarization layer 113 having a drain contact hole (not shown) exposing the drain electrode 111b of the driving thin film transistor DTr is disposed on the driving thin film transistor DTr and the switching thin film transistor DTnot. Formed. In this case, the planarization layer 113 may include an insulating material, for example, an inorganic insulating material including silicon oxide (SiO ₂ ) and silicon nitride (SiNx), or an organic group including photo-acyl. Use any one of the insulating materials. In the present invention, a case where the planarization film 113 is formed using an organic insulating material will be described as an example.

In addition, the planarization film 113 corresponding to the display area of the substrate 101 has a drain contact hole 115a for electrically contacting the drain electrode 111b with the first electrode 117 formed in a subsequent process. Formed.

The first electrode is formed on the planarization layer 113 to contact the drain electrode 111b of the driving thin film transistor DTr through the drain contact hole (not shown), and has a shape separated from each pixel area P. 117 is formed. In this case, the auxiliary electrode pattern 119 is formed on the planarization layer 113 of the non-display area NA to lower the resistance of the second electrode 127, which is a cathode electrode formed in a subsequent process. This is because the second electrode 127 is formed of a transparent conductive material, which may be a problem in uniformly applying a constant current because the resistance value is large, so that the auxiliary value of the second electrode 127 may be lowered. By forming the electrode pattern 119 and electrically connecting the second electrode 127, the resistance of the second electrode 127 can be lowered. In this case, the auxiliary electrode pattern 119 is electrically connected to the second electrode 127 and the ground wiring 107b. In this case, the auxiliary electrode pattern 119 is electrically connected to the ground wiring 107b through a ground wiring contact hole (not shown, see 115b of FIG. 8C).

In addition, in order to induce out gassing of the planarization film 113 that causes degradation of the organic material in the light emitting area, the auxiliary electrode pattern 119 positioned outside the display area AA is previously described. An anode hole (not shown, see 121 in FIG. 8D) is formed in the hole.

Above the first electrode 117, an insulating material may be formed on the boundary of each pixel area P and the non-display area NA, for example, bensocyclobutene (BCB), polyimide, or photoacryl ( A bank 123 made of photo acryl is formed. In this case, the bank 123 is formed to overlap the edge of the first electrode 117 to surround each pixel area P, and the display area AA as a whole has a grid shape having a plurality of openings. It is coming true. The bank 123 is also formed in the non-display area NA, which is an outer portion of the panel.

On the other hand, an organic emission layer 125 formed of an organic emission pattern (not shown) emitting red, green, and blue light is formed on the first electrode 117 in each pixel region P surrounded by the bank 123. It is. The organic light emitting layer 125 may be composed of a single layer made of an organic light emitting material or, although not shown in the drawing, in order to increase light emission efficiency, a hole injection layer, a hole transporting layer, and a light emitting material layer (emitting material layer), an electron transporting layer (electron transporting layer) and an electron injection layer (electron injection layer) may be composed of multiple layers.

In addition, a second electrode 127 is formed in the display area AA of the substrate including the organic emission layer 125 and the bank 123. In this case, the organic light emitting layer 125 interposed between the first electrode 117 and the second electrode 127 and the two electrodes 117 and 127 forms an organic light emitting diode (E). The second electrode 127 is electrically connected to the auxiliary electrode pattern 119.

Accordingly, when a predetermined voltage is applied to the first electrode 117 and the second electrode 127 according to the selected color signal, the organic light emitting diode E may have holes and second holes injected from the first electrode 117. Electrons provided from the electrode 127 are transported to the organic light emitting layer 125 to form excitons, and when such excitons transition from the excited state to the ground state, light is generated and emitted in the form of visible light. In this case, since the emitted light passes through the transparent second electrode 127 to the outside, the organic light emitting diode 100 implements an arbitrary image.

On the other hand, a first passivation film 129 made of an insulating material, in particular an inorganic insulating material, silicon oxide (SiO ₂ ) or silicon nitride (SiNx) is formed on the entire surface of the substrate including the second electrode 127. In this case, since the penetration of moisture into the organic light emitting layer 125 cannot be completely suppressed by the second electrode 127 alone, the organic light emitting layer is formed by forming the first passivation layer 129 on the second electrode 127. It is possible to completely suppress the water penetration into the 125.

In addition, an organic layer 131 formed of a polymer organic material such as a polymer is formed on the first passivation layer 129. In this case, the polymer thin film constituting the organic layer 131 may be an olefin-based polymer (polyethylene, polypropylene), polyethylene terephthalate (PET), epoxy resin, fluoro resin, polysiloxane, or the like. This can be used. In addition, the organic film 131 is at least double cured, wherein a primary curing treatment is a thermal curing treatment, and a secondary curing treatment means a UV curing treatment. However, the dual curing treatment may be regarded as including different curing treatments, for example, thermal curing treatment and UV curing treatment or both.

In addition, an insulating material, for example, an inorganic insulating material, to block moisture from penetrating through the organic film 131 on the front surface of the substrate including the dual curing organic film 131 and the first passivation film 129. A second passivation film 133 made of phosphorus silicon oxide (SiO ₂ ) or silicon nitride (SiNx) is further formed.

A protective film 137 is disposed on the front surface of the substrate including the second passivation layer 133 so as to encapsulate the organic light emitting diode E, between the substrate 101 and the protective film 137. The adhesive 135 formed of any one of a frit, an organic insulating material, and a polymer material having transparent and adhesive properties is interposed in close contact with the substrate 101 and the barrier film 137 without an air layer. have. At this time, in the present invention, the pressure sensitive adhesive 135 is described as an example of using a PSA (Press Sensitive Adhesive).

As described above, the substrate 101 and the barrier film 137 are fixed by the adhesive 135 to form a panel, thereby forming the organic light emitting diode 100 according to the present invention.

Meanwhile, a manufacturing process of the first passivation film, the polymer film, and the second passivation film for preventing moisture permeation after fabricating the organic light emitting diode device according to the present invention will be described with reference to FIG. 7.

7 is a flowchart illustrating a manufacturing process of a moisture permeation prevention first passivation film, a polymer film, and a second passivation film after fabrication of the organic light emitting diode device according to the present invention.

6 and 7, after fabricating the organic light emitting diode device E according to the present invention on the substrate 101 in the first step 151, the organic light emitting diode as the second step 152. A process of depositing the first passivation film 129 on the entire surface of the substrate 101 including the device E is performed. In this case, the first passivation film 129 is formed of a silicon nitride film (SiNx) as an insulating film for preventing moisture permeation.

Next, as a third step 153, a process of applying an organic film 131 made of a polymer organic material such as a polymer on the first passivation film 129 to compensate for the step difference of the foreign matter is performed. do. In this case, the organic layer 131 is applied by screen printing.

Subsequently, as a fourth step 154, a process of first curing the organic layer 131 for 10 to 60 minutes at a temperature of about 50 to 100 ° C. by a thermosetting method is performed. In this case, a UV curing method may be used instead of the thermal curing method.

Next, as a fifth step 155, the first step of curing the organic film 131 is cured by a second heat curing method or UV curing method. The secondary heat curing treatment is carried out for about 10 to 60 minutes at about 50 to 150 ℃ temperature. At this time, the UV curing treatment is carried out within the range of 50W to 500W.

Subsequently, as a sixth step 156, a second passivation film 133 is further formed to block penetration of moisture (H ₂ O) onto the organic film 131 that has been hardened twice. Carry out the process.

Next, as a seventh step 157, a barrier film 137 on the front surface of the substrate including the second passivation layer 131 to prevent encapsulation of the organic light emitting diode E and upper moisture permeation. The pressure sensitive adhesive (hereinafter referred to as PSA) 135 is disposed between the substrate 101 and the protective film 137 without an air layer. Intersect completely. In this case, the second passivation film 133, the adhesive 135, and the protective film 137 form a face seal structure.

Meanwhile, a method of manufacturing an organic light emitting diode according to the present invention will be described with reference to FIGS. 8A to 8K.

8A to 8K are cross-sectional views schematically illustrating a method of manufacturing an organic light emitting diode according to the present invention.

As shown in FIG. 8A, a substrate 101 having a display area AA and a non-display area NA defined outside the display area AA is prepared. In this case, the substrate 101 may be a glass substrate or a flexible substrate. The flexible substrate may be flexible to maintain display performance even when the flexible organic light emitting diode (OLED) is bent like paper. It is made of flexible glass substrate or plastic material.

Next, a buffer layer (not shown) made of an insulating material, for example, silicon oxide (SiO ₂ ) or silicon nitride (SiNx), which is an inorganic insulating material, is formed on the substrate 101. At this time, the reason why the buffer layer (not shown) is formed below the semiconductor layer 103 formed in a subsequent process is due to the release of alkali ions emitted from the inside of the substrate 101 during crystallization of the semiconductor layer 103. This is to prevent deterioration of the characteristics of the semiconductor layer 103.

Subsequently, each of the pixel areas P in the display area AA on the buffer layer (not shown) is made of pure polysilicon corresponding to the driving area (not shown) and the switching area (not shown), respectively. The semiconductor layer 103 includes a first region 103a constituting a channel and second regions 103b and 103c doped with a high concentration of impurities on both sides of the first region 103a.

Next, a gate insulating film 105 is formed on the buffer layer including the semiconductor layer 103, and each of the semiconductors is formed in the driving region (not shown) and the switching region (not shown) on the gate insulating film 105. The gate electrode 107 is formed corresponding to the first region 103a of the layer 103.

In addition, the gate insulating layer 105 is connected to the gate electrode 107 formed in the switching region (not shown) and extends in one direction to form a gate wiring (not shown). In this case, the gate electrode 107 and the gate wiring (not shown) is a first metal material having low resistance, for example, aluminum (Al), aluminum alloy (AlNd), copper (Cu), copper alloy, molybdenum ( Mo) may be made of any one of the molybdenum (MoTi) may have a single layer structure, or may be made of two or more of the first metal material to have a double layer or triple layer structure. In the drawing, the gate electrode 107 and the gate wiring (not shown) are illustrated as one example. In addition, when the gate electrode 107 is formed, a gate driving circuit wiring (GIP) 107a and a ground wiring (GND) 107b are simultaneously formed in the non-display area NA of the substrate 101.

Next, an insulating material 109 made of an insulating material, for example, silicon oxide (SiO ₂ ) or silicon nitride (SiNx), which is an inorganic insulating material, is formed on the entire surface of the substrate including the gate electrode 107 and the gate wiring (not shown). Form.

Subsequently, the insulating layer 109 and the gate insulating layer 105 below are selectively patterned to expose each of the second regions 103b and 103c located on both sides of the first region 103a of each semiconductor layer. A semiconductor layer contact hole (not shown) is formed.

Next, although not shown in the figure, a metal material crossing the gate wiring (not shown) on the interlayer insulating layer 109 including the semiconductor layer contact hole (not shown) and defining the pixel region P. Form a layer (not shown). In this case, the metal material layer (not shown) is aluminum (Al), aluminum alloy (AlNd), copper (Cu), copper alloy, molybdenum (Mo), molybdenum (MoTi), chromium (Cr), titanium (Ti) As one or more than two materials.

Subsequently, the metal material layer (not shown) is selectively patterned to intersect with the gate wiring (not shown), and the data wiring (not shown) and the data driving circuit wiring (not shown) defining the pixel area P are formed. And, apart from this to form a power wiring (not shown). In this case, the power line (not shown) may be formed in parallel with the gate line (not shown) on the layer where the gate line (not shown) is formed, that is, the gate insulating layer.

When the data line is formed, the insulating layer 109 is spaced apart from each other in the driving region (not shown) and the switching region (not shown) and exposed through the semiconductor layer contact hole (not shown). Contacting the second regions 103b and 103c to form a source electrode 111a and a drain electrode 111b made of the same metal material as that of the data line (not shown). In this case, the source electrode 111a formed to be spaced apart from the semiconductor layer 103, the gate insulating layer 105, the gate electrode 107, and the interlayer insulating layer 109 sequentially stacked in the driving region (not shown), and The drain electrode 111b forms a driving thin film transistor DTr.

In the drawings, the data wiring (not shown), the source electrode 111a, and the drain electrode 111b all have a single layer structure. However, these components may form a double layer or triple layer structure. have.

In this case, although not shown in the drawing, a switching thin film transistor (not shown) having the same stacked structure as the driving thin film transistor DTr is also formed in the switching region (not shown). In this case, the switching thin film transistor (not shown) is electrically connected to the driving thin film transistor DTr, the gate line (not shown), and the data line 113. That is, the gate line (not shown) and the data line (not shown) are respectively connected to the gate electrode (not shown) and the source electrode (not shown) of the switching thin film transistor (not shown), the switching thin film transistor ( The drain electrode of the driving thin film transistor DTr is electrically connected to the gate electrode 107 of the driving thin film transistor DTr.

Meanwhile, although the driving thin film transistor DTr and the switching thin film transistor (not shown) have a semiconductor layer 103 of polysilicon and are configured as a top gate type, the driving switching thin film transistor is shown as an example. It is apparent that the DTr and the switching thin film transistor (not shown) may be configured as a bottom gate type having a semiconductor layer of amorphous silicon.

When the driving thin film transistor DTr and the switching thin film transistor (not shown) have a bottom gate type, the stacked structure is spaced apart from the active layer of the gate electrode / gate insulating film / pure amorphous silicon and is an ohmic contact of impurity amorphous silicon. The semiconductor layer is composed of a layer and a source electrode and a drain electrode spaced apart from each other. In this case, the gate line is formed to be connected to the gate electrode of the switching thin film transistor on the layer where the gate electrode is formed, and the data line is formed to be connected to the source electrode on the layer where the source electrode of the switching thin film transistor is formed.

Next, as shown in FIG. 8B, the drain contact hole 115a exposing the drain electrode 111b of the driving thin film transistor DTr on the driving thin film transistor DTr and the switching thin film transistor DT (not shown). A planarization film 113 having a film is formed. In this case, the planarization layer 113 may include an insulating material, for example, an inorganic insulating material including silicon oxide (SiO ₂ ) and silicon nitride (SiNx), or an organic group including photo-acyl. Use any one of the insulating materials. In the present invention, a case where the planarization film 113 is formed using an organic insulating material will be described as an example.

Subsequently, as shown in FIG. 8C, the planarization film 113 is selectively patterned after the exposure and development processes to form the planarization film 113 corresponding to the display area of the substrate 101 in a subsequent process. The first electrode 117 to form a drain contact hole 115a for electrically contacting the drain electrode 111b. At this time, when the drain contact hole 115a is formed, a ground wiring contact hole 115b exposing the ground wiring 107b is also formed.

Next, as shown in FIG. 8D, a metal material layer (not shown) is deposited on the entire surface of the substrate including the planarization film 113, and then the metal material layer is selectively patterned to form the planarization film 113. Is in contact with the drain electrode 111b of the driving thin film transistor DTr through the drain contact hole 115a and forms a first electrode 117 having a separate shape for each pixel region P. Referring to FIG. In this case, the auxiliary electrode pattern 119 is simultaneously formed on the planarization layer 113 of the non-display area NA to reduce the resistance of the second electrode 127 which is a cathode electrode formed in a subsequent process. This is because the second electrode 127 is formed of a transparent conductive material, which may be a problem in uniformly applying a constant current because the resistance value is large, and thus, it is necessary to reduce the resistance of the second electrode 127. By forming the electrode pattern 119 and electrically connecting the second electrode 127, the resistance of the second electrode 127 can be lowered. In this case, the auxiliary electrode pattern 119 is electrically connected to the second electrode 127 and the ground wiring 107b. In this case, the auxiliary electrode pattern 119 is electrically connected to the ground wiring 107b through the ground wiring contact hole 115b. In this case, the metal material layer (not shown) is aluminum (Al), aluminum alloy (AlNd), copper (Cu), copper alloy, molybdenum (Mo), molybdenum (MoTi), chromium (Cr), titanium (Ti) As one or more than two materials.

In addition, together with the auxiliary electrode pattern 119 at the time of forming the first electrode 117, out gassing of the planarization film 113 causing degradation of organic matter in the emission region is induced in advance. In order to do so, anode holes 121 are simultaneously formed in the auxiliary electrode pattern 119 positioned outside the display area AA.

Subsequently, as shown in FIG. 8E, an insulating material, for example, bensocyclobutene (BCB), polyimide, is formed on the boundary of each pixel region P and the non-display region NA above the first electrode 117. A bank 123 made of poly-imide or photo acryl is formed. In this case, the bank 123 is formed to overlap the edge of the first electrode 117 to surround each pixel area P, and has a lattice shape having a plurality of openings as a whole of the display area AA. It is coming true. The bank 123 is also formed in the non-display area NA, which is an outer portion of the panel.

Next, as illustrated in FIG. 8F, an organic light emitting pattern (not shown) that emits red, green, and blue light on the first electrode 117 in each pixel area P surrounded by the bank 123, respectively. An organic light emitting layer 125 is formed. The organic light emitting layer 125 may be composed of a single layer made of an organic light emitting material or, although not shown in the drawing, in order to increase light emission efficiency, a hole injection layer, a hole transporting layer, and a light emitting material layer (emitting material layer), an electron transporting layer (electron transporting layer) and an electron injection layer (electron injection layer) may be composed of multiple layers.

Subsequently, a transparent conductive material layer (not shown) made of any one of transparent conductive materials including, for example, ITO and IZO is deposited on the entire surface of the substrate including the organic light emitting layer 125 and the bank 123, and then selectively The second electrode 127 is formed in the display area AA of the substrate including the organic emission layer 125 and the bank 123. In this case, the organic light emitting layer 125 interposed between the first electrode 117 and the second electrode 127 and the two electrodes 117 and 127 forms an organic light emitting diode (E). The second electrode 127 is electrically connected to the auxiliary electrode pattern 119.

Accordingly, when a predetermined voltage is applied to the first electrode 117 and the second electrode 127 according to the selected color signal, the organic light emitting diode E may have holes and second electrodes injected from the first electrode 117. Electrons provided from 127 are transported to the organic light emitting layer 125 to form excitons, and when these excitons transition from the excited state to the ground state, light is generated and emitted in the form of visible light. In this case, since the emitted light passes through the transparent second electrode 127 to the outside, the organic light emitting diode 100 implements an arbitrary image.

Next, as illustrated in FIG. 8G, a first passivation layer (eg, silicon oxide (SiO ₂ ) or silicon nitride (SiNx), which is an insulating material, particularly an inorganic insulating material, may be formed on the entire surface of the substrate including the second electrode 127. 129). In this case, since the penetration of moisture into the organic light emitting layer 125 cannot be completely suppressed by the second electrode 127 alone, the organic light emitting layer is formed by forming the first passivation layer 129 on the second electrode 127. It is possible to completely suppress the water penetration into the 125.

Subsequently, as shown in FIG. 8H, an organic layer 131 made of a polymer organic material such as a polymer is formed in the display area AA on the first passivation layer 129. In this case, the polymer thin film constituting the organic layer 131 may be an olefin-based polymer (polyethylene, polypropylene), polyethylene terephthalate (PET), epoxy resin, fluoro resin, polysiloxane, or the like. This can be used.

Next, as shown in FIG. 8H, the organic film 131 is first cured for 10 to 60 minutes at a temperature of about 50 to 100 ° C. by a thermosetting method. In this case, a UV curing method may be used instead of the thermal curing method.

Subsequently, as illustrated in FIG. 8I, the first step of curing the organic film 131 is secondly cured by a thermosetting method or a UV curing method. The secondary heat curing treatment is carried out for about 10 to 60 minutes at about 50 to 150 ℃ temperature. At this time, the UV curing treatment is carried out within the range of 50W to 500W.

Although the present invention describes only two hardening treatments, the present invention is not limited thereto, and the hardening treatment may be performed two or more times. In addition, during the curing treatment, different curing treatment methods, for example, the first heat curing treatment and the second heat curing treatment, or the same curing treatment method, for example, the first heat curing treatment and the second heat curing treatment Alternatively, the primary may be UV cured and secondary UV cured.

Next, as shown in FIG. 8J, moisture penetrates through the organic layer 131 on the entire surface of the substrate including the organic layer 131 and the first passivation layer 129 which are cured twice. The second passivation film 133 made of an insulating material, for example, an inorganic insulating material, for example, silicon oxide (SiO ₂ ) or silicon nitride (SiNx), is further formed.

Subsequently, as shown in FIG. 8K, the protective film 137 is disposed to face the substrate including the second passivation layer 133 to encapsulate the organic light emitting diode E. The substrate 101 and the protective film without an air layer through the adhesive 135 made of any one of a frit, an organic insulating material, and a polymer material that is transparent and has an adhesive property between the 101 and the protective film 137. Make sure that (137) is in full contact. At this time, in the present invention, the pressure sensitive adhesive 135 is described as an example of using a PSA (Press Sensitive Adhesive).

Thus, the substrate 101 and the barrier film 137 are fixed by the adhesive 135 to form a panel state, thereby completing the manufacturing process of the organic light emitting device 100 according to the present invention.

Therefore, according to the organic light emitting device according to the present invention and a method for manufacturing the same, after fabricating the organic light emitting diode, the first passivation film for preventing moisture permeation is formed and the polymer film formed thereafter is subjected to at least two curing treatment processes, for example, primary A stable polymer film can be formed by performing a second heat curing treatment after the UV curing treatment or the first heat curing treatment after the heat curing treatment.

In addition, according to the organic light emitting device according to the present invention and a method for manufacturing the same, after fabricating the organic light emitting diode to form a moisture-proof first passivation film and the polymer film formed thereafter at least two times of curing treatment process, for example, primary UV curing treatment after heat curing or secondary heat curing treatment after the first heat curing treatment, thereby causing multi-passivation that affects wrinkle defects, that is, haze and moisture permeability defects of the polymer film. Cracking of the film can be prevented.

Those skilled in the art to which the present invention pertains will understand that the above-described present invention can be implemented in other specific forms without changing the technical spirit or essential features.

Therefore, it is to be understood that the embodiments described above are exemplary in all respects and not restrictive. The scope of the present invention is shown by the following claims rather than the detailed description, and all changes or modifications derived from the meaning and scope of the claims and their equivalent concepts should be construed as being included in the scope of the present invention. do.

101: substrate 103: semiconductor layer
103a: first region 103b, 103c: second region
105: gate insulating film 107: gate electrode
109: interlayer insulating film 111a: source electrode
111b: drain electrode 113: planarization film
115a: drain contact hole 115b: ground wiring contact hole
117: first electrode 119: auxiliary electrode pattern
121: anode hole 123: bank
125: organic light emitting layer 127: second electrode
129: first passivation film 131: organic film
133: second passivation film 135: pressure-sensitive adhesive
137: protective film AA: display area
NA: non-display area P: pixel area

Claims (12)

A display area including a plurality of pixel areas and a non-display area defined outside thereof;
A switching thin film transistor and a driving thin film transistor formed in each pixel area on the substrate;
A planarization film formed on the pixel area and the non-display area of the substrate;
A first electrode formed on the planarization layer and connected to the drain electrode of the driving thin film transistor;
An auxiliary electrode pattern formed on the planarization layer of the non-display area;
Banks formed around and in a non-display area of each pixel area of the substrate including the first electrode;
An organic emission layer formed on each of the pixel areas above the first electrode;
A second electrode formed on an entire surface of the substrate including the organic light emitting layer;
A first passivation film formed on upper and side surfaces of the pixel area and the non-display area of the planarization film including the second electrode;
An organic film formed on the upper and side surfaces of the first passivation film and formed by curing twice with a thermosetting treatment and a UV curing treatment;
A second passivation film formed on the second hardened organic film and the first passivation film;
A protective film facing the substrate; And
And an adhesive interposed between the substrate and the protective film to form a panel state by adhering the substrate and the protective film.
The auxiliary electrode pattern is an organic light emitting device, characterized in that electrically connected with the second electrode. delete The organic light emitting device of claim 1, wherein the substrate is formed of any one selected from a glass substrate, a flexible glass substrate, and a plastic material. Providing a display area including a plurality of pixel areas and a substrate on which a non-display area is defined;
Forming a switching thin film transistor and a driving thin film transistor in each pixel area on the substrate;
Forming a planarization layer in a pixel area and a non-display area of a substrate including the switching thin film transistor and a driving thin film transistor;
Forming a first electrode connected to the drain electrode of the driving thin film transistor on the planarization layer;
Forming a bank around each pixel region of the substrate including the first electrode and in a non-display region;
Forming an organic emission layer on the first electrode of the pixel region;
Forming a second electrode on an entire surface of the substrate including the organic light emitting layer;
Forming a first passivation film on upper and side surfaces of the pixel area and the non-display area of the planarization film including the second electrode;
Forming organic layers on the top and side surfaces of the first passivation layer;
Subjecting the organic film to a first heat curing treatment and a second UV curing treatment, respectively;
Forming a second passivation film on the organic film and the first passivation film;
Forming a protective film facing the substrate; And
Forming an adhesive to form a panel state by adhering the substrate and the protective film between the substrate and the protective film; Forming an organic electroluminescent device comprising a. delete delete delete delete The method of claim 4, wherein the first thermal curing process of the organic layer is performed for 10 to 60 minutes at a temperature of 50 to 100 ° C. 6. The method of claim 4, wherein the second UV curing of the organic layer is performed within a range of 50 to 500 W. 6.
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