KR102019145B1 - Apparatus for Remove of PIMD Using by System Synchronization - Google Patents

Abstract

The present invention relates to an apparatus and method for removing PIMD using system synchronization. When a PIMD signal is synthesized and input to a real signal at a base station or a repeater output terminal, a virtual PIMD signal is generated from a downlink (Tx) signal. The purpose is to completely remove the PIMD signal by removing the PIMD component included in the uplink (Rx) signal and synchronizing each part signal to the system clock generated by the oscillator after removing the PIMD.

Description

Apparatus for Remove of PIMD Using by System Synchronization}

The present invention relates to PIMD removal of a repeater, and passive intermodulation distortion (PIMD) generated by signal synthesis in a passive device or a coaxial cable for antenna branching of a mobile communication base station or repeater output terminal. The present invention relates to a PIMD removal device using system synchronization to remove distortion components.

Recently, it has been developing into the diversification and technological diversity of wireless mobile communication. As a result of the development of wireless communication technology, multi-band services have led to an increase in technical elements such as improving wireless environment performance and increasing data processing speed. In various frequency environments in multi-band services, wave generation and unexpected communication disturbances due to signal synthesis are occurring.

Intermodation due to various frequency combinations may cause communication performance deterioration or failure. By eliminating these intermodulation signals, communication disturbances can be solved.

In addition, the PIMD generated by the multi-band is a signal of the 3rd Inter Modulation (3rd IM), 5th Inter Modulation (5th IM), etc. by synthesis of fundamental, second, and third Harmonics signal components. Occurs. The signal PIMD by the frequency synthesis is generated in passive devices (Divider, Connector, etc.), and the generated PIMD signal affects other frequency bands and causes communication failure.

Since the PIMD signal is generated by the combination condition and signal synthesis by frequency, the integrity of the signal can be made by arranging the generation conditions for this and generating and removing the signal matching the condition. This can be eliminated by signal processing such as PIMD signal generator and rejection filter.

1 is a schematic block diagram of a passive element intermodulation signal removing unit according to the prior art, which is disclosed in Korean Patent Registration Publication No. 10-1395334.

Referring to FIG. 1, the passive element intermodulation signal removing unit may include a virtual intermodulation signal generator 210, a first A / D converter 220, a second A / D converter 230, and a correlation filtering unit 240. And a D / A converter 250.

The virtual intermodulation generator 210 performs a function of receiving the third transmission signal 30 which is phase-locked by the first transmission signal 10 and the second transmission signal 20 from the duplexer 130. .

The virtual intermodulation generator 210 performs a function of generating a virtual intermodulation signal for the third transmission signal 30. Further, the first transmission signal 10 and the second corresponding to the first use frequency f1 component included in the third transmission signal 30 to generate a virtual intermodulation signal for the third transmission signal 30. A virtual intermodulation signal corresponding to a frequency component combined by a sum and a difference of the harmonic frequencies of the second transmission signal 20 corresponding to the frequency of use (f2) may be generated.

The correlation filtering unit 240 extracts a correlation between the digitally converted virtual intermodulation signal and the fourth received signal 40 and extracts a correlation between the anti-phase signal of the actual manual irradiation intermodulation signal included in the fourth received signal 40. Perform the function of extraction.

In addition, the correlation filtering unit 240 detects the fifth received signal 50 from which the actual passive element intermodulation signal included in the fourth received signal 40 is removed using the extracted antiphase signal, and then the D / A converter. Perform a function of transmitting to 250.

However, this prior art is characterized by removing the PIMD signal from the received signal by generating a phase-synchronized virtual intermodulation followed by duplex RF coaxial coupling. Since a received signal may also be introduced, an uplink path received signal may also be introduced (combined) into a phase-locked virtual intermodulation signal, thereby causing an error as a virtual modulated signal.

Korean Laid-Open Patent Publication No. 10-2009-0081268 (Published July 28, 2009)

An object of the present invention is to combine the two transmission signals input from the base station or repeater output terminal to solve the problems of the prior art to generate a phase-locked actual PIMD signal, by using the PIMD included in the uplink (Rx) signal Its purpose is to provide a PIMD removal device that removes components and synchronizes the signals of each part with the system clock generated by the oscillator to solve the problem of phase or frequency error and improve the reliability and safety of PIMD signal removal.

In order to achieve the above object, the PIMD removal device using the system synchronization according to the present invention uses a system clock synchronization to remove the PIMD (Passive Inter Modulation Distortion) component generated in the first passive element between the base station or the repeater and the antenna In the PIMD removal device, the PIMD removal device is a PIMD signal generation unit for generating a PIMD signal from the analog downlink signal (TX) received from the base station or repeater; Intermediate frequency of the PIMD signal component generated by the PIMD signal generation unit Down-converting to a signal IF and converting it into a digital signal, receiving a digital PIMD signal from a digital signal processor (DSP) to generate a virtual PIMD signal P '(n), and an uplink transmitted from the antenna side A signal processor for transmitting the pure uplink signal RX from which the virtual PIMD signal component P '(n) is removed from the signal RX to the base station or the repeater side; And a system clock synchronous unit for generating and supplying a system clock to each unit so that each unit of the PIMD removing unit operates at the same clock. The system clock synchronous unit may include the DSP so that each unit of the PIMD removing unit has the same phase. It characterized in that it comprises; characterized in that to synchronize the clock of each part on the basis of the phase (θ) of the sampling clock (fs) of.

The PIMD signal generation unit may include a second passive element configured to output a downlink signal TX including a PIMD signal to the downlink signal TX; A first filter passing only the PIMD signal component generated by the second passive element; And a band separator for separating the PIMD signal component passing through the first filter for each band and outputting the band signal to the signal processor.

The signal processor may include a delay unit configured to delay a PIMD signal input from the PIMD signal generator; A PIMD cross-correlation calculation unit for calculating cross-correlation of the PIMD signal input from the delay unit; A virtual PIMD generation unit configured to generate a virtual PIMD signal using a PIMD signal input from the delay unit and a PIMD cross correlation calculation value of the PIMD cross correlation calculation unit; And a PIMD remover configured to output an integrity uplink signal (RX) from which the PIMD signal component generated by the virtual PIMD generator is removed from the uplink signal (RX) including the PIMD component from the antenna side. It is done.

The system clock synchronous unit generates a clock (fs + θ) shifted by θ (frequency and phase) set based on a sampling clock fs of a digital signal processor (DSP) to generate the first and second ADCs. 3, the clock generator for driving the fourth ADC; A first phase locked loop (PLL) for supplying a clock to the DNC-A and the DNC-B by shifting in phase with the clock generated by the clock generator; And a second PLL shifted in phase with a clock generated by the clock generator to supply a clock to the PIMD DNC-A and the PIMD DNC-B.

delete

As described above, the method and apparatus for removing PIMD using system clock synchronization according to the present invention include a PIMD generated due to signal synthesis in a passive element or a coaxial cable for antenna branching between a base station or a repeater and an antenna. By using the virtual PIMD signal, the signal can transmit only the integrity uplink signal RX from which the PIMD component included in the uplink signal RX is removed.

In addition, a virtual PIMD signal is generated using a PIMD signal generated by synthesizing two bands of downlink signals TX-A and TX-B at an end of a base station or a repeater. Since the PIMD signal is removed through a correlation operation with the uplink signal RX including the signal, the PIMD signal can be more effectively removed.

In addition, the PIMD removing device for removing the PIMD signal is synchronized with each part by a clock shifted by the set phase (θ) based on the DSP sampling frequency, so that the entire signal is processed with the same movement, so that the up / down converter (UPC) (DNC) cancels shifted by phase (θ) so that the required real signal frequency band does not change and can be output as it is; abnormal operation such as afterimage remains without being completely removed when different frequencies and phasers operate. Since it can be prevented, there is an effect that can output the integrity real uplink signal (RX-A) (RX-B).

1 is a schematic block diagram of a passive element intermodulation signal removing unit according to the prior art,
2 is a block diagram of an entire PIMD removal apparatus using system clock synchronization according to an embodiment of the present invention.
3 is a detailed block diagram of a system clock synchronization unit in FIG. 2;
4 is a detailed block diagram for removing the PIMD in FIG.
5 is a view for explaining a process of calculating the correlation according to an embodiment of the present invention,
6 is a detailed block diagram of a DSP using a virtual PIMD signal according to an embodiment of the present invention.
7 is a view for explaining the adaptive coefficient calculation process according to an embodiment of the present invention,
8 is a flowchart of a PIMD removal process using system synchronization according to an embodiment of the present invention.

The invention will become more apparent by describing the preferred embodiments of the invention in detail with reference to the accompanying drawings.

2 is a block diagram of a PIMD removal device using system synchronization according to an embodiment of the present invention, which occurs in a passive element or coaxial cable between a base station or a repeater (DAS / PPH-RU) and an antenna (ANT). PIMD removing apparatus 100 for removing the PIMD signal component is a PIMD signal generation unit 120 for generating a PIMD signal from the band-specific downlink signal (TX-A) (TX-B) received from the base station or repeater And removing the PIMD signal component from the band-specific uplink signal RX-A (RX-B) transmitted from the antenna ANT using the PIMD signal component generated by the PIMD signal generator 120. The signal processing unit 150 and the unit 120 to 150 in the PIMD removing apparatus 100 to transmit to the base station or the repeater to generate a system clock and supply to each unit (120 ~ 150) to operate with the same clock Between the system clock synchronizer 160 and the signal processor 130 and the first passive element 101. The second MUX / DeMUX unit may separate the uplink signal RX input from the first passive element 101 into bands RX-A and RX-B and input the signal to the signal processor 130. 112 and the second MUX / DeMUX unit by separating the downlink signal TX inputted through the base station or antenna DAS / PPH-RU for each band, and separating the downlink signal TX-A (TX-B). A base band or repeater (DAS / PPH-RU) by multiplexing the uplink signal RX-A (RX-B) for each band from which the PIMD signal output from the signal processor 130 is removed from the signal; PIMD signal generation unit (1) to the first MUX / DeMUX unit 111 and the downlink signal (TX-A) (TX-B) of each band output from the first MUX / DeMUX unit 111 to transmit to Consists of a coupler 113, 114 for each band to be supplied to 120.

Here, the PIMD signal generation unit 120 manually outputs a downlink signal TX-A (TX-B) including a PIMD signal to the downlink signal TX-A (TX-B). A first filter 122 which passes only the PIMD signal component generated by the second passive element 121 except for the element 121 and the downlink signals TX-A and TX-B; The band splitter 123 separates the PIMD signal component passing through the first filter 122 for each band and outputs the band splitter 123 to the signal processor 130.

Here, the second passive element 121 is composed of a combiner (combine) to merge the respective frequencies of the downlink signal (TX-A) (TX-B) for each band, the first filter 122 Includes a band rejection filter (BRF) that removes a set band of each frequency of the downlink signal (TX-A) (TX-B) and passes only a PIMD signal.

FIG. 5 is a detailed block diagram of a DSP. The DSP 150 generates a delay unit for generating a PIMD signal P (n) delayed from a PIMD signal input from the PIMD signal generator 120. 151, a PIMD cross-correlation calculation unit 152 (Cross correlation) for calculating the cross-correlation of the PIMD signal P (n) input from the delay unit 151, and the delay unit 151 A virtual PIMD generation unit for generating a virtual PIMD signal P '(n) by using the PIMD signal P (n) input from the PIMD correlation correlation calculation unit 152 and the PIMD signal P (n) inputted from the 153) a virtual PIMD signal from the virtual PIMD generation unit 153 in an uplink signal RX (Z (n)) including the virtual PIMD and the PIMD component from the first passive element 101 And a PIMD removal unit 154 for outputting the integrity uplink signal RX (R (n)) from which the (P '(n)) component has been removed.

3 is a clock clock (fs +) shifted by the frequency & phase (θ < RTI ID = 0.0 >) < / RTI > set based on the sampling clock fs of the DSP 150 according to an embodiment of the present invention. θ) to generate the clock generator 161 and the clock generator 161 for driving the first and second ADCs 141 and 142 and the third and fourth ADCs 143 and 144. The clock Z_LO + θ shifted by the same phase difference as the clock (fs + θ) to the DNC-A and DNC-B 133 and 134 and the UPC-A and UPC-B and 135 and 136, respectively. The first PLL (Phase Locked Loop) 162 and the clock (PIMD_LO + θ) shifted by the same phase difference (θ) as the clock (fs + θ) generated by the clock generator 161 are the PIMD DNC-. A second PLL 163 is provided to the A 131 and the PIMD DNC-B 132 and the DAC-A and the DAC-B 145 and 146.

Referring to the embodiments of the present invention configured as described above with reference to Figures 2 to 8 as follows.

First, the PIMD signal generated in the multi-band is a signal such as the third harmonic signal, the third internal IM, the fifth IM, etc. by the fundamental harmonic signal, the first, second, and third harmonic signal components. Occurs. The signal PIMD by the frequency synthesis is generated in passive devices (Divider, connector, etc.), and the generated signal affects other frequency bands and causes communication failure. Since the PIMD signal is generated by the combination condition and signal synthesis by frequency, the integrity of the signal can be made by arranging the generation conditions for this and generating and removing the signal matching the condition. This can be eliminated by signal processing such as PIMD signal generator and rejection filter. In addition, the PIMD elimination device is synchronized with each clock to process the signal, thereby obtaining an integrity signal.

That is, the PIMD removal device according to an embodiment of the present invention is connected between the mobile communication base station or the repeater output terminal (DAS / PPH-RU) and the antenna (ANT) filter unit for each signal flow (MUX / DeMUX, Duplexer), PIMD Signal Generation Downconverter (DNC) to convert RF to IF, Upconverter (UPC) to convert signal band RF to IF, Analog / Digital Converter (ADC), Digital / Analog Converter (DAC), DSP , MCU, etc. Here, the DSP combines (combines) a divider to generate a PIMD signal from the downlink signals TX-A and TX-B and filters unnecessary parts so that only the PIMD signal is processed by the DSP. In addition, the PIMD signal mixed in the uplink signals RX-A and RX-B is removed by DSP processing by cross correlation of the PIMD signals generated in the downlink signals Tx-A and Tx-B. The clock synchronization is performed for each part of the PIMD removing apparatus 100 to remove the noise that is not completely removed as the different frequencies and the pager operate to perform the integrity operation.

Referring to FIG. 2, the PIMD removing apparatus 100 according to an embodiment of the present invention receives the downlink signal TX received from the base station or the repeater DAS / PPH-RU in the first MUX / DeMUX 111. Demultiplexing is performed to separately output downlink signals TX-A and TX-B for each band.

The downlink signal TX-A (TX-B) output through the first MUX / DeMUX 111 is transmitted to the antenna ANT side through the second MUX / DeMUX 112.

In this case, the plurality of antennas ANT are distributed by the respective downlink signals TX-A and TX-B through a divider 101 which is a first passive element.

As described above, the first passive element 101 or a coaxial cable for transmitting a signal generates PIMD by signal synthesis. In order to remove this, the first MUX / DeMUX 111 and the second MUX / DeMUX are removed. The downlink signals TX-A (TX-B) are obtained using the couplings 113 and 114 between the 112 and 112.

Downlink signals (TX-A) (TX-B) obtained through the coupling 113, 114 is a PIMD signal, such as the first passive element 101 by the PIMD signal generation unit 120 And an uplink signal RX− that includes a PIMD signal input from the second MUX / DeMUX 112 using the PIMD signal generated by the PIMD signal generator 120 in the signal processor 130. A) After removing the PIMD signal from (RX-B), the signal is output to the first MUX / DeMUX 111.

To this end, the PIMD removal device 100 must operate in synchronization with the same system clock.

FIG. 3 is a block diagram illustrating system clock synchronization according to an exemplary embodiment of the present invention. In the system clock synchronizer 160, clocks of respective units are synchronized based on the DSP sampling clock fs.

That is, the frequency and phase characteristics of the PIMD component must be the same to generate an uplink signal RX-A (RX-B) of integrity.

Accordingly, the clock generator 161 generates the clock (fs + θ) shifted by the frequency & phase (θ) set on the basis of the sampling clock (fs) of the DSP 150, the first and second The ADCs 141 and 142 and the third and fourth ADCs 143 and 144 are driven.

In addition, the first PLL 162 generates a clock Z_LO + θ shifted in phase with the clock (fs + θ) generated by the clock generator 161, thereby generating the DNC-A 133 and the DNC. -B 134 is supplied to operate with the supplied clock.

The second PLL 163 generates a clock (PIMD_LO + θ) shifted in phase with the clock (fs + θ) generated by the clock generator 161 to generate the PIMD DNC-A 131 and a PIMD DNC. -B 132 and DAC-A 145 and DAC-B 146 operate on supplied clock.

The operation of each part of the PIMD removal apparatus 100 described later is operated in synchronization with the clock supplied from the system clock synchronizer 160.

The process of calculating the final integrity uplink signal (RX-A) (RX-B) (R) by the PIMD removal device 100 operating in synchronization with the system clock synchronizer 160 is as follows. Referring to Equation 1 and 3 as follows.

Here, the PIMD signal and the R signal are the integrity uplink signal (RX-A) (RX-B) band, if is an intermediate frequency signal (IF) with a down converter, and the Z signal is an integrity ( Real) Uplink signal RX-A (RX-B) and PIMD signal are mixed signals (R + PIMD).

Referring to FIG. 3, the signal processing apparatus 120 for PIMD removal operating in synchronization with the system clock as described above will be described in detail as follows.

The PIMD signal generation unit 120 generates the same PIMD signal as the PIMD signal generated by the first passive element 101 in the second passive element 121. That is, a PIMD signal is generated in the uplink signals RX-A and RX-B using a combiner that combines the frequencies of the downlink signals TX-A and TX-B for each band. Done.

The uplink signals RX-A and RX-B, in which the PIMD signals are mixed through the second passive element 121, are respectively passed through a first filter 122 such as a band rejection filter (BRF). While combining the band signals, only the PIMD signal components are filtered.

The PIMD signal passing through the first filter 122 is separated into a PIMD signal for each band through the band separator 123 again.

The PIMD signal for each band separated by the first filter 122 converts the RF signal into an intermediate frequency signal PIMDif through each down converter (PIMD DNC-A, PIMD DNC-B) 131 and 132. The first and second ADCs 141 and 142 convert the digital signal PDif to the DSP 150.

The uplink signals RX-A, RX-B, and Z transmitted through the first passive element 101 generate a PIMD signal at the first passive element 101, thereby providing an integrity uplink signal. The signal Z mixed in the (RX-A) and (RX-B) bands is input to the signal processor 120.

That is, the uplink signals (RX-A) (RX-B) (Z) in which the PIMD signals are mixed are intermediate frequencies through third and fourth DNCs (DNC-A, DNC-B) 133 and 134. The signal Zif is converted into a digital signal ZDif through the third and fourth ADCs 143 and 144 and input to the DSP 150.

The DSP 150 receives the first and second ADCs 141 from the uplink signals RX-A, RX-B, and ZDif inputted through the third and fourth ADCs 143 and 144. Since the PIMD signal PDif for each band input through 142 is synthesized (-), the uplink signal RX-A in which the PIMD signals input through the third and fourth ADCs 143 and 144 are mixed. The PIMD signal PDif input from the first and second ADCs 141 and 142 is removed from RX-B and ZDif, and thus the integrity before passing through the first passive element 101 is real. ) Only the uplink signals RX-A (RX-B) RDif are generated.

The integrity uplink signal (RX-A) (RX-B) (RDif) generated by the DSP 150 is passed through the first and second DACs (DAC-A, DAC-B) 145 and 146, respectively. The uplink signal RX converted to the RF signal R through the first and second UPC (UPC-A) (UPC-B) 135 and 136 after being converted into an analog signal Rif for each band. -A) (RX-B) is transmitted to the first MUX / DeMUX 111.

Here, as another embodiment of the PIMD signal generator 120, as shown in FIG. 4, the PIMD signal output through the first filter 122 outputs only the PIMD signal PIMD without separating bands, One down-converter (PIMD DNC) 131a is used to convert the intermediate frequency signal PIMDif, and converts the digital signal PDif through the ADC 141a and inputs it to the DSP 150.

In addition, the down-converter (DNC-Z) 133a and the ADC 143a are input to the DSP 150 converted into an intermediate frequency signal Zif and a digital signal ZDif. Since the DSP 150 synthesizes the digital PIMD (PDif) input through the ADC 141a and the digital signal ZDif input through the ADC 143a, the PIMD signal PDif has been removed. ) Outputs a digital uplink signal Rdif, converts it to an analog uplink signal Rif via the DAC-R 145a, and an integrity uplink signal R via an upconverter (UPC-R) 135a. ) Is output to the first MUX / DeMUX 111.

That is, the DSP 150 generates the virtual PIMD signal from the PIMD signal, and removes the PIMD signal from the uplink signal RX-A (RX-B) in which the PIMD is mixed using the integrity uplink signal. Only (RX-A) and (RX-B) will be output.

FIG. 5 is a detailed block diagram illustrating cross correlation calculation for generating a virtual PIMD signal in a DSP. The same virtual PIMD signal should be generated using a DSP to remove a PIMD signal. The virtual PIMD signal may be calculated through the same cross correlation with the PIMD signal.

The cross-correlation may be calculated by using Equation 2 below.

Here, k = number of samples to be obtained, X (n) is the current input signal, and X (n-k) is a signal in which X (n) is delayed by k.

The cross-correlation value calculated by the calculator calculates a normalized cross-correlation value (CrossCorr_Nor (k)) through a normalization process.

The virtual PIMD value is generated using the normalized cross-correlation value CrossCorr_Nor (k) calculated as described above.

FIG. 6 is a detailed block diagram of a DSP for removing a PIMD signal of an uplink signal RX-A (RX-B) using a virtual PIMD signal, input through first and second ADCs 141 and 142. The PIMD signal P (n), which has been delayed for a predetermined time through the delayed digital PIMD signal, is output through the delay unit 151.

The PIMD signal P (n) calculates a cross correlation value through the cross correlation calculating unit 152 as shown in Equation 2, and the PIMD signal (( P (n)) and the value calculated by the cross-correlation calculation unit 152 are generated to generate a virtual PIMD signal, that is, the generation of the virtual PIMD signal is performed through an adaptive DSP filter. (Adaptive coefficient value) is calculated.

Equation 3 is a method of calculating the adaptive coefficient value (weighted value), and the value according to the cross-correlation value is varied according to the characteristics of the PIMD signal component.

에 의해 연산된 값은 현재의 상호상관관계값이다. 또한, μ값은 상수로서 현재 상호상관관계값이 어느 정도의 상수(배수)로 따라 갈 것인가에 대한 상수이다.6 and 7, the normalized adaptation coefficient value is updated as in Equation 3, where W (n + 1) is the next weight update value, W (n) is the previous weight, and P ( n) is the known PIMD value (actually occurring PIMD), z (n) is the actual PIMD + R value, Pavg (pz) is the average Power value of p, z, and pz is P (n), Z ( n) is a multiplication value,

The value computed by is the current correlation value. Also, μ is a constant, which is a constant for how many constants (multiplier) the current correlation value will follow.

FIG. 7 is a detailed block diagram of the cross-correlation calculation unit. The virtual PIMD signal generation using the cross-correlation is implemented by the DSP adaptive filter, which is generated by calculating an adaptive coefficient value.

The adaptive coefficient value is calculated using a DSP adaptive filter using an adaptive coefficient value, wherein the adaptive coefficient value is calculated by mutual correlation between the delayed PIMD signal and the actual uplink signal R (n) through the delay unit. The signal P (n) is multiplied by the cross correlation coefficient value to generate a virtual PIMD signal P '(n).

The Coefficient value in the Adaptive Filter is updated. The correlation between the PIMD value P (n) and the actual signal R (n) of the uplink path is calculated to calculate the PIMD (P ( n)) The virtual PIMD generation unit 153 of the DSP 150 generates a virtual PIMD signal P '(n) by multiplying the signal by a cross correlation coefficient value.

At this time, since the correlation coefficient value μ has + and − values, the correlation coefficient value μ is adaptively changed according to the correlation.

The correlation coefficient value mu determines whether the change of the correlation coefficient value is faster or slower by a constant, and determines the response speed of the adaptive filter to the change of the constant value.

Referring to FIG. 7, the cross-coefficient operation unit 152a is a product of a delayed P (n) signal and an actual uplink signal R (n) in the uplink path. The mutual coefficient value is calculated from the cumulative sum.

The cross correlation value decision unit 152b may know a calculation value of a correlation by a cumulative sum of signal products obtained by cross correlation. Here, a large cross correlation value ΔW means that the correlation is highly correlated, and if the correlation value is small, the correlation is far and the correlation is low.

The decision about this is to determine the threshold value of the correlation to update the correlation value. The correlation determination value is determined by a value calculated by a test or equation (3) calculated by the DSP (150).

The coefficient operation unit 152c updates the high and low weights by adding correlation coefficient values to previous weight values for each DSP operation cycle time when the cross correlation value ΔW is determined.

The virtual PIMD generation unit 153 calculates by multiplying the updated weight and the delayed PIMD value P (n) every DSP operation cycle time. This is applied as an operation coefficient of an adaptive filter to generate a virtual PIMD P '(n).

8 is a flowchart of a PIMD removal process using system synchronization according to an embodiment of the present invention. First, a PIMD signal component mixed in an uplink signal (RX-A) (RX-B) is removed through the PIMD removal apparatus. In order to synchronize the operation clock of each block in the PIMD removal device, the next step is performed. (S100)

The integrity uplink signal RX-A (RX-B) and the PIMD generated in the first passive element 101, the connector or the coaxial cable are mixed and input from the antenna ANT. (S101)

On the other hand, the downlink signal (TX-A) (TX-B) received through the base station or repeater is received, the PIMD signal generation unit 120 to the uplink signal (RX-A) (RX-B) It generates the same PIMD signal as the mixed PIMD, delays it for a certain time through the delay unit, and calculates a correlation value. (S110-S112)

The cross correlation value is calculated using the integrity uplink signal RX-A (RX-B) and the PIMD signal from which the PIMD signal is removed through the DSP 150.

The cross correlation value calculates an adaptive coefficient value through an adaptive DSP filter (S113).

A virtual PIMD signal is generated using the adaptive coefficient value. (S114)

By using the generated virtual PIMD signal, a PIMD signal component is removed from a mixed signal of the input integrity uplink signal RX-A (RX-B) and a PIMD signal, and then the integrity uplink signal RX. -A) Only outputs (RX-B) (S102).

As described above, the PIMD removal apparatus and method using the system synchronization according to the present invention, although described by a limited embodiment and the drawings are not limited by this embodiment, those of ordinary skill in the art to which the present invention belongs Of course, various modifications and variations are possible within the scope of the technical spirit of the present invention and the claims to be described below.

100: PIMD removal device 101: first passive element
111,112: 1st, 2nd MUX / DeMUX 113,114: 1st, 2nd coupling
120: PIMD signal generator 121: second passive element
122: first filter 123: band separation unit
130: signal processor 131, 132, 133, 134: first to fourth DNA
135,136: 1st, 2nd UPC 141, 142, 143, 144: 1st-4th ADC
145,146: 1st, 2nd DAC 150: DSP
151: delay unit 152: cross correlation calculation unit
153: virtual PIMD generation unit 154: PIMD removal unit
160: system clock synchronous unit 161,162: first, second PLL

Claims (15)

In the PIMD removal apparatus using system clock synchronization to remove the PIMD (Passive Inter Modulation Distortion) component generated in the first passive element between the base station or the repeater and the antenna,
The PIMD removing apparatus includes a PIMD signal generation unit for generating a PIMD signal from the analog downlink signal TX received from the base station or the repeater;
The PIMD signal component generated by the PIMD signal generation unit is converted to an intermediate frequency signal IF and converted into a digital signal, and the virtual PIMD signal P '(n A signal processor for generating a pure uplink signal RX from which the virtual PIMD signal component P ′ (n) is removed from the uplink signal RX transmitted from the antenna side, to the base station or the repeater side; And
A system clock synchronizer for generating and supplying a system clock to each unit so that each unit of the PIMD removing device operates at the same clock; It includes, but,
The system clock synchronous unit synchronizes the clocks of the respective units based on the phase θ of the sampling clock fs of the DSP such that each part of the PIMD removing device has the same phase. . The method of claim 1,
The PIMD signal generation unit may include a second passive element configured to output a downlink signal TX including a PIMD signal to the downlink signal TX;
A first filter passing only the PIMD signal component generated by the second passive element; And
And a band separation unit for separating the PIMD signal component passing through the first filter for each band and outputting the band signal to the signal processing unit. The method of claim 2,
And the second passive element generates the same PIMD signal component as the first passive element on the antenna side. The method of claim 3,
The second passive element is a PIMD removal device using a system clock synchronization, characterized in that the combination (combine) to combine the respective frequencies of the downlink signal (TX-A) (TX-B) for each band. The method of claim 4, wherein
The first filter is a system clock, characterized in that the band rejection filter (BRF: Band Rejection Filter) to pass only the PIMD signal by removing only the set band of each frequency of the downlink signal (TX-A) (TX-B) PIMD removal device using synchronization. The method of claim 1,
A second MUX / DeMUX added between the signal processor and the first passive element to separate the uplink signal RX input from the antenna side by bands RX-A and RX-B and input the signal to the signal processor; part;
The downlink signal TX-A (TX-B) obtained by separating the downlink signal TX inputted through the base station or the antenna for each band is output to the second MUX / DeMUX unit, and the PIMD signal output from the signal processing unit. A first MUX / DeMUX unit for multiplexing uplink signals (RX-A) (RX-B) from which bands are removed and transmitting the multiplexed uplink signals (RX-A) to the base station or repeater; And
Each coupler for supplying downlink signals (TX-A) (TX-B) of each band output from the first MUX / DeMUX to the PIMD signal generation unit, further comprising a PIMD removal device using a system clock synchronization . The method of claim 6,
The signal processor may include PIMD DNC-A and PIMD DNC-B for downconverting the PIMD signals for each band generated by the PIMD signal generator, respectively, and first and second ADCs respectively converting the digital signals (ADCs);
Third and fourth ADCs for converting DNC-A and DNC-B for downconverting uplink signals (RX-A) (RX-B) input from the second MUX / DeMUX and digital signals;
The pure uplink signal RX from which the PIMD component is removed from the band-specific uplink signals RX-A and RX-B input through the first and second ADCs using the PIMD signals input from the first and second ADCs. -Digital Signal Processor (DSP) which outputs only (A) (RX-B); And
First and second DACs for converting the pure uplink signals RX-A and RX-B output through the DSP into analog signals and up-converting them respectively to the first MUX / DeMUX. Including transmitting UPC-A and UPC-B;
And each unit is driven in synchronization with a clock generated by the system clock synchronous unit. delete The method of claim 7, wherein
The DSP may include a delay unit for generating a PIMD signal P (n) obtained by delaying a PIMD signal input from the PIMD signal generator;
A PIMD cross correlation calculation unit for calculating a cross correlation of the PIMD signal P (n) input from the delay unit;
A virtual PIMD generation unit generating a virtual PIMD signal P '(n) by using a PIMD signal P (n) input from the delay unit and a PIMD correlation correlation value of the PIMD cross correlation calculation unit; And
Outputting an integrity uplink signal R (n) from which the PIMD signal P ′ (n) component is removed from the virtual PIMD generator from the uplink signal RX including the PIMD component from the antenna side. PIMD removal unit using a system clock synchronization, characterized in that driven, including; PIMD removal unit. The method of claim 9,
The cross correlation value of the PIMD cross correlation calculation unit may be calculated using a DSP adaptive filter using an adaptive coefficient value.
The adaptive coefficient value is calculated by cross-correlating a PIMD signal delayed through the delay unit with an actual uplink signal R (n), and multiplying the delayed PIMD signal P (n) by a cross correlation coefficient value to virtual PIMD. PIMD removal device using system clock synchronization, characterized in that for generating a signal (P '(n)). The method of claim 9,
The PIMD cross-correlation calculator calculates a mutual coefficient value based on a cumulative sum of a product of a delayed PIMD signal P (n) and an actual uplink signal R (n) through the delay unit. Cross Coefficient Operation;
Cross Correlation Value decision to determine the cross-correlation degree based on the cross-coefficient value calculated by the cross-coefficient driving unit; And
As the correlation value is determined by the correlation value determination unit, a coefficient operation unit for updating the high and low weights by adding correlation coefficient values to previous weight values for each DSP operation cycle time. PIMD removal device using a system clock synchronization, characterized in that configured to include. delete The method of claim 7, wherein
The system clock synchronous unit generates a clock (fs + θ) shifted by θ (frequency, phase) set on the basis of the sampling clock fs of the DSP to generate the first, second, and third ADCs. A clock generator for driving;
A first locked loop (PLL) for supplying the clock (Z_LO + θ) shifted in phase with the clock generated by the clock generator to the DNC-A and the DNC-B; And
And a second PLL for supplying a clock (PIMD_LO + θ) shifted in phase with the clock generated by the clock generator to the PIMD DNC-A and PIMD DNC-B and the DAC-A and DAC-B. PIMD removal device using a system clock synchronization.

delete delete

Images