KR101727741B1 - High efficiency photovoltaic inverter system with 3-level boost converter - Google Patents

Abstract

The present invention relates to a high efficiency photovoltaic inverter system with a three-level boost converter, capable of enhancing maximum power point tracking (MPPT) efficiency through linearization while maintaining output power produced from a solar cell array at a constant direct current (DC) link voltage. According to the present invention, the system comprises: the solar cell array condensing sunlight inputted from the outside to generate electricity; a DC converter to maintain the output power of the solar cell array at the constant DC link voltage; an inverter to convert DC power outputted from the DC converter into alternating current (AC) power; an inductor-capacitor-inductor (LCL) filter to remove a harmonic wave component from the output power of the inverter; and an MPPT controller to be operated at the maximum power point based on the output power of the solar cell array. The MPPT controller comprises: an MPPT control unit to maintain a voltage of capacitor voltage (Vdcp, Vdcn) of the DC converter based on an MPPT point; a current control unit to control a switching device of the inverter; and a phase locked loop (PLL) control unit to synchronize a system phase with a phase of photovoltaic electricity.

Description

BACKGROUND OF THE INVENTION 1. Field of the Invention [0001] The present invention relates to a high efficiency solar inverter system including a three-level boost converter,

The present invention relates to a high efficiency solar inverter system having a three-level boost converter, and more particularly, to a high efficiency solar inverter system having a three-level boost converter, which is capable of improving MPPT efficiency through linearization while maintaining a constant DC link voltage Level boost converter for a high efficiency solar inverter system.

The use of fossil energy causes serious environmental pollution and its fossil fuels are running out. In order to cope with these problems, development of clean alternative energy is actively being carried out. As a part of this, photovoltaic power generation is widely used in vehicles, toys, residential generators, street lights, grid lines, unmanned lighthouses in remote areas, clock towers, and communication equipment.

In a photovoltaic power generation system, when a solar array composed of a PN junction is irradiated with sunlight, electron-hole pairs are generated by the solar energy, electrons and holes move, and the photovoltaic effect the current is output to the external load by the photovoltaic effect.

Here, the solar array is composed of a module which is a minimum unit in which a plurality of cells, which is a minimum unit for generating electricity, are assembled and output electricity, and the modules are connected in series and in parallel to form an array. Such a photovoltaic power generation system is composed of a solar array, a connection panel, and an inverter. Among the above configurations, the inverter performs the function of converting DC power generated in the solar array into AC power.

Among the inverters, a three-level NPC inverter (Neutral-Point-Clamped Inverter) includes a diode connected in series with a switch operating in response to a gating signal applied to a control terminal of each switch, And converts the supplied direct current voltage and direct current into alternating voltage and alternating current.

Such a three-level NPC inverter does not require an independent DC power supply, and since the switch is formed in series, the structure of the inverter is simpler and more economical than that of the inverter lamination method. A three-level NPC inverter outputs DC-link voltage in three stages, so that the harmonics of the output voltage and current can be reduced by half or more compared to a two-level inverter at the same switching frequency, and switching is applied to the induction motor winding Voltage stress can be reduced. In addition, unlike the serial connection structure of the device, since uniform voltage distribution can be achieved at turn-off, it is not necessary to consider the synchronization of the turn-off operation.

Also, since the cut-off voltage of each switching element is half of the DC-link voltage, there is an advantage that the EMI noise generated due to the sudden voltage fluctuation at the time of switching can be reduced.

1 is a general circuit diagram of a three-level NPC inverter power stack.

Referring to FIG. 1, when the switches Sa1 and Sa2 are turned on and Sa3 and Sa4 are turned off, a voltage of + Vdc / 2 is applied to a. When Sa2 and Sa3 are turned on and Sa2 and Sa3 are turned off, a zero potential is applied to the neutral point N. [ When Sa4 and Sa3 are turned on and Sa1 and Sa2 are turned off, -Vdc / 2 voltage is applied to a with respect to the neutral point N. [ By the above procedure, the voltage level of the a-phase is changed to + Vdc / 2, 0, -Vdc / 2, and the DC voltage is converted into the AC voltage. In this process, the voltage of the b phase is shifted by 2π / 3 at the electric angle, and the on / off operation of the switch is performed in the same manner as the operation of a. Likewise, the switches connected to c are operated in the same manner. After the voltage is applied to c, a switch of a phase is operated to output a continuous AC voltage.

However, a typical three-level inverter is structurally separated into two DC Link capacitors, which creates a voltage imbalance problem between the two capacitors. This voltage imbalance problem causes the neutral point of the DC link capacitor to fluctuate, increasing the voltage stress on the switch element and causing the output voltage to be distorted. Therefore, many studies have been conducted to control the neutral point clamped voltage and various techniques have been proposed.

As a technique for controlling the neutral point voltage, Japanese Patent Application Laid-Open No. 10-1309290 discloses an apparatus and method for controlling a neutral point voltage of a three-level NPC inverter using a discontinuous pulse width modulation method.

The above description relates to a three-level NPC inverter including a first DC link capacitor connected in series, a second DC link capacitor, a switching element including an anti-parallel diode, and a clamping diode; A neutral point unbalance voltage calculator for calculating a neutral point unbalance voltage between the first DC link capacitor and the second DC link capacitor; Generating a control signal for controlling the neutral point unbalance voltage by controlling the discontinuous switching period to decrease or increase the N-type discontinuous switching period by increasing or decreasing the P-type discontinuous switching period according to the calculated voltage unbalance voltage A discontinuous switching section regulating section; And a DPWM signal to be output to the switching element of the 3-level NPC inverter by switching the command voltage to be output to the switching element of the 3-level NPC inverter according to a control signal of the discontinuous switching section controller in a discontinuous pulse width modulation And a DPWM signal generator.

However, the above technique is discontinuously switched during the 60 ° (+ 30 °) interval which is the maximum of the negative, and a constant current flows unconditionally at the neutral point during the 60 ° (+ 30 °) .

In addition, when the maximum power point tracking (MPPT) technique is applied to the solar inverter, it is not known how the maximum power point tracking (MPPT) is affected by the unbalance voltage control of the neutral point.

On the other hand, in the case of the solar power generation system, when the generation amount is insufficient at night or when the generation of electricity is insufficient, the amount of generated electricity decreases and the incident amount of sunlight increases.

In PV system, grid-connected photovoltaic generation system connected with power system supplies surplus power to power system when power generation amount is relatively higher than demand power, and conversely, when power generation amount is lower than demand power, power is supplied from power system .

In this grid-connected photovoltaic power generation system, a PLL (Phase Locked Loop) for achieving phase synchronization with the power grid voltage, a maximum power point tracking (MPPT) control technology for obtaining maximum power in the solar array, DC-DC converter control technology to supply stable DC power and output current control technology to control inverter output current are needed.

KR 10-1309290 B1 (March 10, 2013)

SUMMARY OF THE INVENTION It is an object of the present invention to provide a high efficiency solar cell having a three-level boost converter capable of keeping a neutral point voltage at OV while keeping track of a maximum power point, Optical inverter system.

In order to solve the above problems, a high efficiency solar inverter system including a three-level boost converter according to the present invention includes a solar array 100 for collecting sunlight incident from the outside to generate electricity; A DC converter 200 for maintaining the output power of the solar array 100 at a constant DC link voltage; An inverter (300) for converting a DC power outputted from the DC converter (200) into an AC power; An LCL filter 400 for removing a harmonic component from the output power of the inverter 300; And an MPPT controller (500) for controlling the MPPT controller (500) to operate at a maximum power point based on the output power of the solar array (100), and the MPPT controller (500) An MPPT control unit 510 for maintaining the voltages of the capacitor voltages Vdcp and Vdcn of the second transistor 200 equal to each other; A current controller 520 for controlling a switching element of the inverter 300; And a PLL controller 530 for synchronizing the phases of the system phase and the photovoltaic generation power.

Here, the MPPT controller 510 controls the switching signal for the element S _B1 that switches the both-end voltage V _dcp of the capacitor C _dcp to the voltage across the capacitor V _dcp and the capacitor reference voltage V _{dcp_ref} The switching signal to the element S _B2 which is determined through the first PI control module 511 and _switches the both terminal voltage V _dcn of the capacitor C _dcn is _{smaller than} the switching voltage of the upper capacitor terminal voltage V _dcp , side of the capacitor is determined at both ends compared to the voltage (V _dcn) via the 2 PI control module 512, wherein the 1 PI control module signal (d ₁₎ which is output via 511 is output by the PWM control, The signal d ₁ is summed with the signal d ₂ output through the second PI control module 512 and subtracted from the peak voltage of the diode D2 to be output by PWM control .

The DC converter 200 may be a three-level boost converter.

According to the present invention, MPPT efficiency can be improved by linearizing the output power generated from the solar array while maintaining a constant DC link voltage.

In addition, since the current flowing in the neutral point can be controlled, the stabilized output power can be provided by maintaining the voltage of the neutral point at 0V.

In addition, since the harmonics of the output power can be removed, the quality of the supplied power can be improved.

1 is a general circuit diagram of a three-level NPC inverter power stack.
FIG. 2 is a schematic configuration diagram of a high efficiency solar inverter system having a three-level boost converter according to the present invention; FIG.
3 is a schematic circuit configuration diagram of a high efficiency solar inverter system having a three-level boost converter according to the present invention.
4 and 5 are circuit diagrams of a DC converter and a converter control unit applied to a high efficiency solar inverter system having a three-level boost converter according to the present invention.
6 is a topology diagram of a 3-level NPC inverter and an LCL filter applied to a high efficiency solar inverter system having a 3-level boost converter according to the present invention.
7 is a block diagram of an LCL filter control unit in a high efficiency solar inverter system having a three-level boost converter according to the present invention.
8 is a graph showing a relationship between a line voltage (a), an output current (b) of each phase and a current (c) of a d-axis, which are controlled through an LCL filter control unit in a high efficiency solar inverter system equipped with a three- The graph shown.
9 is a graph showing PV and IV characteristics output from a solar array in a solar power generation system.
10 is a block diagram of another embodiment of an MPPT control unit in a high efficiency solar inverter system having a three-level boost converter according to the present invention.

Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the accompanying drawings.

The present invention relates to a high efficiency solar inverter system having a three-level boost converter capable of improving MPPT efficiency through linearization while maintaining an output power generated from a solar array at a constant DC link voltage.

FIG. 2 and FIG. 3 are diagrams showing a schematic configuration and a circuit diagram of a high efficiency solar inverter system having a three-level boost converter according to the present invention, respectively.

2 and 3, the high efficiency solar inverter system including the three-level boost converter according to the present invention includes a DC converter 200 for maintaining the output power of the solar array 100 at a constant DC link voltage, An inverter 300 for converting a DC power source to an AC power source, an LCL filter 400 for removing harmonic components of a switching frequency, and an MPPT 400 for controlling operation at a maximum power point in consideration of an output power of the solar array 100. [ And a controller (500).

The solar array 100 is for generating electricity by collecting sunlight incident from the outside, and usually silicon and a composite material are used. Specifically, the solar array 100 uses a p-type semiconductor and an n-type semiconductor in combination, and utilizes a photoelectric effect to generate electricity by receiving sunlight. Most of the solar array 100 is composed of a P-N junction diode having a large area, and the electromotive force generated at the opposite ends of the P-N junction diode is connected to an external circuit.

The minimum unit of the solar array 100 is referred to as a cell. Actually, the solar array is rarely used as a cell. This is because the voltage from one cell is very small, about 0.5V, compared to several tens of volts or several hundreds of volts needed for practical use, so that a large number of unit solar arrays can be connected in series or parallel I am using it. In addition, when the solar array 100 is used outdoors, it is subject to various harsh environments. Therefore, a plurality of cells are used as a package in order to protect a large number of cells connected with a necessary unit capacity in a harsh environment.

Although not shown in the drawing, at the rear end of the solar array 100, a connection box for collecting voltages of the same polarity output from the solar array 100 at one connection point is provided, and the output power collected at the rear end of the connection box The DC converter 200 is configured to maintain a constant DC link voltage.

The inverter in the photovoltaic power generation system must maintain the DC link voltage at a certain level or higher in order to convert the DC power outputted from the solar array 100 into the output voltage of the inverter (for example, 380 V / 60 Hz). However, the power-voltage curve and the current-voltage curve of the solar array module change nonlinearly according to the external environment such as the irradiation amount and the temperature. In order to supply a constant voltage to the inverter 300 in accordance with the non-linear characteristics of the solar array 100, the DC converter 200 is essential.

The DC converter 200 is for maintaining the output power of the solar array 100 at a constant DC link voltage, and a three-level boost converter may be used.

4 and 5 are circuit diagrams of a DC converter and a converter control unit applied to a high efficiency solar inverter system having a three-level boost converter according to the present invention.

Referring to FIG. 4, in the DC converter 200, the voltage gain applied to the V _dclink is doubled by the switching operation of the switching elements S _B1 and S _B2 .

At this time, the voltage gain is expressed by the following equation (1).

(1)

Here, V _i is the input voltage to be input to the DC converter, V _dclink is the output voltage of the DC converter, and D is the _duty ratio of the section in which the switching elements S _B1 and S _B2 are simultaneously turned on.

According to the above equation (1), in theory, infinite voltage can be obtained as the application ratio converges to one. However, the typical application rate is 0.5, so that a voltage gain of about 4 times can be obtained.

At this time, an MPPT controller 500 for controlling the DC converter 200 and the inverter 300 is installed.

The MPPT controller 500 includes an MPPT controller 510 for keeping the voltages of the capacitor voltages V _dcp and V _dcn of the DC converter 200 equal to each other based on the maximum power follow-up point, A current controller 520 for controlling the switching elements, and a PLL controller 530 for synchronizing the phases of the system phase and the photovoltaic power.

The MPPT control unit 510 is for controlling the switching point of the switching elements S _B1 and S _B2 of the DC converter 200 on the basis of the maximum power follow-up point. The MPPT control unit 510 includes a proportional integral control (PI) Can be used.

Voltage side capacitor element for switching the both-end voltage (V _dcp) of (C _dcp) (S _B1) switching signal for comparing the capacitor voltage across (V _dcp) and a capacitor reference voltage (V _{dcp _ref)} to claim 1 PI control module (511).

In addition, the switching signal for the elements (S _B2) for switching the both-end voltage (V _dcn) under-side capacitor (C _dcn) compares the potential side capacitor both-end voltage (V _dcp) and bottom-side capacitor voltage across (V _dcn) Is determined through the second PI control module 512.

At this time, if the signal output through the first PI control module 511 is d ₁ , the signal d ₁ is output by the PWM control. Further, the signal d ₁ is added to the signal output through the second PI control module 512, and subtracted from the peak voltage of the diode D ₂ , and the signal d ₂ is output as a signal d ₂ do.

When the signal d ₁ has a value between 0.5 and 1, the time for which the element S _B1 that switches the both-end voltage V _dcp of the upper capacitor C _dcp is on, the lower capacitor C _dcn The element S _B2 for switching the both-end voltage V _dcn of the switching element _Q1 to _Q2 is turned on and off. On the other hand, the signal d ₁ is 0 to 0.5, if having a value of between, for the time being on the elements (S _B2) for switching the both-end voltage (V _dcn) under-side capacitor (C _dcn), potential side capacitor (C _dcp The element S _B1 for switching the both-end voltage V _dcp of the switching element _{Q 1} on and off is performed.

The inverter 300 performs a function of converting a DC power output from the solar array 100 into an AC power. In the present invention, a 3-level NPC inverter may be used.

FIG. 6 is a topology diagram of a 3-level NPC inverter and an LCL filter applied to a high efficiency solar inverter system having a 3-level boost converter according to the present invention.

The three-level NPC inverter has three switching states P, O, and N. That is, each phase outputs AC power of + Vdc / 2, 0, and -Vdc / 2 according to switching.

In addition, the conduction path changes in each switching state depending on the direction of the output current. In other words, the conduction paths of the currents flowing in the respective phases in the respective switching states consist of the output currents of the transistors Sx1 and Sx2 and the input currents of the diodes Dx1 and Dx2 in the P and N states. In Sx1, x is one of a, b, and c, and x is the same in Dx1.

In the O state, an output current through the transistor Sx2 and an input current by the transistor Sx3 are formed.

In such a three-level inverter, the main switch (transistor), which is in the off state by the diode, has a voltage across the upper capacitor and the lower capacitor, respectively, as a cut-off voltage. That is, in the P state, the cutoff voltage of Sx3 becomes the charge voltage of the upper DC-Link capacitor, and the cutoff voltage of Sx3 becomes the charge voltage of the lower DC-Link capacitor. Similarly, in the O state, the cutoff voltage of Sx1 is the charge voltage of the upper DCLink capacitor, and the cutoff voltage of Sx4 is the charge voltage of the lower DC-Link capacitor. Subsequently, in the N state, the cutoff voltage of Sx1 is the charge voltage of the upper DCLink capacitor, and the cutoff voltage of Sx2 is the charge voltage of the lower DC-Link capacitor.

If the charge voltages of the DC-Link capacitors of the upper and lower stages are the same, The cut-off voltages of the two switches in the state will be evenly distributed. However, in the switching state of the O state, the neutral current flows. If the current flows from the neutral point in the direction of current flow, the DC-Link capacitor at the top is charged, the potential difference across the capacitor increases, and the DC-Link capacitor at the bottom is discharged and the potential difference across the capacitor decreases. Likewise, if the current flows from the neutral point in the direction in which the current flows, the upper DC-Link capacitor is discharged, the potential difference across the capacitor decreases, and the lower DC-Link capacitor charges to increase the potential difference across the capacitor.

As described above, the potential difference between the upper and lower DC-Link capacitors is different due to the current flow at the neutral point, so that the cut-off voltages of the two switches in the off state may not be uniform.

In addition, the three-level NPC inverter system in which the switching device is included is discontinuous, time-varying, and non-linear. Discontinuous systems in dynamic behavior analysis complicate the analysis because they include negligible phenomena, such as switching ripple and switching frequency harmonics and their sidebands.

Accordingly, in the high efficiency solar inverter system having the three-level boost converter of the present invention, the LCL filter 400 is configured to perform the function of removing harmonic components.

The LCL filter 400 is for reducing harmonics of the power source output from the inverter 300. The LCL filter 400 includes an inductor connected in series to each phase, a capacitor connected in parallel on each phase, and an inductor Are sequentially provided.

In order to analyze the control performance and operating characteristics of the inverter 300 due to various variations, a detailed response and system operation can be predicted through a switching model and a switching function model. However, the above model is very complicated, and it takes much time to formulate and set the model. Therefore, the switching model and the switching function model can be converted into a small signal model and performed.

The small signal model is a way to simplify the system by balancing the accuracy and complexity of the analysis, through averaging, microvariation and linearization.

First, the switching function for each phase (P, O, N) can be defined by the following equation (2).

(2)

Sp = {0, 1}, So = {0, 1}, Sn = {0, 1}

Sp + So + Sn = 1

Here, Sp, So, and Sn are switching functions for the P phase, the O phase, and the N phase, respectively.

In a three-level NPC inverter, the state of one leg is in one of P, O, and N states. That is, it can not be an O state or an N state when it is in P state, and it can not be a P state or an N state when it is O state. The N state is the same. Therefore, in the P state, a combination of Sp = 1, So = 0 and Sn = 0 is obtained. In the case of the O state, a combination of Sp = 0, So = 1 and Sn = In the N state, the combination of Sp = 0, So = 0, and Sn = 1 is obtained.

The switching function defined above and the circuit equation according to appended Fig. 6 are derived by the following equation (3).

(3)

At this time, the neutral current is represented by the following equation (4) using the phase current and the switching function.

(4)

At this time, the vector for each phase is expressed by the following equation (5).

Equation (5)

Here, v _ph is the phase voltage, v _fph the filter capacitor voltage, v _gph the grid voltage, i _sph is phase current, i _gph has grid current, R _Lf is a damping resistance, s _pph is P state switching function, s _oph are O State switching function, S _nph is an N state switching function.

Equations (3) and (4) are discontinuous nonlinear time-varying system models. Therefore, it is possible to model the continuous nonlinear time invariant system through the averaging process.

Through averaging, the discontinuous system is transformed into a continuous system. However, you have to decide how and where to define the averaging. Since the cause of the discontinuity is the switching according to the switching period of the switching device, averaging can be performed by the switching period average for the discontinuous equation for the switching period.

The switching function can be changed to a duty ratio according to the period average, and the values of each voltage and current can also be expressed as an average value during the switching period.

Accordingly, Equation (3) and Equation (4) can be converted into continuous nonlinear time-varying through the averaging process. That is, the averaged modeling can be transformed into a continuous non-linear time-invariant model by performing d-q-0 transform.

The d-q-0 conversion is a mathematical transformation scheme in which a reference frame of a three-phase system is rotated in order to simplify analysis of a three-phase circuit. The three-phase AC output varying with time can be converted into a direct current through a d-q-0 conversion, and the analysis and control of the output can be facilitated.

The d-q-0 conversion of the three-phase ac component leads to two dc components, and the inverse d-q-0 transformation is performed on the two dc components. The d-q-0 and d-q-0 transforms may be performed by multiplying a d-q-0 transformation matrix by an inverse d-q-0 transformation matrix.

The discontinuous nonlinear time-varying model can be transformed into a continuous nonlinear time-invariant model through the dq-0 transform and the inverse dq-0 transform.

However, the model is still a nonlinear model, which must be converted to a linear model. The conversion to the linear model can be proceeded assuming a linear model for the small variations. That is, it can be induced to the linearization model by giving a micro-variation at the time of operation.

Given the above micro-fluctuations, a condition that the sum of the duty ratios of the P state, O state and N state of each phase is "1" is derived through the linearization model.

Equation (5) is as follows.

Equation (5)

Where d _pa , d _oa, and d _na are the P state, O state, and N state duty ratios on the dqO transformed a, respectively. Similarly, d _pb , d _ob, and d _nb are the P state, O state, and N state duty ratios on the dqO transformed b, respectively, and d _pc , d _oc, and d _nc are the P state, N state duty ratio.

At this time, since the current of the neutral point should have a value of "0", the reverse dqO conversion is performed on the remaining factors assuming that the values of d _oa , d _ob, and d _oc are all "0".

Since the negative number is a violation of the design condition, the absolute value of the minimum value among d _pa , d _pb, and d _pc is expressed as d _pa , d _pb, and d _pc , Can be solved by adding. Similarly, d _na , d _nb and d _{nc add} the absolute value of the minimum value among d _na , d _nb and d _nc .

In this way, the neutral point current can be determined by taking the absolute value of the duty ratio of each phase.

FIG. 7 is a diagram illustrating a configuration of an LCL filter control unit in a solar power generation system having a 3-level inverter of maximum power point tracking control according to the present invention.

7, the LCL filter controller 410 includes a d-axis minimum duty ratio calculating module 411, a q-axis minimum duty ratio calculating module 412, a state conversion duty ratio calculating module 413, an inverse dq Conversion module 414, a P-state duty ratio calculation module 415 and an N-state duty ratio calculation module 416.

In Figure 7 Igd_ref the d-axis reference current corresponding to the dq conversion, I _{gq_ref} the q-axis reference current corresponding to the dq conversion, d _md is a d-axis a minimum duty ratio, i _gd is the grid current, d _pa, d _oa and d _na is G (s) is the transfer function of the control module, G (s) is the transfer function of the system, Hc (s) is the correction coefficient of the current detection sensor to be.

The d-axis minimum duty ratio calculating module 411 calculates the difference between the reference current of the d axis and the corrected system current detected and corrected by the sensor as the minimum duty ratio d _dm of the d axis through the transfer function of the control module

Similarly, the q-axis minimum duty ratio calculation module 412 calculates the difference between the q-axis reference current and the corrected system current detected and corrected by the sensor to the q-axis minimum duty ratio (d _mq ) through the transfer function of the control module do

The minimum duty ratios d _md and d _mq output from the d-axis minimum duty ratio calculating module 411 and the q-axis minimum duty ratio calculating module 412 are input to the state conversion duty ratio calculating module 413 d axis P state duty ratio d _pd , d axis N state duty ratio d _nd , q axis N state duty ratio d _nq , and q axis P state duty ratio d _pq , respectively.

Each of the state-converted duty ratios is subjected to inverse dq conversion through an inverse dq conversion module 414, and the d-axis and the q-axis are multiplied by the duty ratios d _pa , d _pb , d _pc , d _{na on a,} , d _nb and d _nc .

The output duty ratios d _pa , d _pb , d _pc , d _na , d _nb and d _nc are determined by the P state duty ratio calculation module 415 and the N state duty ratio calculation module 416 of each phase, (D _pa , d _pb , d _pc ) and the duty ratio (d _na , d _nb , d _nc ) of the N state with respect to each phase, and outputs the duty ratio The duty ratio is input to the transfer function Gc (s) of the control module and is input to the current controller 520 for controlling the neutral state current in the P state and the neutral state current in the N state in the next cycle.

8 is a graph showing a relationship between a line voltage (a), an output current (b) of each phase and a current (c) of a d-axis, which are controlled through an LCL filter control unit in a high efficiency solar inverter system equipped with a three- Fig.

8A, mode 1 is a line voltage in a state where a conventional LCL filter is used, and mode 2 is a line voltage in a case where a d-axis current command is 14A (Mode 3) is a line-to-line voltage in a state of being controlled through the LCL filter 400 according to the present invention.

As shown in FIG. 8 (b), it can be seen that the line-to-line voltage remains constant even if the reference current (command current) is changed from mode 1 to mode 2. That is, the above graph means that the line voltage can be kept constant even if the current value output from the solar array 100 varies according to the sunlight to be converted.

8, it can be seen that the output current of each phase is mixed with the output current at the moment when the command current is changed (mode 2). However, the output current can be controlled through the LCL filter 400 according to the present invention (Mode 3), the occurrence of vibration is minimized, and the waveform of the output current is maintained to maintain the sinusoidal shape. In other words, the harmonics were removed.

Meanwhile, in the present invention, an MPPT controller 500 for controlling operation at a maximum power point in consideration of the output power of the solar array 100 is provided.

9 is a graph showing P-V and I-V characteristics output from the solar array in the solar power generation system.

The characteristics of the power-voltage curve and the current-voltage curve vary nonlinearly depending on the external environment such as solar radiation amount and temperature. Maximum power point tracking (MPPT) control is required to always maintain the maximum active power from the solar array having such nonlinear current characteristics.

If the MPPT is controlled abnormally, the output current becomes unstable and power quality deterioration may occur. Therefore, the inverter must develop at the maximum power point (P _MPP ).

The nonlinear current characteristic of the solar array can be expressed by the following equation (6).

(6)

Here, I _q is the saturation current, q is the charge amount of electrons in the light-generating current, I _sat is a photovoltaic array, A is the ideality factor of the diode, K is Boltzmann's constant, T is the absolute temperature of the photovoltaic array, V _PV solar The voltage of the optical array, I _PV is the current in the solar array and R _S is the series resistance of the solar array.

Perturbation and Observation (P & O) tracking method or IncCond (Incremental Conductance) tracking method can be used as a method of following the maximum power point of the solar array.

The P & O tracking method compares the current power with the past power using the variation of the PV power, and the IncCond tracking method compares the load impedance with the solar array impedance.

Also, there are P & O method, Look up Table method, and IC method as MPPT algorithm. The P & O method has the advantage of finding the maximum power point without knowing the characteristics of the solar array. However, when power ripple or measurement error occurs, the maximum power point can not be found.

On the other hand, it is difficult to accurately measure the input current and the input voltage due to the switching noise and the measurement error of the inverter 300. Therefore, the MPPT controller 500 according to the present invention can be used by calculating the current of the solar array array measured at a period of 100 ms and the voltage of the solar array array.

That is, the power _PV of the solar array is calculated by multiplying the voltage V _PV of the solar array and the current I _{PV of the} solar array.

In addition, the afterimage power for calculating the hysteresis power (P _Hys ) can be calculated as a product of the gain (K _r ) and the current power (P _solar ) of the _solar array. At this time, the gain (K _r ) should be less than 1 and greater than 0. The value of the residual image power may be determined according to the value of the gain K _r . If the value of the gain K _r is too large, the efficiency may be deteriorated. If the value of the residual gain K _r is too small, the tracking of the maximum power point may be difficult.

With this configuration, compared to the current _PV array power (P _PV ) and the _PV array power (P _PVP ) before 100 ms, the current PV array power (P _PV ) is less than 100 ms before the PV array power P _PVP ), it is determined that the power generation amount of the solar array is increased and the counter is increased.

Relatively from the current power (P _PV) is 100ms previous power (P _PVP) and the power (P _PV) power (P _PVP) of 100ms previous solar array current PV array comparison of the photovoltaic array of the photovoltaic array as In the small case, it is compared with the hysteresis power (P _Hys ). If the current PV array power P _PV is compared with the hysteresis power P _Hys and the current PV array power P _PV is relatively larger than the hysteresis power P _Hys , And is configured so as not to affect the direction of the MPPT.

In addition, the current power of the solar array (P _Pv) and hysteresis power (P _HYs) the comparison if the current power (P _Pv) of the photovoltaic array is relatively smaller than the hysteresis power (P _HYs), the power generation amount of the solar array, And if the decrease is greater than or equal to the predetermined count, the direction of the MPPT is switched.

That is, the present solar power of the optical array (P _Pv) and hysteresis power (P _HYs) the comparison at the time or MPPT that is determined to be relatively smaller than the power (P _Pv) the hysteresis power (P _HYs) of the current solar array The point at which the direction changes is followed by the maximum power point.

When the above configuration is applied to FIG. 5, it can be configured as shown in FIG.

10 is a diagram illustrating a configuration of another embodiment of an MPPT control unit in a high efficiency solar inverter system having a three-level boost converter according to the present invention.

Referring to the accompanying Figure 10, the power (P _PV) of a photovoltaic array and 100ms for receiving the transfer of the solar array power (P _PVP) and comparing it, the power of the current solar array according to the comparison (P _PV) The P & O tracking module 513 finally compares the maximum power point d _{mppt with the} hysteresis power P _{Hys in the} case where the power P _PVP is relatively smaller than the power P _PVP of the solar array 100 ms before.

The maximum power point d _mppt output from the P & O tracking module 513 is used as a switching signal of the element S _B1 switching the both terminal voltage V _dcp of the upper capacitor C _dcp of the DC converter 200 , the both-end voltage (V _dcn) of potential side capacitor both-end voltage (V _dcp) and bottom-side capacitor is determined by comparing the both-end voltage (V _dcn) via the 2 PI control module 412 signals are down-side capacitor (C _dcn) And is used as a switching signal for the switching element S _B2 .

On the other hand, when the solar inverter is connected to the system, the phase of the solar power generation power must be synchronized with the phase of the system. If phase synchronization is not performed, noise or disturbance may be introduced into the power system, and serious accidents may occur in the PV system as well as the system.

Accordingly, in the present invention, when the solar inverter is connected to the system, the PLL controller 530 is configured to synchronize the phase of the photovoltaic generation power with the phase of the system.

The method of detecting and synchronizing the correct phase of the grid voltage in the grid connection is classified into the zero point detection method, the synchronous coordinate system PLL method, and the normal minute extraction method.

Also, in order to eliminate the influence of the unbalance of the power supply voltage during the phase detection, a normal voltage of three phases, which is a balanced voltage, can be detected and used as an input to phase angle control detection. At this time, an all-pass filter which is a 90-degree phase delay filter can be used to detect the normal voltage.

The phase angle output from the PLL controller 530 is input to the current controller 520.

The current controller 520 controls the timing of the switching elements of the inverter 300 based on the duty ratio calculated by the LCL filter controller 410 and the phase angle output from the PLL controller 530.

According to the present invention, it is possible to provide a high-efficiency solar inverter system including a three-level boost converter capable of keeping the neutral point voltage at 0V while keeping the maximum power point, thereby improving the efficiency of the solar power generation system have.

In addition, since the current flowing in the neutral point can be controlled, the stabilized output power can be provided by maintaining the voltage of the neutral point at 0V.

In addition, since the harmonics of the output power can be removed, the quality of the supplied power can be improved.

While the present invention has been particularly shown and described with reference to exemplary embodiments thereof, it is to be understood that the invention is not limited to the disclosed exemplary embodiments, but, on the contrary, It will be understood by those skilled in the art that various changes in form and details may be made therein without departing from the spirit and scope of the invention as defined by the appended claims.

100: solar array 200: DC converter
300: inverter 400: LCL filter
410: LCL filter control unit 411: d axis minimum duty ratio calculation module
412: q-axis minimum duty ratio calculating module 413: State conversion duty ratio calculating module
414: Inverse dq conversion module 415: P state duty ratio calculation module
416: N-state duty ratio calculation module 500: MPPT controller
510: MPPT control unit 511: First PI control module
512: second PI control module 513: P & O tracking module
520: current control unit 530: PLL control unit

Claims (6)

A solar array 100 for collecting sunlight incident from outside to generate electricity;
A DC converter 200 for maintaining the output power of the solar array 100 at a constant DC link voltage;
An inverter (300) for converting a DC power outputted from the DC converter (200) into an AC power;
In order to remove a harmonic component from the output power of the inverter 300, an LCL filter 400 (hereinafter, referred to as " LCL ") 400 in which an inductor connected in series to each phase, a capacitor connected in parallel to each phase, ); And
And an MPPT controller (500) for controlling operation at a maximum power point based on the output power of the solar array (100)
The MPPT controller (500)
An MPPT control unit 510 for keeping the voltage of the capacitor voltage (V _dcp , V _dcn ) of the DC converter 200 the same based on the maximum power follow-up point;
A current controller 520 for controlling a switching element of the inverter 300; And
And a PLL controller 530 for synchronizing the phases of the system phase and the photovoltaic generation power,
The current control unit 520,
The timing for the switching elements of the inverter 300 is controlled based on the duty ratio calculated by the LCL filter control unit 410 and the phase angle output from the PLL control unit 530. The timing periods for the switching elements are discontinuous non- Averaging is made for the switching cycle average for the time-varying model, the AC output of each phase is converted into a dq-converted continuous-time nonlinear time-invariant model,
The LCL filter control unit 410,
The d-axis minimum duty ratio calculating module calculates the minimum duty ratio (d _md ) of the d axis through the transfer function of the control module, and calculates the difference between the reference current of the d axis converted by the dq conversion and the corrected system current detected by the sensor (411);
a q-axis minimum duty ratio calculating module that calculates the difference between the reference current of the q-axis converted by the dq conversion and the difference of the grid current detected and corrected by the sensor to the q-axis minimum duty ratio (d _mq ) (412);
The minimum duty ratios d _md and d _mq output from the d-axis minimum duty ratio calculating module 411 and the q-axis minimum duty ratio calculating module 412 are calculated as the d-axis P state duty ratios d _pd , d axis N state duty ratio (d _nd), the q-axis N state duty ratio (d _nq) and the q-axis P state condition such that each calculated as the duty ratio (d _pq) converts the duty ratio calculation module 413;
An inverse dq conversion module 414 in which inverse dq conversion is performed for each of the duty ratios converted by the state conversion duty ratio calculation module 413;
But the output of the duty ratio (d _pa, d _pb, d _pc) by subtracting the minimum duty ratio is output from the inverse dq conversion module 414 to the P state duty ratio (d _pa, d _pb, d _pc), P State duty ratio calculating module 415 for outputting the absolute value of the minimum value among the duty ratios (d _pa , d _pb , d _pc ) of the state to the P duty ratios (d _pa , d _pb , d _pc ); And
But the output of the duty ratio (d _na, d _nb, d _nc) by subtracting the minimum duty ratio is output from the inverse dq conversion module 414, a duty ratio (d _na, d _nb, d _nc) of the N states, N duty ratio (d _na, d _{nb, nc} d) N state duty ratio calculation module 416 to the output by adding the absolute value of the minimum value to the duty ratio (d _{na, nb} d, d _nc) of the N states in the state;
Wherein the absolute value of the duty ratio of each phase is determined to determine the current of the neutral point.
The method according to claim 1,
The MPPT control unit 510,
A capacitor (C _dcp) switching signal to the device (S _B1) for switching the both-end voltage (V _dcp) of a capacitor the voltage across (V _dcp) and the capacitor to compare a reference voltage (V _{dcp _ref)} of claim 1 PI control module ( 511), < / RTI >
The switching signal for the element S _B2 switching the both terminal voltage V _dcn of the capacitor C _dcn is _obtained by comparing the voltage V _dcp across the upper capacitor and the voltage V _dcn across the lower capacitor, Module 512,
The signal d ₁ output through the first PI control module 511 is output by PWM control,
The signal d ₁ is summed with the signal d ₂ output through the second PI control module 512 and subtracted from the peak voltage of the diode D2 to be output by PWM control Wherein the three-level boost converter is a high efficiency solar inverter system having a three-level boost converter.
delete delete The method according to claim 1,
Wherein the DC converter (200) comprises a three-level boost converter.
The method according to claim 1,
The maximum power point is a maximum power point,
Of the solar array power (P _PV) and the power (P _PV) of the current solar array and compare 100ms before the solar array power (P _PVP) is relatively more power (P _PVP) of 100ms previous solar array It is determined that the power generation amount of the solar array is increased, and the counter is increased,
Solar power of the optical array (P _PV) is 100ms previous solar power of the optical array (P _PVP) and compared to the current solar power of the optical array (P _PV) is relatively smaller than 100ms previous power of the solar array (P _{PVP) Gt} ; _{Hys &lt}; / RTI &_gt; power,
When the power P _Pv of the solar array is compared with the hysteresis power P _HYs and the power P _Pv of the solar array is relatively smaller than the hysteresis power P _HYs , In addition,
When the power P _Pv of the solar array is compared with the hysteresis power P _HYs and the current PV array power P _Pv is determined to be relatively smaller than the hysteresis power P _HYs , Level boost converter according to claim 1 or 2, wherein the point of time of switching is followed by the maximum power point.

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