KR101451579B1 - Liquid Crystal Display Device - Google Patents

Abstract

The present invention relates to a liquid crystal display device capable of sensing the presence or absence of a touch and the touch position by recognizing a change in the liquid crystal electrostatic capacity in response to a touch, comprising a first substrate and a second substrate opposed to each other, A plurality of gate lines and data lines crossing each other and defining a plurality of pixel regions, pixel transistors formed at respective intersections of the plurality of gate lines and data lines, and a plurality of pixel electrodes formed in the pixel regions, 2. A liquid crystal display device comprising: a common electrode formed on a front surface of a substrate; a liquid crystal layer filled between the first and second substrates; a liquid crystal capacitor formed between the pixel electrodes and the common electrode; A second storage capacitor formed in series between the nth gate line and the common electrode, A drain electrode is connected to the first node between the second storage capacitor and the sensing capacitor, a source electrode is connected to the lead-out wiring, a gate electrode of the n- And a sensing transistor connected to the gate electrode.

Capacitors, sensor capacitors, diode resistors, touch sensors, switching capacitors, sensing transistors

Description

[0001] The present invention relates to a liquid crystal display device,

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a liquid crystal display device, and more particularly, to a liquid crystal display device capable of sensing the presence or absence of a touch and the touch position by recognizing a change in a liquid crystal electrostatic capacity according to a touch.

In recent years, as the information age has come to a full-fledged information age, a display field for visually expressing electrical information signals has been rapidly developed. In response to this, various flat panel display devices having excellent performance of thinning, light weight, Flat Display Device) has been developed to replace CRT (Cathode Ray Tube).

Specific examples of such flat panel display devices include a liquid crystal display device (LCD), a plasma display panel (PDP), a field emission display (FED) (Electro Luminescence Display Device: ELD). In general, a flat panel display panel that realizes an image is an essential component. The flat panel display panel has a pair of light emitting or polarizing material layers interposed therebetween And a transparent insulating substrate facing each other.

In a liquid crystal display device, an image is displayed by adjusting the light transmittance of a liquid crystal using an electric field. To this end, the image display apparatus includes a display panel having a liquid crystal cell, a backlight unit for irradiating the display panel with light, and a drive circuit for driving the liquid crystal cell.

The display panel is formed such that a plurality of gate lines and a plurality of data lines intersect to define a plurality of unit pixel regions. At this time, each pixel region includes a thin film transistor array substrate and a color filter array substrate facing each other, a spacer positioned to maintain a constant cell gap between the two substrates, and a liquid crystal filled in the cell gap.

The thin film transistor array substrate includes gate lines and data lines, a thin film transistor formed as a switching element for each intersection of the gate lines and the data lines, a pixel electrode formed in a unit of a liquid crystal cell and connected to the thin film transistor, And an applied alignment film. The gate lines and the data lines are supplied with signals from the driving circuits through respective pad portions.

The thin film transistor supplies a pixel voltage signal supplied to the data line in response to a scan signal supplied to the gate line.

The color filter array substrate includes color filters formed in units of liquid crystal cells, a black matrix for separating color filters and reflecting external light, a common electrode for supplying a reference voltage commonly to the liquid crystal cells, .

The thin film transistor substrate thus manufactured and the color filter array substrate are aligned by aligning each other, then the liquid crystal is injected and sealed.

As described above, there is an increasing demand for a touch panel capable of recognizing a touch area and transmitting other information in response to the touch area through a hand or a separate input device. Currently, such a touch panel is applied to the outer surface of a liquid crystal display device, and efforts have been made to mount the touch panel inside the liquid crystal display device.

The example described below shows an example in which the touch panel is formed in the liquid crystal display device to prevent an increase in volume accompanied by the attachment of the touch panel.

Hereinafter, a conventional liquid crystal display device will be described with reference to the accompanying drawings.

FIG. 1 is a schematic circuit diagram showing a conventional capacitance method, and FIG. 2 is a circuit diagram showing a capacitance sensor and its driving method of FIG.

1 and 2, a conventional liquid crystal display device includes first and second substrates (not shown) facing each other, a liquid crystal layer (not shown) filled between the first and second substrates, A gate line 11 and a data line 12 defining a pixel region and a thin film transistor TFT formed at an intersection of the gate line 11 and the data line 12 . A common electrode (not shown, Vcom (application voltage)) is formed on the entire surface of the second substrate, and a pixel electrode 13 is formed in the pixel region on the first substrate.

Here, a first wiring 21 positioned in parallel with the gate line 11 and a second wiring 22 disposed in parallel with the data line 12 are formed outside the pixel region for capacitance sensing, A first reference voltage line Vref1 and a second reference voltage line Vref2 are formed parallel to the first wiring 21 and the second wiring 22, respectively.

A first auxiliary capacitor (Cref1) is formed between the first reference voltage line (Vref1) and the first wiring line (21), a first capacitance capacitor (Cref1) is formed between the first reference voltage line (Vref1) and the common electrode Clc1) is formed. In this case, the first auxiliary capacitor Cref1 and the first capacitance capacitor Clc1 are formed in series. The first auxiliary capacitor (Cref1) and the first capacitance capacitor (Clc1) of the series connection are formed corresponding to each pixel.

Similarly, a second auxiliary capacitor (Cref2) is formed between the second reference voltage line (Vref2) and the second wiring (22), and a second electrostatic charge A capacitive capacitor Clc2 is formed. The second auxiliary capacitor (Cref2) and the second capacitance capacitor (Clc2) are also connected in series.

The signal sensed by the first wiring 21 has an amplifier 31 as shown in FIG. 2 at its end and is connected to each of the capacitance capacitors Clc 32 and the auxiliary capacitor Cref 33, And the touch position and the touch position are detected according to the value obtained by amplifying the voltage applied to the node Vn1. That is, the voltage value at the node Vn1 varies depending on whether the capacitance value of the capacitance capacitor Clc 32 is touched or not, and the value of the capacitance capacitor Clc 32 is touched When the value of the voltage Vout output from the node Vn1 through the amplifier 31 is measured differently from the initial state at the time of detecting the touch position,

The first and second switches sw1 and sw2 are provided on the opposite side of the output side of the node Vnl of the capacitive capacitor and the auxiliary capacitor to apply the first and second switch-specific signals.

The two common voltage values Vcomh and Vcoml cross each other on the first and second reference voltage lines Vref1 and Vref2 connected to one side of the first and second auxiliary capacitors Cref1 and Cref2 33, do. When the common voltage is VcomH, the voltage Va is applied through the first switch sw1 and stored in the Clc 32, and the common voltage is outputted to the amplifier 31 when the common voltage is Vcoml. As a result, the output voltage includes information of the Clc 32 value changed at the time of touch. The change in output voltage due to the change in capacitance is as follows.

In the case of such a configuration, it is required to arrange crossing of the X-axis and the Y-axis, thereby increasing parasitic capacitors.

However, the liquid crystal display device which recognizes touch by the above-described conventional capacitance method has the following problems.

First, it is possible to know whether a touch is detected by detecting a voltage change at a point corresponding to one pixel, and it is impossible to recognize when touching several points at the same time.

Second, in order to sense the touch, intersection wiring is formed to detect the X-axis position and the Y-axis position, respectively. It is expected that the size of the panel increases, and the line resistance, A parasitic capacitor between the wirings is added, coupling capacitance is increased, and the signal to noise (S / N) ratio is lowered, so that the reliability of the signal is lowered and the recognition of the touch may become difficult.

It is an object of the present invention to provide a liquid crystal display device capable of sensing the presence or absence of a touch and the touch position by recognizing a change in a liquid crystal electrostatic capacity due to a touch.

According to an aspect of the present invention, there is provided a liquid crystal display device including a first substrate and a second substrate facing each other, a plurality of gate lines and data lines crossing each other and defining a plurality of pixel regions, A plurality of pixel electrodes formed in each of the pixel regions; a common electrode formed on the entire surface of the second substrate; A first storage capacitor formed between each of the pixel electrodes on the first substrate and the first storage electrode, a first storage capacitor formed between the n-th gate line and the first storage electrode, A second storage capacitor and a sensing capacitor formed in series between the common electrodes, a readout wiring parallel to the mth data line, 2 there is a second drain electrode in a first node between the storage capacitor and a sensing capacitor, the source electrode to the lead-out wire, characterized by comprising an sensing transistor gate electrode connected to a gate line n-1.

According to another aspect of the present invention, there is provided a liquid crystal display device including a first substrate and a second substrate which are opposed to each other, a plurality of gate lines and data lines intersecting each other and defining a plurality of pixel regions, A pixel electrode formed at each intersection of the plurality of gate lines and the data line, a plurality of pixel electrodes formed in each pixel region, a common electrode formed over the entire surface of the second substrate, A liquid crystal layer filled between the first and second substrates; a liquid crystal capacitor formed between each of the pixel electrodes and the common electrode; and a first capacitor formed between each pixel electrode on the first substrate and the first storage electrode, A second storage capacitor and a sensing capacitor formed in series between the common line and the common electrode, A drain electrode is connected to the first node between the second storage capacitor and the sensing capacitor, a source electrode is connected to the lead-out wiring, a gate electrode is connected to the n-1 gate line, There is another feature that includes transistors.

Here, the sensing capacitor varies in accordance with the electrostatic capacity corresponding to the thickness variation of the liquid crystal layer at the touch point.

The first node may be connected to a power supply voltage line, and a resistor may be further formed between the power supply voltage line and the first node.

The first storage capacitor is defined by the pixel electrode and a first storage electrode overlapping with the pixel electrode. The second storage capacitor is connected to the gate line and the gate line, 2 storage electrode.

On the other hand, the time constant defined by the resistance value of the resistor and the capacitance value of the second storage capacitor, the sensing capacitor, and the sensing transistor is smaller than one frame time, and the gate high signal applied to the gate line It is preferable to be larger than the on-time period.

Here, the resistor may include a semiconductor layer or may have a diode structure.

The liquid crystal display of the present invention as described above has the following effects.

First, compared with a conventional capacitance type having wirings (lead-out wirings) located in the X and Y-axis directions, a lead-out wiring in a direction parallel to the data lines is selectively provided and a sensing portion is provided in the pixel region, Even if the lead-out wiring is not provided for each line, it is possible to perform the touch position, optimize the structure, and reduce the parasitic capacitance between the wirings. Accordingly, the influence on the parasitic capacitance is less than that in the large area, and the touch detection can be stably performed.

Second, the sensing transistor for sensing formed between the gate line and the lead-out wiring can detect the X-axis position by detecting the gate line connected to the sensing transistor even if the sensing part in the X-axis direction is omitted. In this case, the Y-axis touch position is detected by the lead-out wiring.

Third, unlike the photo method, which is influenced by external light, touch sensing is possible without touching the external environment by detecting the presence or absence of touch by the capacitance change of the touch area.

Fourth, when the TFT array of the liquid crystal panel is formed, the sensing part is formed at the same time, and the sensing part is integrated into the liquid crystal panel, so that the touch sensing can be performed without attaching a separate touch panel. It is possible to make the light weight thinner and thinner, and the manufacturing cost can be lowered.

Hereinafter, a liquid crystal display device and a touch sensing method of the present invention will be described in detail with reference to the accompanying drawings.

3 is a circuit diagram showing a liquid crystal display according to a first embodiment of the present invention.

As shown in FIG. 3, the liquid crystal display according to the first embodiment of the present invention includes first and second substrates 100 (not shown in FIGS. 7A and 7B) A thin film transistor array formed on the first substrate 100, and a color filter array formed on the second substrate.

The color filter array includes a black matrix layer (not shown) formed in the non-pixel region, a color filter layer (not shown) for determining color of each pixel region, and a common electrode (not shown) formed on the entire surface of the second substrate .

The thin film transistor array includes a gate line 101 and a data line 102 intersecting each other on the first substrate (see 100 in FIG. 7) to define a pixel region, a gate line 101 and a data line A liquid crystal capacitor 112 (Clc) and a first capacitor (Clc) are connected in parallel between the pixel transistor 111 (Tpixel) formed at the intersection of the drain terminal and the common electrode 203 of the pixel transistor 151 And is connected to the storage capacitor 113 (Cst1). In the liquid crystal panel, a liquid crystal capacitor (hereinafter, referred to as " liquid crystal capacitor ") is interposed between the common electrode 203 and the drain terminal of the pixel transistor 111 (Tpixel) And a first storage capacitor 113 (Cst1) is formed between the drain terminal of the pixel transistor 111 (Vpixel) and the first voltage line L1 (between the layers). In this case, the first voltage line L1 may be formed separately, but the common electrode 203 or the front gate line Gn-1 may be used for optimizing the structure.

In the liquid crystal display of the present invention, a pixel thin film transistor 151 (Tpixel) for driving a pixel and a liquid crystal capacitor 152 connected thereto are connected between the gate line 101 (Gn) and the common electrode 203, Between the gate line 101 (Gn) and the common electrode 203 and the gate line 101 '(Gn-1) at the previous stage, in addition to the first storage capacitor Clc and the first storage capacitor 153 (Cst1) More.

The touch sensing unit includes a second storage capacitor Cst2 and a sensing capacitor Csen connected in series between the gate line 101 and the common electrode 203, A drain electrode is connected to the node A between the first storage capacitor 114 (Cst2) and the sensing capacitor 115 (Csen), a gate electrode is connected to the gate line 101 'of the previous stage, And a sensing transistor 116 (Tsw) having a source electrode connected to a read out line (ROIC) 118 formed in parallel. A resistor 117 (R1) for stabilizing the voltage value applied to the drain electrode of the sensing transistor 116 (Tsw) is connected between the node A and the second power supply voltage (Vd2) line L2. ) Is further added.

In addition, the touch sensing unit may be formed for each pixel or regularly for every predetermined number of pixels. Here, the position of the touch sensing unit may be determined corresponding to the number of pixels entering the area of one touch area in consideration of an area of a general touch area and a size of a pixel. That is, when the number of pixels entering the area at one touch region is n, the touch sensing unit may be formed for every n pixels.

The first voltage line L1 is a line for applying the first power source voltage Vd1 and the first power source voltage Vd1 is a common voltage applied to the common electrode formed on the second substrate Vcom). The first voltage line L1 is connected to the other electrode of the first storage capacitor 113 (Cst1). That is, one electrode of the first storage capacitor 113 becomes a pixel electrode according to the formation region of the first storage capacitor 113 (Cst1) defined to overlap with the pixel electrode, 1 voltage line L1 may be a common line formed in the pixel regions parallel to the gate line Gn-1 or the gate line separately. The second voltage line L2 may be a line for applying the second power source voltage Vd2, for example, a common line formed on the first substrate 100. [

The readout line ROIC senses a current flowing through the sensing transistor 116 and has an amplifier at its end so that the sensing transistor 116 (Tsw) The sensitivity can be improved by amplifying the sensed current.

Here, the resistance value R1 of the resistor 117 is smaller than one frame time in the calculation of the time constant R1 占 (Csen + Cst2 + Csw) and is smaller than the ON time (1H) of one gate high signal . This is because, in one frame, the gate voltage value applied to the sensing transistor Tsw is maintained longer than the on-time of the gate voltage signal applied to the sensing transistor Tsw, Time recognition of the sensing transistor for at least the ON time of the sensing transistor.

Here, Csw represents the capacitance between the gate electrode and the channel of the sensing transistor 116, Cst2 represents the capacitance of the second storage capacitor 114, and Csen represents the capacitance of the sensing capacitor 115.

The second voltage Vd2 applied to the second voltage line L2 is set such that when a high signal is applied to the previous gate line 101 '(Gn-1), a current is applied to the sensing transistor 116 (Tsw) The sensing transistor 116 (Tsw) is activated when a high signal is applied to the front gate line Gn-1 '101' so that the A node Current flows through the sensing transistor 116 to the lead-out wiring 115 (RIOC) to detect whether or not it is touched.

FIG. 4 is a graph showing the change in the amount of charge with time at the node A in FIG.

As shown in FIG. 4, when the amount of charge between the sensing capacitor Csen 115 and the second storage capacitor Cst2 114 is examined, the thickness of the liquid crystal layer is lowered by the touch at the touch point, , The capacitance of the sensing capacitor (Csen) 115 is increased. Accordingly, the increased amount of charge exits to the lead-out wiring (ROIC) 115 via the sensing transistor 116 when the front gate line Gn-1 '101' is turned on.

In this case, the change in the charge amount at the node A is as follows.

That is, after? Qsen = Q'touch - Qtouch ago = (C'sen-Csen) (Vsen-Vref)

Csen denotes an increased capacitance value of the sensing capacitor after touch, Csen denotes a capacitance value of the sensing capacitor in a normal state in which there is no touch, Vsen denotes a voltage value at the A node when touched, Represents the voltage value of the A node in the steady state.

As described above, the capacitance increases from Cen to C'sen at the time of touch, so that the total charge amount Qsen at the node A is increased, and the lead-out wiring 118 is escaped through the sensing transistor 116, Accordingly, a change in the amount of charge before and after the touch is caused by a voltage change in the lead-out wiring, and the presence or absence of the touch and the position can be grasped by the voltage change.

The touch position determines the Y-axis and X-axis positions on the lead-out wiring where the voltage change is detected and the corresponding gate line connected thereto.

Hereinafter, a liquid crystal display device according to a first embodiment of the present invention will be described in detail with reference to plan views and sectional views.

5 is a plan view showing a liquid crystal display device equivalent to the circuit diagram of FIG. 3, FIG. 6 is a plan view specifically showing the sensing transistor Tsw of FIG. 3, I 'line, and II-II' line.

5 to 7B, the liquid crystal display according to the first embodiment of the present invention includes a first substrate 100 and a second substrate (not shown) facing each other, A plurality of gate lines 101 and a plurality of data lines 102 defining a plurality of pixel regions and pixel transistors Vpixel formed at each intersection of the plurality of gate lines 101 and data lines 102, A common electrode (not shown) formed on the entire surface of the second substrate, a liquid crystal layer (not shown) filled between the first and second substrates, and a plurality of pixel electrodes A liquid crystal capacitor (refer to Clc in FIG. 3) formed between the electrode 103 and the common electrode; a first storage capacitor formed between each pixel electrode 103 on the first substrate 100 and the first storage electrode 121a; (Cst1), a common gate (Cst1) between the nth gate line (101) and the liquid crystal layer, A second storage capacitor Cst2 and a sensing capacitor Csen formed in series between the first storage capacitor Cs1 and the second storage capacitor Cs2 and a lead-out wiring 118 (ROIC) parallel to the mth data line 102, A drain electrode is connected to a node between the sensing capacitor Cst2 and the sensing capacitor Csen and a sensing transistor Tsw having a drain electrode connected to the lead-out wiring 118 and a gate electrode connected to the n-1th gate line 101 ' .

More specifically, it is as follows.

5 and 6, a shield pattern 121a is formed inside the gate line 101 and the data line 102 to surround the edge of the pixel region, and the shield pattern 121a is formed on the adjacent pixel Are connected to the regions via common lines (121). Here, the shield pattern 121a and the common line 121 are integrally formed. The common lines 121 are formed to be parallel to each other and spaced apart from each other by a predetermined distance.

In addition, the shield pattern 121a has a U-shaped shape formed in the periphery of each pixel region.

The pixel transistor 151 (Tpixel) formed at the intersection of the gate line 101 and the data line 102 includes a gate electrode 101a protruded from the gate line 101 and a gate electrode And a source electrode 102a and a drain electrode 102b which are spaced apart from each other and partially overlap the semiconductor layer 105. The source electrode 102a and the drain electrode 102b are formed on the semiconductor layer 105a. Here, the source electrode 102a coming into the gate electrode 101a has a U-shaped shape in plan view.

The drain electrode 102b is electrically connected to the overlapping pixel electrode 103 through the first contact portion 107a.

The transparent electrode pattern 123 partially overlaps with the lower end of the gate line 101 and is in electrical contact with the second metal pattern 122 through the second contact portion 107b. Here, the second metal pattern 122 is formed of a second metal in the same layer as the data line 102 and the lead-out wiring 132, and is formed in parallel with each other. The second metal pattern 122 includes a protruding portion at a contact portion with the transparent electrode pattern 123 and a first protrusion 122c having a C shape at an end thereof. And a second protrusion 142 spaced apart from the 'C' -shaped first protrusion 122c and facing the first protrusion 122c in a mirror-like shape. The first and second protrusions 122c and 142 are electrically connected to each other through the second voltage line L2 and the third and fourth contact portions 127c and 17b.

In addition, a second voltage line L2 is formed parallel to the gate line 101, passing through the first and second protrusions 122c and 142 in the lateral direction.

A first storage capacitor Cst1 is formed at a portion where the pixel electrode 103 and the shield pattern 121a overlap each other and a common capacitor Cst1 is formed between the pixel electrode pattern 123 and the liquid crystal layer, A sensing capacitor Csen 115 is defined between the electrodes and a second storage capacitor Cst2 is defined at the overlapping portion between the lower gate lines 114.

As shown in FIG. 6, the second metal pattern 122 extends to the front gate line Gn-1 101 'to function as a drain electrode, and the drain electrode end is surrounded by a' U ' The lead-out wiring 132 including the source electrode 132a is formed in parallel with the second metal pattern 122 and the data line 102, and the source electrode 132a / A semiconductor layer 135 is formed between the gate line 101 'and the gate line 101', thereby forming a sensing transistor Tsw.

7A and 7B, a plurality of gate lines 101, 101 ',... Including a gate electrode 101a, a common line 121 including a shield pattern 121a, A semiconductor layer 105 is formed on a portion of the gate insulating film 106 corresponding to the gate electrode 101a and the first and second protrusions 122c And the second semiconductor layer 125 is formed at a portion corresponding to the second semiconductor layer 125. [

The semiconductor layer 105 and the second semiconductor layer 125 are formed by forming an amorphous silicon layer 105a on the lower side and an impurity layer 105b and 125b on the upper side of the semiconductor layer 105 and the n + At this time, each of the impurity layers 105b and 125b is removed in accordance with the spacing between the small electrode 102a and the drain electrode 102b formed on the top and the spacing between the first and second protrusions 122c and 142 . The amorphous silicon layer 135a and the impurity layer 135b are formed by layering the third semiconductor layer 135 in the same manner on the predetermined portion of the front gate line 101 ' The impurity layer 135b is removed between the source electrode 132a protruding from the first metal interconnection 132 and the second metal interconnection 122 serving as a drain electrode.

A protection film 107 is formed on the source / drain electrodes 102a / 102b and the first and second protrusions 122c and 143. The first to fourth contact portions 107a, 107b, and 127a And 127b are defined by selectively removing the protective film 107 and removing the second metal in the lower portion.

FIG. 8 is a circuit diagram showing an example in which the resistor of FIG. 5 is formed in the form of a thin film transistor.

FIG. 8 shows an example in which the resistor R of FIG. 5 is constituted by a thin film transistor functioning as a diode connected to a source electrode and a gate electrode. The forming method may be the same as the method of forming the pixel transistor or the sensing transistor in FIGS. 5 to 7, except that the source electrode and the gate electrode are in contact with each other and the other conditions are the same.

9 is a graph showing changes in the amount of charge at the 'A' node and voltage change of the lead-out wiring according to the capacitance change of the sensing capacitor.

As shown in FIG. 9, as the cell gap decreases at the touch point, the capacitance observed at the node A increases, and the voltage Vroic value on the lead-out wiring side also increases. That is, the charge amount of the right ordinate in the graph is the capacitance value observed at the node A, and in this case, the capacitance of the sensing capacitor capacitance Cst2 with respect to the capacitance value Cst2 of the second storage capacitor having a constant value, Csen / Cst2 representing the value Csen is linearly increased in proportion to the increase in the charge amount Qa. The left ordinate indicates the voltage Vroic of the lead-out wiring, and the voltage Vroic observed in the lead-out wiring increases linearly with the increase of the Csen / Cs .

That is, when a touch is generated at a predetermined portion, the thickness of the cell gap at the corresponding portion is reduced, Csen increases, and the increase of the Csen appears as an increase in the voltage value observed in the lead-out wiring, The touch position can be sensed by the change of the voltage value measured by the touch sensor 300. [

Hereinafter, a liquid crystal display device according to a second embodiment of the present invention will be described.

FIG. 10 is a circuit diagram showing a liquid crystal display device according to a second embodiment of the present invention, and FIG. 11 is a plan view showing a liquid crystal display device according to a second embodiment of the present invention.

A liquid crystal display device according to a second embodiment of the present invention shown in Figs. 10 and 11 includes a first substrate (not shown) and a second substrate (not shown) which are opposed to each other, A plurality of gate lines 401 and data lines 402 defining a plurality of pixel regions and pixel transistors Vpixel 411 formed at intersections of the plurality of gate lines 401 and data lines 402, A plurality of pixel electrodes 403 formed on the pixel regions, a common electrode Vcom formed on the entire surface of the second substrate, a common line 421 parallel to the gate lines 401, A liquid crystal capacitor Clc formed between each of the pixel electrodes 403 and the common electrode Vcom and a plurality of pixel electrodes 403 on the first substrate, A first storage capacitor formed between the first storage electrode (corresponding to the shield pattern) 421a A second storage capacitor Cst2 414 and a sensing capacitor Vsen 415 formed in series between the common line 421 (Vcom1) and the common electrode (Vcom) Out wiring 418 (RIOC) parallel to the data line 402 and a drain electrode at the A node between the second storage capacitor Cst2 and the sensing capacitor Csen are connected to the lead- And a sensing transistor Tsw having a gate electrode 401a connected to the (n-1) th gate line 401.

The liquid crystal display according to the second embodiment of the present invention is different from the circuit diagram of the first embodiment in that one electrode of the second storage capacitor 414 (Cst2) is connected to the common line instead of the gate line As a difference.

11, the sensing capacitor Csen 415 and the pixel electrode pattern 423 for forming the second storage capacitor Cst2 are connected to a common line 421 of the lower pixel region, And overlaps with the pattern extending from the pattern 421a.

In this case, the gate line Gn 401 at the lowermost stage in FIG. 11 is the current gate line Gn, and the second voltage line L2 is the same as the gate line Gn 401 passing through the center A line passing along the horizontal line adjacent to the upper side of the second voltage line L2 corresponds to the preceding gate line Gn-1 401 '. That is, a second power supply voltage line L2 is provided below the front-end gate line Gn-1 401 '. By this positional shift, corresponding to the node A serving as the drain electrode of the sensing transistor Tsw The structure is changed so that the second metal wiring pattern 422 does not pass through the opening as much as possible. Here, the pixel electrode pattern 423 and the contact portion 408c are provided on the protruding portion on the lower side of the second metal interconnection pattern 422.

According to the second embodiment of the present invention, in the second embodiment of the present invention, in the first embodiment, the second metal interconnection pattern 422 prevents the loss of the aperture ratio at the portion where the second metal interconnection pattern 422 passes through the opening portion in the vertical line direction adjacent to the lead- The aperture ratio is improved and the same touch sensing effect can be obtained as compared with the first embodiment.

In the liquid crystal display device of the present invention, the configuration of the touch sensing part and the lead-out wiring is optimized, and the parasitic capacitance level is lowered to increase the SN ratio of the panel, which is advantageous for touch sensing.

While the present invention has been described in connection with what is presently considered to be the most practical and preferred embodiment, it is to be understood that the invention is not limited to the disclosed embodiments, but, on the contrary, is intended to cover various modifications and equivalent arrangements included within the spirit and scope of the appended claims. Will be apparent to those of ordinary skill in the art.

1 is a schematic circuit diagram showing a conventional capacitance method;

Fig. 2 is a circuit diagram showing the capacitance sensor of Fig. 1 and its driving method

3 is a circuit diagram illustrating a liquid crystal display device according to a first embodiment of the present invention.

Fig. 4 is a graph showing the change in the amount of charge with time at the node A in Fig. 3

5 is a plan view showing a liquid crystal display device equivalent to the circuit diagram of FIG.

6 is a plan view specifically showing the sensing transistor Tsw of FIG.

7A and 7B are cross-sectional views taken along line I-I ', II-II' in FIGS. 5 and 6, respectively,

FIG. 8 is a circuit diagram showing an example in which the resistance of FIG. 5 is formed in the form of a thin film transistor

9 is a graph showing a change in the amount of charge at the node 'A' and a change in voltage of the lead-out wiring according to the capacitance change of the sensing capacitor

10 is a circuit diagram illustrating a liquid crystal display device according to a second embodiment of the present invention.

11 is a plan view illustrating a liquid crystal display device according to a second embodiment of the present invention.

Description of the Related Art [0002]

101: gate line 101a: gate electrode

102: Data line 102a: Source electrode

102b: drain electrode 103: pixel electrode

105: semiconductor layer 121: common line

121a: shield pattern: 123: transparent electrode pattern

122: second metal pattern 122c: first protrusion

142: second projection L2: second power supply voltage line

R1: Resistor 132: Lead-out wiring

111: pixel transistor 112: liquid crystal capacitor

113: first storage capacitor 114: second storage capacitor

115: sensing capacitor 115: sensing transistor

117: Resistance

Claims (9)

A first substrate and a second substrate facing each other; A plurality of gate lines and data lines crossing each other on the first substrate to define a plurality of pixel regions; A pixel transistor formed at each intersection of the plurality of gate lines and the data line, and a plurality of pixel electrodes formed in each pixel region; A common electrode formed on the entire surface of the second substrate; A liquid crystal layer filled between the first and second substrates; A liquid crystal capacitor formed between each of the pixel electrodes and the common electrode; A first storage capacitor formed between each pixel electrode on the first substrate and the first storage electrode; A second storage capacitor and a sensing capacitor formed in series between the nth (n is a natural number of 2 or more) gate lines and the common electrode; A lead-out wiring parallel to the mth (m is a natural number of 1 or more) data lines; A sensing transistor having a drain electrode connected to a first node between the second storage capacitor and the sensing capacitor, a source electrode connected to the lead-out wiring, and a gate electrode connected to the (n-1) th gate line; And And a power supply voltage line for applying a constant positive voltage connected to the first node. A first substrate and a second substrate facing each other; A plurality of gate lines and data lines crossing each other on the first substrate to define a plurality of pixel regions; A pixel transistor formed at each intersection of the plurality of gate lines and the data line, and a plurality of pixel electrodes formed in each pixel region; A common electrode formed on the entire surface of the second substrate; A common line parallel to the gate line; A liquid crystal layer filled between the first and second substrates; A liquid crystal capacitor formed between each of the pixel electrodes and the common electrode; A first storage capacitor formed between each pixel electrode on the first substrate and the first storage electrode; A second storage capacitor and a sensing capacitor formed in series between the common line and the common electrode; A lead-out wiring parallel to the m-th data line (m is a natural number of 1 or more); A sensing transistor having a drain electrode connected to the first node between the second storage capacitor and the sensing capacitor, a source electrode connected to the lead-out wiring, and a gate electrode connected to the n-1th gate line (n is a natural number of 2 or more); And And a power supply voltage line for applying a constant positive voltage connected to the first node. 3. The method according to claim 1 or 2, The sensing capacitor includes: Wherein the liquid crystal layer is varied in response to a change in thickness of the liquid crystal layer at a touch point. delete The method according to claim 1, And a resistance is further formed between the power supply voltage line and the first node. The method according to claim 1, Wherein the first storage capacitor is defined by the pixel electrode and a first storage electrode overlapping the pixel electrode, Wherein the second storage capacitor is defined by the gate line and a second storage electrode overlapping the gate line and connected to the first node. 6. The method of claim 5, The time constant defined by the resistance value of the resistor and the capacitance value of the second storage capacitor, the sensing capacitor, and the sensing transistor is smaller than one frame time, and the on time of the gate high signal applied to the gate line on-time period of the liquid crystal layer. 6. The method of claim 5, Wherein the resistor comprises a semiconductor layer. 6. The method of claim 5, Wherein the resistor is formed of a diode structure.

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