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KR101395906B1 - Thin film transistor and method for manufacturing thereof - Google Patents

Thin film transistor and method for manufacturing thereof Download PDF

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Publication number
KR101395906B1
KR101395906B1 KR1020120153257A KR20120153257A KR101395906B1 KR 101395906 B1 KR101395906 B1 KR 101395906B1 KR 1020120153257 A KR1020120153257 A KR 1020120153257A KR 20120153257 A KR20120153257 A KR 20120153257A KR 101395906 B1 KR101395906 B1 KR 101395906B1
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South Korea
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semiconductor layer
oxide semiconductor
gate electrode
oxide
gate
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KR1020120153257A
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Korean (ko)
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김영훈
오민석
김지완
박성규
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중앙대학교 산학협력단
전자부품연구원
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40Electrodes ; Multistep manufacturing processes therefor
    • H01L29/43Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/49Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET
    • H01L29/4908Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET for thin film semiconductor, e.g. gate of TFT
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007Multistep manufacturing processes
    • H01L29/66075Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409Unipolar field-effect transistors
    • H01L29/66477Unipolar field-effect transistors with an insulated gate, i.e. MISFET
    • H01L29/66742Thin film unipolar transistors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • H01L29/786Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H01L29/78606Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device
    • H01L29/78633Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device with a light shield
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • H01L29/786Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H01L29/7869Thin film transistors, i.e. transistors with a channel being at least partly a thin film having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Thin Film Transistor (AREA)

Abstract

The present invention relates to a thin film transistor and a manufacturing method thereof. A thin film transistor includes a gate electrode which is formed by stacking at least two gate materials on a substrate, a gate insulating layer which is formed in the upper part of the gate electrode, an oxide semiconductor layer which is formed in the upper part of the gate insulating layer, a source/drain electrode which is respectively connected to at least part of the oxide semiconductor layer. A reflection structure which has UV reflectivity higher than that of the material of the gate electrode is formed in the upper part of the gate electrode.

Description

[0001] THIN FILM TRANSISTOR AND METHOD FOR MANUFACTURING THEREOF [0002]

The present invention relates to a thin film transistor and a method of manufacturing the same, and more particularly, to a thin film transistor using a thin oxide film formed through a low temperature process as a channel layer and a method of manufacturing the same.

Generally, oxide thin films are used as electronic devices in various fields such as display field, solar cell field, touch panel field, and the like because they can form a thin film having optical transparency while being optically transparent with a simple composition change .

In order to improve the economical efficiency of device fabrication, zinc oxide (ZnO), indium zinc oxide (IZO) and indium gallium zinc oxide (IGZO) Tin, titanium, and the like have been actively studied.

On the other hand, in the production of the conventional oxide thin film, expensive vacuum deposition equipment and target process have been widely used. Recently, however, a method for forming an oxide thin film through a solution process has been intensively studied for economical process.

In the method of forming an oxide thin film by the above-described solution process, the organic solvent contained in the solution is removed, and the reaction between the metallic material and oxygen is induced to form an oxide material having a specific function (conductor, semiconductor, And a heat treatment at a high temperature of 300 DEG C or more is required in order to remove impurities that bind to the oxidized material and deteriorate the functionality of the thin film.

However, the above-described heat treatment process at a high temperature has a problem of increasing the manufacturing cost of the oxide thin film. Further, when the melting point of the substrate (or substrate) on which the oxide thin film is formed is low, the substrate is deformed (e.g., plastic substrate, fiber substrate, etc.) .

In order to solve the above-mentioned problems, a process for manufacturing an oxide thin film at a low temperature has been studied. Examples of such studies include a thin oxide film formation method using a vacuum deposition method and a method of promoting oxide formation to lower the heat treatment temperature. However, in the case of the former, not only the process cost is increased due to the equipment cost for the deposition process, but also the nonuniformity and the performance degradation of the oxide thin film to be produced have been problematic. In the latter case, there is a limitation in lowering the heat treatment temperature Impurities can not be removed (at a level of 230 degrees), so that the performance of the oxide thin film deteriorates.

In order to solve this problem, there has been an attempt to anneal the oxide thin film by using a laser in manufacturing an oxide thin film using a solution process. US7208401, US2008 / 0057631, and the like. More specifically, all of the above-described conventional techniques disclose a technique of coating an oxide solution on a substrate and irradiating the laser in the atmosphere.

However, oxide thin films reported to have excellent properties when manufacturing thin films using such a method have not been reported yet. The present inventors have also made thin film transistors using oxide thin films as channel layers by the above-described conventional techniques. However, according to the conventional technique, characteristics that can be utilized for actual products can not be secured.

US Published Patent Application No. 2010-0261304 (published on October 14, 2010)

 K. K. Banger et. et al., "Low-temperature, high-performance solution-processed metal oxide thin film transistors formed by a" sol-gel on chip "process, Nature Materials, Volume 10, Page 45-50, 2011.

It is an object of the present invention to provide a thin film transistor in which an oxide thin film formed through a low temperature process is a channel layer and a method of manufacturing the same.

According to an aspect of the present invention, there is provided a semiconductor device comprising: a gate electrode formed by stacking at least two gate materials on a substrate; A gate insulating layer formed on the gate electrode; An oxide semiconductor layer formed on the gate insulating layer; And a source / drain electrode connected to at least a part of the oxide semiconductor layer, wherein a reflective structure having a higher ultraviolet reflectance than the material of the gate electrode is provided on the gate electrode.

The reflective structure may be a metal, a semiconductor layer, an insulating material or the like having particularly high ultraviolet reflectance. It is also possible that these materials are formed of one layer or two or more layers of the same property, or two or more layers having different properties may be laminated in plural. Preferably, the reflective structure may have a DBR (Distributed Bragg Reflector) structure in which two semiconductor material layers having different refractive indices are alternately stacked.

The oxide semiconductor layer is preferably formed by irradiating ultraviolet rays to the oxide solution coated in an inert gas atmosphere. The reflective structure of the present invention can provide the best conditions for more effectively absorbing ultraviolet light to the oxide semiconductor layer in the course of ultraviolet irradiation of the oxide semiconductor layer.

The inert gas atmosphere may be introduced into the coated oxide solution in an atmospheric state in which a vacuum process is not performed separately. The inert gas atmosphere may be a nitrogen atmosphere, an argon atmosphere, or a helium atmosphere.

A second aspect of the present invention is a semiconductor device comprising: an oxide semiconductor layer formed on a substrate; A gate insulating film and a gate electrode sequentially formed on the oxide semiconductor layer; And a source / drain electrode connected to the oxide semiconductor layer with a protective film interposed therebetween, the gate electrode having a structure including the oxide semiconductor layer, And a reflective structure for reflecting ultraviolet rays is formed on the substrate.

According to a third aspect of the present invention, there is provided a method of manufacturing a semiconductor device, comprising: forming a gate electrode such that at least two gate materials are stacked on a substrate; Forming a gate insulating film on the entire surface of the substrate on which the gate electrode is formed; Forming an oxide semiconductor layer on the gate insulating layer; And forming a source / drain electrode to be connected to at least a part of the oxide semiconductor layer, wherein a reflective structure having a higher ultraviolet reflectance than the material of the gate electrode is formed on the gate electrode .

A fourth aspect of the present invention is a method for manufacturing a semiconductor device, comprising: forming an oxide semiconductor layer on a substrate; Forming a gate insulating layer and a gate electrode sequentially on the oxide semiconductor layer; And forming a source / drain electrode so as to be connected to the oxide semiconductor layer with a protective film interposed therebetween above the gate electrode, wherein, when viewed in plan, the oxide semiconductor layer And forming a reflective structure for reflecting ultraviolet light in a structure including the first electrode and the second electrode.

 The inert gas atmosphere may allow the inert gas to flow into the coated oxide solution in a standby state in which a vacuum process is not performed separately.

The inert gas atmosphere may be a nitrogen atmosphere, an argon atmosphere, or a helium atmosphere.

Preferably, the wavelength of the ultraviolet light may be in the range of 150 nm to 260 nm, and the ultraviolet light irradiation retention time may be in the range of 1 minute to 240 minutes.

As described above, according to the thin film transistor of the present invention and the method of manufacturing the same, it is possible to manufacture a thin film transistor having a channel layer formed of an oxide thin film formed through a low-temperature process, in an economical method.

In addition, it is possible to maintain the uniformity of the oxide thin film by stabilizing the coated oxide solution by heat treatment.

Further, by irradiating ultraviolet rays in an inert gas atmosphere to induce oxide formation, it is possible to prevent deterioration of the oxide properties.

In addition, since expensive equipment is not required, a high-quality oxide thin film can be produced by an economical method.

1 is a cross-sectional view illustrating a structure of a thin film transistor according to a first embodiment of the present invention.
2A to 2E are cross-sectional views illustrating a method of manufacturing a thin film transistor according to a first embodiment of the present invention.
3 is a cross-sectional view illustrating a structure of a thin film transistor according to a second embodiment of the present invention.
FIGS. 4A to 4G are cross-sectional views illustrating a method of manufacturing a thin film transistor according to a second embodiment of the present invention.

Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings. However, the following embodiments of the present invention may be modified into various other forms, and the scope of the present invention is not limited to the embodiments described below. The embodiments of the present invention are provided to enable those skilled in the art to more fully understand the present invention.

(Embodiment 1)

1 is a cross-sectional view illustrating a structure of a thin film transistor according to a first embodiment of the present invention.

1, a thin film transistor (TFT) according to a first embodiment of the present invention includes a substrate 100, a gate electrode 200, a reflective structure 220, a gate insulating layer 300, An oxide semiconductor layer 400, and source / drain electrodes 500 and 600, and the like.

Here, the substrate 100 is not limited to a specific type, and a semiconductor substrate, a glass substrate, a polymer-based substrate such as a plastic, paper, or the like can be used. Since the present invention uses an ultraviolet irradiation method to realize a low temperature process It may be more effective in the case of a substrate for a flexible display in which a high-temperature process such as a plastic series can not be performed.

The gate electrode 200 is formed on the upper surface of the substrate 100 in the channel region and is formed by stacking at least one gate material on the substrate 100. At this time, a reflective structure 220 is further formed on the gate electrode 200. The reflective structure 220 may be a reflective structure having a higher ultraviolet reflectance than the gate material.

The reflective structure 220 can be realized in various forms when the ultraviolet reflection condition is satisfied. This will be described. First, the reflective structure may be a conductive metal. It is possible to select a material having a relatively high ultraviolet reflectance as the material of the reflective structure 220 than the gate material. It may also be a semiconductor layer, an insulating material or the like having particularly high ultraviolet reflectance.

On the other hand, the reflective structure 220 can be formed of a plurality of layers, and it is also possible to form a metal, a semiconductor layer, an insulating material, or the like having a particularly high ultraviolet reflectivity together with a metal. It is also possible that these materials are formed of one layer or two or more layers of the same property, or two or more layers having different properties may be laminated in plural. Meanwhile, the reflective structure 220 may have a DBR (Distributed Bragg Reflector) structure in which two semiconductor material layers having different refractive indices are alternately stacked. In the drawings, the reflective structures 220 are formed as a plurality of layers for convenience of illustration.

The gate insulating film 300 is formed to have a predetermined thickness on the entire surface of the substrate 100 including the gate electrode 200 and may be formed of a silicon oxide film (SiO 2 ), a silicon nitride film (SiN x), a silicon oxynitride film (SiON x) .

The oxide semiconductor layer 400 functions as a channel layer or an active layer and is formed on the upper surface of the gate insulating layer 300. The oxide semiconductor layer 400 is formed on the oxide layer And may be formed by irradiating ultraviolet rays.

At this time, the inert gas is introduced into the coated oxide solution in the inert gas atmosphere (for example, a nitrogen atmosphere, an argon atmosphere, a helium atmosphere, or the like) in a standby state in which a vacuum process is not performed separately.

In addition, the ultraviolet ray irradiation may be performed to remove impurities of the formed oxide after metal-oxygen-metal (M-O-M) bonds are partially formed in the oxide solution.

Ultraviolet rays are more uniformly irradiated to the oxide coated on the channel region by the ultraviolet rays reflected by the oxide solution coated on the channel region by the reflective structure provided on the upper side of the gate electrode 200 during the ultraviolet ray irradiation, An excellent oxide semiconductor layer 400 can be formed.

The source and drain electrodes 500 and 600 are formed to be connected to at least a part of the oxide semiconductor layer 400. The source and drain electrodes 500 and 600 may be formed of a metal such as Al, Ag, Au, (Al), aluminum (Al), chrome (Cr), or titanium (Ti) and an alloy thereof.

Hereinafter, a method of manufacturing a thin film transistor according to a first embodiment of the present invention will be described in detail.

2A to 2E are cross-sectional views illustrating a method of manufacturing a thin film transistor according to a first embodiment of the present invention.

Referring to FIG. 2A, first, a gate material is stacked on a substrate 100, and then gate materials stacked to expose a portion of the substrate 100 through a gate electrode formation mask (not shown) And the gate electrode 200 is formed on the substrate 100 by etching.

At this time, the reflective structure 220 having a higher ultraviolet reflectance than the gate material is formed on the gate electrode 200. It is effective that the layer for forming the reflective structure is laminated together with the gate material and then etched together. Preferably, the reflective structure 220 may have a DBR (Distributed Bragg Reflector) structure in which two semiconductor material layers having different refractive indices are alternately stacked.

Referring to Figure 2b, the gate electrode 200 and the reflection structure for example, the entire upper surface of the substrate 100, including the 220, the silicon oxide film (SiO 2), silicon nitride (SiNx) or silicon oxy-nitride film (SiONx), etc. A gate insulator 300 having a predetermined thickness is deposited.

Referring to FIGS. 2C and 2D, an oxide semiconductor layer 400 is formed on the gate insulating layer 300. That is, an oxide solution 350 is coated on the upper surface of the gate insulating film 300, ultraviolet rays are irradiated to the coated oxide solution 350 under an inert gas atmosphere, and then the gate insulating film 300 (not shown) The oxide semiconductor layer 400 is formed on the gate insulating layer 300 by etching the ultraviolet-irradiated oxide solution 350 to expose a part of the oxide semiconductor layer 400.

Specifically, the oxide solution 350 is coated on the upper surface of the gate insulating layer 300 through a solution process. The solution process may include, for example, spin coating, dip coating, inkjet printing, offset printing, reverse offset printing, gravure printing, or roll printing, but is not limited thereto and may include all commonly used solution processes.

The oxide solution may include zinc chloride, zinc acetate, zinc acetate hydrate, zinc nitrate, zinc nitrate hydrate, or derivatives thereof. Zinc precursor; A gallium precursor including Gallium nitrate, Gallium nitrate hydrate, Gallium acetate, Gallium acetate hydrate or derivatives thereof; An indium precursor including indium chloride, indium acetate, indium acetate hydrate, indium nitrate or derivatives thereof; Tin precursors including tin chloride, tin acetate, tin nitrate, or derivatives thereof, and mixtures thereof. ≪ RTI ID = 0.0 > It goes without saying that other metal precursors such as aluminum precursors may be utilized.

The solvent for dissolving the precursors of the oxide solution may be used correspondingly to the precursors. For example, acetonitrile, 2-methoxyethanol, methanol ), DI water, or isopropylalcohol (IPA).

Mono-ethanolamine, acetic acid or acetylacetone may be used as an additive, but the present invention is not limited thereto.

On the other hand, the thickness of the coated oxide solution 350 is not limited. For example, the oxide solution may be coated to a thickness of about 5 nm to 300 nm.

Particularly, one of the features of the present invention is a process for irradiating ultraviolet rays to the coated oxide solution 350 under an inert atmosphere. This is due to the fact that although an attempt has been made to anneal the oxide thin film using a laser in the preparation of the oxide thin film using a solution process, the oxide thin film applicable to the device has not been manufactured by performing in an oxygen-containing atmosphere.

In the case of irradiating ultraviolet rays under the condition of oxygen, ozone (O 3 ) is generated, thereby deteriorating the properties of the oxide. Therefore, in the method of manufacturing a thin film transistor according to the first embodiment of the present invention, irradiation with ultraviolet rays in an inert gas atmosphere has an effect of preventing degradation of the properties of the oxide.

Meanwhile, it is preferable that the inert gas atmosphere is a state in which an inert gas is introduced into the coated oxide solution in a standby state in which a vacuum process is not performed separately. In general, a vacuum process is a costly process, and it is effective not to introduce a vacuum process because the vacuum process is removed as much as possible in the production of the solution process oxide of the present invention.

The ultraviolet ray irradiation may be performed through an ultraviolet light source such as a high-pressure mercury lamp, but is not limited thereto.

The holding time of the ultraviolet ray irradiation may be about 1 minute to 240 minutes. If the duration of ultraviolet ray irradiation is too short, the above two steps can not proceed sufficiently and a thin film having excellent characteristics can not be formed. If the ultraviolet ray irradiation time exceeds 240 minutes, the oxide may be denatured or the substrate may be deformed Because. On the other hand, when the oxide thin film is used as the channel layer of the thin film transistor, that is, the oxide semiconductor layer 400, the ultraviolet ray irradiation has excellent characteristics when it is about 90 to 120 minutes.

In addition, the temperature of the gate insulating layer 300 or the substrate 100 may be maintained at a room temperature to 200 degrees while the ultraviolet ray irradiation is performed. Thus, when the impurities are removed through the ultraviolet ray irradiation, an excellent oxide thin film is completed. One of the main characteristics of the oxide thin film of the present invention is to maintain an inert atmosphere while irradiating an ultraviolet lamp, and the relevant contents of PCT / KR2012 / 010275 filed by the same applicant are incorporated herein.

Alternatively, before the ultraviolet ray irradiation, the oxide solution coated on the gate insulating film 300 is heat-treated and stabilized. The heat treatment is carried out for about 1 minute to 60 minutes at a temperature of from room temperature to 200 degrees for improving the uniformity of the thin film of the coated oxide solution and uniformizing the thickness.

On the other hand, the ultraviolet ray to be irradiated has a wavelength in an ultraviolet ray region and / or an ultraviolet ray region, specifically, about 150 nm to 260 nm. When the wavelength is shorter than 150 nm, there is a problem that the oxide is destroyed by ultraviolet rays. When the wavelength is longer than 260 nm, there is a problem that sufficient energy for oxide formation can not be supplied.

Referring to FIG. 2E, the source / drain electrodes 500 and 600 are formed to be connected to at least a part of the oxide semiconductor layer 400 on the gate insulating layer 300 and a part of the oxide semiconductor layer 400, respectively.

(Second Embodiment)

FIG. 3 is a cross-sectional view illustrating a structure of a thin film transistor according to a second embodiment of the present invention, which shows a thin film transistor having a top gate structure.

Referring to FIG. 3, a thin film transistor (TFT) according to a second embodiment of the present invention includes a substrate 100, a reflector 110, a buffer layer 120, An oxide semiconductor layer 130, a gate insulating layer 140, a gate electrode 150, a passivation layer 160, and source and drain electrodes 170 and 180.

Here, the substrate 100 is not limited to a specific type, and is the same as the first embodiment of the present invention, and a detailed description thereof will be made with reference to the first embodiment of the present invention described above.

The reflective structure 110 is formed on the upper surface of the substrate 100 in the channel region and has a structure including the oxide semiconductor layer 130 as viewed in plan view below the oxide semiconductor layer 130, Reflection.

The reflective structure 110 is formed of a DBR (Distributed Bragg Reflector) structure in which two semiconductor material layers having different refractive indices are alternately stacked.

The buffer layer 120 is formed over the entire surface of the substrate 100 including the reflective structure 110 and may be formed of a silicon oxide film such as SiO 2 ), A silicon nitride film (SiNx), and a hybrid structure thereof. Although the buffer layer 120 is not an essential element in the process, it may be omitted. In the present invention, it is more preferable to deposit the buffer layer 120 including the buffer layer 120.

The oxide semiconductor layer 130 functions as a channel layer or an active layer and is formed in a channel region on the upper surface of the buffer layer 120. In the oxide semiconductor layer 130, For example, by irradiating ultraviolet rays.

Since the oxide semiconductor layer 130 is the same as the oxide semiconductor layer 400 applied to the first embodiment of the present invention, a detailed description thereof will be made with reference to the first embodiment of the present invention described above. A source / drain region is defined on both sides of the channel region where the gate electrode 150 is to be positioned on the oxide semiconductor layer 130 thus formed.

The gate insulating film 140 is formed on the entire surface of the substrate 100 including the oxide semiconductor layer 130 to have a predetermined thickness and may be formed of a silicon oxide film (SiO 2 ), a silicon nitride film (SiN x), a silicon oxynitride film As shown in FIG.

The gate electrode 150 is formed on the upper surface of the gate insulating layer 140 in the channel region and may be formed of a metal such as Al, Ag, Au, Cu, Mo, (AlNd), chromium (Cr), or titanium (Ti), and an alloy thereof.

The passivation layer 160 is formed to be thicker than the gate insulating layer 140 over the entire surface of the gate insulating layer 140 including the gate electrode 150. The passivation layer 160 is formed on the oxide semiconductor layer 130, First and second contact holes H 1 and H 2 are formed to expose a part of the first contact hole 130, respectively.

The passivation layer 160 may be formed using a silicon oxide layer (SiO 2 ), a silicon nitride layer (SiN x), a silicon oxynitride layer (SiON x), or the like.

The source and drain electrodes 170 and 180 are formed to be in contact with the oxide semiconductor layer 130 exposed through the first and second contact holes H 1 and H 2 and spaced apart from each other. ), A metal material of at least one of silver (Ag), gold (Au), copper (Cu), molybdenum (Mo), aluminum alloy (AlNd), chrome (Cr), or titanium (Ti) .

Hereinafter, a method of manufacturing a thin film transistor according to a second embodiment of the present invention will be described in detail.

4A to 4F are cross-sectional views illustrating a method of manufacturing a thin film transistor according to a second embodiment of the present invention.

Referring to FIG. 4A, a reflective structure 110 is formed on a substrate 100 defined as a channel region. The reflective structure 110 is formed under the oxide semiconductor layer 130, And the oxide semiconductor layer 130 to reflect ultraviolet rays.

The reflective structure 110 is formed of a DBR (Distributed Bragg Reflector) structure in which two semiconductor material layers having different refractive indices are alternately stacked.

4B and 4C, a buffer layer 120 is formed on the entire surface of the substrate 100 including the reflective structure 110 and then an oxide semiconductor layer 130 is formed on the channel region of the upper surface of the buffer layer 120 .

 That is, an oxide solution 125 is coated on the upper surface of the buffer layer 120, ultraviolet rays are irradiated to the coated oxide solution 125 under an inert gas atmosphere, and then the buffer layer 120 is exposed through a mask for forming an active layer (not shown) The oxide semiconductor layer 130 is formed on the buffer layer 120 by etching the ultraviolet-irradiated oxide solution 125 so that a part of the oxide semiconductor layer 130 is exposed.

Since the process of forming the oxide semiconductor layer 130 is the same as that of the first embodiment of the present invention, a detailed description thereof will be made with reference to the first embodiment of the present invention described above.

Referring to Figure 4d, the entire upper surface of the buffer layer 120 including the oxide semiconductor layer 130, for example, by using a material such as silicon oxide (SiO 2), silicon nitride (SiNx) or silicon oxy-nitride film (SiONx) A gate insulator 140 having a predetermined thickness is deposited.

Referring to FIG. 4E, a gate electrode 150 is formed on a gate insulating layer 140 located in a channel region. That is, a metal material for forming the gate electrode 150 is deposited on the entire upper surface of the gate insulating film 140 to a predetermined thickness, and patterning is performed through a gate forming mask (not shown) to form the gate electrode 150 .

Referring to Figure 4f, the silicon oxide inorganic material on the entire top surface of the gate insulating layer 140 including the gate electrode (150) (SiO 2), silicon nitride (SiNx) or silicon oxy-nitride film (SiONx) such as a chemical vapor deposition (CVD) method to form the protective film 160.

Thereafter, the protective film 160 and the gate insulating film 140 are etched to expose the oxide semiconductor layer 130 of the source / drain region defined through the contact hole forming mask (not shown) Thereby forming holes H 1 and H 2 .

Referring to FIG. 4G, the source / drain electrodes 170 and 180 are formed to contact the oxide semiconductor layer 130 exposed through the first and second contact holes H 1 and H 2 , respectively. That is, a metal material for forming the source / drain electrodes 170 and 180 is deposited to a predetermined thickness on the entire upper surface of the protective film 160 including the first and second contact holes H 1 and H 2 , / Drain forming masks (not shown) to form the source / drain electrodes 170 and 180.

Although the preferred embodiments of the thin film transistor and the method of manufacturing the same according to the present invention have been described above, the present invention is not limited thereto, and various modifications may be made within the scope of the claims, the description of the invention, And this also belongs to the present invention.

100: substrate, 110, 220: reflective structure
200: gate electrode, 300: gate insulating film,
400: an oxide semiconductor layer, 500 and 600: a source / drain electrode

Claims (14)

A gate electrode formed by stacking at least two gate materials on a substrate;
A gate insulating layer formed on the gate electrode;
An oxide semiconductor layer formed on the gate insulating layer; And
A source / drain electrode connected to at least a part of the oxide semiconductor layer,
Wherein a reflection structure having a higher ultraviolet reflectance than the material of the gate electrode is provided on the gate electrode.
The method according to claim 1,
Wherein the reflective structure is a metal, a semiconductor layer, or an insulating layer.
The method according to claim 1,
Wherein the reflective structure has a distributed Bragg reflector (DBR) structure in which two semiconductor material layers having different refractive indices are alternately stacked.
The method according to claim 1,
Wherein the oxide semiconductor layer is formed by irradiating ultraviolet rays to an oxide solution coated in an inert gas atmosphere.
An oxide semiconductor layer formed on a substrate;
A gate insulating film and a gate electrode sequentially formed on the oxide semiconductor layer; And
A source / drain electrode connected to the oxide semiconductor layer with a protective film interposed therebetween,
Wherein a reflective structure for reflecting ultraviolet rays is formed on a lower portion of the oxide semiconductor layer in a structure including the oxide semiconductor layer when viewed in a plan view.
6. The method of claim 5,
Wherein the reflective structure is a metal, a semiconductor layer, or an insulating layer.
6. The method of claim 5,
Wherein the reflective structure comprises a DBR (Distributed Bragg Reflector) structure in which two semiconductor material layers having different refractive indices are alternately stacked.
Forming a gate electrode on the substrate such that at least two gate materials are deposited;
Forming a gate insulating film on the entire surface of the substrate on which the gate electrode is formed;
Forming an oxide semiconductor layer on the gate insulating layer; And
And forming a source / drain electrode to be connected to at least a part of the oxide semiconductor layer,
Wherein a reflection structure having a higher ultraviolet reflectance than the material of the gate electrode is formed on the gate electrode.
Forming an oxide semiconductor layer on the substrate;
Forming a gate insulating layer and a gate electrode sequentially on the oxide semiconductor layer; And
Forming a source / drain electrode on the gate electrode so as to be connected to the oxide semiconductor layer with a protective film interposed therebetween,
Further comprising the step of forming a reflective structure for reflecting ultraviolet light in a structure including the oxide semiconductor layer when viewed in a plan view below the oxide semiconductor layer.
10. The method according to claim 8 or 9,
Wherein the reflective structure is a metal, a semiconductor layer, or an insulating layer.
10. The method according to claim 8 or 9,
Wherein the oxide semiconductor layer is formed by irradiating ultraviolet rays to the oxide solution coated in an inert gas atmosphere.
10. The method according to claim 8 or 9,
Wherein the reflective structure is formed of a distributed Bragg reflector (DBR) structure in which two semiconductor material layers having different refractive indices are alternately stacked.
12. The method of claim 11,
Wherein the inert gas atmosphere causes the inert gas to flow into the coated oxide solution in an atmospheric state in which a vacuum process is not performed.
12. The method of claim 11,
Wherein the inert gas atmosphere is a nitrogen atmosphere, an argon atmosphere, or a helium atmosphere.
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Citations (4)

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Publication number Priority date Publication date Assignee Title
JP2004087583A (en) * 2002-08-23 2004-03-18 Seiko Epson Corp Semiconductor device, its manufacturing method and heat treatment method of thin film
JP2007123861A (en) * 2005-09-29 2007-05-17 Semiconductor Energy Lab Co Ltd Semiconductor device and its manufacturing method
JP2010191107A (en) * 2009-02-17 2010-09-02 Videocon Global Ltd Liquid crystal display device and method for manufacturing the same
KR20100120939A (en) * 2009-05-07 2010-11-17 국민대학교산학협력단 Method for fabricating thin film transistor using uv light

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2004087583A (en) * 2002-08-23 2004-03-18 Seiko Epson Corp Semiconductor device, its manufacturing method and heat treatment method of thin film
JP2007123861A (en) * 2005-09-29 2007-05-17 Semiconductor Energy Lab Co Ltd Semiconductor device and its manufacturing method
JP2010191107A (en) * 2009-02-17 2010-09-02 Videocon Global Ltd Liquid crystal display device and method for manufacturing the same
KR20100120939A (en) * 2009-05-07 2010-11-17 국민대학교산학협력단 Method for fabricating thin film transistor using uv light

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