KR101394014B1 - Display device, video signal transmission method in display device, transmission device, and video signal transmission method - Google Patents

Abstract

A first signal receiving section for receiving an uncompressed video signal from an external device via a first transmission line in a plurality of channels by means of a differential signal and a second signal receiving section for processing the video signal received by the first signal receiving section, A second signal receiving unit for receiving a compressed video signal of the same video source as the uncompressed video signal using a bidirectional communication path configured by a predetermined line of the first transmission path; And a signal transmitting unit for transmitting the compressed video signal corresponding to the compressed video signal received by the signal receiving unit of the external apparatus to another external apparatus different from the external apparatus.

Description

TECHNICAL FIELD [0001] The present invention relates to a display device, a video signal transmitting method, a transmitting device, and a video signal transmitting method in a display device. BACKGROUND OF THE INVENTION 1. Field of the Invention [0001]

The present invention relates to a display device, a video signal transmission method in the display device, a transmission device, and a video signal transmission method.

More specifically, the present invention relates to a method for receiving an uncompressed video signal from an external device and performing image display, receiving a compressed video signal of the same video source as an uncompressed video signal from an external device, and transmitting the compressed video signal to another external device To a display device capable of recording a video signal corresponding to a display image without increasing the price of the video signal transmitting apparatus and the display apparatus thereof.

The present invention also provides a method of transmitting an uncompressed video signal to an external device and transmitting a compressed video signal of the same video source as the uncompressed video signal to an external device, So that a video signal corresponding to a display image can be recorded by using a compressed video signal.

Description of the Related Art [0002] In recent years, digital video signals, for example, from a digital versatile disc (DVD) recorder, a set-top box, and other AV sources to television receivers, projectors, (Hereinafter, referred to as " audio data ") attached to a video signal of an HDMI (high-speed) Definition Multimedia Interface). For example, WO2002 / 078336 discloses details of the HDMI standard.

BACKGROUND ART Conventionally, in order to record a video signal received from a set-top box connected to a television receiver, for example, a recording unit such as a HDD (Hard Disk Drive) is built in the set-top box, It was necessary to connect. In the case of incorporating the recording unit in the set-top box, the price of the set-top box is increased and the economic burden of the user is increased. Further, when a separate recording apparatus is connected to the set-top box, the configuration becomes complicated and the operation becomes complicated. It is also conceivable that a recording unit such as an HDD is incorporated in the television receiver, but the price of the television receiver is increased and the economic burden of the user is increased.

An object of the present invention is to make it possible to record a video signal corresponding to a display image without increasing the price of a video signal transmitting apparatus and a display apparatus.

The concept of the present invention,

A first signal receiving unit for receiving an uncompressed video signal from an external device through a first transmission line in a plurality of channels by differential signals,

An image display section for processing the image signal received by the first signal receiving section and displaying an image;

A second signal receiver for receiving a compressed video signal of the same video source as the uncompressed video signal using a bidirectional communication path configured by a predetermined line of the first transmission path,

And a signal transmitter for transmitting a compressed video signal corresponding to the compressed video signal received by the second signal receiver to another external device different from the external device.

Further, the concept of the present invention,

A first signal transmitter for transmitting an uncompressed video signal to an external device through a plurality of channels, a differential signal, and a transmission path;

And a second signal transmitter for transmitting a compressed video signal of the same video source as the uncompressed video signal to the external device using a bidirectional communication path configured by a predetermined line of the transmission path.

In a transmitting apparatus, an uncompressed video signal is transmitted to an external device (display apparatus) through a transmission path. Further, in the transmitting apparatus, a compressed video signal of the same video source as the above-mentioned uncompressed video signal is transmitted to an external device (display device) using a bidirectional communication path formed by a predetermined line of a transmission line. For example, the transmitting apparatus is connected to an external device (display apparatus) by an HDMI cable, and a predetermined line is a reserved line and an HPD line constituting an HDMI cable.

The transmission of the compressed video signal to the external device (display device) is performed, for example, when a transmission request is sent from an external device via the control data line or the bidirectional communication path. For example, an external device (display device) sends a transmission request to the transmission device when the user instructs the recording of the video signal corresponding to the display image.

In a display device, an uncompressed video signal is received from an external device such as a set-top box (transmission device) through a first transmission path, and an image based on the uncompressed video signal is displayed. Further, in the display apparatus, a compressed video signal of the same video source as the above-mentioned uncompressed video signal is received from an external device (transmitting apparatus) by using a bidirectional communication path constituted by a predetermined line of the first transmission path . For example, a predetermined line is a reserved line and an HPD line constituting the HDMI cable.

In a display device, a compressed video signal corresponding to a compressed video signal received from an external device (transmission device) via a bidirectional communication path is transmitted to another external device. In this case, when the other external device is a recording device such as a disk recorder, the video signal corresponding to the display image can be recorded by the recording device. For example, transmission of a compressed video signal to another external apparatus is performed when recording is instructed by the user operation unit. As a result, recording of the compressed video signal in another external device is performed only when recording is instructed by the user.

For example, uncompressed video signals can be received from a recording device such as another external device, such as a disk recorder, through the second transmission path. Thus, in the display apparatus, the video signal reproduced by the recording apparatus can be received, and the reproduced image can be displayed by the video signal. The transmission of the compressed video signal to the above-described other external device is performed using, for example, a two-way communication path configured by a predetermined line of the second transmission path. For example, a predetermined line is a reserved line and an HPD line constituting the HDMI cable.

In a display device, for example, a compressed image signal transmitted from an external device (transmission device) via a bidirectional communication path constituted by a predetermined line of a first transmission path is transmitted to the signal transmission unit as it is Is supplied as a transmission signal, and is sent to another external device through a bidirectional communication path configured by a predetermined line of the second transmission line. In this case, in the display device, processing such as decryption and re-encoding processing, decryption and re-encryption of cryptography are not required, and the processing load can be reduced.

As described above, in the display device, the uncompressed video signal is received from the transmission device and image display is performed, and the compressed video signal of the same video source as the uncompressed video signal is received from the transmission device and is transmitted to the other external device And the video signal corresponding to the display image can be recorded without increasing the price of the transmitting apparatus and the display apparatus of the transmitting apparatus itself.

According to the display device of the present invention, an uncompressed video signal is received from an external device and an image is displayed, and a compressed video signal of the same video source as the uncompressed video signal is received from an external device and transmitted to another external device , It is possible to record a video signal corresponding to the display image without increasing the price of the video signal transmitting apparatus and the display apparatus of the user.

According to the transmission apparatus of the present invention, an uncompressed video signal is transmitted to an external device, and a compressed video signal of the same video source as the bidirectionally compressed video signal is transmitted to an external device. The video signal corresponding to the display image can be recorded by using the compressed video signal without increasing the price of the video signal.

1 is a block diagram showing a configuration example of an AV system as an embodiment of the present invention.
2 is a block diagram showing a configuration example of a set-top box (source device) constituting an AV system;
3 is a block diagram showing a configuration example of a television receiver (sink device) constituting an AV system;
4 is a block diagram showing a configuration example of a disk recorder (source device) constituting an AV system;
5 is a block diagram showing a configuration example of an HDMI transmitting unit (HDMI source) and an HDMI receiving unit (HDMI sink);
6 is a block diagram showing a configuration example of an HDMI transmitter and an HDMI receiver;
7 is a diagram showing the structure of TMDS transmission data.
8 is a view showing a pin arrangement (type A) of the HDMI terminal.
9 is a connection diagram showing a configuration example of a high-speed data line interface of a set-top box and a television receiver;
10 is a diagram showing transmission paths of streaming data (compressed video, audio signal) and video and audio data (uncompressed video, audio signal) of a dedicated line connection system from a set top box in an AV system.
11 schematically shows the flow of streaming data (compressed video, audio signal) and video and audio data (uncompressed video, audio signal) in a dedicated line connection system in a television receiver.
12 is a diagram for explaining a recording operation by a user operation using a remote control transmitter of a television receiver;
13 is a connection diagram showing another configuration example of a high-speed data line interface of a set-top box and a television receiver;
14 is a connection diagram showing yet another configuration example of a high-speed data line interface of a set-top box and a television receiver;
15 is a diagram showing a structure of an E-EDID received by a source device;
16 is a diagram showing a structure of an E-EDID vendor specific data block;
17 is a flowchart for explaining communication processing by a source device.
18 is a flowchart for explaining communication processing by a sink device;
19 is a flowchart for explaining communication processing by a source device.
20 is a flowchart for explaining communication processing by a sink device;
21 is a connection diagram showing another configuration example of a high-speed data line interface of a set-top box and a television receiver;
22 is a flowchart for explaining a communication process by a source device;
23 is a flowchart for explaining communication processing by a sink device;
24 is a block diagram showing a configuration example of a computer to which the present invention is applied;
25 is a connection diagram showing still another configuration example of a high-speed data line interface of a set-top box and a television receiver;
26 shows a bi-directional communication waveform;

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Reference will now be made in detail to the presently preferred embodiments of the invention, examples of which are illustrated in the accompanying drawings. In the present specification and drawings, the same reference numerals are given to constituent elements having substantially the same functional configuration, and redundant description is omitted.

Fig. 1 shows a configuration example of an AV (Audio Visual) system 200 as an embodiment. The AV system 200 includes a disc recorder 210 as a source device, a television receiver 250 as a sink device, and a set-top box STB for receiving satellite broadcast, 310).

The set-top box 310 and the television receiver 250 are connected via an HDMI cable 351. The set top box 310 is provided with an HDMI terminal 311 to which an HDMI transmission unit (HDMITX) (312) and a high-speed data line interface (I / F) 313 are connected. The television receiver 250 is provided with HDMI terminals 251A and 251B to which an HDMI receiving unit (HDMIRX) 253 and a high-speed data line interface (I / F) 254A and 254B are connected. One end of the HDMI cable 351 is connected to the HDMI terminal 311 of the set top box 310 and the other end of the HDMI cable 351 is connected to the HDMI terminal 251A of the television receiver 250. [

The television receiver 250 and the disc recorder 210 are connected via an HDMI cable 352. The disc recorder 210 is provided with an HDMI terminal 211 to which an HDMI transmission unit (HDMITX) 212 and a high-speed data line interface (I / F) 213 are connected. One end of the HDMI cable 352 is connected to the HDMI terminal 211 of the disc recorder 210 and the other end of the HDMI cable 352 is connected to the HDMI terminal 251B of the television receiver 250. [

2 shows an example of the configuration of the set-top box 310 for IPTV. The set-top box 310 includes an HDMI terminal 311, an HDMI transmission unit 312, a high-speed data line interface 313, a CPU (Central Processing Unit) 314, a CPU A flash ROM (Read Only Memory) 316, an SDRAM (Synchronous Dynamic Random Access Memory) 317, a DTCP (Digital Transmission Content Protection) circuit 318, an internal bus 321 A network terminal 323, an MPEG (Moving Picture Expert Group) decoder 324, a graphic generation circuit 325, a video output terminal A sound output terminal 326, and a sound output terminal 327. [ "Ethernet" and "Ethernet" are registered trademarks.

The HDMI transmitting unit (HDMI source) 312 sends video (image) and audio data of the exclusive line connection system from the HDMI terminal 311 to the HDMI cable by communication based on the HDMI. Details of this HDMI transmitting unit (312) will be described later. The high-speed data line interface 313 is an interface of a bidirectional communication path configured by a predetermined line (in this embodiment, a reserve line, an HPD line) of an HDMI cable. Details of the high-speed data line interface 313 will be described later.

The CPU 314, the flash ROM 316, and the SDRAM 317 are connected to the CPU bus 315. The CPU 314, Ethernet (registered trademark) interface 322 and MPEG decoder 324 are connected to the internal bus 321.

The CPU 314 controls the operation of each part of the set-top box 310. The flash ROM 315 stores control software and archives data. The SDRAM 316 constitutes a work area of the CPU 314. The CPU 314 develops the readout software and data from the flash ROM 316 on the SDRAM 317, starts up the software, and controls each part of the set top box 310.

The MPEG decoder 324 decodes the MPEG2 stream, which is download data (streaming data) from, for example, a VOD (Video On Demand) server to obtain video data and audio data. The DTCP circuit 318 decodes the encrypted data supplied from the network terminal 323 or the high-speed data line interface 313 to the Ethernet interface 322.

The graphic generation circuit 325 performs superposition processing of graphics data on the video (image) data obtained by the MPEG decoder 324 as necessary. The video output terminal 326 outputs the video data output from the graphic generation circuit 325. The audio output terminal 327 outputs audio data obtained by the MPEG decoder 324.

The operation of the set-top box 310 shown in Fig. 2 will be briefly described.

The encrypted streaming data obtained from the network terminal 323 via the Ethernet (registered trademark) interface 322 is decoded by the DTCP circuit 318 and then supplied to the MPEG decoder 324 and decoded. In this MPEG decoder 324, video data can be obtained by performing a decoding process on the video PES packet composed of TS packets of video data. This video data is output to the video output terminal 326 after the graphics data is superimposed on the graphics data in the graphics generation circuit 325. Further, in the MPEG decoder 324, audio data can be obtained by performing a decoding process on the audio PES packet formed by the TS packet of the audio data. The audio data is output to the audio output terminal 327.

The video image data and the audio data obtained by the MPEG decoder 324 are supplied to the HDMI transmitting unit 312 when necessary and the HDMI terminal 322 is connected to the HDMI terminal 323 when receiving the streaming data from the network terminal 323. [ 311 via the HDMI cable.

Streaming data from the network terminal 323 is supplied as transmission data to the high-speed data line interface 313 via the Ethernet (registered trademark) interface 322, if necessary. This streaming data is transmitted as an Ethernet IP packet to a device on the other side via a bidirectional communication path including a predetermined line of the HDMI cable connected to the HDMI terminal 311. [ Here, the streaming data is, for example, a partial TS (TS packet of video data, TS packet of audio data) encrypted.

In the high-speed data line interface 313, an IP packet including a remote control code, which is transmitted through a bidirectional communication path formed of a predetermined line of the HDMI cable connected to the HDMI terminal 311, is received. This IP packet is supplied to the CPU 314 via the Ethernet (registered trademark) interface 322. The CPU 314 controls each part of the set top box 310 based on the remote control code when the remote control code included in the IP packet relates to the control of the set top box 310. [

3 shows a configuration example of the television receiver 250. In Fig. The television receiver 250 includes HDMI terminals 251A and 251B, a TMDS signal switch 252, an HDMI receiving unit 253, high-speed data line interfaces 254A and 254B, a path changeover switch 255 An antenna terminal 257, a digital tuner 258, a demultiplexer 259, an MPEG decoder 260, a video / graphics processing circuit 261, a panel drive circuit 262, a display panel 263 A voice processing circuit 264, an audio amplifying circuit 265, a speaker 266, a DTCP circuit 267, an internal bus 270, a CPU 271, a flash ROM 272, (Registered trademark) interface (Ethernet I / F) 274, a network terminal 275, a remote control reception unit 276, and a remote control transmitter 277 .

The HDMI receiving unit (HDMI sink) 253 receives the video (image) and audio data (uncompressed video) of the exclusive line connection system supplied to the HDMI terminal 251A or the HDMI terminal 251B, , Voice signal). Details of the HDMI receiving unit 253 will be described later. The TMDS signal switch 252 selectively supplies the TMDS signal input to the HDMI terminal 251A or the TMDS signal input to the HDMI terminal 251B to the HDMI receiving unit 253. [

The high-speed data line interfaces 254A and 254B are interfaces of a bidirectional communication path configured by predetermined lines (in this embodiment, reserve lines, HPD lines) of HDMI cables. Details of the high-speed data line interfaces 254A and 254B will be described later. The path changeover switch 255 switches the data path between the high-speed data line interfaces 254A and 254B and the Ethernet (registered trademark) interface 274. For example, the path switchover switch 255 selectively supplies the received data of the high-speed data line interface 254A to the Ethernet® interface 274 or the high-speed data line interface 254B.

The antenna terminal 257 is a terminal for inputting a television broadcast signal received from a reception antenna (not shown). The digital tuner 258 processes the television broadcast signal input to the antenna terminal 257 and outputs a predetermined transport stream corresponding to the selected channel of the user. The demultiplexer 259 extracts a partial TS (TS packet of video data, TS packet of audio data) corresponding to the user's selected channel from the transport stream obtained by the digital tuner 258.

The demultiplexer 259 extracts PSI / SI (Program Specific Information / Service Information) from the transport stream obtained by the digital tuner 258, and outputs the PSI / SI to the CPU 271. In the transport stream obtained by the digital tuner 258, a plurality of channels are multiplexed. In the demultiplexer 259, the process of extracting the partial TS of an arbitrary channel from the transport stream is possible by obtaining the information of the packet ID (PID) of the arbitrary channel from PSI / SI (PAT / PMT).

The MPEG decoder 260 decodes the video PES (Packetized Elementary Stream) packet formed by the TS packet of the video data obtained by the demultiplexer 259 and obtains the video data. The MPEG decoder 260 decodes the audio PES packet composed of the TS packets of the audio data obtained by the demultiplexer 259 to obtain audio data. The MPEG decoder 260 decodes the video and audio PES packets obtained by decoding by the DTCP circuit 267, if necessary, and obtains video data and audio data.

The video / graphics processing circuit 261 performs multi-screen processing, superposition processing of graphics data, and the like on the video data obtained by the MPEG decoder 260 as necessary. The panel drive circuit 262 drives the display panel 263 based on the image data output from the video / graphics processing circuit 261. The display panel 263 is constituted by, for example, an LCD (Liquid Crystal Display), a PDP (Plasma Display Panel) or the like.

The audio signal processing circuit 264 performs necessary processing such as D / A conversion on the audio data obtained by the MPEG decoder 260. [ The audio amplifier circuit 265 amplifies the audio signal output from the audio signal processing circuit 264 and supplies the amplified audio signal to the speaker 266.

The DTCP circuit 267 encrypts the partial TS extracted by the demultiplexer 259 as necessary. The DTCP circuit 267 also decrypts the encrypted data supplied from the network terminal 275 or the high-speed data line interfaces 254A and 245B to the Ethernet interface 274 as needed.

The CPU 271 controls the operation of each part of the television receiver 250. The flash ROM 272 stores control software and archives data. The DRAM 273 constitutes a work area of the CPU 271. The CPU 271 expands the readout software and data from the flash ROM 272 on the DRAM 273, starts the software, and controls each part of the television receiver 250. [

The remote control reception unit 276 receives the remote control signal (remote control code) transmitted from the remote control transmitter 277 and supplies it to the CPU 271. The CPU 271, the flash ROM 272, the DRAM 273 and the Ethernet (registered trademark) interface 274 are connected to the internal bus 270. The CPU 271 controls each part of the television receiver 250 based on the remote control code when the remote control code relates to the control of the television receiver 250. [

The CPU 271 also generates an IP packet including the remote control code supplied from the remote control receiving unit 276 and transmits the IP packet to the Ethernet interface 274 and the high- And 254B to the HDMI terminals 251A and 251B. Thus, the remote control code transmitted from the remote control transmitter 277 is sent to the external device connected to the television receiver 250 via the bidirectional communication path formed by the predetermined line of the HDMI cable. Therefore, the operation of the external device can be performed by the operation of the remote control transmitter 277.

The operation of the television receiver 250 shown in Fig. 3 will be briefly described.

The television broadcast signal input to the antenna terminal 257 is supplied to the digital tuner 258. The digital tuner 258 processes the television broadcast signal, outputs a predetermined transport stream corresponding to a channel selected by the user, and supplies the predetermined transport stream to the demultiplexer 259. In this demultiplexer 259, a partial TS (TS packet of video data, TS packet of audio data) corresponding to the user's selected channel is extracted from the transport stream, and the partial TS is supplied to the MPEG decoder 260 do.

In the MPEG decoder 260, a video PES packet composed of a TS packet of video data is decoded to obtain video data. This video data is supplied to the panel driving circuit 262 after the multi-screen processing and the overlap processing of the graphics data are performed in the video / graphics processing circuit 261 as necessary. Therefore, the display panel 263 displays an image corresponding to the selected channel of the user.

In addition, in the MPEG decoder 260, the audio PES packet formed by the TS packet of the audio data is decoded to obtain audio data. This audio data is subjected to necessary processing such as D / A conversion in the audio signal processing circuit 264, amplified by the audio amplifying circuit 265, and then supplied to the speaker 266. [ Therefore, the speaker 266 outputs the audio corresponding to the selected channel of the user.

When the partial TS extracted by the demultiplexer 259 is supplied to the other party's device connected by the HDMI cable at the time of receiving the above-described television broadcast signal, after the partial TS is encrypted by the DTCP circuit 267, (Registered trademark) interface 274 to the high-speed data line interface 254A and 254B as transmission data. Therefore, the corresponding partial TS is transmitted as an Ethernet IP packet to the other party's device via the bidirectional communication path formed by the predetermined line of the HDMI cable connected to the HDMI terminals 251A and 251B.

When transmitting the partial TS extracted by the demultiplexer 259 to the network at the time of receiving the above-described television broadcast signal, the partial TS is encrypted by the DTCP circuit 267 and then transmitted to the Ethernet (registered trademark) And is output to the network terminal 275 through the network interface 275.

The encrypted partial TS supplied to the network terminal 275 or received from the HDMI terminals 251A and 251B through the high-speed data line interfaces 254A and 254B is sent to Ethernet (registered trademark) And supplied to the DTCP circuit 267 through the interface 274 and decoded. Then, the corresponding partial TS is supplied to the MPEG decoder 260 and decoded, and video (image) data and audio data are acquired. Thereafter, the operation is the same as that at the time of receiving the above-described television broadcast signal, the image is displayed on the display panel 263, and the sound is output from the speaker 266. [

The encrypted partial TS received from the HDMI terminals 251A and 251B via the high-speed data line interfaces 254A and 254B can be transmitted to the other high-speed data Line interfaces 254B and 254A as transmission data. In this case, the partial TS received from the device connected to the HDMI terminals 251A and 251B via the HDMI cable is directly transmitted to the other HDMI terminals 251B and 251A to other devices connected with the HDMI cable. In this case, processing of decoding and encoding becomes unnecessary, and the processing load on the television receiver 250 is reduced.

The HDMI receiving unit 253 also acquires video and audio data of the exclusive line connection system input through the HDMI cable to the HDMI terminal 251A or the HDMI terminal 251B. The video and audio data are supplied to the video / graphics processing circuit 261 and the audio signal processing circuit 264, respectively. Thereafter, the operation is the same as that at the time of receiving the above-described television broadcast signal, the image is displayed on the display panel 263, and the sound is output from the speaker 266. [

The remote control receiver 276 receives the remote control code (remote control toll) transmitted from the remote control transmitter 277 and supplies the remote control code to the CPU 271. The CPU 271 controls each part of the television receiver 250 on the basis of the remote control code when the remote control code relates to the control of the television receiver 250. [

The CPU 271 also generates an IP packet including the remote control code supplied from the remote control receiving unit 276. [ This IP packet is output to the HDMI terminals 251A and 251B through the Ethernet (registered trademark) interface 274 and the high-speed data line interfaces 254A and 254B. Therefore, this IP packet is transmitted to the other party's device through the HDMI cable connected to the HDMI terminals 251A and 2251B. Further, this IP packet is sent to the network as needed. In this case, the corresponding IP packet is output to the network terminal 275 via the Ethernet (registered trademark) interface 274. [ Thereby, the remote control transmitter 277 of the television receiver 250 can control the operation of the other device.

4 shows a configuration example of the disk recorder 210. In Fig. The disc recorder 210 includes an HDMI terminal 211, an HDMI transmitting unit 212, a high-speed data line interface 213, an antenna terminal 214, a digital tuner 215, a demultiplexer 216, An internal bus 217, a recording unit interface 218, a DVD / BD drive 219, a HDD (Hard Disk Drive) 220, a CPU 221, a flash ROM 222, a DRAM 223, an Ethernet I / F 224, a network terminal 225, a DTCP circuit 226, an MPEG decoder 227, a graphic generation circuit 228, A video output terminal 229, and an audio output terminal 230. [

The HDMI transmission unit (HDMI source) 212 transmits video (image) and audio data of the exclusive line connection system from the HDMI terminal 211 by communication conforming to the HDMI. Details of the HDMI transmitting unit 212 will be described later. The high-speed data line interface 213 is an interface of a bidirectional communication path configured by a predetermined line (in this embodiment, a reserve line, an HPD line) of the HDMI cable. Details of the high-speed data line interface 213 will be described later.

The antenna terminal 214 is a terminal for inputting a television broadcast signal received by a receiving antenna (not shown). The digital tuner 215 processes the television broadcast signal input to the antenna terminal 214 and outputs a predetermined transport stream. The demultiplexer 216 extracts a partial TS (TS packet of video data, TS packet of audio data) corresponding to a predetermined selected channel from the transport stream obtained by the digital tuner 215.

Further, the demultiplexer 216 extracts PSI / SI from the transport stream obtained by the digital tuner 215, and outputs it to the CPU 221. A plurality of channels are multiplexed in the transport stream obtained by the digital tuner 215. In the demultiplexer 216, the process of extracting the partial TS of an arbitrary channel from the transport stream is possible by obtaining the information of the packet ID (PID) of the arbitrary channel from the PSI / SI (PAT / PMT).

The CPU 221, the flash ROM 222, the DRAM 223, the demultiplexer 216, the Ethernet (registered trademark) interface 224, and the recording unit interface 218 are connected to the internal bus 217. The DVD / BD drive 219 and the HDD 220 are connected to the internal bus 217 through a recording interface 218. [ The DVD / BD drive 219 and the HDD 220 record the partial TS extracted by the demultiplexer 216. Further, the DVD / BD drive 219 and the HDD 220 respectively reproduce the partial TS recorded on the recording medium.

The MPEG decoder 227 decodes the video PES packet constituting the partial TS extracted by the demultiplexer 216 or reproduced by the DVD / BD drive 219 or the HDD 220 to obtain video data . Further, the MPEG decoder 227 performs decoding processing on the voice PES packet constituting the partial TS to obtain voice data.

The graphic generation circuit 228 superimposes graphics data on the video data obtained by the MPEG decoder 227 as necessary. The video output terminal 229 outputs the video data output from the graphic generation circuit 228. The audio output terminal 230 outputs audio data obtained by the MPEG decoder 227.

The DTCP circuit 226 encrypts the partial TS extracted by the demultiplexer 216 or the partial TS reproduced from the DVD / BD drive 219 or the HDD 220 as necessary. The DTCP circuit 226 also decodes the encrypted data supplied from the network terminal 225 or the high-speed data line interface 213 to the Ethernet interface 224.

The CPU 221 controls the operation of each part of the disc recorder 210. The flash ROM 222 stores control software and archives data. The DRAM 223 constitutes a work area of the CPU 221. The CPU 221 expands reading software and data from the flash ROM 222 on the DRAM 223, starts the software, and controls each part of the disc recorder 210.

The operation of the disk recorder 210 shown in Fig. 4 will be briefly described.

The television broadcast signal input to the antenna terminal 214 is supplied to the digital tuner 215. In the digital tuner 215, a television broadcast signal is processed, a predetermined transport stream is extracted, and the predetermined transport stream is supplied to the demultiplexer 216. In this demultiplexer 216, a partial TS (TS packet of video data, TS packet of audio data) corresponding to a predetermined channel is extracted from the transport stream. The partial TS is supplied to the DVD / BD drive 219 or the HDD 220 through the recording interface 218 and is recorded based on a recording instruction from the CPU 221. [

The partial TS extracted by the demultiplexer 216 or the partial TS reproduced by the DVD / BD drive 219 or the HDD 220 is supplied to the MPEG decoder 227 as described above. In this MPEG decoder 227, the video PES packet formed by the TS packet of video data is decoded to obtain video data. This video data is output to the video output terminal 229 after the graphics data is superimposed on the graphics data in the graphics generation circuit 228. In addition, in the MPEG decoder 227, the audio PES packet formed by the TS packet of the audio data is decoded to obtain audio data. The audio data is output to the audio output terminal 230.

Video (image) data and audio data obtained by the MPEG decoder 227 corresponding to the partial TS reproduced by the DVD / BD drive 219 or the HDD 220 are supplied to the HDMI transmitting unit 212 as necessary , And is sent to the HDMI cable connected to the HDMI terminal 211.

The partial TS extracted by the demultiplexer 216 or the partial TS reproduced by the DVD / BD drive 219 or the HDD 220 is encrypted by the DTCP circuit 226 as needed, (Registered trademark) interface 224 to the high-speed data line interface 213 as transmission data. Therefore, the corresponding partial TS is transmitted to the other party's device through a predetermined line of the HDMI cable connected to the HDMI terminal 211.

When the partial TS extracted by the demultiplexer 216 or the partial TS reproduced by the DVD / BD drive 219 or the HDD 220 is sent to the network, the partial TS is transmitted from the DTCP circuit 226 Encrypted and then output to the network terminal 225 via the Ethernet (registered trademark) interface 224. [

The encrypted partial TS input to the network terminal 225 or received from the HDMI terminal 211 at the high speed data line interface 213 is transmitted to the Ethernet interface 224, To the DTCP circuit 226 and decoded. The partial TS decoded by the DTCP circuit 226 is supplied to the DVD / BD drive 219 or the HDD 220 through the recording interface 218 and is recorded on the basis of the recording instruction from the CPU 221 do.

In the high-speed data line interface 213, an IP packet including a remote control code transmitted through a predetermined line of the HDMI cable connected to the HDMI terminal 211 is received. This IP packet is supplied to the CPU 221 via the Ethernet (registered trademark) interface 224. [ The CPU 221 controls each part of the disc recorder 210 based on the remote control code when the remote control code included in the IP packet relates to the control of the disc recorder 210. [

5 shows a configuration example of the HDMI transmitting unit (HDMI source) 312 of the set-top box 310 and the HDMI receiving unit (HDMI sink) 253 of the television receiver 250 in the AV system 200 of FIG. Respectively.

The HDMI source 312 sets the ratio of the effective video interval (hereinafter also referred to as the active video interval), which is a section excluding the horizontal retrace interval and the vertical retrace interval, from the vertical synchronization signal of 1 to the next vertical synchronization signal A differential signal corresponding to pixel data of an image for one screen of compression is transmitted in one direction to the HDMI sink 253 in a plurality of channels and at least a sound accompanying the image in the horizontal retrace interval or vertical retrace interval A differential signal corresponding to data, control data, and other auxiliary data is transmitted to the HDMI sink 253 through a plurality of channels in one direction.

In other words, the HDMI source 312 has a transmitter 81. The transmitter 81 converts the pixel data of the uncompressed image into a corresponding differential signal and outputs the differential signal to the HDMI cable 351 (# 1, # 2, ..., To the HDMI sink 253, which is connected via the HDMI connector 253.

The transmitter 81 also converts the audio data attached to the uncompressed image and further necessary control data and other auxiliary data into a corresponding differential signal and supplies the three TMDS channels # 0, # 1, # 2) to the HDMI sink 253 connected via the HDMI cable 351 in one direction.

The transmitter 81 also transmits the pixel clock synchronized with the pixel data transmitted from the three TMDS channels (# 0, # 1, and # 2) to the HDMI And sends it to the sink 253. Here, in one TMDS channel (#i) (i = 0, 1, 2), 10 bits of pixel data are transmitted during one clock of the pixel clock.

The HDMI sink 253 receives the differential signal corresponding to the pixel data transmitted from the HDMI source 312 in one direction in a plurality of channels in the active video section and simultaneously outputs the differential signal in the horizontal retrace interval or vertical retrace interval, And receives differential data corresponding to audio data and control data transmitted from the HDMI source 312 in one direction in a plurality of channels.

In other words, the HDMI sink 253 has a receiver 82. The receiver 82 receives the differential signal corresponding to the pixel data transmitted from the HDMI source 312 connected via the HDMI cable 351 in one direction in the TMDS channels (# 0, # 1, and # 2) , And the differential signal corresponding to the audio data or the control data is received from the HDMI source 312 in synchronization with the pixel clock transmitted from the TMDS clock channel.

The transmission channel of the HDMI system including the HDMI source 312 and the HDMI sink 253 is supplied with the pixel data and the audio data from the HDMI source 312 to the HDMI sink 253 in synchronization with the pixel clock, A transmission called a DDC (Display Data Channel) 83 or a CEC line 84, in addition to the three TMDS channels (# 0 to # 2) as transmission channels for transmission and a TMDS clock channel as a transmission channel for transmitting the pixel clock, There is a channel.

The DDC 83 is composed of two signal lines (not shown) included in the HDMI cable 351. The HDMI source 35 receives the HDMI signal from the HDMI sink 353 via the HDMI cable 351, (Enhanced Extended Display Identification Data).

That is, the HDMI sink 253 has an EDID ROM (Read Only Memory) 85 storing E-EDID, which is performance information about its own performance (configuration / capability) in addition to the HDMI receiver 82 . The HDMI source 312 reads the E-EDID of the HDMI sink 253 via the DDC 83 from the HDMI sink 253 connected via the HDMI cable 351 and writes the E-EDID For example, RGB, YCbCr4: 4: 4, YCbCr4: 2: 2, etc., corresponding to the electronic apparatus having the HDMI sink 253, for example.

The CEC line 84 is constituted by one signal line (not shown) included in the HDMI cable 351 and is also used for bidirectional communication of control data between the HDMI source 312 and the HDMI sink 253 .

In addition, the HDMI cable 351 includes a line 86 connected to a pin called HPD (Hot Plug Detect). The source device can detect the connection of the sink device by using the line 86. Also, the HDMI cable 351 includes a line 87 used for supplying power from the source device to the sink device. In addition, the HDMI cable 351 includes a reserve line 88.

6 shows a configuration example of the HDMI transmitter 81 and the HDMI receiver 82 shown in Fig.

The transmitter 81 has three encoder / serializers 81A, 81B and 81C corresponding to the three TMDS channels # 0, # 1 and # 2, respectively. Each of the encoder / serial converters 81A, 81B and 81C encodes image data, auxiliary data, and control data supplied thereto, converts the parallel data into serial data, and transmits the serial data by differential signals. Here, when the image data has three components, for example, R (red), G (green) and B (blue), the B component is supplied to the encoder / The component (G component) is supplied to the encoder / serial converter 81B and the R component (R component) is supplied to the encoder / serial converter 81C.

The control packet is supplied to the encoder-to-serial converter 81A, and the voice data is supplied to the encoder-to-serial converters 81B and 81C, for example, as auxiliary data. .

As control data, there are a 1-bit vertical synchronizing signal (VSYNC), a 1-bit horizontal synchronizing signal (HSYNC), and control bits (CTL0, CTL1, CTL2 and CTL3) of 1 bit each. The vertical synchronizing signal and the horizontal synchronizing signal are supplied to the encoder / serial converter 81A. The control bits CTL0 and CTL1 are supplied to the encoder / serial converter 81B and the control bits CTL2 and CTL3 are supplied to the encoder / serial converter 81C.

The encoder / serial converter 81A transmits the B component of the image data supplied thereto, the vertical synchronization signal and the horizontal synchronization signal, and the auxiliary data in a time division manner. That is, the encoder / serial converter 81A converts the B component of the image data supplied thereto into parallel data of 8 bits, which is a fixed number of bits. Further, the encoder / serial converter 81A encodes the parallel data, converts it into serial data, and transmits it to the TMDS channel # 0.

Further, the encoder / serial converter 81A encodes the 2-bit parallel data of the vertical synchronizing signal and the horizontal synchronizing signal supplied thereto, converts it into serial data, and transmits it to the TMDS channel (# 0). Further, the encoder / serial converter 81A converts the auxiliary data supplied thereto into parallel data of 4-bit units. Then, the encoder / serial converter 81A encodes the parallel data, converts it into serial data, and transmits it to the TMDS channel # 0.

The encoder / serial converter 81B transmits the G component of the image data supplied thereto, the control bits CTL0 and CTL1, and the auxiliary data in a time division manner. In other words, the encoder / serial converter 81B converts the G component of the image data supplied thereto into parallel data of 8 bits, which is a fixed number of bits. Further, the encoder / serial converter 81B encodes the parallel data, converts it into serial data, and transmits it to the TMDS channel (# 1).

Further, the encoder / serial converter 81B encodes the 2-bit parallel data of the control bits CTL0 and CTL1 supplied thereto, converts it into serial data, and transmits it to the TMDS channel # 1. Further, the encoder / serial converter 81B converts the auxiliary data supplied thereto into parallel data of 4-bit units. Then, the encoder / serial converter 81B encodes the parallel data, converts it into serial data, and transmits it to the TMDS channel (# 1).

The encoder / serializer 81C transmits the R component of the image data supplied thereto, the control bits CTL2 and CTL3, and the auxiliary data in a time division manner. That is, the encoder / serial converter 81C converts the R component of the image data supplied thereto into parallel data of 8 bits, which is a fixed number of bits. Further, the encoder / serial converter 81C encodes the parallel data, converts it into serial data, and transmits it to the TMDS channel (# 2).

Further, the encoder / serial converter 81C encodes the 2-bit parallel data of the control bits CTL2 and CTL3 supplied thereto, converts it into serial data, and transmits it to the TMDS channel # 2. Further, the encoder / serial converter 81C converts the auxiliary data supplied thereto into parallel data of 4-bit units. Then, the encoder / serial converter 81C encodes the parallel data, converts it into serial data, and transmits it to the TMDS channel (# 2).

The receiver 82 has three recovery / decoders 82A, 82B, and 82C corresponding to the three TMDS channels # 0, # 1, and # 2, respectively. Each of the recovery / decoders 82A, 82B and 82C receives image data, auxiliary data, and control data transmitted by the differential signals in the TMDS channels (# 0, # 1, and # 2). Each of the recovery / decoders 82A, 82B, and 82C converts the image data, the auxiliary data, and the control data from the serial data to the parallel data, and further decodes and outputs the parallel data.

That is, the recovery / decoder 82A receives the B component, the vertical synchronization signal, the horizontal synchronization signal, and the auxiliary data of the image data transmitted by the differential signal in the TMDS channel (# 0). Then, the recovery / decoder 82A converts the B component of the image data, the vertical synchronizing signal, the horizontal synchronizing signal, and the auxiliary data from the serial data to the parallel data, decodes and outputs the parallel data.

The recovery / decoder 82B receives the G component of the image data transmitted by the differential signal in the TMDS channel (# 1), the control bits CTL0 and CTL1, and the auxiliary data. Then, the recovery / decoder 82B converts the G component of the image data, the control bits CTL0 and CTL1, and the auxiliary data from the serial data to the parallel data, decodes and outputs the parallel data.

The recovery / decoder 82C receives the R component of the image data transmitted by the differential signal in the TMDS channel (# 2), the control bits CTL2 and CTL3, and the auxiliary data. Then, the recovery / decoder 82C converts the R component of the image data, the control bits CTL2 and CTL3, and the auxiliary data from the serial data to the parallel data, decodes and outputs the parallel data.

FIG. 7 shows an example of a transmission period (period) in which various types of transmission data are transmitted from the three TMDS channels (# 0, # 1, # 2) of the HDMI. 7 shows sections of various kinds of transmission data when a progressive image of 720 x 480 pixels in width and length is transmitted in the TMDS channels (# 0, # 1, and # 2).

A video field in which transmission data is transmitted in the three TMDS channels (# 0, # 1, and # 2) of the HDMI includes a video data period, a data island period Data Island period), and a control period (Control period).

Here, the video field period is a period from a rising edge of a certain vertical synchronization signal to a rising edge of a next vertical synchronization signal, and includes a horizontal blanking period, a vertical blanking period, (Active Video), which is a section excluding the horizontal blanking period and the vertical blanking period, in the video field period.

The video data section is allocated to the active video section. In this video data section, data of active pixels (active pixels) of 720 pixels x 480 lines constituting image data of one screen of uncompressed one are transmitted.

The data island period and the control period are assigned to the horizontal blanking period and the vertical blanking period. In this data island section and the control section, auxiliary data is transmitted.

That is, the data island period is allocated to a part of the horizontal blanking period and the vertical blanking period. In this data island section, data, for example, packets of voice data, which are data not related to control, are transmitted from the auxiliary data.

The control period is assigned to another portion of the horizontal blanking period and the vertical blanking period. In this control period, among the auxiliary data, data related to control, for example, a vertical synchronizing signal, a horizontal synchronizing signal, a control packet, and the like are transmitted.

Here, in the current HDMI, the frequency of the pixel clock transmitted in the TMDS clock channel is, for example, 165 MHz. In this case, the transfer rate of the data island section is about 500 Mbps.

Fig. 8 shows the pin arrangement of the HDMI terminals 29 and 31. Fig. This pin arrangement is called type A (type-A).

The two lines, which are the differential lines through which the differential signals TMDS Data # i + and TMDS Data # i- of the TMDS channel #i are transmitted, are the pins to which the TMDS Data # i + ) And the pin (pin number 3, 6, 9) to which TMDS Data # i- is assigned.

The CEC line 84 to which the CEC signal as the control data is transmitted is connected to the pin having the pin number 13 and the pin having the pin number 14 is the reserved pin. A line to which an SDA (Serial Data) signal such as an E-EDID is transmitted is connected to a pin having a pin number 16. An SCL (Serial Clock) signal, which is a clock signal used for synchronization during transmission and reception of the SDA signal, Line is connected to the pin having the pin number 15. The DDC 83 described above is constituted by a line through which the SDA signal is transmitted and a line through which the SCL signal is transmitted.

Further, the line 86 for detecting the connection of the sink device by the source device as described above is connected to the pin having the pin number 19. Further, the line 87 for supplying power as described above is connected to a pin having a pin number of 18.

5 shows a configuration of the HDMI transmitting unit (HDMI source) 312 of the set top box 310 and the HDMI receiving unit (HDMI sink) 253 of the television receiver 250 in the AV system 200 of FIG. For example. Although not described in detail, other HDMI transmission units and HDMI reception units in the AV system 200 of FIG. 1 are configured in the same manner.

9 shows a configuration example of the high-speed data line interface 313 of the set-top box 310 and the high-speed data line interface 254A of the television receiver 250 in the AV system 200 shown in Fig. These interfaces 313 and 254A constitute a communication unit for performing LAN communication (Local Area Network). This communication unit includes a pair of differential lines among the plurality of lines constituting the HDMI cable 351, a reserve line (Ether-line) corresponding to a reserve pin (14 pin) in this embodiment, And the HPD line (Ether + line) corresponding to the HPD pin (19 pin).

The set-top box 310 includes a LAN signal transmitting circuit 411, a terminating resistor 412, AC coupling capacitors 413 and 414, a LAN signal receiving circuit 415, a subtracting circuit 416, a pull-up resistor 421, A resistor 422 and a capacitor 423 constituting a low-pass filter, a comparator 424, a pull-down resistor 431, a resistor 432 and a capacitor 433 provided with a low-pass filter, and a comparator 434 I have. The high-speed data line interface 313 includes a LAN signal transmitting circuit 411, a terminating resistor 412, AC coupling capacitors 413 and 414, a LAN signal receiving circuit 415 and a subtracting circuit 416 Consists of.

A series circuit of a pull-up resistor 421, an AC coupling capacitor 413, a terminating resistor 412, an AC coupling capacitor 414 and a pull-down resistor 431 is connected between the power line (+5.0 V) and the ground line . The connection point P1 of the AC coupling capacitance 413 and the terminal resistor 412 is connected to the constant output side of the LAN signal transmission circuit 411 and to the positive input side of the LAN signal reception circuit 415. [ The connection point P2 of the AC coupling capacitance 414 and the terminal resistor 412 is connected to the negative output side of the LAN signal transmission circuit 411 and to the negative input side of the LAN signal reception circuit 415 do. To the input side of the LAN signal transmitting circuit 411, a transmission signal (transmission data) SG411 is supplied.

An output signal SG412 of the LAN signal receiving circuit 415 is supplied to the positive terminal of the subtraction circuit 416 and a transmission signal (transmission data) SG411 is supplied to the negative terminal of the subtraction circuit 416 . The subtraction circuit 416 subtracts the transmission signal SG411 from the output signal SG412 of the LAN signal reception circuit 415 to obtain the reception signal (reception data) SG413.

The connection point Q1 of each of the pull-up resistor 421 and the AC coupling capacitance 413 is connected to the ground line through a series circuit of the resistor 422 and the capacitor 423. The output signal of the low-pass filter obtained at the connection point of the resistor 422 and the capacitor 423 is supplied to one input terminal of the comparator 424. In this comparator 424, the output signal of the low-pass filter is compared with the reference voltage Vref1 (+ 3.75V) supplied to the other input terminal. The output signal SG414 of this comparator 424 is supplied to the CPU 314. [

The connection point Q2 of the AC coupling capacitance 414 and the pull-down resistor 431 is connected to the ground line through the series circuit of the resistor 432 and the capacitor 433. The output signal of the low-pass filter obtained at the connection point of the resistor 432 and the capacitor 433 is supplied to one input terminal of the comparator 434. In this comparator 434, the output signal of the low-pass filter is compared with the reference voltage Vref2 (+ 1.4V) supplied to the other input terminal. The output signal SG415 of the comparator 434 is supplied to the CPU 314. [

The television receiver 250 includes a LAN signal transmitting circuit 441, a terminating resistor 442, AC coupling capacitors 443 and 444, a LAN signal receiving circuit 445, a subtracting circuit 446, a pull down resistor 451, A resistor 452 and a capacitor 453 constituting a low-pass filter, a comparator 454, a choke coil 461, a resistor 462, and a resistor 463. The high-speed data line interface 254A includes a LAN signal transmitting circuit 441, a terminating resistor 442, AC coupling capacitors 443 and 444, a LAN signal receiving circuit 445 and a subtracting circuit 446 Consists of.

A series circuit of a resistor 462 and a resistor 463 is connected between the power line (+5.0 V) and the ground line. The choke coil 461, the AC coupling capacitance 444, the terminal resistor 442, the AC coupling capacitance 443, and the AC coupling capacitance 443 are connected between the connection point of the resistor 462 and the resistor 463 and the ground line. A series circuit of pull-down resistor 451 is connected.

The connection point P3 of the AC coupling capacitance 443 and the terminal resistor 442 is connected to the constant output side of the LAN signal transmission circuit 441 and to the positive input side of the LAN signal reception circuit 445. [ The connection point P4 between the AC coupling capacitance 444 and the terminal resistor 442 is connected to the negative output side of the LAN signal transmission circuit 441 and to the negative input side of the LAN signal reception circuit 445 do. To the input side of the LAN signal transmitting circuit 441, a transmission signal (transmission data) SG417 is supplied.

An output signal SG418 of the LAN signal receiving circuit 445 is supplied to the positive terminal of the subtraction circuit 446 and a transmission signal SG417 is supplied to the negative terminal of the subtraction circuit 446. [ The subtraction circuit 446 subtracts the transmission signal SG417 from the output signal SG418 of the LAN signal reception circuit 445 to obtain the reception signal (reception data) SG419.

The connection point Q3 of each of the pull-down resistor 451 and the AC coupling capacitance 443 is connected to the ground line through the series circuit of the resistor 452 and the capacitor 453. The output signal of the low-pass filter obtained at the connection point of the resistor 452 and the capacitor 453 is supplied to one input terminal of the comparator 454. In this comparator 454, the output signal of the low-pass filter is compared with the reference voltage Vref3 (+ 1.25V) supplied to the other input terminal. The output signal SG416 of the comparator 454 is supplied to the CPU 271. [

The reserved line 501 and the HPD line 502 included in the HDMI cable 351 constitute a differential twisted pair. The source side end 511 of the reserved line 501 is connected to the 14th pin of the HDMI terminal 311 and the sink side end 521 of the reserved line 501 is connected to the 14th pin of the HDMI terminal 251A. The source side end 512 of the HPD line 502 is connected to the 19th pin of the HDMI terminal 311 and the sink side end 522 of the HPD line 502 is connected to the 19th pin of the HDMI terminal 251A .

In the set top box 310, the connection point Q1 of the pull-up resistor 421 and the AC coupling capacitance 413 is connected to the 14th pin of the HDMI terminal 311, and the pull-down resistor 431 And the AC coupling capacitance 414 are connected to the 19th pin of the HDMI terminal 311. [ On the other hand, in the television receiver 250, the connection point Q3 of the pull-down resistor 451 and the AC coupling capacitance 443 is connected to the 14th pin of the HDMI terminal 251A, The connection point Q4 of the coil 461 and the AC coupling capacitance 444 is connected to the 19th pin of the HDMI terminal 251A.

Next, the operation of the LAN communication by the high-speed data line interfaces 313 and 254A configured as described above will be described.

In the set-top box 310, the transmission signal (transmission data) SG411 is supplied to the input side of the LAN signal transmission circuit 411, and the differential signal A positive output signal, and a negative output signal). The differential signal output from the LAN signal transmitting circuit 411 is supplied to the connection points P1 and P2 and is transmitted through one line (reserve line 501, HPD line 502) of the HDMI cable 351 , And transmitted to the television receiver 250.

In the television receiver 250, the transmission signal (transmission data) SG417 is supplied to the input side of the LAN signal transmission circuit 441, and the differential signal corresponding to the transmission signal SG417 from the LAN signal transmission circuit 441 A signal (positive output signal, negative output signal) is output. The differential signal output from the LAN signal transmitting circuit 441 is supplied to the connection points P3 and P4 and is transmitted through one line (reserve line 501, HPD line 502) of the HDMI cable 351 , And is transmitted to the set-top box 310.

In the set-top box 310, since the input side of the LAN signal receiving circuit 415 is connected to the connection points P1 and P2, as the output signal SG412 of the corresponding LAN signal receiving circuit 415, An addition signal of a transmission signal corresponding to the differential signal (current signal) output from the circuit 411 and a reception signal corresponding to the differential signal transmitted from the television receiver 250 as described above is obtained. The subtraction circuit 416 subtracts the transmission signal SG411 from the output signal SG412 of the LAN signal reception circuit 415. [ Therefore, the output signal SG413 of the subtraction circuit 416 corresponds to the transmission signal (transmission data) SG417 of the television receiver 250. [

In the television receiver 250, since the input side of the LAN signal receiving circuit 445 is connected to the connection points P3 and P4, as the output signal SG418 of the corresponding LAN signal receiving circuit 445, It is possible to obtain a transmission signal corresponding to the differential signal (current signal) output from the circuit 441 and an addition signal of the reception signal corresponding to the differential signal transmitted from the set-top box 310 as described above. The subtraction circuit 446 subtracts the transmission signal SG417 from the output signal SG418 of the LAN signal reception circuit 445. [ Therefore, the output signal SG419 of the subtraction circuit 446 corresponds to the transmission signal (transmission data) SG411 of the set top box 310. [

As described above, bidirectional LAN communication can be performed between the high-speed data line interface 313 of the set-top box 310 and the high-speed data line interface 254A of the television receiver 250. [

9, the HPD line 502 transmits to the set top box 310 that the HDMI cable 351 is connected to the television receiver 250 at a DC bias level in addition to the above-described LAN communication. That is, the resistors 462 and 463 and the choke coil 461 in the television receiver 250 are connected to the HDMI terminal 251A via the HPD line 502 when the HDMI cable 351 is connected to the television receiver 250. [ Through the 19-pin of the transistor. The set top box 310 extracts the DC bias of the HPD line 502 into a low pass filter composed of the resistor 432 and the capacitor 433 and outputs the reference voltage Vref2 (for example, 1.4V).

The voltage of the 19 pin of the HDMI terminal 311 is lower than the reference voltage Vref2 because the pull down resistor 431 is present unless the HDMI cable 351 is connected to the television receiver 250, If the HDMI cable 351 is connected to the television receiver 250, it is higher than the reference voltage Vref2. Therefore, the output signal SG415 of the comparator 434 becomes high level when the HDMI cable 351 is connected to the television receiver 250, and becomes low level when it is not. This allows the CPU 314 of the set top box 310 to recognize whether or not the HDMI cable 351 is connected to the television receiver 250 based on the output signal SG415 of the comparator 434 .

9, it is determined whether or not the device connected to both ends of the HDMI cable 351 at the DC bias potential of the reserved line 501 is a device capable of LAN communication (hereinafter referred to as "e-HDMI compatible device") , And a device which can not communicate with LAN (hereinafter referred to as " e-HDMI non-compliant device ").

As described above, the set-top box 310 pulls up the reserve line 501 by the resistor 421 (+ 5V) and the television receiver 250 pulls down the reserve line 501 by the resistor 451. The resistors 421 and 451 are not present in the e-HDMI compatible devices.

The set top box 310 compares the DC potential of the reserve line 501 that has passed through the low pass filter composed of the resistor 422 and the capacitor 423 with the reference voltage Vref1 in the comparator 424 as described above do. When the television receiver 250 is an e-HDMI compatible device and the pull down resistor 451 is present, the voltage of the reserve line 501 becomes 2.5V. However, when the television receiver 250 is an e-HDMI non-compliant device and there is no pull down resistor 451, the voltage of the reserved line 501 becomes 5 V due to the presence of the pullup resistor 421.

Therefore, the reference signal Vref1 becomes, for example, 3.75 V, and the output signal SG414 of the comparator 424 becomes low level when the television receiver 250 is an e-HDMI compatible device, Lt; / RTI > This allows the CPU 314 of the set top box 310 to recognize whether or not the television receiver 250 is an e-HDMI compliant device, based on the output signal SG414 of the comparator 424.

Similarly, the television receiver 250 compares the DC potential of the reserve line 501, which has passed through the low-pass filter of the resistor 452 and the capacitor 453, with the reference voltage Vref3 in the comparator 454, . When the set-top box 310 is an e-HDMI compatible device and the pull-up resistor 421 is present, the voltage of the reserved line 501 becomes 2.5V. However, when the set-top box 310 is an e-HDMI non-compliant device and there is no pull-up resistor 421, the voltage of the reserved line 501 becomes 0 V due to the presence of the pull down resistor 451.

Thus, the reference voltage Vref3 is, for example, 1.25 V, and the output signal SG416 of the comparator 454 becomes high level when the set-top box 310 is an e-HDMI compatible device, Low level. This allows the CPU 271 of the television receiver 250 to recognize whether or not the set-top box 310 is an e-HDMI compatible device, based on the output signal SG416 of the comparator 454. [

According to the configuration example shown in Fig. 9, in the interface for performing video and audio data transmission, exchange of the connected device information, authentication, device control data communication, and LAN communication by one HDMI cable 351, Directional communication via the pair of differential transmission paths and the connection state of the interface is notified by the DC bias potential of at least one of the transmission lines so that the SPL line and the SDA line are physically separated from each other Lt; / RTI > As a result, it is possible to form a circuit due to LAN communication irrespective of the electrical specifications prescribed for the DDC by the division, and stable and reliable LAN communication can be realized at low cost.

The pull-up resistor 421 shown in Fig. 9 may be provided not in the set top box 310 but in the HDMI cable 351. [ In this case, each of the terminals of the pull-up resistor 421 is connected to each of the lines (signal lines) connected to the reserved line 501 and the power source (power supply potential) among the lines provided in the HDMI cable 351.

The pull-down resistor 451 and the resistor 463 shown in Fig. 9 may be provided in the HDMI cable 351, not in the television receiver 250. Fig. In such a case, each terminal of the pull-down resistor 451 is connected to each of the lines (ground line) connected to the reserve line 501 and the ground (reference potential) among the lines provided in the HDMI cable 351 . Each of the terminals of the resistor 463 is connected to each of the lines (ground line) connected to the HPD line 502 and the ground (reference potential) among the lines provided in the HDMI cable 351.

9 shows a configuration example of the high-speed data line interface 313 of the set-top box 310 and the high-speed data line interface 254A of the television receiver 250 in the AV system 200 of Fig. 1 . Although not described in detail, in the AV system 200 of FIG. 1, other high-speed data line interfaces are configured similarly.

Next, the operation of the AV system 200 shown in Fig. 1 will be described.

10, in the AV system 200, video (image) and audio data (uncompressed video, audio data) of a dedicated line connection system corresponding to the streaming data (partial TS) Audio signal) is transmitted from the set-top box 310 to the television receiver 250 using the HDMI TMDS channel. Then, the television receiver 250 performs image display and audio output based on the video and audio data of the dedicated line connection system.

In the television receiver 250, when the user instructs the recording of the video signal corresponding to the display image, the set top box 310, the television receiver 250, the high-speed data line (bidirectional communication path) Streaming data (compressed image, audio signal) is supplied. The streaming data (compressed video, audio signal) is supplied from the television receiver 250 to the television receiver 250 and supplied to the disk recorder 210 via a high-speed data line (bidirectional communication path) and recorded.

The above operation will be described in more detail.

In the set-top box 310, streaming data (encrypted partial TS) of a predetermined image content is obtained from the network terminal 323 via the Ethernet (registered trademark) interface 322. [ The streaming data is decoded by the DTCP circuit 318 and then supplied to the MPEG decoder 324 and decoded. In the MPEG decoder 324, video PES packets composed of TS packets of video data are subjected to decoding processing to obtain video data. In addition, the MPEG decoder 324 performs decoding processing on audio PES packets constituted by TS packets of audio data So that voice data can be obtained.

As described above, the video (image) and audio data (uncompressed video and audio signal) obtained by the MPEG decoder 324 are supplied to the HDMI transmitting unit 312 and transmitted via the HDMI cable 351 And transmitted to the television receiver 250.

In the television receiver 250, the HDMI receiving unit 253 acquires video (image) and audio data (uncompressed video, audio signal) input to the HDMI terminal 251A via the HDMI cable 351. [ The video data received by the HDMI receiving unit 253 is supplied to the panel driving circuit 262 through the video / graphics processing circuit 261. [ Therefore, the image of the image content received by the set top box 310 is displayed on the display panel 263. [ The audio data received by the HDMI receiving unit 253 is supplied to the speaker 266 through the audio signal processing circuit 264 and the audio amplifying circuit 265. [ Therefore, the audio of the video contents received from the set-top box 310 is output from the speaker 266. [

In this way, in a state in which the predetermined image content received in the set-top box 310 is being watched by the television receiver 250, the user operates the remote control transmitter 277 to transmit the video signal recording instruction (Hereinafter simply referred to as " recording instruction ") is performed. In this case, the IP packet including the remote control code of the recording instruction is transmitted from the CPU 271 of the television receiver 250 to the high-speed data line interface 254A via the Ethernet (registered trademark) And is transmitted to the set-top box 310 through a high-speed data line (bidirectional communication path).

In the set-top box 310, in the high-speed data line interface 313, an IP packet including a remote control code of a recording instruction sent from the television receiver 250 is received. This IP packet is supplied to the CPU 314 via the Ethernet (registered trademark) interface 322. The streaming data (compressed video, audio signal) from the network terminal 323 is sent to the high-speed data line (bidirectional communication path) by the CPU 314 because the remote control code of the recording instruction is included in this IP packet To be transmitted to the television receiver 250. [

That is, in the set top box 310, the streaming data from the network terminal 323 is supplied as transmission data to the high-speed data line interface 313 through the Ethernet (registered trademark) interface 322, (Two-way communication path) to the television receiver 250.

As described above, the remote control code of the recording instruction transmitted from the television receiver 250 via the high-speed data line (bidirectional communication path) as described above is transmitted to the set-top box 310 by the streaming data Signal).

When the user operates the remote control transmitter 277 and instructs the recording by the television receiver 250 as described above, the received data received by the high-speed data line interface 254A under the control of the CPU 271 , The path switching switch 255 switches the path so as to be supplied as transmission data to the high-speed data line interface 254B.

In this television receiver 250, the high-speed data line interface 254A receives streaming data sent from the set-top box 310. [ The streaming data is supplied as transmission data to the high-speed data line interface 254B via the line changeover switch 255 and is transmitted to the disc recorder 210 via the high-speed data line (bidirectional communication path).

In the disc recorder 210, the high-speed data line interface 213 receives streaming data (compressed video, audio signal) sent from the television receiver 250. The streaming data is supplied to the DTCP circuit 226 via the Ethernet (registered trademark) interface 224 and decoded. The partial TS obtained by the DTCP circuit 226 is supplied to the DVD / BD drive 219 or the HDD 220 via the recording unit interface 218 and is recorded on the basis of a recording instruction from the CPU 221. [

When the user operates the remote control transmitter 277 and instructs the recording as described above, the TV receiver 250 receives from the CPU 271 an IP packet including the remote control code of the recording instruction, Is supplied as transmission data to the high-speed data line interface 254B via the Net.RTM. Interface 274 and is transmitted to the disk recorder 210 via the high-speed data line (bidirectional communication path).

In the disc recorder 210, in the high-speed data line interface 213, an IP packet including a remote control code of a recording instruction sent from the television receiver 250 is received. This IP packet is supplied to the CPU 221 via the Ethernet (registered trademark) interface 224. The remote control code of the recording instruction is included in the IP packet so that the partial TS sent from the television receiver 250 is recorded in the DVD / BD drive 219 or the HDD 220 as described above. 221).

1, the video (image) and audio data (uncompressed video, audio signal) of the dedicated line connection system corresponding to the partial TS recorded in the disc recorder 210 is converted into the HDMI Is transmitted from the disc recorder 210 to the television receiver 250 using the TMDS channel of FIG. Then, the television receiver 250 performs image display and audio output based on the video and audio data of the dedicated line connection system.

That is, in the disc recorder 210, the partial TS reproduced by the DVD / BD drive 219 or the HDD 220 is supplied to the MPEG decoder 227. In this MPEG decoder 227, video PES packets composed of TS packets of video data are subjected to decoding processing to obtain video data, and audio PES packets constituted by TS packets of audio data are decoded Processing can be performed to obtain audio data.

The video (image) and audio data (uncompressed image and audio signal) obtained by the MPEG decoder 227 are supplied to the HDMI transmitting unit 212 and are transmitted to the HDMI transmitting unit 212 via the HDMI cable 352 And transmitted to the television receiver 250.

In the television receiver 250, the HDMI receiver 253 acquires video (image) and audio data (uncompressed video, audio signal) input to the HDMI terminal 251B via the HDMI cable 352. The video data received by the HDMI receiving unit 253 is supplied to the panel driving circuit 262 through the video / graphics processing circuit 261. [ Therefore, an image of a predetermined image content reproduced by the disc recorder 210 is displayed on the display panel 263. The audio data received by the HDMI receiving unit 253 is supplied to the speaker 266 through the audio signal processing circuit 264 and the audio amplifying circuit 265. [ Therefore, a sound of a predetermined image content reproduced by the disc recorder 210 is output from the speaker 266. [

11 schematically shows the flow of signals (data) in the television receiver 250 in the operation of the AV system 200 described above. That is, at the time of viewing a predetermined video content, the video (image) and audio data (uncompressed video, audio signal) sent from the set top box 310 to the TMDS channel are selected by the TMDS signal switch 252, And supplied to the HDMI receiving unit 253. When recording the predetermined video contents, the streaming data (compressed video, audio signal) sent from the set-top box 310 via the high-speed data line (bidirectional communication path) passes through the path switching switch 255 , And is transmitted to the disc recorder 210 through a high-speed data line (bidirectional communication path).

As described above, in the AV system 200 shown in Fig. 1, video (image) and audio data (uncompressed video and audio signal) of a predetermined video content are supplied from the set- (Compressed video, audio data) of a predetermined video content from the set-top box 310 in a state in which the television receiver 250 transmits the video data through the TMDS channel, It can be transmitted to the disc recorder 210 via the data line (bidirectional communication path), the television receiver 250, and recorded. That is, the set-top box 310 and the television receiver 250 do not have a recording section, that is, without recording the set-top box 310 and the television receiver 250, Lt; / RTI >

12, in the AV system 200 shown in Fig. 1, in a state in which a predetermined video content is being watched by the television receiver 250, for example, the remote control transmitter 277, The IP packet including the remote control code of the recording instruction from the television receiver 250 is transmitted to the set top box 310 and the disc recorder 210 via the high-speed data line (bidirectional communication path) Streaming data (compressed video, audio data) of a predetermined image content is supplied from the box 310 to the disc recorder 210 through the television receiver 250 and recorded therein. Therefore, the user's operation for recording the video content being watched can be simplified.

In the AV system 200 shown in Fig. 1, the streaming data (compression) received from the set-top box 310 via the high-speed data line interface 254A of the television receiver 250 via the high- Video and audio data) is supplied as transmission data as it is to the high-speed data line interface 254B through the path changeover switch 255. [ Streaming data (compressed video, audio data) from the set top box 310 is transmitted from the high-speed data line interface 254B to the disk recorder 210 via a high-speed data line (bidirectional communication path). Therefore, in the television receiver 250, the processing of decoding and coding of the streaming data (compressed video and audio data) becomes unnecessary, and the processing load can be reduced.

1, when transmitting streaming data (compressed video, audio data) from the set-top box 310 to the television receiver 250, a predetermined line of the HDMI cable 351 Line and an HPD line), and the set-top box 310 and the television receiver 250 are connected only by the HDMI cable 351, and the connection setting of the user is facilitated.

Likewise, when transmitting streaming data (compressed video, audio data) from the television receiver 250 to the disc recorder 210, a bidirectional communication path configured by a predetermined line (reserve line, HPD line) of the HDMI cable 352 And only connection of the television receiver 250 and the disc recorder 210 with the HDMI cable 352 is completed and connection setting of the user is facilitated.

In the AV system 200 shown in Fig. 1, the communication section (communication path) for performing bidirectional communication is constituted by the reserve line (Ether-line) and the HPD line (Ether + line) of the HDMI cable. Is not limited to this. Other configuration examples will be described below. In the following example, the set-top box 310 is used as a source device and the television receiver 250 is described as a sink device.

13 shows an example in which IP communication is performed by the half duplex communication method using the CEC line 84 and the reserved line 88. [ In Fig. 13, the parts corresponding to those in Fig. 5 are denoted by the same reference numerals, and a description thereof will be omitted as appropriate.

The high-speed data line interface 313 of the source device has a conversion unit 131, a decoding unit 132, a switch 133, a switching control unit 121 and a timing control unit 122. The conversion unit 131 is supplied with Tx data, which is data to be transmitted from the source device to the sink device by bidirectional IP communication between the source device and the sink device.

The conversion unit 131 is constituted by, for example, a differential amplifier, and converts the supplied Tx data into a differential signal composed of two partial signals. The conversion unit 131 also transmits the differential signal obtained by the conversion to the sink device via the CEC line 84 and the reserve line 88. [ That is, the conversion unit 131 converts the partial signal constituting the differential signal obtained by the conversion into the CEC line 84, more specifically, the CEC line of the HDMI cable 351 84 to the switch 133 and supplies the other partial signal constituting the differential signal to the reserved line 88 and more specifically to the signal line connected to the HDMI cable 351 A signal line connected to the reserve line 88, and a reserved line 88 to the sink device.

The decoding section 132 is constituted by, for example, a differential amplifier, and its input terminal is connected to the CEC line 84 and the reserve line 88. The decryption unit 132 decrypts the differential signal transmitted from the sink device via the CEC line 84 and the reserved line 88, that is, the partial signal on the CEC line 84, And a differential signal composed of a partial signal on the reserved line 88, and decodes it into Rx data, which is original data, and outputs it. Here, the Rx data is data transmitted from the sink device to the source device by bidirectional IP communication between the source device and the sink device.

A partial signal constituting a CEC signal from the control unit (CPU) of the source device or a differential signal corresponding to Tx data from the conversion unit 131 is supplied to the switch 133 at a timing of transmitting data, A partial signal constituting a CEC signal from the sink device or a differential signal corresponding to the Rx data from the sink device is supplied. The switch 133 is a partial signal constituting a CEC signal from the control unit (CPU) or a CEC signal from a sink device or a differential signal corresponding to Tx data, And selects and outputs the partial signal constituting the differential signal corresponding to the Rx data.

That is, the switch 133 selects either the CEC signal supplied from the control unit (CPU) or the partial signal supplied from the conversion unit 131 at the timing at which the source device transmits data to the sink device, CEC signal or a partial signal to the sink device via the CEC line 84. [

The switch 133 is also connected to a CEC signal transmitted from the sink device via the CEC line 84 or a portion of the differential signal corresponding to the Rx data at the timing at which the source device receives the data transmitted from the sink device And supplies the received CEC signal or partial signal to the control unit (CPU) or the decoding unit 132. [

The switching control section 121 controls the switch 133 and switches the switch 133 so that any one of the signals supplied to the switch 133 is selected. The timing control section 122 controls the timing of reception of the differential signal by the decoding section 132. [

The high-speed data line interface 254A of the sink device includes a conversion unit 134, a decoding unit 136, a switch 135, a switching control unit 124, and a timing control unit 123. [ The conversion section 134 is constituted by, for example, a differential amplifier, and the conversion section 134 is supplied with Rx data. Based on the control of the timing control section 123, the conversion section 134 converts the supplied Rx data into a differential signal composed of two partial signals, and outputs the differential signal obtained by the conversion to the CEC line 84 and the reserve line (88) to the source device.

That is, the conversion unit 134 converts the partial signal constituting the differential signal obtained by the conversion into the CEC line 84, more specifically, the CEC line (not shown) of the HDMI cable 351 84 to the switch 135 and supplies the other partial signal constituting the differential signal to the reserved line 88 and more specifically to the signal line connected to the HDMI cable 351 A signal line connected to the reserve line 88, and a reserve line 88 to the source device.

The switch 135 is supplied with a partial signal constituting a CEC signal from the source device or a differential signal corresponding to Tx data from the source device at the timing of receiving the data and at the timing of transmitting the data, A partial signal constituting a differential signal corresponding to the Rx data from the control unit 134, or a CEC signal from the control unit (CPU) of the sink device. The switch 135 is a partial signal constituting a CEC signal from the source device or a CEC signal from the control unit (CPU) or a differential signal corresponding to Tx data, or a partial signal constituting a differential signal corresponding to the Tx data, And selects and outputs the partial signal constituting the differential signal corresponding to the Rx data.

That is, the switch 135 selects either the CEC signal supplied from the control unit (CPU) of the sink device or the partial signal supplied from the conversion unit 134 at the timing at which the sink device transmits data to the source device And transmits the selected CEC signal or the partial signal to the source device via the CEC line 84.

The switch 135 is also connected to a CEC signal transmitted from the source device via the CEC line 84 or a portion of a differential signal corresponding to Tx data at a timing at which the sink device receives the data transmitted from the source device And supplies the received CEC signal or partial signal to the control unit (CPU) or the decoding unit 136. [

The decoding section 136 is constituted by, for example, a differential amplifier, and its input terminal is connected to the CEC line 84 and the reserve line 88. The decoding section 136 performs a differential operation on the differential signal transmitted from the source device through the CEC line 84 and the reserved line 88, that is, the partial signal on the CEC line 84 and the partial signal on the reserved line 88 Signal, decodes it into Tx data, which is original data, and outputs it.

The switching control section 124 controls the switch 135 and switches the switch 135 so that any one of the signals supplied to the switch 135 is selected. The timing control section 123 controls the timing of transmission of the differential signal by the conversion section 134. [

14 shows IP communication by the full-duplex communication method using the CEC line 84 and the reserved line 88 and the signal line (SDA line) through which the SDA signal is transmitted and the signal line (SCL line) through which the SCL signal is transmitted It is an example to do. In Fig. 14, parts corresponding to those in Fig. 13 are denoted by the same reference numerals, and a description thereof will be omitted as appropriate.

The high-speed data line interface 313 of the source device includes a conversion section 131, a switch 133, a switch 181, a switch 182, a decryption section 183, a switching control section 121 and a switching control section 171, .

The switch 181 is supplied with the SDA signal from the control unit (CPU) of the source device at the timing of transmitting the data, and at the timing of receiving the data, the SDA signal from the sink device or the Rx data from the sink device A partial signal constituting a corresponding differential signal is supplied. The switch 181 selects the partial signal constituting the SDA signal from the control unit (CPU) or the SDA signal from the sink device or the differential signal corresponding to the Rx data, based on the control from the switching control section 171 And outputs it.

That is, at the timing at which the source device receives the data transmitted from the sink device, the switch 181 outputs the SDA signal transmitted from the sink device via the SDA line 191, which is a signal line through which the SDA signal is transmitted, And supplies the received SDA signal or the partial signal to the control unit (CPU) or the decoding unit 183. The control unit (CPU)

The switch 181 may transmit the SDA signal supplied from the control unit CPU to the sink device via the SDA line 191 at the timing at which the source device transmits data to the sink device or may transmit nothing to the sink device Do not transmit.

The SCL signal from the control unit (CPU) of the source device is supplied to the switch 182 at a timing of transmitting data, and at the timing of receiving the data, a portion constituting a differential signal corresponding to Rx data from the sink device Signal is supplied. The switch 182 selects either the SCL signal or the partial signal constituting the differential signal corresponding to the Rx data based on the control from the switching control section 171 and outputs it.

That is, at the timing at which the source device receives the data transmitted from the sink device, the switch 182 selects the switch corresponding to the Rx data transmitted from the sink device via the SCL line 192, which is the signal line through which the SCL signal is transmitted Receives the partial signal of the differential signal, supplies the received partial signal to the decoding unit 183, or does not receive anything.

The switch 182 may transmit the SCL signal supplied from the control unit (CPU) of the source device to the sink device via the SCL line 192 at the timing at which the source device transmits data to the sink device, Do not transmit.

The decoding unit 183 is constituted by, for example, a differential amplifier, and its input terminal is connected to the SDA line 191 and the SCL line 192. The decryption unit 183 receives the differential signal transmitted from the sink device via the SDA line 191 and the SCL line 192, that is, the partial signal on the SDA line 191 and the partial signal on the SCL line 192, Signal, decodes it into Rx data, which is original data, and outputs it.

The switching control section 171 controls the switch 181 and the switch 182 and controls the switch 181 and the switch 182 so that any one of the signals supplied to the switch 181 and the switch 182 is selected Switch.

The high-speed data line interface 254A constituting the sink device further includes a conversion unit 184, a switch 135, a switch 185, a switch 186, a decoding unit 136, a switching control unit 172, And a control unit 124.

The conversion section 184 is constituted by, for example, a differential amplifier, and the conversion section 184 is supplied with Rx data. The converting unit 184 converts the supplied Rx data into a differential signal composed of two partial signals and transmits the differential signal obtained by the conversion to the source equipment through the SDA line 191 and the SCL line 192. That is, the converting unit 184 transmits the partial signal constituting the differential signal obtained by the conversion to the source device via the switch 185, and outputs the partial signal of the other component constituting the differential signal to the switch 186 To the source device.

A partial signal constituting a differential signal corresponding to Rx data from the converting section 184 or an SDA signal from a control section (CPU) of a sink device is supplied to the switch 185 at a timing of transmitting data, The SDA signal from the source device is supplied. The switch 185 selects the partial signal constituting the SDA signal from the control unit (CPU) or the SDA signal from the source apparatus or the differential signal corresponding to the Rx data based on the control from the switching control section 172 And outputs it.

That is, the switch 185 receives the SDA signal transmitted from the source device via the SDA line 191 at a timing at which the sink device receives the data transmitted from the source device, and outputs the received SDA signal to the control part CPU), or nothing is received.

The switch 185 outputs the SDA signal supplied from the control unit CPU or the partial signal supplied from the conversion unit 184 to the SDA line 191 at the timing at which the sink device transmits data to the source device To the source device.

The switch 186 is supplied with the partial signal constituting the differential signal corresponding to the Rx data from the converting unit 184 at the timing of transmitting the data, and at the timing of receiving the data, the SCL signal . The switch 186 selects either the partial signal constituting the differential signal corresponding to the Rx data or the SCL signal based on the control from the switching control section 172 and outputs it.

That is, the switch 186 receives the SCL signal transmitted from the source device via the SCL line 192 at the timing at which the sink device receives the data transmitted from the source device, and outputs the received SCL signal to the control section CPU), or nothing is received.

The switch 186 transmits the partial signal supplied from the conversion unit 184 to the source device via the SCL line 192 at the timing at which the sink device transmits data to the source device or does not transmit anything Do not.

The switching control section 172 controls the switch 185 and the switch 186 and controls the switch 185 and the switch 186 so that any one of the signals supplied to the switch 185 and the switch 186 is selected Switch.

Whether half-duplex communication or full-duplex communication is possible when the source device and the sink device perform IP communication is determined by the respective configurations of the source device and the sink device. Then, the source device refers to the E-EDID received from the sink device to determine whether to perform half-duplex communication, full-duplex communication, or bidirectional communication by receiving the CEC signal.

The E-EDID received by the source device includes, for example, a basic block and an extension block, as shown in Fig.

At the head of the basic block of the E-EDID, the data specified in the standard of the E-EDID 1.3 indicated by the "E-EDID1.3 Basic Structure" Timing information for maintaining compatibility and timing information different from "Preferred timing" for maintaining interoperability with a conventional EDID indicated by "2nd timing "

Further, in the basic block, information indicating the name of the display device displayed as "Monitor NAME ", and information indicating the display ratio in the case where the aspect ratio indicated by" Monitor Range Limits "is 4: 3 and 16: 9 And information indicating the number of displayable pixels with respect to each other.

On the other hand, information on the right and left speakers indicated by "Speaker Allocation " is arranged at the head of the extension block, and the displayable size, frame rate, interlace or progressive Data describing information such as information indicating the aspect ratio and the aspect ratio, data in which information such as a reproducible voice codec system, a sampling frequency, a cutoff band, and a number of codec bits, which is indicated by "AUDIO SHORT" is described, and "Speaker Allocation" The information on the right and left speakers arranged in this order.

The extension block includes data defined uniquely for each maker, indicated by "Vender Specific", timing information for maintaining interoperability with a conventional EDID indicated by "3rd timing", and " And timing information for maintaining interoperability with the conventional EDID indicated by "4th timing" is arranged.

The data indicated by "Vender Specific" has a data structure shown in Fig. That is, in the data indicated as "Vender Specific ", 0 block to N block, which are 1-byte blocks, are provided.

A header indicating a data area of data "Vender Specific" indicated by "Vendor-Specific tag code (= 3)" and a header indicating a data area of "Vendor Specific" Quot;) "is arranged.

In the first to third blocks, information indicating the number "0x000C03" registered for HDMI (R) indicated by "24bit IEEE Registration Identifier (0x000C03) LSB first" is arranged. In the fourth block and the fifth block, information indicating the physical address of the 24-bit sync device, which is indicated by each of "A", "B", "C", and "D"

In the sixth block, a flag indicating a function supported by a sink device indicated by "Supports-AI ", a flag indicating a function corresponding to one pixel displayed in each of" DC-48bit ", "DC- A flag indicating whether or not the sync apparatus corresponds to the transmission of the YCbCr4: 4: 4 image and the flag indicating "DVI-Dual" Is associated with a dual DVI (Digital Visual Interface).

In the seventh block, information indicating the maximum frequency of the pixel clock of the TMDS indicated by "Max-TMDS-Clock" is arranged. In the eighth block, a flag indicating presence / absence of delay information of video and audio indicated by "Latency ", a full duplex flag indicating whether full-duplex communication is enabled indicated by" Full Duplex ", and a half- Half-duplex flag indicating whether or not communication is possible is arranged.

Here, for example, the full-duplex flag set (e.g., set to "1") indicates that the sink device has a function of performing full-duplex communication, that is, the configuration shown in FIG. 14, (For example, set to "0") indicates that the sink device does not have a function of performing full-duplex communication.

Similarly, the set half-duplex flag (for example, set to "1") indicates that the sink device has a function of performing half-duplex communication, that is, the configuration shown in FIG. 13, Quot; 0 "). The half-duplex flag indicates that the sink device does not have a function of performing half-duplex communication.

In the ninth block of data indicated as " Vender Specific ", the delay time data of the progressive video indicated by "Video Latency" is arranged, and in the tenth block, Delay time data of the voice is arranged. In the eleventh block, delay time data of an interlaced video indicated by "Interlaced Video Latency" is arranged. In the twelfth block, delay time of audio accompanying an interlaced video, which is indicated by "Interlaced Audio Latency" Data is placed.

The source device performs the half-duplex communication, the full-duplex communication, or the bi-directional communication based on the reception of the CEC signal based on the full-duplex flag and the half-duplex flag included in the E-EDID received from the sink device And performs bidirectional communication with the sink device in accordance with the determination result.

For example, when the source apparatus is configured as shown in Fig. 13, the source apparatus can perform half-duplex communication with the sink apparatus shown in Fig. 13, but can not perform half-duplex communication with the sink apparatus shown in Fig. 14 . Then, when the source device is powered on, the source device starts the communication process and performs bidirectional communication in accordance with the function of the sink device connected to the source device.

Hereinafter, the communication process by the source device shown in Fig. 13 will be described with reference to the flowchart of Fig.

In step S11, the source device determines whether or not a new electronic device is connected to the source device. For example, the source device determines whether a new electronic device (sink device) is connected based on the magnitude of the voltage added to the pin called the Hot Plug Detect to which the HPD line 86 is connected.

If it is determined in step S11 that a new electronic device is not connected, the communication is not performed, and thus the communication process is terminated. On the other hand, when it is determined in step S11 that a new electronic apparatus is connected, in step S12, the switching control section 121 controls the switch 133 so as to transmit the data from the control section (CPU) The switch 133 is switched so that the CEC signal is selected and the CEC signal from the sink device is selected upon reception of the data.

In step S13, the source device receives the E-EDID transmitted from the sink device via the DDC 83. [ That is, when the sink device detects the connection of the source device, the sink device decodes the E-EDID from the EDID ROM 85 and transmits the read E-EDID to the source device via the DDC 83, And receives the received E-EDID.

In step S14, the source device determines whether half-duplex communication with the sink device is possible or not. That is, the source device refers to the E-EDID received from the sink device and determines whether or not the half-duplex flag "Half Duplex" in FIG. 16 is set. For example, It is determined that bidirectional IP communication by the half-duplex communication method, that is, half-duplex communication is possible.

When it is determined in step S14 that half-duplex communication is possible, in step S15, the source device transmits, to the half-duplex communication method using the CEC line 84 and the reserved line 88 as channel information indicating a channel used for bidirectional communication To the sink device via the switch 133 and the CEC line 84. The switch 133 and the CEC line 84 communicate with each other via the switch 133 and the CEC line 84, respectively.

That is, when the half-duplex flag is set, since the source device knows that the sink device is the configuration shown in FIG. 13 and that the half-duplex communication using the CEC line 84 and the reserved line 88 is possible, And notifies that half-duplex communication is to be performed.

In step S16, the switching control section 121 controls the switch 133 to select the differential signal corresponding to the Tx data from the conversion section 131 at the time of data transmission, and when receiving the data, The switch 133 is switched so that the differential signal corresponding to the Rx data is selected.

In step S17, each part of the source device performs bidirectional IP communication with the sink device by the half-duplex communication method, and the communication process ends. That is, at the time of data transmission, the conversion unit 131 converts the Tx data supplied from the control unit (CPU) into a differential signal and outputs one of the partial signals constituting the differential signal obtained by the conversion to the switch 133 And transmits the other partial signal to the sink device via the reserve line 88. [ The switch 133 transmits the partial signal supplied from the conversion unit 131 to the sink device via the CEC line 84. [ As a result, the differential signal corresponding to the Tx data is transmitted from the source device to the sink device.

Also, upon receiving the data, the decoding unit 132 receives the differential signal corresponding to the Rx data transmitted from the sink device. That is, the switch 133 receives the partial signal of the differential signal transmitted from the sink device via the CEC line 84 and corresponding to the Rx data, and supplies the received partial signal to the decoding unit 132. [ The decoding section 132 outputs the differential signal composed of the partial signal supplied from the switch 133 and the partial signal supplied from the sink device via the reserved line 88 to the original signal based on the control of the timing control section 122 And outputs the decoded data to the control unit (CPU).

As a result, the source device performs various kinds of data exchange with the sink device, such as control data, pixel data, and audio data.

If it is determined in step S14 that half-duplex communication is not possible, in step S18, the source device performs bidirectional communication with the sink device by performing transmission and reception of the CEC signal, and the communication process is terminated.

That is, at the time of transmitting the data, the source device transmits the CEC signal to the sink device via the switch 133 and the CEC line 84, and at the time of receiving the data, the source device transmits the CEC signal to the switch 133 and the CEC And receives the CEC signal transmitted from the sink device via the line 84, thereby transferring the control data to the sink device.

In this manner, the source device performs half duplex communication with the sink device capable of half duplex communication via the CEC line 84 and the reserved line 88 with reference to the half-duplex flag.

Thus, by switching the switch 133 to select the data to be transmitted and the data to be received, and to perform the half-duplex communication using the sink device and the CEC line 84 and the reserved line, that is, the IP communication by the half-duplex communication method , High-speed bidirectional communication can be performed while maintaining interoperability with the conventional HDMI.

Further, similarly to the source device, the sink device also starts communication processing when power is turned on, and performs bidirectional communication with the source device.

Hereinafter, the communication processing by the sink device shown in Fig. 13 will be described with reference to the flowchart of Fig.

In step S41, the sink device determines whether or not a new electronic device (source device) is connected to the sink device. For example, the sink device determines whether a new electronic device is connected, based on the magnitude of the voltage added to the pin called the Hot Plug Detect to which the HPD line 86 is connected.

If it is determined in step S41 that a new electronic device is not connected, since communication is not performed, the communication process is terminated. On the other hand, if it is determined in step S41 that a new electronic device is connected, in step S42, the switching control section 124 controls the switch 135 to transmit the data from the control section (CPU) of the sink device The switch 135 is switched so that the CEC signal of the source device is selected and the CEC signal from the source device is selected upon reception of the data.

In step S43, the sink device decodes the E-EDID from the EDID ROM 85 and transmits the read E-EDID to the source device via the DDC 83. [

In step S44, the sink device determines whether or not to receive the channel information transmitted from the source device.

That is, channel information indicating a channel of bidirectional communication is transmitted from the source device in accordance with the functions of the source device and the sink device. For example, when the source device is configured as shown in FIG. 13, the source device and the sink device are capable of half duplex communication using the CEC line 84 and the reserved line 88. For this reason, channel information indicating that IP communication is to be performed using the CEC line 84 and the reserve line 88 is transmitted to the sink device from the source device. The sink device receives the channel information transmitted from the source device via the switch 135 and the CEC line 84, and determines that channel information has been received.

On the other hand, when the source device does not have a function of performing half-duplex communication, the sink device determines that channel information is not received because no channel information is transmitted from the source device to the sink device.

If it is determined in step S44 that the channel information has been received, the process proceeds to step S45 and the switch control section 124 controls the switch 135 to change the Rx data from the conversion section 134 The switch 135 is switched so that the corresponding differential signal is selected and a differential signal corresponding to the Tx data from the source device is selected upon reception of the data.

In step S46, the sink device performs bidirectional IP communication with the source device by the half-duplex communication method, and the communication process is terminated. That is, at the time of data transmission, the conversion unit 134 converts the Rx data supplied from the control unit (CPU) of the sink device into a differential signal based on the control of the timing control unit 123, One of the partial signals constituting the signal is supplied to the switch 135 and the other partial signal is transmitted to the source device via the reserved line 88. [ The switch 135 transmits the partial signal supplied from the conversion unit 134 to the source device via the CEC line 84. [ As a result, the differential signal corresponding to the Rx data is transmitted from the sink device to the source device.

Further, upon receiving the data, the decoding unit 136 receives the differential signal corresponding to the Tx data transmitted from the source apparatus. That is, the switch 135 receives the partial signal of the differential signal transmitted from the source apparatus via the CEC line 84, which corresponds to the Tx data, and supplies the received partial signal to the decoding unit 136. [ The decoding section 136 decodes the differential signal composed of the partial signal supplied from the switch 135 and the partial signal supplied from the source device through the reserved line 88 into the Tx data as the original data, .

As a result, the sink device transmits various data such as control data, pixel data, and audio data to the source device.

If it is determined in step S44 that the channel information is not received, the sink device performs bidirectional communication with the source device by transmitting and receiving the CEC signal in step S47, and the communication process is terminated.

That is, at the time of data transmission, the sink device transmits the CEC signal to the source device via the switch 135 and the CEC line 84, and at the time of receiving the data, And receives the CEC signal transmitted from the source device via the CEC line 84 to carry out the control data with the source device.

In this way, when receiving the channel information, the sink device performs the half-duplex communication using the sink device, the CEC line 84, and the reserved line 88.

As described above, the sink device selects the data to be transmitted and the data to be received by switching the switch 135, and performs half-duplex communication using the source device, the CEC line 84, and the reserved line 88, High-speed bi-directional communication can be performed while maintaining mutual compatibility with the mobile terminal.

14, the source device determines whether or not the sink device has a function of performing full-duplex communication based on the full-duplex flag included in the E-EDID in the communication process, Directional communication is performed in accordance with the determination result.

Hereinafter, the communication process by the source device shown in Fig. 14 will be described with reference to the flowchart of Fig.

In step S71, the source device determines whether or not a new electronic device is connected to the source device. If it is determined in step S71 that a new electronic device is not connected, no communication is performed, and the communication process is terminated.

On the other hand, if it is determined in step S71 that a new electronic device is connected, in step S72, the switching control section 171 controls the switch 181 and the switch 182, The SDA signal from the control unit (CPU) of the source device is selected by the switch 181 and the SCL signal from the control unit (CPU) of the source device is selected by the switch 182, The switch 181 and the switch 182 are switched so that the SDA signal from the sync device is selected by the switches 181 and 181.

In step S73, the switching control section 121 controls the switch 133 to select the CEC signal from the control section (CPU) of the source device at the time of data transmission, and when receiving the data, the CEC signal from the sink device The switch 133 is switched so as to be selected.

In step S74, the source device receives the E-EDID transmitted from the sink device via the SDA line 191 of the DDC 83. [ That is, when the sink device detects the connection of the source device, the sink device decodes the E-EDID from the EDIDROM 85 and sends the read E-EDID to the source device via the SDA line 191 of the DDC 83, Receives the E-EDID transmitted from the sink device.

In step S75, the source device determines whether full-duplex communication with the sink device is possible or not. That is, the source device refers to the E-EDID received from the sink device to determine whether or not the full-duplex flag "Full Duplex" in FIG. 16 is set. For example, , It is determined that bidirectional IP communication by the full-duplex communication method, that is, full-duplex communication is possible.

If it is determined in step S75 that the full-duplex communication is possible, in step S76, the switching control section 171 controls the switch 181 and the switch 182 to change the Rx data from the sink device The switch 181 and the switch 182 are switched so that the corresponding differential signal is selected.

That is, upon reception of the data, the partial control signal transmitted from the sink device through the SDA line 191, among the partial signals constituting the differential signal corresponding to the Rx data, The switch 181 and the switch 182 are switched so that the partial signal selected by the switch 181 and transmitted through the SCL line 192 is selected by the switch 182. [

The SDA line 191 and the SCL line 192 constituting the DDC 83 are not used after the E-EDID is transmitted from the sink device to the source device, that is, the SDA line 191 and the SCL line 192 The switch 181 and the switch 182 are switched to switch the SDA line 191 and the SCL line 192 to the transmission of Rx data by full-duplex communication As shown in FIG.

In step S77, the source device transmits, as channel information indicating a channel of bidirectional communication, the CEC line 84 and the reserved line 88, and the full-duplex communication method using the SDA line 191 and the SCL line 192 IP communication to the sink device via the switch 133 and the CEC line 84. [

14, the source device uses the CEC line 84 and the reserved line 88 and the SDA line 191 and the SCL line 192 in the case where the full-duplex flag is set Knowing that full-duplex communication is possible, it transmits channel information to the sink device and notifies the effect that full-duplex communication is to be performed.

The switching control section 121 controls the switch 133 and switches the switch 133 so that the differential signal corresponding to the Tx data from the conversion section 131 is selected at the time of data transmission. , The switching control section 121 switches the switch 133 so that the partial signal of the differential signal corresponding to the Tx data supplied from the conversion section 131 to the switch 133 is selected.

In step S79, the source device performs bidirectional IP communication with the sink device by the full-duplex communication method, and the communication process ends. That is, at the time of data transmission, the conversion unit 131 converts the Tx data supplied from the control unit (CPU) of the source device into a differential signal and outputs one of the partial signals constituting the differential signal obtained by the conversion to the switch 133, and transmits the other partial signal to the sink device via the reserve line 88. [ The switch 133 transmits the partial signal supplied from the conversion unit 131 to the sink device via the CEC line 84. [ As a result, the differential signal corresponding to the Tx data is transmitted from the source device to the sink device.

Further, upon receiving the data, the decoding unit 183 receives the differential signal corresponding to the Rx data transmitted from the sink device. That is, the switch 181 receives the partial signal of the differential signal corresponding to the Rx data transmitted from the sink device via the SDA line 191, and supplies the received partial signal to the decoding unit 183. The switch 182 receives the partial signal in the other direction of the differential signal corresponding to the Rx data transmitted from the sink device via the SCL line 192 and outputs the received partial signal to the decoding unit 183 Supply. The decoding unit 183 decodes the differential signal composed of the partial signal supplied from the switch 181 and the switch 182 into Rx data which is original data and outputs it to the control unit CPU.

As a result, the source device performs various kinds of data exchange with the sink device, such as control data, pixel data, and audio data.

If it is determined in step S75 that full-duplex communication is not possible, in step S80, the source device performs bidirectional communication with the sink device by performing transmission and reception of the CEC signal, and the communication process is terminated.

That is, at the time of transmitting the data, the source device transmits the CEC signal to the sink device via the switch 133 and the CEC line 84, and at the time of receiving the data, the source device transmits the CEC signal to the switch 133 and the CEC And receives the CEC signal transmitted from the sink device via the line 84, thereby transferring the control data to the sink device.

In this manner, the source device refers to the full-duplex flag and performs a full-duplex communication with the sink device and the full-duplex communication using the CEC line 84 and the reserved line 88, and the SDA line 191 and the SCL line 192, Communication is performed.

Thus, the switch 133, the switch 181, and the switch 182 are switched to select data to be transmitted and data to be received, and the sink device, the CEC line 84, the reserve line 88, and the SDA Line communication using the line 191 and the SCL line 192, high-speed bidirectional communication can be performed while maintaining interoperability with the conventional HDMI.

14, the sink device performs communication processing in the same manner as in the case of the sink device shown in Fig. 13, and performs bidirectional communication with the source device.

The communication processing by the sink device shown in Fig. 14 will be described below with reference to the flowchart of Fig.

In step S111, the sink device determines whether or not a new electronic device (source device) is connected to the sink device. If it is determined in step S111 that a new electronic device is not connected, since communication is not performed, the communication process is terminated.

On the other hand, when it is determined in step S111 that a new electronic device is connected, in step S112, the switching control section 172 controls the switch 185 and the switch 186 to switch the switch The SDA signal from the control unit (CPU) of the sink device is selected by the switch 185 and the SDA signal from the source device is selected by the switch 185 when the data is received, The switch 185 and the switch 186 are switched so that the SCL signal is selected.

In step S113, the switching control section 124 controls the switch 135 to select the CEC signal from the control unit (CPU) of the sink device at the time of data transmission, and when receiving the data, the CEC signal from the source device The switch 135 is switched so as to be selected.

In step S114, the sink device decrypts the E-EDID from the EDIDROM 85 and transmits the read E-EDID to the source device via the switch 185 and the SDA line 191 of the DDC 83.

In step S115, the sink device determines whether or not to receive the channel information transmitted from the source device.

That is, channel information indicating a channel of bidirectional communication is transmitted from the source device, depending on the functions of the source device and the sink device. 14, since the source device and the sink device are capable of full-duplex communication, the source device to the sink device are provided with the CEC line 84 and the reserve line 88, and the SDA Channel information for performing IP communication by the full-duplex communication method using the line 191 and the SCL line 192 is transmitted from the source device through the switch 135 and the CEC line 84 Receives the channel information transmitted, and determines that channel information has been received.

On the other hand, when the source device does not have the function of performing full-duplex communication, since the channel information is not transmitted from the source device to the sink device, the sink device determines that channel information is not received.

If it is determined in step S115 that the channel information has been received, the process proceeds to step S116 and the switch control section 172 controls the switch 185 and the switch 186 to switch the switch section 184 The switch 185 and the switch 186 are switched so that the differential signal corresponding to the Rx data from the switch 185 and the switch 186 is selected.

In step S117, the switching control section 124 controls the switch 135 to switch the switch 135 so that the differential signal corresponding to the Tx data from the source device at the time of data reception is selected.

In step S118, the sink device performs bidirectional IP communication with the source device by the full-duplex communication method, and the communication process ends. That is, at the time of data transmission, the conversion unit 184 converts the Rx data supplied from the control unit (CPU) of the sink device into a differential signal, and switches one of the partial signals constituting the differential signal obtained by the conversion to the switch 185, and supplies the other partial signal to the switch 186. [ The switch 185 and the switch 186 transmit the partial signal supplied from the conversion unit 184 to the source device via the SDA line 191 and the SCL line 192. [ As a result, the differential signal corresponding to the Rx data is transmitted from the sink device to the source device.

Further, upon receiving the data, the decoding unit 136 receives the differential signal corresponding to the Tx data transmitted from the source apparatus. That is, the switch 135 receives the partial signal of the differential signal corresponding to the Tx data transmitted from the source apparatus via the CEC line 84, and supplies the received partial signal to the decoding section 136. The decoding section 136 decodes the differential signal composed of the partial signal supplied from the switch 135 and the partial signal supplied from the source device through the reserved line 88 into the Tx data as the original data, .

As a result, the sink device transmits various data such as control data, pixel data, and audio data to the source device.

If it is determined in step S115 that the channel information is not received, the sink device performs bidirectional communication with the source device by performing transmission / reception of the CEC signal in step S119, and the communication process is terminated.

In this manner, when the sink device receives the channel information, the sink device performs full-duplex communication using the sink device, the CEC line 84, the reserved line 88, and the SDA line 191 and the SCL line 192.

In this manner, the sink device selects the data to be transmitted and the data to be transmitted by switching the switch 135, the switch 185, and the switch 186 to select the source device and the CEC line 84 and the reserved line 88, , And full-duplex communication using the SDA line 191 and the SCL line 192, and high-speed bidirectional communication can be performed while maintaining interoperability with the conventional HDMI.

14, the source device has a conversion section 131 connected to the CEC line 84 and the reserved line 88, and a decoding section 183 is connected to the SDA line 191 and the SCL line 192, A configuration in which the decoder unit 183 is connected to the CEC line 84 and the reserve line 88 and the conversion unit 131 is connected to the SDA line 191 and the SCL line 192, .

In such a case, the switch 181 and the switch 182 are connected to the CEC line 84 and the reserve line 88 and to the decoder 183, and the switch 133 is connected to the SDA line 191 And is simultaneously connected to the conversion unit 131. [

14, a conversion unit 184 is connected to the CEC line 84 and the reserve line 88, and a decoding unit 136 is connected to the SDA line 191 and the SCL line 192 Or may be connected. In such a case, switch 185 and switch 186 are connected to CEC line 84 and reserve line 88 and at the same time connected to converter 184, switch 135 is connected to SDA line 191 And is connected to the decoding unit 136 at the same time.

13, the CEC line 84 and the reserved line 88 may be the SDA line 191 and the SCL line 192, respectively. That is, the conversion unit 131 and the decoding unit 132 of the source device, the conversion unit 134 and the decoding unit 136 of the sink device are connected to the SDA line 191 and the SCL line 192, And the sink device may perform IP communication by the half duplex communication method. Further, in this case, the connection of the electronic apparatus may be detected using the reserve line 88.

Further, each of the source device and the sink device may have both a function of performing half-duplex communication and a function of performing full-duplex communication. In such a case, the source device and the sink device can perform IP communication by the half-duplex communication method or the full-duplex communication method, depending on the functions of the connected electronic device.

In the case where each of the source device and the sink device has both a function of performing half-duplex communication and a function of performing full-duplex communication, the source device and the sink device are configured as shown in Fig. 21, for example. In Fig. 21, the parts corresponding to those in Fig. 13 or 14 are denoted by the same reference numerals, and a description thereof will be omitted as appropriate.

The high-speed data line interface 313 of the source device shown in Fig. 21 includes a conversion section 131, a decoding section 132, a switch 133, a switch 181, a switch 182, a decryption section 183, A control section 121, a timing control section 122, and a switching control section 171. [ That is, the high-speed data line interface 313 in the source device of FIG. 21 is connected to the high-speed data line interface 313 of the source device shown in FIG. 14 by the timing control section 122 and the decryption section 132 ) Are further installed.

The high-speed data line interface 254A of the sink device shown in Fig. 21 includes a conversion section 134, a switch 135, a decoding section 136, a conversion section 184, a switch 185, a switch 186, A timing control section 123, a switching control section 124, and a switching control section 172. [ That is, the sink device of FIG. 21 has a structure in which the timing control section 123 and the conversion section 134 of FIG. 13 are additionally provided in the sink device shown in FIG.

Next, the communication processing by the source device and the sink device of Fig. 21 will be described.

First, the communication processing by the source device of Fig. 21 will be described with reference to the flowchart of Fig. Since each of the processes of steps S151 to S154 is the same as each of the processes of steps S71 to S74 of Fig. 19, a description thereof will be omitted.

In step S155, the source device determines whether full-duplex communication with the sink device is possible or not. That is, the source device refers to the E-EDID received from the sink device and determines whether the full-duplex flag "Full Duplex" in Fig. 16 is set or not.

If it is determined in step S155 that full-duplex communication is possible, that is, if the sink device shown in Fig. 21 or Fig. 14 is connected to the source device, the switch control section 171 switches the switch 181 and the switch (182) to switch the switch (181) and the switch (182) so that the differential signal corresponding to the Rx data from the sink device is selected at the time of receiving the data.

On the other hand, if it is determined in step S155 that full-duplex communication is not possible, then in step S157, the source device determines whether half-duplex communication is possible or not. That is, the source device refers to the received E-EDID and determines whether the half-duplex flag "Half Duplex" in FIG. 16 is set or not. In other words, the source device determines whether or not the sink device shown in Fig. 13 is connected to the source device.

If it is determined in step S157 that the half duplex communication is enabled or if the switch 181 and the switch 182 are switched in step S156, the source device transmits the channel information to the switch 133 and the CEC Line 84 to the sink device.

Here, if it is determined in step S155 that the full-duplex communication is possible, the sink device has a function of performing full-duplex communication, and therefore, the source device transmits the CEC line 84 and the reserved line 88 The SDA line 191 and the SCL line 192 to the sink device through the switch 133 and the CEC line 84. [

If the half-duplex communication is judged to be possible in step S157, the sink device does not have a function of performing full-duplex communication but has a function of performing half-duplex communication. Therefore, 84 and the reserved line 88 to the sink device by using the switch 133 and the CEC line 84. [

In step S159, the switching control section 121 controls the switch 133 to select the differential signal corresponding to the Tx data from the conversion section 131 at the time of data transmission, and when receiving the data, The switch 133 is switched so that the differential signal corresponding to the transmitted Rx data is selected. When the source device and the sink device perform full-duplex communication, when receiving data in the source device, the differential signal corresponding to the Rx data from the sink device via the CEC line 84 and the reserved line 88 is The differential signal corresponding to the Rx data is not supplied to the decoding unit 132 because it is not transmitted.

In step S160, the source device performs bidirectional IP communication with the sink device, and the communication process ends. That is, when the source device performs full-duplex communication with the sink device and when performing half-duplex communication, the conversion section 131 converts the Tx data supplied from the control unit (CPU) of the source device into a differential signal One of the partial signals constituting the differential signal obtained by the conversion is transmitted to the sink device via the switch 133 and the CEC line 84 and the other partial signal is transmitted to the sink device via the reserve line 88 .

Further, when the source device performs full-duplex communication with the sink device, upon receiving the data, the decoding section 183 receives the differential signal corresponding to the Rx data transmitted from the sink device, and outputs the received differential signal to the original And outputs the decoded data to the control unit (CPU).

On the other hand, when the source device performs half-duplex communication with the sink device, at the time of receiving the data, the decryption section 132, based on the control of the timing control section 122, corresponds to the Rx data transmitted from the sink device And decodes the received differential signal into Rx data, which is original data, and outputs it to the control unit (CPU).

As a result, the source device performs various kinds of data exchange with the sink device, such as control data, pixel data, and audio data.

If it is determined in step S157 that half-duplex communication is not possible, the source device performs bidirectional communication with the sink device by performing transmission / reception of the CEC signal through the CEC line 84 in step S161, The process ends.

In this manner, the source device refers to the full-duplex flag and the half-duplex flag and performs full-duplex communication or half-duplex communication according to the function of the sink device as the communication counterpart.

As described above, the switch 133, the switch 181, and the switch 182 are switched to select the data to be transmitted and the data to be received in accordance with the function of the sink device as the communication counterpart, and the full duplex communication or the half- A high-speed bidirectional communication can be performed by selecting a more optimal communication method while maintaining interoperability with the conventional HDMI.

Next, the communication process by the sink device of Fig. 21 will be described with reference to the flowchart of Fig. Since each of the processes of steps S191 to S194 is the same as each of the processes of steps S111 to S114 of Fig. 20, a description thereof will be omitted.

In step S195, the sink device receives the channel information transmitted from the source device via the switch 135 and the CEC line 84. [ In addition, when the source device connected to the sink device does not have the function of performing the full-duplex communication or the half-duplex communication, since the channel information is not transmitted from the source device to the sink device, , And channel information is not received.

In step S196, the sink device determines whether to perform full-duplex communication based on the received channel information. For example, when the sink device receives channel information indicating that IP communication is to be performed using the CEC line 84 and the reserved line 88 and the SDA line 191 and the SCL line 192, .

If it is determined in step S196 that the full-duplex communication is to be performed, in step S197, the switching control section 172 controls the switch 185 and the switch 186 to switch the Rx The switch 185 and the switch 186 are switched so that the differential signal corresponding to the data is selected.

If it is determined in step S196 that the full-duplex communication is not to be performed, then in step S198, the sink device determines whether to perform half-duplex communication based on the received channel information. For example, when the sink device receives the channel information indicating that the IP communication is to be performed using the CEC line 84 and the reserved line 88, it determines that half duplex communication is to be performed.

If it is determined in step S198 that the half-duplex communication is to be performed or the switch 185 and the switch 186 are changed in step S197, the switch control section 124 controls the switch 135 to switch the data The switch 135 is switched so that the differential signal corresponding to the Rx data from the conversion unit 134 is selected at the time of transmission of the data and the differential signal corresponding to the Tx data from the source device at the time of data reception is selected .

When the source device and the sink device perform full-duplex communication, the differential signal corresponding to the Rx data is not transmitted from the conversion section 134 to the transmitter 81 at the time of data transmission in the sink device, 135, a differential signal corresponding to Rx data is not supplied.

In step S200, the sink device performs bidirectional IP communication with the source device, and the communication process is terminated.

That is, when the sink device performs full-duplex communication with the source device, the converter 184 converts the Rx data supplied from the control unit (CPU) of the sink device into a differential signal at the time of data transmission, One of the partial signals constituting the differential signal is transmitted to the source device via the switch 185 and the SDA line 191 and the other partial signal is transmitted to the source device via the switch 186 and the SCL line 192 do.

When the sink device performs half-duplex communication with the source device, at the time of data transmission, the conversion section 134 converts the Rx data supplied from the control section (CPU) of the sink device into a differential signal, One of the partial signals constituting the differential signal is transmitted to the transmitter 81 via the switch 135 and the CEC line 84 and the other partial signal is transmitted to the source device via the reserved line 88.

Further, when the sink device performs full-duplex communication with the source device and when performing half-duplex communication, upon receiving the data, the decoding device 136 receives the differential signal corresponding to the Tx data transmitted from the source device , Decodes the received differential signal into Tx data, which is original data, and outputs it to the control unit (CPU).

If it is determined in step S198 that half-duplex communication is not to be performed, that is, if channel information has not been transmitted, for example, in step S201, the sink device transmits and receives the CEC signal, And communication processing is terminated.

In this manner, the sink device performs full-duplex communication or half-duplex communication according to the received channel information, that is, the function of the source device that is the communication counterpart.

As described above, the switch 135, the switch 185, and the switch 186 are switched to select the data to be transmitted and the data to be received according to the function of the source device that is the communication counterpart, and the full duplex communication or the half- It is possible to select a more optimal communication method while maintaining interoperability with the conventional HDMI (R), and to perform high-speed bidirectional communication.

The CEC line 84 and the reserve line 88 grounded to the ground line are connected to and shielded from each other by a differential twisted pair and are connected and shielded by the differential twisted pair and grounded to the SDA line 191 and the SCL line 192 are connected to the source device and the sink device by the HDMI cable 351 so that the compatibility with the conventional HDMI cable can be maintained while the half-duplex communication method or the full- High-speed bidirectional IP communication can be performed.

Next, the series of processes described above can be performed by dedicated hardware, or by software. When a series of processes is performed by software, a program constituting the software is installed in, for example, a microcomputer for controlling a source device and a sink device.

24 shows a configuration example of one embodiment of a computer in which a program for executing the series of processes described above is installed.

The program can be recorded in advance in an EEPROM (Electrically Erasable Programmable Read-Only Memory) 305 or a ROM 303 as a recording medium built in a computer.

Alternatively, the program may be temporarily or permanently recorded on a removable recording medium such as a flexible disk, a CD-ROM (Compact Disk Read Only Memory), an MO (Magneto Optical) disk, a DVD (Recorded). Such a removable recording medium can be provided as so-called package software.

In addition to being installed in a computer from a removable recording medium such as the one described above, the program may be transferred from a download site to a computer wirelessly through a satellite for digital satellite broadcasting, or via a network such as a LAN or the Internet, And the computer can receive the program transmitted in the above manner via the input / output interface 306 and install it in the built-in EEPROM 305. [

The computer has a CPU (Central Processing Unit) 302 incorporated therein. The CPU 302 is connected to an input / output interface 306 via a bus 301. The CPU 302 reads a program stored in a ROM (Read Only Memory) 303 or an EEPROM 305, (Random Access Memory) 304 and executes it. Thus, the CPU 302 performs the processing according to the above-described flowchart or the processing performed by the above-described configuration of the block diagram.

Herein, in the present specification, the processing steps describing the program for causing the computer to perform various kinds of processing are not necessarily processed in a time series in the order described in the flowchart, but the processing executed in parallel or individually For example, parallel processing or processing by an object). The program may be processed by one computer or distributed by a plurality of computers.

The above-described configuration example shown in Fig. 9 can form a circuit for LAN communication regardless of the electrical specifications prescribed for the DDC. Fig. 25 shows another configuration example having the same effect.

In this example, in an interface for performing video and audio data transmission with one cable, exchange and authentication of the connected device information, and communication and LAN communication with the device control data, the LAN communication is a one-way communication using two pairs of differential transmission paths And at least two transmission paths are used for communication of exchange of authentication information and authentication in a time division manner with respect to the LAN communication. .

The source device includes a LAN signal transmitting circuit 611, terminal resistors 612 and 613, AC coupling capacitors 614 to 617, a LAN signal receiving circuit 618, an inverter 620, a resistor 621, A comparator 624 and a pull-down resistor 631, a resistor 632 and a capacitor 633 forming a low-pass filter, a comparator 634, a NOR gate 640, Analog switches 641 to 644, an inverter 645, analog switches 646 and 747, DDC transceivers 651 and 652, and pull-up resistors 653 and 654.

The sink device 602 further includes a LAN signal transmitting circuit 661, terminating resistors 662 and 663, AC coupling capacitors 664 to 667, a LAN signal receiving circuit 668, a pull-down resistor 671, A resistor 672 and a capacitor 673 forming a filter, a comparator 674, a choke coil 681, resistors 682 and 683 connected in series between a power supply potential and a reference potential, analog switches 691 to 694, Analog switches 696 and 697, DDC transceivers 701 and 702, and pull-up resistors 703 and 704, respectively.

The HDMI cable 351 includes a differential transmission line including a reserve line 801 and an SCL line 803 and a differential transmission line including an SDA line 804 and an HPD line 802. The source side terminals 811, 814, and sink side terminals 821 to 824 are formed.

The reserve line 801 and the SCL line 803 and the SDA line 804 and the HPD line 802 are connected as a differential twist pair.

Terminals 811 and 813 in the source device include a transmission circuit 611 for transmitting the LAN transmission signal SG611 to the sink through the AC coupling capacitors 614 and 605 and the analog switches 641 and 642, (Not shown). Terminals 814 and 812 are connected to a receiving circuit 618 and a terminating resistor 613 for receiving a LAN signal from a sink device via AC coupling capacitors 616 and 617 and analog switches 643 and 644 .

The terminals 821 to 824 are connected to the transmitting circuit 661 and the receiving circuit 668 via the AC coupling capacitors 664, 665, 666 and 667 and the analog switches 691 to 694, 662, and 663, respectively. The analog switches 641 to 644 and 691 to 694 are conductive when LAN communication is performed, and are opened when performing DDC communication.

The source device connects terminal 813 and terminal 814 to DDC transceivers 651 and 652 and pullup resistors 653 and 654 via other analog switches 646 and 647.

The sink device connects the terminals 823 and 824 to the DDC transceivers 701 and 702 and the pullup resistor 703 via analog switches 696 and 697. The analog switches 646 and 647 become conductive when DDC communication is performed, and are opened when performing LAN communication.

9, except that the resistor 62 of the source device 601 is driven by the inverter 620, the recognition mechanism of the e-HDMI compatible device by the potential of the reserved line 801 is basically the same as that shown in Fig. This is the same as the example.

When the input of the inverter 620 is HIGH, the resistor 621 becomes a pull-down resistor. Therefore, when viewed from the sink device, the 0V state becomes the same as that in which the e-HDMI non-compliant device is connected. As a result, the signal SG623 indicating the e-HDMI counterpart identification result of the sink device becomes LOW, the analog switches 691 to 694 controlled by the signal SG623 are opened, and the signal SG623 is sent to the inverter 695, The analog switches 696 and 697 controlled by the signal inverted to " 0 " As a result, the sink device 602 disconnects the SCL line 803 and the SDA line 804 from the LAN transceiver and is connected to the DDC transceiver.

On the other hand, in the source device, the input of the inverter 620 is also input to the NOR gate 640, and the output (SG614) thereof becomes LOW. The analog switches 641 to 644 controlled by the output signal SG614 of the NOR gate 640 are opened and the analog switches 646 and 647 controlled by the signal which inverts the signal SG614 to the inverter 645, . As a result, the source device 601 also disconnects the SCL line 803 and the SDA line 804 from the LAN transceiver and is connected to the DDC transceiver.

Conversely, when the input of the inverter 620 is LOW, both the source device and the sink device disconnect the SCL line 803 and the SDA line 804 from the DDC transceiver and are connected to the LAN transceiver.

The circuits 631 to 634 and 681 to 683 for confirming the connection by the DC bias potential of the HPD line 802 have the same function as the example shown in Fig. That is, the HPD line 802 transmits to the source device that the cable 351 is connected to the sink device at the DC bias level in addition to the above-described LAN communication. The resistors 682 and 683 in the sink device and the choke coil 681 bias the HPD line 802 through the terminal 822 to about 4V when the cable 351 is connected to the sink device.

The source device extracts the DC bias of the HPD line 802 by a low pass filter composed of a resistor 632 and a capacitor 633 and compares the DC bias of the HPD line 802 with a reference potential Vref2 (for example, 1.4 V) in the comparator 634 . If the cable 351 is not connected to the sink device, the potential of the terminal 812 is lower than the reference potential Vref2 due to the pull-down resistor 631, and is high if it is connected. Therefore, when the output signal SG613 of the comparator 634 is HIGH, it indicates that the cable 351 and the sink device are connected. On the other hand, when the output signal SG613 of the comparator 634 is LOW, it indicates that the cable 351 and the sink device are not connected.

As described above, according to the configuration example shown in Fig. 25, in the interface for performing video and audio data transmission with one cable, exchange and authentication of the connected device information, and communication of device control data and LAN communication, Directional communication through a differential transmission path of at least one transmission line and at least one DC bias potential of the transmission line is notified of the connection state of the interface, It is possible to divide the SCL line and the SDA line by time division into a time zone connected to the LAN communication circuit by the switch and a time zone connected to the DDC circuit, It is possible to form a circuit for LAN communication irrespective of the electrical specifications, and stable and reliable LAN communication is inexpensive It can be realized.

The resistor 621 shown in Fig. 25 may be provided in the HDMI cable 351 instead of the source device. In this case, each of the terminals of the resistor 621 is connected to each of the lines (signal lines) connected to the reserve line 801 and the power source (power supply potential) among the lines provided in the HDMI cable 351.

The pull-down resistor 671 and the resistor 683 shown in Fig. 25 may be provided in the HDMI cable 351 instead of the sink device. In this case, each of the terminals of the pull-down resistor 671 is connected to each of the lines (ground line) connected to the reserve line 801 and the ground (reference potential) among the lines provided in the HDMI cable 351. Each of the terminals of the resistor 683 is connected to each of the lines (ground line) connected to the HPD line 802 and the ground (reference potential) among the lines provided in the HDMI cable 351.

SDA and SCL are pulldown where H is 1.5KΩ pull-up and L is impedance, and CEC is a pull-down communication in which H is 27KΩ pull-up and L is impedance. Maintaining such a function for compatibility with the existing HDMI may make it difficult to share the function of a LAN for performing high-speed data communication, which is required to terminate the termination of the transmission line.

The configuration example of Fig. 9 and Fig. 25 can avoid such a problem. That is, in the configuration example of Fig. 9, the use of the SDA, SCL, and CEC lines is avoided, and the reserve line and the HPD line are configured as differential pairs to perform full duplex communication by one pair bidirectional communication. In the configuration example of Fig. 25, two pairs of differential pairs are formed by the HPD line and the SDA line, the SCL line, and the reserve line, and two pairs of full-duplex communication are performed to perform unidirectional communication.

Fig. 26 shows a bidirectional communication waveform in the configuration example of Fig. 9 or Fig.

26A shows the signal waveform sent from the source device, FIG. 26B shows the signal waveform received by the sink device, FIG. 26C shows the signal waveform passing through the cable, FIG. 26D shows the signal received by the source device , And E in FIG. 26 shows a signal waveform sent from the source device. As is evident from FIG. 26A to FIG. 26E, according to the configuration example of FIG. 9 or 25, good bidirectional communication can be realized.

While the present invention has been particularly shown and described with reference to exemplary embodiments thereof, it is to be understood that the invention is not limited to the disclosed exemplary embodiments. It will be understood by those of ordinary skill in the art that various changes in form and details may be made therein without departing from the spirit and scope of the invention as defined by the appended claims. It should be understood as belonging to the technical scope.

For example, in the above-described embodiment, when transmitting streaming data (compressed video, audio signal) from the television receiver 250 to the disc recorder 210, a predetermined line of the HDMI cable 352 (High-speed data lines) constituted by the network terminals 275 and 225 of the television receiver 250 and the disc recorder 210 are used, May be used for transmission.

In the above-described embodiment, the remote control code for the recording instruction is transmitted from the television receiver 250 to the set-top box 310 and the disc recorder 210 by using the high-speed data line (bidirectional communication path) , The same control signal may be transmitted using the command pass-through function of the HDMICEC.

In the above-described embodiments, the description has been made on the premise that the HDMI standard interface is used as a transmission path for connecting each device, but the present invention is also applicable to other transmission standards. Although a set-top box or a disc recorder is used as a source device and a television receiver is used as a sink device, the present invention can be similarly applied to an electronic device having other similar functions.

Further, in the above-described embodiment, the connection between the electronic devices by the HDMI cable is shown. However, the present invention can be similarly applied to the connection between the electronic devices by wireless.

Industrial availability

The present invention makes it possible to record a video signal corresponding to a display image without increasing the price of a video signal transmitting apparatus and a display apparatus. For example, when a set-top box is connected to a television receiver through an HDMI cable And the like.

200 ... AV system
210 ... disk recorder
211 HDMI terminal
212 HDMI transmitting unit
213 ... High speed data line interface
218 ... recording section interface
219 · · · DVD / BD drive
220 HDD
221 CPU
224 ... Ethernet (registered trademark) interface
250 ... TV receiver
251A, 251B ... HDMI terminal
252 ... TMDS signal switch
253 ... HDMI receiver
254A, 254B ... High speed data line interface
255 ... path changeover switch
263 ... display panel
271 ... CPU
274 ... Ethernet (registered trademark) interface
276 ... remote control receiver
277 · · · Remote control transmitter
310 ... set top box for IPTV
311 ... HDMI terminal
312 HDMI transmitting unit
313 ... high speed data line interface
314 ... CPU
322 ... Ethernet (registered trademark) interface
323 ... network terminal
351,352 HDMI cable

Claims (10)

A first signal transmitting unit for transmitting an uncompressed video signal by a differential signal to an external device via an HDMI cable,
And a second signal transmitter for transmitting a signal to the external device through full duplex communication using a bidirectional communication path formed by a reserved line and an HPD line of the HDMI cable,
Wherein the bidirectional communication path is a pair of differential transmission lines, and the HPD line has a function of receiving a notification of a connection state from the external device by a DC bias potential. delete The method according to claim 1,
Wherein the signal transmitted from the second signal transmitting unit is a signal different from the uncompressed video signal transmitted from the first signal transmitting unit. The method according to claim 1,
Wherein the second signal transmission unit transmits the signal when a transmission request is sent from the external device via the control data line of the HDMI cable or the bidirectional communication path. A signal transmitting method in a transmitting apparatus connected to an external apparatus via an HDMI cable,
Transmitting an uncompressed video signal to the external device via the HDMI cable by a differential signal,
Transmitting a signal to the external device in full duplex using a bidirectional communication path formed by a reserved line and an HPD line of the HDMI cable;
Wherein the bidirectional communication path is a pair of differential transmission lines, and the HPD line has a function of receiving a notification of a connection status from the external device by a DC bias potential. delete delete delete delete delete

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