KR101060975B1 - Light emitting device having air gap and manufacturing method thereof - Google Patents

Abstract

 The present invention provides a light emitting device having an air gap. The light emitting device includes a substrate, a semiconductor layer formed on the substrate, and an air gap formed in the semiconductor layer. The present invention also provides a method of manufacturing the light emitting device. Accordingly, the present invention can form a predetermined air gap through wet etching, the air gap scatters the light traveling to the sapphire surface due to total internal reflection among the light generated in the semiconductor layer, thereby improving the light extraction efficiency You can.

Semiconductor, air gap, wet etching, deflection groove induction pattern, light emitting device

Description

Light emitting device having an air gap and a method of manufacturing the same

The present invention relates to a light emitting device and a method of manufacturing the same, and a light emitting device having an air gap that can further improve the light extraction efficiency, and a method of manufacturing the same.

In general, when fabricating a semiconductor light emitting device using the MOCVD method, a wafer in which a buffer layer, an n-type layer, an active layer, and a p-type layer is sequentially grown on a substrate is first made, followed by mesa-type dry etching. Thereafter, a metal deposition and patterning process is performed to form a current diffusion layer on the p-type layer, followed by metal deposition, patterning, and annealing to form an n-type electrode and a p-type electrode. At this time, the n-type electrode is formed in a partial region on the n-type layer, the p-type electrode is formed in a partial region on the current diffusion layer.

The light emitting device has a light waveguide-like structure formed between the substrate and the device surface. Accordingly, as the light generated in the active layer is totally internally reflected at the element surface, the substrate interface, or the substrate backside interface, considerable light is not emitted to the outside and disappears inside, resulting in low light extraction efficiency. In order to solve this problem, a conventional method has been proposed to give a surface roughness on the surface of the p-type layer or the n-type layer, or to form a reflection or scattering center inside the substrate to break the path of total reflection of light. However, in the conventional method, the effect of extracting light in the vertical direction by the reflection or scattering center is prominent, but at the same time, it is difficult to extract light to the side.

In order to solve the above problems, a light emitting device and a method of manufacturing the same may be formed by forming a predetermined air gap in a substrate region where a semiconductor layer is formed without using a dry etching method to improve light extraction efficiency. to provide. In addition, such an air gap provides a light emitting device having an air gap capable of improving light extraction efficiency by forming an air protrusion having a triangular or hexagonal shape between 30 degrees and 70 degrees as a semiconductor layer, and a method of manufacturing the same.

In the light emitting device having the air gap according to the present invention, the LEO mask region may be etched using wet etching as a selective region exposed through LEO growth and selective growth. Wet etching proceeds to the area where the mask is removed to form a predetermined air gap.

The air gap is preferably formed at an angle between 20 degrees and 70 degrees with the sapphire substrate.

Through the mask shape, the air gap is formed such that each of the plurality of air protrusions has a periodic arrangement or an aperiodic arrangement.

A method of manufacturing a light emitting device according to the present invention includes preparing a substrate and forming a plurality of air gaps through wet etching on the substrate.

Specifically, after forming a mask thin film made of any one of SiOx, SiNx, W and Pt on the substrate, the mask thin film is wet-etched to form a plurality of air gaps.

The air gap may be formed in a different size according to the size of the mask, the shape of the air gap is determined according to the shape of the mask and most of the shape forms a triangular prism, triangular pyramid or hexagonal pyramid shape.

The step of forming the undercut deflection grooves may include an etching solution comprising at least one of sodium hydroxide, potassium hydroxide, sulfuric acid, phosphoric acid, and allues (4H ₈ PO ₄ + 4CH ₈ COOH + HNO ₈ + H ₂ O). It is carried out using.

The semiconductor layer includes an n-type layer, an active layer and a p-type layer, and is formed by a selective MOCVD method.

The present invention forms a nitride semiconductor layer after forming a mask on the substrate. Wet etching forms a uniform air gap. Here, the air gap scatters light traveling to the sapphire surface due to total internal reflection among the light generated in the semiconductor layer, thereby improving light extraction efficiency.

Hereinafter, with reference to the accompanying drawings will be described an embodiment according to the present invention in more detail. However, the present invention is not limited to the embodiments disclosed below, but will be implemented in various forms, and only the embodiments are intended to complete the disclosure of the present invention, and the scope of the invention to those skilled in the art. It is provided for complete information. Like reference numerals in the drawings refer to like elements.

1 is a cross-sectional view showing a light emitting device having an air gap according to a first embodiment of the present invention.

Referring to FIG. 1, the light emitting device of the present invention is formed in the substrate 100, the semiconductor layers 130, 140, and 150 formed on the substrate 100, and the semiconductor layers 130, 140, and 150. The air gap 111 is included.

The air gap 111 is formed in a prism shape inside the semiconductor layers 130, 140, and 150.

In addition, electrode pads 171 and 172 for applying a current are provided at upper ends of the semiconductor layers 130, 140, and 150.

In the light emitting device configured as described above, when an external current is applied through the electrode pads 171 and 172, the active layer 140 of the semiconductor layers 130, 140, and 150 functions as a light emitting area or a light emitting area.

The substrate 100 may be any one of a sapphire substrate, a silicon carbide (SiC) substrate, a silicon (Si) substrate, a zinc oxide (ZnO) substrate, a gallium arsenide (GaAs) substrate, and a gallium phosphide (GaP) substrate. One can be used, and in this embodiment, a sapphire substrate is used.

The prism-shaped air gap 111 serves to improve the light extraction effect by scattering the light traveling to sapphire among the light generated by the semiconductor layers 130, 140, and 150.

As shown in FIG. 1, in this embodiment, the cross section of the air gap 111 is an example of forming a prism shape, but the air gap 111 according to the present invention is not limited thereto, and a predetermined shape such as a triangular pyramid and a hexagon pyramid is provided. Depending on the shape of the mask can be produced to have a cross-section of various shapes.

Here, the mask for forming the air gap 111 is made of any one material of SiOx, SiNx, W and Pt, the mask which is not sealed to form the air gap 111 of the prism shape as described above Area is required.

The semiconductor layers 130, 140, and 150 include an n-type layer 130, an active layer 140, and a p-type layer 150, and include a Si film, a GaN film, an AlN film, an InGaN film, an AlGaN film, an AlInGaN film, and the like. It is preferably formed of at least one of the semiconductor thin film containing. Here, the n-type layer 130 is a layer in which a plurality of carriers are electrons, and may be composed of an n-type semiconductor layer and an n-type cladding layer. The n-type semiconductor layer and the n-type cladding layer may be formed by injecting n-type impurities, for example, Si, Ge, Se, Te, C, or the like into the aforementioned semiconductor thin film. In addition, the p-type layer 150 is a layer in which a plurality of carriers are holes, and may be composed of a p-type semiconductor layer and a p-type cladding layer. The p-type semiconductor layer and the p-type cladding layer are formed by injecting p-type impurities such as Mg, Zn, Be, Ca, Sr, and Ba into the semiconductor thin film described above. The active layer 140 is a layer that outputs light having a predetermined wavelength while recombining electrons provided from the n-type layer 130 and holes provided from the p-type layer 150. The active layer 140 may be formed of a multilayer semiconductor thin film having a single quantum well structure or a multiple quantum well structure by alternately stacking a well layer and a barrier layer. At this time, since the wavelength of the light is changed according to the semiconductor material constituting the active layer 140, it is preferable to select a suitable semiconductor material according to the target output wavelength.

Meanwhile, a mask entrance surface formed toward the top surface of the semiconductor layers 130, 140 and 150 and exposed is formed. In other words, the wet etching liquid penetrating through the entrance of the mask removes the mask area on the sapphire substrate. As the mask is removed, the N-side of the nitride semiconductor, which enters the mask, is wet-etched to form a prism-shaped air gap. Here, the exposed mask openings of the semiconductor layers 130, 140, and 150 may be manufactured in the form of a circle or a polygon.

At this time, the lower portion of the air gap 111 is in contact with the substrate. The inner inclination angle θ1 formed by the air gap 111 and the substrate 100 may be formed to be 20 degrees to 70 degrees with respect to the substrate 100. Accordingly, the prism shape of the inner inclined surface of the air gap 111 may control the light traveling in the sapphire direction by total internal reflection to improve light extraction efficiency.

The electrode pads 171 and 172 include an n-type electrode pad 171 in contact with the n-type layer 130 and a p-type electrode pad 172 in contact with the p-type layer 150. Here, each of the n-type electrode pad 171 and the p-type electrode pad 172 may be at least one metal of Pb, Sn, Au, Ge, Cu, Bi, Cd, Zn, Ag, Ni, Ti, and an alloy containing them. It is preferable to form a single film or a multilayer film. Among the electrode pads 171 and 172, the p-type electrode pad 172 may be formed first on the p-type layer 150 and then on the current diffusion layer 160.

Referring to the manufacturing process of the light emitting device according to the embodiment of the present invention having such a configuration as follows.

FIG. 2 is a diagram sequentially illustrating a method of forming a mask according to a first embodiment of the present invention, and FIG. 3 is a surface optical photograph and a side SEM photograph after an air gap is formed.

2 to 3, a method of manufacturing a light emitting device according to a first embodiment of the present invention will be described.

2A and 2B, the substrate 100 is prepared. A mask thin film layer 190 having a predetermined thickness is formed on the prepared substrate 100.

The mask thin film may be formed by depositing at least one of SiOx, SiNx, W, and Pt by a plasma chemical vapor deposition (CVD) method or a sputtering method. In this case, the mask thin film 190 is preferably formed to a thickness of about 3000 or less. Subsequently, the mask thin film 190 is patterned to form a mask to be sealed which is connected to the exposed mask after growth. Of course, it may be formed by performing a lift-off process instead of the above-described patterning process.

Subsequently, an etching induction pattern and an air gap connection pattern connected to the etching induction pattern are formed in the mask thin film layer.

Here, the etching induction pattern 112 and the air gap connection pattern 113 may be manufactured in different sizes. In addition, the etching induction pattern 112 and the air gap connection pattern 113 is preferably formed to have a periodic arrangement.

In this case, the etching induction pattern 112 and the air gap connection pattern 113 is formed to be connected to each other.

Here, the etching induction pattern 112 is manufactured to have a hexagonal cross section. In addition, the etching induction pattern 112 may be formed to have a horizontal cross section of various shapes such as triangle, polygon, etc., not circular.

In addition, the air gap connection pattern 113 is connected to the etching induction pattern 112 as described above, the shape is preferably a straight line form.

Meanwhile, since the air gap 111 having various shapes may be formed inside the air gap connecting pattern 113, the air gap connecting pattern 113 may be formed periodically or aperiodically.

3A and 3B, semiconductor layers 130, 140, and 150 are formed on the etch induction pattern 112 and the air gap connection pattern 113.

The semiconductor layers 130, 140, and 150 include an n-type layer 130, an active layer 140, and a p-type layer 150, and are formed by a selective MOCVD method.

That is, the semiconductor layer is formed by sequentially stacking the n-type layer 130, the active layer 140, and the p-type layer 150 on the substrate 100 on which the patterns 112 and 113 are formed. In the present embodiment, the n-type impurity is implanted into the nitride thin film to form the n-type layer 130. In addition, the barrier layer and the well layer are alternately deposited to form a multi-quantum well having an In _1-x Ga _1-y Al _1-z N / In _1-x Ga _1-y Al _1-z N structure, where 0 ≦ x The active layer 140 is formed by adjusting ≦ 1, 0 ≦ y ≦ 1, and 0 ≦ z ≦ 1. Then, the nitride thin film is deposited thereon, and then the p-type impurity is implanted to form the p-type layer 150.

Here, the semiconductor layers 130, 140, and 150 are preferably subjected to lateral epitaxial overgrowth (LEO) and selective epitaxial growth (SEG) using MOCVD. Through this LEO growth, the mask in which the air gap is to be formed is grown to be sutured with lateral growth prevailing, so as to cover all the air gap connection patterns 113 by continuous epi growth on the mask in which the air gap is to be formed. Thin film crystal growth takes place.

Subsequently, after being sequentially stacked up to the P-type layer 150 formed as described above, the semiconductor layers 130, 140, and 150 are mesa-etched to expose the etching induction pattern 112.

 Accordingly, the etching induction pattern 112 is exposed on the semiconductor layers 130, 140, and 150, and the air gap connection pattern 113 is sealed to grow on a flat surface. Of course, the shape of the air gap connection pattern 113 is not limited thereto, and the air gap connection pattern 113 may be connected to the air gap connection pattern 113 and the air gap connection pattern 113 may be sealed to form a flat surface. It may be deformed into various shapes depending on conditions.

Subsequently, the exposed etching induction pattern 112 is wet etched with a wet etching solution to form an air gap. Here, the wet etching solution is sodium hydroxide (NaOH), potassium hydroxide (KOH), sulfuric acid (H ₂ SO ₄ ), phosphoric acid (H ₃ PO ₄ ), aloe etch (4H ₈ PO ₄ + 4CH ₈ COOH + HNO ₈ + H ₂ O), and at least one of hydrofluoric acid.

Accordingly, the etching induction pattern 112 exposed through the wet etching may be removed.

Here, the exposed etching induction pattern 112 may be removed using an electrochemical method by forming an electrode on the surface, or by a photo-enhanced chemical (PEC) etching method.

Subsequently, the air gap 111 is formed by wet etching the air gap connection pattern 113 connected to the etching induction pattern 112. Here, the wet etching solution is introduced along the air gap connection pattern 113 connected to the exposed etching induction pattern 112. That is, it is preferable to etch the air gap connection pattern 113 connected to the etch induction pattern 112 using a wet etching solution obtained by etching the etch induction pattern 112 formed on the substrate 100.

Here, the etching of the etching induction pattern 112 and the air gap connection pattern 113 may be simultaneously performed using the wet etching solution or may be sequentially performed using different types of wet etching solutions.

The nitride surface (000-1) of the semiconductor layer is exposed on the air gap connecting pattern 113 removed as described above. Here, during wet etching, the surface of the semiconductor layer is hardly etched during wet etching.

That is, the etching selectivity of the (0001) plane, which is the gallium plane, and the (000-1) plane, which is the nitride plane of the semiconductor layers 130, 140, and 150, are different from each other. As a result, the etching of the (000-1) plane, which is the nitride plane of the semiconductor layers 130, 140, and 150, may be performed relatively quickly, thereby forming a prism-shaped air gap 11.

Here, the air gap 111 is formed in a three-dimensional shape, may be made of a plurality of the same three-dimensional shape, may be made of a plurality of various three-dimensional shape. Herein, the shape of the prism air gap 111 may form various shapes such as hexagonal pyramid and triangular pyramid by modifying the shape of the mask in which the air gap 111 is to be formed.

Next, referring to FIG. 1, a patterning process of forming a current diffusion layer 160 on the semiconductor layers 130, 140, and 150 and then partially removing the current diffusion layer 160 is performed. In this case, the current diffusion layer 160 may be formed of a transparent conductive film such as indium tin oxide (ITO) or indium zinc oxide (IZO). In the patterning process, some regions of the n-type layer 130 and the active layer 140 are mesa-etched to expose a portion of the n-type layer 130 on which the n-type electrode 171 is to be formed.

Referring to FIG. 1, a metal deposition, patterning, and annealing process is performed on a portion of the exposed n-type layer 130 and a portion of the current diffusion layer 160 to form an n-type electrode 171 and a p-type electrode ( 172). In this case, the n-type electrode 171 is formed to contact a portion of the n-type layer 130, the p-type electrode 172 is formed to contact a portion of the current diffusion layer 160. Here, the n-type electrode 171 and the p-type electrode 172 is made of at least one metal of Pb, Sn, Au, Ge, Cu, Bi, Cd, Zn, Ag, Ni, Ti and alloys containing them. It is preferable to form a single film or a multilayer film.

As described above, the electrodes 171 and 172 may be formed on the surfaces of the semiconductor layers 130, 140, and 150 to apply current or light thereto, thereby inducing the wet etching.

Meanwhile, the present invention may further include separating the semiconductor layers 130, 140, 150 and the substrate 100 mentioned above from each other. Here, the semiconductor layers 130, 140, 150 and the substrate 100 may be separated from each other using an LLO method.

In addition, the semiconductor layers 130, 140, 150 and the substrate 100 may be separated from each other using a CLO method.

In the case of the chemical lift off (CLO) method, an additional thin film layer formed on the outer surface or the outer surface of the semiconductor layer 130, 140, 150 may be etched and separated from the substrate 100 using a chemical solution.

4 is a conceptual diagram illustrating light extraction efficiency of a light emitting device according to a first embodiment of the present invention.

4 and 5, light generated in the active layer 140 is extracted to the outside via the n-type layer 130 or the p-type layer 150. In general, some of the light propagated outside the escape cone angle passes through the sapphire and is trapped in the sapphire internal space to be lost, thereby reducing light extraction efficiency. In order to solve this problem, the light emitting device according to the present embodiment forms an air gap 111 on the sapphire substrate 100. The air gap 111 is scattered or reflected in the air gap 111 where most of the light is formed due to a large difference between the refractive indexes of the semiconductor layers 130, 140, and 150 and the refractive indexes of the air, so that the air gaps 111 are scattered to the top and sides of the device. Extracted. At this time, as shown in FIG. 5, the simulation results showed that the light extraction efficiency was the best when the inclination angle θ1 of the air gap 111 had an inclination angle in the range of 30 degrees to 70 degrees. On the other hand, it was observed that the light extraction efficiency gradually decreased at the inclination angle outside the above range.

11 is a cross-sectional view showing that a scattering surface is further formed on the outer surface of the semiconductor layer according to the present invention.

In addition, referring to FIG. 11, in order to increase the extraction probability of the upper part, the outer surface of the stacked semiconductor layer (the outer surface of the layer located outside the n-type layer 130 or the p-type layer 150) or the transparent conductive film may be formed. The uneven scattering surface 300 may be randomly formed. Here, the scattering surface may be formed in a concave-convex shape of various shapes.

The method of forming the scattering surface 300 having the surface roughening as described above has been roughening the surface by using a physical or chemical etching technique, and improved the external quantum efficiency.

In addition, the scattering surface may be roughened by growing a thin film using growth conditions such as pressure or temperature when growing a nitride semiconductor.

12 is a cross-sectional view illustrating that the scattering surface of FIG. 11 is exposed.

6A through 6C are views sequentially showing a method of forming a mask according to a second embodiment of the present invention, FIG. 7 is a cross-sectional view showing a light emitting device according to a second embodiment of the present invention, and FIG. 9 is a cross-sectional view showing a light emitting device according to a second embodiment of the present invention.

6A to 6C, after sequentially layering to the P layer, the etching induction pattern 112 is exposed through mesa etching, and the wet etching solution is connected to the exposed etching induction pattern 112. It may flow along the dragon pattern 113.

Therefore, the pattern itself may be etched, and anisotropic etching may be performed on the semiconductor layers 130, 140, and 150 to form a triangular prism-shaped empty space.

In FIG. 6B, the etching induction pattern 112 is exposed before the N-type electrode pad 171 (see FIG. 4) is formed.

7 to 9, when the light emitting device according to the present embodiment connects the etching induction pattern 112 and the air gap connection pattern 113 on the substrate 100, the air gap A pattern 213 on which a plurality of air gaps are to be formed may be provided on the connection pattern 113.

After the semiconductor layers 130, 140, and 150 are formed to cover the air gap connection patterns 113 having various shapes, the patterns 213 on which the air gaps are to be formed through wet etching may be formed as shown in FIG. 8. Branch-shaped air gap 230 may be formed.

As a result, the light generated in the active layer 140 and proceeding to sapphire is scattered by the formed air gap 230 and extracted to the upper side of the device. Therefore, according to the present invention, the light extraction efficiency may be improved by the air gap 230. Here, the air gap is formed in a hexagonal pyramid shape.

In addition, the cross section of the air gap is formed in a rectangular, triangular and hemispherical shape, but is not limited to this can be manufactured in various shapes.

In addition, in the above-described embodiments, the air gaps 111 and 230 through wet etching are formed before the current diffusion layer 160 is formed. However, the present disclosure is not limited thereto, and the air gaps before the current diffusion layer 160 are formed. 111 and 230).

Meanwhile, referring to FIG. 1, when manufacturing a light emitting device, an area of the etching induction pattern 112 may have an area of a predetermined size or more.

10 is a diagram illustrating an example of dicing a chip.

Referring to FIG. 10, when the chips 200 are cut from each other using a laser in a dicing process of manufacturing a light emitting device, the holes are divided in half with respect to the holes of the etching initiation pattern 112. It may be divided into chips having a. Here, since a predetermined angle may be given to the divided holes themselves, light extraction may be induced in the holes.

1 is a cross-sectional view showing a light emitting device according to a first embodiment of the present invention.

2A and 2B are views sequentially showing a method of forming a mask according to a first embodiment of the present invention.

3A to 3C are surface optical photographs and side SEM photographs after air gaps are formed.

4 is a conceptual view for explaining the light extraction efficiency of the light emitting device according to the first embodiment of the present invention.

5 is a surface optical photograph observed upon light emission.

6A through 6C are views sequentially showing a method of forming a mask according to a second embodiment of the present invention.

7 is a cross-sectional view showing a light emitting device according to a second embodiment of the present invention.

8 is a view showing that the air gap is formed in accordance with a second embodiment of the present invention.

9 shows the air gap formation of FIG. 8.

10 shows an example of dicing a chip.

11 is a cross-sectional view showing that a scattering surface is further formed on the outer surface of the semiconductor layer according to the present invention.

FIG. 12 is a cross-sectional view illustrating that the scattering surface of FIG. 11 is exposed in a vertical LED. FIG.

<Explanation of symbols for the main parts of the drawings>

100: substrate 111, 230: air gap

112: etching induction pattern 113: air gap connection pattern

130: n-type layer 140: active layer

150: p-type layer 160: current diffusion layer

213: Pattern in which the air gap is to be formed 300: Scattering surface

Claims (15)

delete delete delete delete Forming a mask thin film layer on the substrate; Forming an etching induction pattern and an air gap connection pattern connected to the mask thin film layer; Forming a semiconductor layer on the pattern; Mesa etching the semiconductor layer to expose an etching induction pattern; And wet etching the exposed etch induction pattern with a wet etch solution, and wet etching the air gap pattern connected to the etch induction pattern to form an air gap. The method of claim 5, The mask thin film is a method of manufacturing a light emitting device having an air gap, characterized in that made of any one material of SiOx, SiNx, W and Pt. The method of claim 5, The method of manufacturing a light emitting device having an air gap, wherein the etching induction pattern and the air gap pattern are formed to have a periodic arrangement. The method of claim 5, Fabrication of a light emitting device having an air gap characterized in that the wet etching liquid etched the etching induction pattern formed on the substrate, the air gap connection pattern connected to the etching induction pattern, the pattern to form the air gap is etched Way. The method of claim 5, Air, characterized in that the wet etching solution comprises at least one of sodium hydroxide, potassium hydroxide, sulfuric acid, phosphoric acid and allues (4H ₈ PO ₄ + 4CH ₈ COOH + HNO ₈ + H ₂ O), hydrofluoric acid, A method of manufacturing a light emitting device having a gap. The method of claim 5, And forming an electrode on the surface of the semiconductor to induce wet etching by applying current or light. The method of claim 5, The semiconductor layer includes an n-type layer, an active layer and a p-type layer, the method of manufacturing a light emitting device having an air gap, characterized in that formed by a selective MOCVD method. The method of claim 5, A method of manufacturing a light emitting device having an air gap, wherein an uneven scattering surface is further formed on the outer surface or the transparent conductive film of the semiconductor layer. The method of claim 5, Separating the semiconductor layer and the substrate further comprising the step of manufacturing a light emitting device having an air gap. The method of claim 13, The method of manufacturing a light emitting device having an air gap, characterized in that to use the LLO method in the step of separating the substrate. The method of claim 13, Method of manufacturing a light emitting device having an air gap, characterized in that using the CLO method in the step of separating the substrate.

Images