KR101001773B1

KR101001773B1 - Method of Selectively Etching Semiconductor region

Info

Publication number: KR101001773B1
Application number: KR20080097552A
Authority: KR
Inventors: 류상완
Original assignee: 전남대학교산학협력단
Priority date: 2008-10-06
Filing date: 2008-10-06
Publication date: 2010-12-15
Also published as: KR20100038539A

Abstract

The present invention provides an electrolytic etching process using a semiconductor structure including an n-GaN-based first semiconductor region and an n-GaN-based second semiconductor region having a different doping concentration from the first semiconductor region as an anode and the electrolyte as a cathode. By performing a different etching rate between the first semiconductor region and the second semiconductor region, a selective etching method of a semiconductor region and a method of separating a semiconductor device from a substrate are provided.

GaN, Substrate Separation, Electrolyte, Electrolytic Etching

Description

Method of Selectively Etching Semiconductor region

The present invention relates to a selective etching method of the semiconductor region, the selective etching method of the semiconductor region, the method of separating the semiconductor layer and the semiconductor device using the phenomenon that the etching rate is changed according to the degree of doping of the semiconductor layer when applying the electrolytic etching method A method of separating from a substrate.

As high efficiency and high power operation of the light emitting diodes is required, the necessity of quickly dissipating heat generated from the LED chip to the outside is increasing. Currently, the structure showing the highest heat dissipation efficiency uses a method of peeling off the LED epi grown on the sapphire substrate by a lift-off process and bonding it to the metal substrate. As a result, it is possible to release heat through a high thermal conductive metal substrate without passing through a sapphire substrate having a low thermal conductivity, and thus it can be applied to manufacturing a high output LED. Also, Korean Patent Publication No. 495215 describes an example of such a method.

However, the method using the laser light has a problem that the process cost is high and the laser exposure area is small, so that the process time is too long, and the stress generated by the laser exposure also adversely affects the reliability of the device.

In order to solve the above-mentioned problems, the cause has developed a new semiconductor device isolation technology, which is described in the unpublished application No. 2007-103186. Briefly, the n-GaN-based semiconductor layer is a technology for separating semiconductor devices by using a much faster etching rate than the undoped GaN-based and p-GaN-based semiconductor layers.

The present invention is an improvement of this technology, and in addition to the above-described technology, to provide a method for more effectively separating a semiconductor device from a substrate.

In order to solve the above problems, it is to provide a method for separating a semiconductor layer and a method for separating a semiconductor device from a substrate, as well as high efficiency which is the object of the present invention, easy to manufacture, and can reduce the manufacturing cost.

As a technical means for solving the above problems, the first aspect of the present invention comprises the steps of preparing a first semiconductor region of the n-GaN series and the second semiconductor region of the n-GaN series; Performing an electrolytic etching using the first semiconductor region and the second semiconductor region as an anode and an electrolyte as a cathode; And controlling the doping concentration differently between the first semiconductor region and the second semiconductor region, thereby providing a selective etching method of the semiconductor region.

"GaN-based" may be a material consisting of only Ga and N, and should also be interpreted to include materials containing Group III, such as In, Al, or Group V, other than Ga, N, or the like.

Preferably, the electrolyte contains oxalic acid or KOH.

According to a second aspect of the present invention, there is provided a semiconductor device comprising: preparing a first semiconductor region of an n-GaN series and a second semiconductor region of an n-GaN series on a substrate; Providing an etch promotion layer in the first semiconductor region; And performing an electrolytic etching using the first semiconductor region and the second semiconductor region as an anode and the electrolyte as a cathode.

Preferably, the undoped GaN-based semiconductor layer is formed between the first semiconductor region and the second semiconductor region.

According to a third aspect of the present invention, there is provided a semiconductor device comprising: preparing a semiconductor device including a first semiconductor region of an n-GaN series and a second semiconductor region of an n-GaN series on a first substrate; Attaching the semiconductor element portion to a second substrate; And performing an electrolytic etching with the first substrate and the second substrate as an anode and the electrolyte as a cathode, wherein the first semiconductor region and the second semiconductor region have different etching rates by controlling doping concentrations. Otherwise controlled, wherein the second semiconductor region is removed to separate the semiconductor device from the substrate.

A fourth aspect of the present invention includes the steps of preparing a semiconductor device comprising a first semiconductor region of the n-GaN series and a second semiconductor region of the n-GaN series on a first substrate; Attaching the semiconductor element portion to a second substrate; And performing an electrolytic etching using the first substrate and the second substrate as an anode and the electrolyte as a cathode, wherein an etch-promoting layer is provided inside the first semiconductor region. Etching is accelerated and removed preferentially than the semiconductor region, thereby providing a method of separating a semiconductor device from a substrate.

Meanwhile, the second semiconductor layer may include a semiconductor LED and an LD structure according to the device to be applied. That is, the second semiconductor layer may be inserted in the need for separating the semiconductor element from the substrate without forming part of the semiconductor element portion or forming part of the semiconductor element in a dummy form.

When the first substrate is a semiconductor substrate and the second substrate is a metal substrate, the metal substrate may have a structure capable of effectively dissipating heat.

According to the present invention, a semiconductor structure grown on a substrate can be easily separated through an electrolytic etching method using an electrolyte solution, so that the semiconductor structure can be transferred to another substrate.

When the present invention is applied to LED manufacturing, an optical device including a GaN-based material that is easy to grow is grown on a sapphire substrate having a low thermal conductivity, and the heat is easily transferred to the metal substrate having a high thermal conductivity by transferring it. Being able to emit light has the effect of being able to produce a high-power LED.

DETAILED DESCRIPTION Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings so that those skilled in the art may easily implement the technical idea of the present invention. do. The present invention is not limited to the embodiments disclosed below, but can be implemented in various different forms, only the embodiments of the present invention to make the disclosure of the present invention complete and complete the scope of the invention to those skilled in the art. It is provided to inform you.

1 is a cross-sectional view illustrating a selective etching method of a semiconductor region in accordance with an embodiment of the present invention.

Referring to FIG. 1, an n-GaN-based first semiconductor layer 120, an undoped-GaN-based semiconductor layer 230, an n-GaN-based second semiconductor layer 240, and an active layer are formed on a substrate 100. A stacked structure of 250 and p-GaN 260 is shown. Electrolytic etching is performed using the substrate on which the above-mentioned layers are deposited as an anode and the electrolyte as a cathode. It is preferable that electrolyte solution contains oxalic acid or KOH.

On the other hand, the substrate 100 may be of various kinds that are not particularly limited, but in the case of GaN series, a sapphire substrate is preferable. The undoped-GaN series semiconductor layers 110 may be formed on the substrate 100 as a buffer layer. In addition, an active layer 250 is formed between the n-GaN-based second semiconductor layer 240 and the p-GaN-based semiconductor layer 260.

According to the present invention, the etching rate of the n-GaN-based first semiconductor layer 120 and the n-GaN-based second semiconductor layer 240 is controlled differently by controlling the doping concentration differently. In other words, in the case of high doping semiconductors, the etching speed is faster.

The inventors have found that the etching characteristics in the electro-etching of n-GaN-based semiconductors are highly dependent on the doping concentration of the GaN layer. To verify this, electro-etching was performed by changing the voltage of a sample grown by inserting (sample B) n-GaN with n-type doping of 1.0X10 ¹⁸ cm ^-3 and (Sample A) 7.7X10 ¹⁸ cm ^-3 between undoped GaN. It was. This allows us to measure the rate at which n-GaN is electroetched along the side. FIG. 2A shows the etch rate for sample A and FIG. 2B shows the etch rate for sample B. FIG.

Referring to FIG. 1, an undoped-GaN-based semiconductor layer 230 is formed between an n-GaN-based first semiconductor layer 120 and an n-GaN-based second semiconductor layer 240.

On the other hand, the undoped-GaN-based semiconductor layer is not an essential component of the invention, it is possible to implement the desired lift-off without this layer. However, it may be more effective to insert an undoped-GaN layer in the middle to more effectively use the difference in the relative etching rates of two different doping layers. In the structure in which two n-GaN layers are disposed and an undoped-GaN (u-GaN) is interposed therebetween, a liftoff process may be performed by selectively removing only the lower n-GaN having a high doping concentration. Due to the difference in doping concentration, the top n-GaN is etched in such a way that the nanostructures occur only at the edges while the bottom n-GaN is completely removed. That is, in most regions, n-GaN at the top is preserved as it is. The u-GaN inserted in the middle serves to prevent the electroetching from occurring by contacting the upper n-GaN with the electrolyte that is etched into the lower space by etching the lower n-GaN.

Referring to FIGS. 2A and 2B, it can be seen that the etching rate is much higher for the sample B having a high doping. n-GaN has two different characteristics in the electroetching process. The first is etched in such a way that there are nano-sized fine holes in n-GaN, and the second tends to completely remove the n-GaN layer. The state after the etching is shown in Figs. 3A and 3B, respectively. As a result of the measurement, it can be seen that in the sample A, the nanostructure is formed at all voltages, and in the sample B, the n-GaN layer is completely removed in the 50-60 V region, but the nanostructure is formed in the remaining regions. In FIG. 2, the empty circular symbol means nanostructure formation, and the filled circular symbol means complete removal.

Therefore, using this phenomenon, when an epitaxial structure for a light emitting device such as an LED has several n-GaN layers, only one of them is selectively removed by lifting off by appropriately changing the doping amount and adjusting the voltage. It is also possible. This phenomenon can be applied in various forms to the semiconductor manufacturing process.

4 is a cross-sectional view illustrating a selective etching method of a semiconductor region in accordance with another embodiment of the present invention.

For convenience of explanation, the difference from FIG. 1 will be mainly described. In FIG. 4, the etching promotion layer 220a is further formed to increase the etching rate of the n-GaN-based semiconductor layer. Is different.

The etching promotion layer 220a may include forming an etching promotion layer 220a in the middle of forming the GaN-based semiconductor layer.

Although the specific manner of forming the etching promotion layer 220a is possible in various ways that are not particularly limited, it is obvious that the use of a simple process is convenient. The present inventors have found that the etching promotion layer 220a is formed by exposing the surface of the semiconductor layer to be formed in the air to form the GaN-based semiconductor layer in the air. This phenomenon can be inferred from the fact that several to several tens of kilowatts of a native oxide film is formed in the process of exposing the semiconductor layer to air, or that an impurity layer is formed to function as an etching promotion layer.

Therefore, the present inventors intentionally form an oxide film by oxygen surface treatment or the like in a high temperature chamber instead of exposing to air, or intentionally forming an impurity layer such as Si, Ge, Sn, etc. Could be Preferred thicknesses are expected to be between several and tens of millimeters thick.

On the other hand, the etching promotion layer 220a is inserted into the semiconductor region where the etching is to be performed at a relatively high speed, and when the etching proceeds, the etching promotion layer 220a causes intense etching at the portion thereof, so that the semiconductor region including the etching promotion layer 220a is formed. The etching solution is injected into the wide area through the etched promotion layer 220a to be etched more than other semiconductor areas. Therefore, even when the doping of the semiconductor region is not different as described above, it is possible to achieve a predetermined purpose only by inserting the etching promotion layer.

5 is a cross-sectional view illustrating a selective etching method of a semiconductor region in accordance with another embodiment of the present invention.

Referring to FIG. 4, a structure in which an n-GaN-based first semiconductor layer 320 and an n-GaN-based second semiconductor layer 330 are stacked on a substrate 300, and an undoped-GaN series is illustrated. The semiconductor layer 310 is formed at the bottom of the first semiconductor layer 320 of the n-GaN series. Meanwhile, the first semiconductor layer 320 of the n-GaN series has a higher doping concentration than the second semiconductor layer 330 of the n-GaN series, and as a result, the etching rate is higher.

Referring to FIG. 4, if the first semiconductor layer 320 of the n-GaN series is etched quickly, a current path becomes very long when electrolytic etching occurs in the second semiconductor layer 330 of the n-GaN series. The current path of the etching process is indicated by a dotted line. As a result, the second semiconductor layer 330 of the n-GaN series has a large resistance to current flow, and the rate of electrolytic etching is greatly reduced, so that the first semiconductor is not inserted between two n-GaN layers as shown in FIG. Only layer 320 can be removed.

A method of separating a semiconductor device from a substrate using the selective etching method of the semiconductor region described above will be described.

6 is a cross-sectional view illustrating a method of separating a semiconductor device from a substrate in accordance with an embodiment of the present invention.

On the first substrate 100, the n-GaN-based first semiconductor layer 120, the undoped-GaN-based semiconductor layer 230, the n-GaN-based second semiconductor layer 240, the active layer 250, and p A structure in which a GaN-based semiconductor layer 260 is stacked is shown. Of the stacked structures, the second semiconductor layer 240, the active layer 250, and the p-GaN semiconductor layer 260 of the n-GaN series are finally formed after the lift-off to the layers constituting the semiconductor device unit A. 2 It must be transferred to the board.

Next, the semiconductor element portion A formed on the first substrate 100 is attached to the second substrate 500. Next, electrolytic etching is performed using the first substrate 100 and the second substrate 500 as an anode and the electrolyte as a cathode. In this case, the first semiconductor layer 120 of the n-GaN series and the second semiconductor layer 240 of the n-GaN series have different etching rates by differently controlling the doping concentrations, so that the n-GaN series The semiconductor element portion A is separated from the substrate by removing the one semiconductor layer 120.

The first substrate 100 is a semiconductor substrate, and the second substrate 500 may use a metal substrate.

In addition, the method of separating the semiconductor element portion from the substrate has been described with reference to FIG. 1, but it is of course possible to actually apply FIGS. 4 and 5. That is, as shown in FIG. 4, an etch promotion layer is provided inside the second semiconductor region, so that etching of the second semiconductor region is accelerated and removed rather than the first semiconductor region, thereby separating the semiconductor device from the substrate. The etching accelerator layer may be formed by oxidation, impurity treatment, or air exposure in the middle of forming the second semiconductor region.

2A and 2B are graphs of experimental results for explaining a selective etching method of a semiconductor region.

3A and 3B are graphs of experimental results of performing a selective etching method of a semiconductor region according to an exemplary embodiment of the present invention.

6 is a cross-sectional view illustrating a method of separating a semiconductor device from a substrate according to an embodiment of the present invention.

Claims

preparing a first semiconductor region of an n-GaN series and a second semiconductor region of an n-GaN series on a substrate;

Performing an electrolytic etching using the first semiconductor region and the second semiconductor region as an anode and an electrolyte containing oxalic acid as a cathode; And

The first semiconductor region and the second semiconductor region is a selective etching method of the semiconductor region by controlling the doping concentration differently, the etching rate is different.

preparing a first semiconductor region of the n-GaN series and a second semiconductor region of the n-GaN series in which an etching accelerator layer is provided; And

And performing an electrolytic etching using the first semiconductor region and the second semiconductor region as an anode and an electrolyte containing oxalic acid as a cathode.

The method of claim 2,

The etching accelerator layer is a selective etching method of a semiconductor region formed by the oxidation treatment, impurity treatment or exposure to air in the middle of forming the second semiconductor region.

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The method according to any one of claims 1 to 3,

A selective etching method of a semiconductor region, characterized in that the undoped GaN-based semiconductor layer is formed between the first semiconductor region and the second semiconductor region.

The method according to any one of claims 1 to 3,

The undoped GaN-based semiconductor layer is a selective etching method of the semiconductor region, characterized in that the stacked structure in contact with the first semiconductor region.

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