KR100926127B1 - Real-time stereo matching system by using multi-camera and its method - Google Patents

Abstract

The present invention relates to a real-time three-dimensional image registration system and a method using a plurality of cameras, by matching the three-dimensional image in real time by accurately extracting the three-dimensional distance information even for thin objects away from the background using a plurality of cameras, The reliability of the value can be improved. In addition, by reducing the noise in the horizontal direction to more accurately measure the three-dimensional distance information and shape information of the observation space, it is possible to obtain a more stable distance image when applied to industrial sites, it can be applied to many applications as a compact device.

Multiple Cameras, Buffers, Encoders, Processing Elements

Description

Real-time stereoscopic image registration system using multiple cameras and its method {REAL-TIME STEREO MATCHING SYSTEM BY USING MULTI-CAMERA AND ITS METHOD}

The present invention relates to a real-time stereoscopic image registration system using a plurality of cameras and a method thereof, and more particularly, to a measurement system for finding a corresponding point in real time in a plurality of scan lines of a plurality of images to find the position and shape of an object in space. In addition, the present invention relates to a system and method for accurately matching three-dimensional images in real time by extracting three-dimensional distance information from a thin object away from a background.

As is well known, the real time stereoscopic image processing system employs a processor based on stereo matching. In this case, a process of re-creating three-dimensional spatial information from a pair of two-dimensional images, as shown in the geometric matching diagram of the stereo matching, is called stereo matching.

That is, referring to FIG. 1, a method of finding left and right pixels corresponding to the same position (X, Y, Z) in three-dimensional space in an image line on an epipolar line of left and right images is used. do. The binocular difference for the corresponding pixel pair is represented by Equation 1

d = x ^r -x ^l

Is calculated as

The geometrical characteristic calculated from these binocular differences is called Depth, Z. In other words, the binocular car includes distance information. Therefore, when the binocular difference value is calculated in real time from the input image, three-dimensional distance information and shape information of the observation space can be measured.

As a conventional technique employing the processor as described above, a research paper [Uemsh R. Dhond and J. K. Aggarwal. Structure from Stereo-a review. IEEE Transactions on Systems, Man, and Cybernetics, 19 (6): 553-572, nov / dec 1989] describe the basics of stereo matching. In addition, a stereo matching technology implementing the same is disclosed in a real-time stereoscopic image matching system (Korean Patent Application No. 2000-41424).

On the other hand, such a real-time three-dimensional image matching system is a visual function of the robot in the industrial field, it recognizes the road in the driverless car, it can be used for the production of three-dimensional maps using satellite, and in the home appliance field used for the visual device of the toy robot Can be.

However, when using a conventional system such as the background technology operated as described above, when a thin object on a background having a lot of information exists at a distance, the background information does not extract the three-dimensional distance value of the front object. In some cases, only the 3D distance value of the background may be extracted.

In addition, since only two cameras are used, the reliability of the matching value is not high, which causes a problem of generating horizontal noise.

Accordingly, the technical problem of the present invention is to solve the problems described above, by accurately extracting the three-dimensional distance information even for a thin object away from the background using a plurality of cameras to match the stereoscopic image in real time , Real-time stereoscopic image registration system and method using multiple cameras that can improve the reliability of matching value and reduce noise in horizontal direction to measure 3D distance information and shape information of observation space more accurately. do.

According to an aspect of the present invention, a real-time stereoscopic image matching system using a plurality of cameras includes an image processing unit for digitally converting and providing a plurality of image signals photographed by each of the plurality of cameras, and a plurality of digital images input from the image processing unit. A plurality of input buffers extracting and rearranging pixel data and rearranged cyclic pixel data are sequentially input to match images using the previously processed binocular difference value of the upper line, and then output a decision value or binocular difference value. And an encoder for receiving a binocular difference value or a decision value, encoding the signal, and outputting the encoded signal to a user system.

According to another aspect of the present invention, a real-time stereoscopic image matching method using a plurality of cameras extracts and rearranges interpixel data through a plurality of input buffers for a plurality of digital images photographed and digitally converted by each of the plurality of cameras. Outputting a determination value or a binocular difference value after matching an image using the binocular difference value of the upper line previously processed by a processing element sequentially receiving rearranged interpixel data from a plurality of input buffers; And encoding the binocular difference value or the determined value in a differential coding scheme in an encoder received from the processing element and outputting the binocular difference value or the determined value to the user system.

According to the present invention, by using a plurality of cameras to accurately extract 3D distance information even for a thin object away from the background and matching stereoscopic images in real time, reliability of the matching value can be improved and horizontal noise can be reduced. In this way, three-dimensional distance information and shape information of the observation space can be measured more accurately.

In addition, the present invention is a three-dimensional spatial measurement system that is robust against noise by using geometrical constraints between the image lines on the epipolar line of multiple cameras while using high-speed parallel processing matching technique and high compression rate encoding technique. When applied to a more stable distance image can be obtained and as a small device has the effect that can be competitively applied to various applications.

Hereinafter, the operating principle of the present invention will be described in detail with reference to the accompanying drawings. In the following description of the present invention, when it is determined that a detailed description of a known function or configuration may unnecessarily obscure the subject matter of the present invention, the detailed description thereof will be omitted. Terms to be described later are terms defined in consideration of functions in the present invention, and may be changed according to intentions or customs of users or operators. Therefore, the definition should be made based on the contents throughout the specification.

2 is a block diagram of a systolic architecture for image registration using a plurality of cameras according to an embodiment of the present invention, and includes a plurality of cameras 10-1,..., 10-n and an image processor 20. The multi-camera image matcher 30 and the user system 40 are included.

Each of the plurality of cameras 10-1,..., 10-n photographs an image of an object and provides the image to the image processor 20.

The image processor 20 is a multi-camera stereo matching unit for a plurality of image data obtained by digitally converting an image signal of an object input from each of the plurality of cameras 10-1,..., 10-n. Matching Part 30). In addition, the image processor 20 stores the plurality of digitally converted image data in the storage S1.

The multi-camera image matching unit 30 sequentially receives image line pixel data on the same epipolar line of N digital images input from the image processing unit 20, calculates binocular difference values, and outputs the calculated values to the user system 40. As shown in FIG. 3, a plurality of input buffers 31-1, ... 31-n, a processing element unit 33, and an encoder 35 are provided. Here, the user system 40 uses distance data by binocular difference provided from the multi-camera image matching unit 30. Here, the process of outputting the calculated binocular difference value to the user system 40 is repeatedly performed on the image lines on all the epipolar lines of the plurality of images.

The plurality of input buffers 31-1,..., 31-n are blocks for extracting and rearranging interpixel data from a plurality of digital images input from the image processor 20. As described above, the control box 31a generates an enable signal and a pixel index for determining whether each flip-flop receives the pixel data and provide them to the calculator 31d and the D-flip-flops 31b and 31c, respectively. And each pixel value is stored based on the enable signal input from the control box 31a and weighted to each pixel according to the pixel index input from the control box 31a while having the pixel value. D-flip-flops (Registers 31b, 31c) provided to the calculation unit 31d, the pixel index input from the control box 31a, and two pixel values input from the D-flip-flops 31b, 31c. To give processing elements to Add the value and divide it (e.g. division is expressed as the sum of the two previous weights, dividing by 2, 4, 8 can be implemented by removing 1, 2, 3 bits from the LSB). It consists of the calculation part 31d provided to the processor 33a. Here, the D-flip flops 31b and 31c are made up of registers, and the calculator 31d is made up of a multiplier, an adder, and a divider.

The processing element unit 33 can replicate in the form of a linear array up to a specified maximum binocular difference, and each processing element can exchange information with neighboring processing elements, and the structure operates at the maximum speed without limit to the number of processing elements. And a block that sequentially receives rearranged interpixel data and matches images using the previously processed binocular difference value of the upper line, and then outputs a determined value or binocular difference value. Lattice queue (eg, stack) 33b and back processor 33c.

The front processor 33a receives an appropriate pixel value from the image line on each epipolar line of the plurality of images by the clock t, and the determination value V _{t, j} (where V _{t, j} is the _t-th of the j-th processing element). Is a block that calculates the decision value stored in the lattice queue 33b in the front processor 33a in the clock and stores the decision value V _{t, j} in the lattice queue 33b, as shown in FIG. An absolute value calculator 33aa that calculates a matching cost based on the absolute value of the difference (e.g. subtraction) between the two pixel data values, and the cumulative cost U _{j +} of the adjacent processing elements of the previous upper, middle and lower positions. Receive ₁ (t-1), U _j (t-1), U _j-1 (t-1), and determine the minimum value between the data recursed from the flip-flop 33ad and summed to the absolute value calculator data And at the same time indicate whether the path of the smallest cost is from upper (1), middle (0), or lower (-1). Is the current that is input from the absolute value calculator (33aa) on the results received from the multiplexer (33ab) and a multiplexer (33ab) to provide each of the determination value V _t, the adder takes the _j (33ac) and the grid queue (33b) Cost Adder 33ac for calculating the cumulative cost of the current element and providing it to the flip-flop 33ad, and flip-flop 33ad for waiting the current cumulative cost input from the adder 33ac without outputting to the next clock. consist of. Here, the output data is stored in the lattice queue 33b which is a stack and U _j (t-1) for delivering the cumulative cost of the current position element of t-1 time to the up and down elements of time t-1, and then the rear processor 33c. ), V _{t, j} (-1,0,1). And U _j (t) is the cost register value of the front processor 33a at the t th clock of the j th processing element.

The grid queue 33b stores the output data input from the front processor 33a and then transfers V _{t, j} (−1,0,1) to the rear processor 33c.

The rear processor 33c calculates an optimal binocular difference value by calculating a decision value read from the grid queue 33b and outputs the binocular difference value to the encoder 35 by a clock, as shown in FIG. 6. Activation signal a _j-1 (t-1) δ (1-V _{t-1, j-1} ) of the j + 1, j-1 th rear processor input from an adjacent processing element on the layer at time _t-1 Activation signal a _j (t-1) δ (V _t− ) recursed from the output of _{j + 1} (t-1) δ (1 + V _{t-1, j + 1} ) and the demultiplexer (33cc) of the j th rear processor _{1, j} ) receives a _j (t) (where a _j (t) is the active bit value of the rear processor 33c at the t-th clock of the j-th processing element) that is logically matched to the OR-characteristic. OR gate for outputting a D- flip-flop (33cb) (Or Gate) ( 33ca) and the output value is output as a temporary storage for the output value (a _j (t)) input from the OR gate (33ca) (a _j (t- 1)) buffer (33cd) 1-bit active D-flip-flop 33cb provided to and demultiplexer 33cc, and output value a _j (t-1) input from D-flip-flop 33cb, respectively. Determination value inputted from ((V _{t-1, j} ): V stored at the current matching point is called V _{t, j} ) (that is, the path stored at the previous matching point, V _t Demultiplexer (33cc) which outputs an activation signal for rearward processing to an adjacent rear processor according to the direction of giving a _{t-1, j} using _{-1, j} ), It consists of a three-state buffer 33cd outputting the determined value V _{t, j} to the encoder 35 according to the value a _j (t-1) input from the D-flip flop 33cb. When the input value is '1', the tri-state buffer 33cd outputs the input value as it is. desirable.

As shown in FIG. 7, the encoder 35 adds a determination value input from the rear processor 33c to become an angular difference value. Since the angular difference value is slowly changed by the change of the determined value, differential coding is performed to increase the compression ratio. In this manner, encoding is performed, for example, without using a binocular difference value which is a form of a decision value input from the rear processor 33c, and using the decision value as it is.

That is, referring to FIG. 7, two determination values require 4 bits, but when unnecessary data is processed and encoded, only 3 bits can be expressed, and one number is assigned as a flag. It is allowed to be used as flag data, and at the same time, the binocular difference data is compressed into two bits, and the two binocular signals are compressed into three bits, and the three-bit difference is further compressed. In more detail, the decision value indicates the change in the path. For example, 01 is a dummy bit because it requires three things such as 01 is upward, 10 is downward, and 00 is no path change. In terms of the two decision values, 0110 and 1001 can be considered as 0000 because they are geometrically unlikely cases. Therefore, the high compression ratio can be obtained by reducing the differential coding technique and unnecessary branch number by considering the characteristics of the output binocular difference.

Meanwhile, referring to FIG. 8, as an example, when the camera has three input buffers, the pixel value is input once every two clocks, and the D-flip flops 31b and 31c are always enabled and the D- Flip-flops 31b and 31c are enabled one clock after the pixel value changes.

9 illustrates the pixel data value input portion of FIG. 11 as an example when three cameras are used. That is, for each element, images of cameras 1, 2, and 3 are entered, and camera 1's video is sequentially sequentially from the low disparity element, and camera 3's video is sequentially descending from the high discrete element. Will come in.

와 같은 픽셀값이 들어오고 이 값들 사이에서 차(예컨대, 뺄셈)의 절대값을 코스트로 내어준다.10 shows an example of the front processor 33a when there are three cameras in FIG. To part calculating cost

A pixel value, such as, comes in and gives the cost of the absolute value of the difference (eg, subtraction) between these values.

의 인덱스에 맞추어 들어가게 된다.(여기서, D는 디스페리티 레벨(무한히 멀(z=∞) 경우 D=0이고 가장 가까울 때 D=M(최대 디스페리티 레벨)임)이고, N은 카메라(영상)의 개수이며, x_i는 i번째 카메라의 해당 스캔라인에서 어느 픽셀값이 들어가야 할 지를 나타내는 인덱스이며, x_c는 중앙 카메라의 인덱스이며, 이 값은 결과 디스페리티의 인덱스와 동일하다.) 이에 따라 중앙카메라가 존재 하지 않더라도 결과 디스페리티의 인덱스를 나타내기 위하여 x_c인덱스를 x_i인덱스로 구하기 위한 기준으로 사용한다. 이 하드웨어 구조에서는 한 개의 프로세싱 엘리먼트 어레이가 시간(t)에 따라서 병렬 형태로 계 산을 수행하며, 시간(t)이 두번 증가할 때(예컨대, 두 클럭(clk)후에) 하나의 디스페리티 인덱스에 대한 결과를 내어준다. 즉,

와 같이 된다. 이것을 프로세싱 엘리먼트 어레이에 적용시키면 시간(t), j번째 엘리먼트에서 i번째 카메라는

(여기서, x_i는 t번째 클럭에서의 i번째 카메라의 j번째 프로세싱 엘리먼트의 영상 레지스터 값 즉, 결과값은 인덱스의 사이픽셀(interpixel) 값이다.) 와 같은 인덱스를 얻을 수 있다. 전방 프로세서(fp)에는 이 인덱스의 픽셀값이 들어가게 된다. 프로세싱 엘리먼트의 동작관계는 N개 카메라영상의 각 에피폴라 선상에서 영상 라인의 픽셀이 각각 하나씩 총 N개가 입력된다. 이웃한 프로세싱 엘리먼트 간에는 코스트 값(U)을 서로 주고 받으며, 스택에게 t-1엘리먼트 중 j-1, j, j+1중 최소코스트를 가진 엘리먼트에 대한 방향값을 -1,0,1로 나누어 내어준다. 즉, 어디에서 코스트를 이어받는지를 알려주는것이다.FIG. 11 is a diagram illustrating a processing element array structure. Referring to FIG. 11, there is shown an array of processing elements for any N cameras in which the entire element consists of M, each element having the same structure. Each element consists of a forward processor (fp), a stack, and a backward processor (bp). The front processor of each element has N pixels of video

(Where D is the disparity level (D = 0 for infinitely far (z = ∞) and D = M (maximum disparity level) when closest), and N is the camera ( X _i is an index indicating which pixel value should be included in a corresponding scan line of the i-th camera, x _c is an index of the center camera, and this value is equal to the index of the resulting disparity. Therefore, even if the central camera does not exist, the x _c index is used as a reference to obtain the x _i index to indicate the index of the result disparity. In this hardware architecture, one array of processing elements performs calculations in parallel over time t, and one disparity index when time t increases twice (e.g. after two clocks clk). Gives the result of In other words,

Becomes Applying this to the array of processing elements, time (t), the i th camera in the j th element

Where x _i is the image register value of the j th processing element of the i th camera at the t th clock, i.e., the result value is the interpixel value of the index. The front processor fp enters the pixel value of this index. As for the operation relationship of the processing elements, a total of N pixels, one pixel of an image line, is input on each epipolar line of N camera images. The neighboring processing elements exchange cost values (U) with each other and divide the direction value for the element with the lowest cost of j-1, j, j + 1 among t-1 elements into -1, 0, 1 in the stack. Give out. In other words, it tells you where to take over the cost.

Meanwhile, FIG. 12 is a diagram illustrating that all of the processing elements from 0 to M-1 are performed in parallel when the clock t is performed from 1 to 2 (M-1). That is, when the processing elements are initialized (S1201) as shown in FIG. 12 and N camera image pixels are sequentially input (S1203), the j th processing element is processed (S1205), for example, within the processing element. A front processor 33a which processes interpixel information of the currently input image line and a rear processor which reads and processes the decision value processed by the front processor 33a for the previous line from the grid queue 33b ( If it is not performed by determining whether 33c) is continuously performed up to 2 (M-1) (S1207), if it is not performed, it increases to t = t + 1 (S1209) and proceeds to step S1203. On the other hand, if performed, the performed result is provided to the encoder 35 (S1211).

In other words, the multi-camera cost in the front processor 33a is expressed by Equation 2

Is operated so that the influence of the entire camera is evenly applied to the cost.

_i는 t번째 클럭에서의 i번째 카메라의 j번째 프로세싱 엘리먼트의 영상 레지스터 값 즉, 결과값은 인덱스의 사이픽셀(interpixel) 값이며, V_t,j는 j번째 프로세싱 엘리먼트의 t번째 클럭에서 전방 프로세서(33a)에서 격자 큐(33b)로 저장된 결정값이며, a_j(t)는 j번째 프로세싱 엘리먼트의 t번째 클럭에서의 후방 프로세서(33c)의 활성 비트값이며, a_j+p(t-1)δ(p+V_t-1,j+p)는 인접한 프로세싱 엘리먼트에 전달되는 후방 프로세서용 활성 신호로서 p=1 이면 상위 프로세싱 엘리먼트, p=-1 이면 하위 프로세싱 엘리먼트 방향을 나타내며,

는 t번째 클럭에서 양안차값을 나타내며, γ는 알고리즘 시작시 셋팅된 어클루젼 코스트값을 나타내며, M은 영상의 열의 픽셀 개수(예컨대, 1024x768의 영상에서 M=1024)이며,

는 함수 func(x)를 최소화하는 파라미터 x를 출력한다. Where U _j (t) is the cost register value of the front processor 33a at the t th clock of the j th processing element,

_i is the image register value of the j-th processing element of the i-th camera at the t-th clock, that is, the interpixel value of the index, and V _{t, j} is the forward processor at the t-th clock of the j-th processing element. A determination value stored in the lattice queue 33b at 33a, a _j (t) is the active bit value of the back processor 33c at the t th clock of the j th processing element, and a _{j + p} (t-1 ) (p + V _{t-1, j + p} ) is an active signal for the rear processor to be transmitted to an adjacent processing element, where p = 1 indicates an upper processing element, p = -1 indicates a lower processing element direction,

Represents a binocular difference value at the t-th clock, γ represents an occlusion cost value set at the start of the algorithm, M is the number of pixels in the column of the image (e.g., M = 1024 in an image of 1024x768),

Outputs a parameter x that minimizes the function func (x).

As described above, the present invention uses the plurality of cameras to accurately extract three-dimensional distance information even on a thin object away from the background and match stereoscopic images in real time, thereby improving reliability of the matching value and horizontally. By reducing the noise in the direction, it is possible to measure the 3D distance information and the shape information of the observation space more accurately. Also, it uses the high-speed parallel matching method and the high-compression encoding method, and simultaneously inputs the epipolar line of the multiple cameras. It is a noise-resistant three-dimensional spatial measurement system using geometrical constraints between lines to obtain more stable distance images when applied to industrial sites, and it is a compact device that can be competitively applied to various applications.

Meanwhile, in the detailed description of the present invention, specific embodiments have been described, but various modifications are possible without departing from the scope of the present invention. Therefore, the scope of the present invention should not be limited to the described embodiments, but should be defined not only by the scope of the following claims, but also by those equivalent to the scope of the claims.

1 is a structural diagram of stereo matching;

2 is a block diagram of a systolic architecture for image registration using multiple cameras according to an embodiment of the present invention;

FIG. 3 is a detailed block diagram of a multi-camera image matching unit shown in FIG. 2;

4 is a detailed block diagram of a plurality of input buffers shown in FIG. 3;

FIG. 5 is a detailed block diagram of the front processor shown in FIG. 3;

6 is a detailed block diagram of a rear processor shown in FIG. 3;

FIG. 7 is a diagram for describing the encoder illustrated in FIG. 3;

8 is an exemplary view when there are three cameras;

9 is an exemplary diagram when three cameras use the pixel data value input portion of FIG. 11;

FIG. 10 is a diagram illustrating an example of a front processor when three cameras are illustrated in FIG. 9;

11 is a diagram illustrating a processing element array structure;

FIG. 12 shows that all 0 through M-1 processing elements are performed in parallel when clock t is performed from 1 to 2 (M-1).

<Description of the symbols for the main parts of the drawings>

10-1, ..., 10-n: Multiple cameras 20: Image processor

30: multi-camera video matching unit 40: user system

S1: storage

Claims (14)

An image processing unit for converting and providing a plurality of image signals photographed by each of the plurality of cameras digitally; A plurality of input buffers for extracting and rearranging interpixel data from a plurality of digital images input from the image processor; In the plurality of digital images, a plurality of pixel values are input to an image line on each epipolar line, a decision value is calculated using a front processor, the calculated decision values are stored in a lattice queue, and the decision values stored in the lattice queue. A reading element to calculate a binocular difference value and output the calculated binocular difference value by a clock using a rear processor; An encoder unit which receives the binocular difference value, encodes it, and outputs it to a user system. Real-time stereoscopic image registration system using a plurality of cameras including a. The method of claim 1, Each of the plurality of input buffers, A control box for generating an enable signal and a pixel index for determining whether each flip-flop receives pixel data; Two D-flip-flops that store one pixel value based on the enable signal input from the control box and weight each pixel according to the pixel index input from the control box in the state having the pixel value. and, Using a pixel index input from the control box and two pixel values input from the two D-flip-flops, a multiplier, an adder, and a divider are used to give a pixel value to the processing element unit. Calculation unit that calculates by adding and dividing by using Real-time stereoscopic image registration system using a plurality of cameras including a. The method of claim 2, The D-flip-flop is a real-time stereoscopic image registration system using a plurality of cameras, characterized in that the register (Register). delete delete The method of claim 1, The front processor, An absolute value calculator for calculating a matching cost through the absolute value of the subtraction between the plurality of pixel values; A multiplexer which receives a cumulative cost of adjacent processing elements from the absolute value calculator, determines a minimum value of recursive values from a flip-flop, obtains and outputs a decision value representing a path of least cost, and An adder for calculating a cumulative cost by adding a matching cost calculated by the absolute value calculator to a decision value input from the multiplexer; Flip-flop to wait the calculated cumulative cost without sending out until the next clock Real-time stereoscopic image registration system using a plurality of cameras including a. The method of claim 1, The rear processor, A logic sum element configured to receive an activation signal input from an adjacent processing element and an activation signal recursively received from a demultiplexer, and output the logic sum according to a logic sum characteristic; A flip-flop for temporarily storing and outputting an output value input from the logical sum element; A demultiplexer for outputting an activation signal for adjacent rear processing according to the output value input from the flip-flop from the grid queue; A buffer for outputting a decision value input from the lattice queue according to an output value output by the flip-flop Real-time stereoscopic image registration system using a plurality of cameras including a. The method of claim 7, wherein And the buffer outputs the input value &quot; 1 &quot; as it is when the input value is '1', and otherwise does not output the high-impedance state. The method of claim 1, The encoder unit, real-time stereoscopic image registration system using a plurality of cameras, characterized in that using a differential coding scheme. A method for real-time stereoscopic image registration in a system comprising a plurality of input buffers, processing elements and encoders, (a) extracting and rearranging interpixel data through the plurality of input buffers for a plurality of digital images photographed and digitally converted by each of a plurality of cameras; (b) receiving a plurality of pixel values from an image line on each epipolar line in the plurality of digital images, calculating a decision value using a front processor, storing the calculated decision value in a lattice queue, and storing the determined value in the lattice queue Reading the stored determination value, calculating a binocular difference value, and outputting the calculated binocular difference value by a clock using a rear processor; (c) encoding the binocular difference value using a differential coding method and outputting the binocular difference value to a user system Real-time stereoscopic image registration method using a plurality of cameras including a. delete The method of claim 10, In step (b), (b11) calculating a matching cost through the absolute value of the subtraction between the plurality of pixel values through an absolute value calculator in the processing element; (b12) determining a cumulative cost of the neighboring processing elements from the absolute value calculator and determining the minimum value of the recursive values from the flip-flop, obtaining a decision value representing the smallest cost path, and outputting the determined value to the adder; (b13) calculating a cumulative cost by adding the determined value and the calculated matching cost in the adder and outputting the cumulative cost to the lattice queue; Real-time stereoscopic image registration method using a plurality of cameras including a. The method of claim 10, In step (b), (b31) receiving an activation signal input from an adjacent processing element and an activation signal recursively received from a demultiplexer, and outputting the result of performing an OR operation according to an OR function; (b32) outputting an activation signal for adjacent rear processing according to the determined value inputted from the grid queue by the output value inputted by the OR; (b33) outputting the determined value input from the lattice queue according to the output value inputted with the OR; Real-time stereoscopic image registration method using a plurality of cameras including a. The method of claim 10, In step (a), (a1) generating an enable signal and a pixel index operated by the input buffer and determining whether each flip-flop receives pixel data; (a2) storing one pixel value based on the enable signal and weighting each pixel according to the pixel index in the state having the pixel value; (a3) calculating a pixel value to be given to a processing element using the pixel index and the pixel value by adding and dividing the result by using a multiplier, an adder, and a divider Real-time stereoscopic image registration method using a plurality of cameras including a.

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