KR100924740B1 - Signal line drive circuit and light emitting device - Google Patents

Abstract

The present invention relates to a technique for suppressing the influence of variations in the characteristics of transistors in a signal line driver circuit. The signal line driver circuit is provided with a first current source circuit 437 and a second current source circuit 438 each having a capacitor and a supply means. In accordance with the sampling pulse supplied from the shift register 418 and the latch pulse supplied from the outside, the capacitor means converts the current obtained by adding the current supplied from each of the n video signal constant current sources 109 to a voltage, The supply means supplies current according to the converted voltage, thereby outputting current according to the video signal regardless of the characteristics of the transistor. The current values supplied from the n video signal constant current sources are set to 2 ⁰ : 2 ¹ :... 2 ⁿ , and gray scales can be expressed.

Signal line, driving circuit, light emitting device, image, display device, pixel, gradation, light emitting element

Description

SIGNAL LINE DRIVE CIRCUIT AND LIGHT EMITTING DEVICE}             

The present invention relates to the description of a signal line driver circuit. The present invention also relates to a light emitting device having the signal line driver circuit.

In recent years, development of the display apparatus which displays an image is progressing. As the display device, a liquid crystal display device that displays an image using a liquid crystal element is widely used, taking advantage of advantages such as high quality, thin shape, and light weight.

On the other hand, the development of a light emitting device using a light emitting element that is a self-luminous element is also in progress. In addition to the advantages of the conventional liquid crystal display, the light emitting device has features such as fast response speed, low voltage, low power consumption, and the like, which are suitable for moving picture display, and has attracted much attention as a next generation display.

As the gradation representation method when displaying a multi-gradation image on the light emitting device, there are analog gradation method and digital gradation method. The former analog gradation method is a method of obtaining gradation by analogously controlling the magnitude of the current flowing through the light emitting element. The latter digital gradation method is a method in which the light emitting element is driven only in two states, an on state (a state at which the luminance is almost 100%) and an off state (a state at which the luminance is almost 0%). In the digital gradation system, since only two gradations can be displayed as it is, a method of displaying an image of multi gradation in combination with another system has been proposed.

As a driving method of a pixel, a voltage input method and a current input method are classified into the types of signals input to the pixels. The former voltage input method is a method of inputting a video signal (voltage) input to a pixel to a gate electrode of a driving element, and controlling the luminance of the light emitting element using the driving element. In the latter current input method, the luminance of the light emitting element is controlled by flowing the set signal current through the light emitting element.

Here, an example of a circuit of a pixel in a light emitting device to which the voltage input method is applied and a driving method thereof will be briefly described with reference to Fig. 16A. The pixel illustrated in FIG. 16A includes a signal line 501, a scanning line 502, a switching TFT 503, a driving TFT 504, a capacitor 505, a light emitting element 506, and a power source 507, 508. Have

When the potential of the scanning line 502 is changed and the switching TFT 503 is turned on, the video signal input to the signal line 501 is input to the gate electrode of the driving TFT 504. According to the potential of the input video signal, the voltage between the gate and the source of the driving TFT 504 is determined, and the current flowing between the source and the drain of the driving TFT 504 is determined. This current is supplied to the light emitting element 506, and the light emitting element 506 emits light.

As the semiconductor device for driving the light emitting device, a polysilicon transistor is used. However, polysilicon transistors tend to cause variations in electrical characteristics such as thresholds and on currents due to defects at grain boundaries. In the pixel shown in Fig. 16A, when the characteristics of the driving TFT 504 vary from pixel to pixel, even when the same video signal is input, the magnitude of the drain current of the driving TFT 504 is different, so that the light emitting element The luminance at 506 varies.

In order to solve the above problem, a desired current may be supplied to the light emitting element without depending on the characteristics of the TFT for driving the light emitting element. In view of this, a current input method has been proposed which can control the magnitude of the current supplied to the light emitting element without being influenced by the characteristics of the TFT.

Next, an example of a circuit of a pixel and a driving method thereof in a light emitting device to which the current input method is applied will be briefly described with reference to FIGS. 16B and 17. The pixel illustrated in FIG. 16B includes a signal line 601, first to third scan lines 602 to 604, a current line 605, TFTs 606 to 609, a capacitor 610, and a light emitting element 611. . The current source circuit 612 is arranged in each signal line (each column).

17, the operation from recording of video signals to light emission will be described. In FIG. 17, the code | symbol which shows each part corresponds to FIG. 17A to 17C schematically show paths of current. Fig. 17D shows the relationship between the currents flowing through the respective paths at the time of recording the video signal, and Fig. 17E is similarly the voltage stored in the capacitor 610 at the time of recording the video signal, that is, the gate of the TFT 608. Indicates the voltage between the sources.                 

First, pulses are input to the first and second scan lines 602 and 603, and the TFTs 606 and 607 are turned on. At this time, the current flowing through the signal line 601 denotes the signal current as Idata. Since the signal current Idata flows in the signal line 601, as shown in FIG. 17A, the current path is separated into I1 and I2 in the pixel. Although these relationships are shown in Fig. 17D, needless to say, Idata = I1 + I2.

At the moment when the TFT 606 is turned on, since the charge is not held in the capacitor 610, the TFT 608 is turned off. Therefore, I2 = 0 and Idata = I1. During this period, current flows between the positive electrodes of the capacitor 610, and charge is accumulated in the capacitor 610.

Then, charge gradually accumulates in the capacitor 610, and a potential difference starts between the two electrodes (Fig. 17E). When the potential difference between the positive electrodes reaches Vth (Fig. 17E, point A), the TFT 608 is turned on to generate I2. As described above, since Idata = I1 + I2, I1 gradually decreases, but current still flows, and the capacitor 610 further accumulates charges.

In the capacitor 610, charge accumulation continues until the potential difference between the two electrodes, that is, the voltage between the gate and the source of the TFT 608, reaches a desired voltage. In short, charge accumulation continues until the TFT 608 becomes a voltage sufficient to flow the current of Idata. After the charge accumulation ends (Fig. 17E, point B), the current I1 does not flow. In addition, since the TFT 608 is completely on, Idata = I2 (Fig. 17B). By the above operation, the signal writing operation for the pixel is completed. Finally, the selection of the first and second scan lines 602 and 603 ends, and the TFTs 606 and 607 are turned off.                 

Subsequently, a pulse is input to the third scanning line 604, and the TFT 609 is turned on. In the capacitor 610, since the VGS previously recorded is held, the TFT 608 is turned on, and a current similar to Idata flows from the current line 605. As a result, the light emitting element 611 emits light. At this time, if the TFT 608 is operated in the saturation region, even if the source-drain voltage of the TFT 608 changes, the light-emitting current IEL flowing through the light-emitting element 611 will flow unchanged.

As described above, the current input method refers to a method in which the drain current of the TFT 609 is set to have the same current value as the signal current Idata set in the current source circuit 612, and the light emitting element 611 emits light at the luminance corresponding to the drain current. . By using the pixel of the said structure, the influence of the characteristic fluctuation | variation of the TFT which comprises a pixel can be suppressed, and a desired electric current can be supplied to a light emitting element.

In the light emitting device using the current input method, however, the signal current corresponding to the video signal must be inputted correctly to the pixel. However, when the signal line driver circuit (corresponding to the current source circuit 612 in Fig. 16), which plays a role of inputting the signal current to the pixel, is formed of a polysilicon transistor, the characteristics thereof change, so that the signal current also changes. .

In short, in the light emitting device to which the current input method is applied, it is necessary to suppress the influence of the characteristic variation of the TFTs constituting the pixel and signal line driver circuits. However, by using the pixel of the structure shown in FIG. 16B, although it is possible to suppress the influence of the characteristic variation of the TFT which comprises a pixel, it becomes difficult to suppress the influence of the characteristic variation of the TFT which comprises a signal line drive circuit. .

Thus, the configuration and operation of the current source circuit disposed in the signal line driver circuit for driving the pixel of the current input method will be briefly described with reference to FIG.

The current source circuit 612 in Figs. 18A and 18B corresponds to the current source circuit 612 shown in Fig. 16B. The current source circuit 612 includes constant current sources 555 to 558.

The constant current sources 555 to 558 are controlled by signals input through the terminals 551 to 554. The magnitudes of the currents supplied from the constant current sources 555 to 558 are different, and the ratio is set to be 1: 2: 4: 8.

18B is a diagram showing the circuit configuration of the current source circuit 612, and the constant current sources 555 to 558 in the figure correspond to transistors. The on-currents of the transistors 555 to 558 are 1: 2: 4: 8 due to the ratio (1: 2: 4: 8) of the L (gate length) / W (gate width) values. The current source circuit 612 can then control the magnitude of the current in steps 2 ⁴ = 16. In short, a current having an analog value of 16 gradations can be output for a 4-bit digital video signal. At this time, the current source circuit 612 is formed of a polysilicon transistor and integrally formed on the same substrate as the pixel portion.

As described above, a signal line driver circuit incorporating a current source circuit has been proposed in the related art. (See Non-Patent Documents 1 and 2, for example.)

In the digital gradation method, a method in which a digital gradation method and an area gradation method are combined (hereinafter, referred to as an area gradation method) or a combination of a digital gradation method and a time gradation method (hereinafter, referred to as a time gradation method) in order to express an image of multi gradation. Notation). The area gradation method divides one pixel into a plurality of subpixels, and selects light emission or non-emission in each subpixel, so that the gray level has a difference between the area emitted from one pixel and the area other than that. It is a way of expression. The time gradation method is a method of expressing gradation by controlling the time that the light emitting element emits light. Specifically, the frame period is divided into a plurality of subframe periods having different lengths, and light emission or non-emission of the light emitting elements in each period is selected, thereby having a difference in the length of time emitted in one frame period. Express In the digital gradation method, a method of combining a digital gradation method and a time gradation method (hereinafter referred to as a time gradation method) has been proposed in order to express a multi-gradation image. (See Patent Document 1, for example.)

[Non-Patent Document 1]

Hattori Rage, et al., 3 Theological Bulletin, ED2001-8, Circuit Simulation of Current-Specified Polysilicon TFT Active Matrix Drive Organic LED Display, p. 7-14

[Non-Patent Document 2]

Reiji Hetal., AM-LCD'01, OLED-4, p. 223-226

[Patent Document 1]

Japanese Patent Laid-Open No. 2001-5426

(Initiation of invention)

The current source circuit 612 described above sets the on-current of the transistor to be 1: 2: 4: 8 by designing the L / W value. However, in the transistors 555 to 558, variations in the gate length, the gate width, and the film thickness of the gate insulating film caused by the fabrication process or the difference between the substrates to be used overlap, causing variations in the threshold value and mobility. Therefore, it is difficult to make the on-state currents of the transistors 555 to 558 exactly 1: 2: 4: 8 as designed. In other words, the column causes variation in the current value supplied to the pixel.

In order for the on-currents of the transistors 555 to 558 to be exactly 1: 2: 4: 8 as designed, the characteristics of the current source circuits in all columns need to be the same. In other words, although the characteristics of the transistors of the current source circuit of the signal line driver circuit must all be the same, in practice, they are very difficult.

SUMMARY OF THE INVENTION The present invention has been made in view of the above problems, and provides a signal line driver circuit capable of suppressing the influence of characteristics variation of a TFT and supplying a desired signal current to a pixel. Further, the present invention can suppress the influence of the characteristic variation of the TFTs constituting both the pixel and the driving circuit by supplying the pixel with the circuit configuration in which the influence of the characteristic variation of the TFT is suppressed, so that the desired signal current can be supplied to the light emitting element. It provides a light emitting device.

The present invention provides a signal line driver circuit of a new configuration in which an electric circuit (herein referred to as a current source circuit) for flowing a desired constant current that suppresses the influence of a characteristic variation of a TFT is provided. In addition, the present invention provides a light emitting device having the signal line driver circuit.

The present invention provides a signal line driver circuit in which a current source circuit is arranged in each column (each signal line or the like).                 

In the signal line driver circuit of the present invention, the signal current is set in the current source circuits arranged in the respective signal lines by using the constant current source for the video signal. The current source circuit in which the signal current is set has the ability to flow a current proportional to the constant current source for the video signal. Therefore, by using the current source circuit, the influence of the characteristic variation of the TFTs constituting the signal line driver circuit can be suppressed.

At this time, the constant current source for video signal may be formed integrally with the signal line driver circuit on the substrate. Alternatively, the current may be input using an IC or the like from the outside of the substrate as the current for the video signal. In this case, as a video signal current, a constant current or a current corresponding to the video signal is supplied from the outside of the substrate to the signal line driver circuit.

The outline of the signal line driver circuit of the present invention will be described with reference to Figs. 1 and 2 show such peripheral signal line driver circuits in three signal lines of the i th column to the (i + 2) th column.

In Fig. 1, in the signal line driver circuit 403, a current source circuit 420 is disposed in each signal line (each column). The current source circuit 420 has a terminal a, a terminal b, and a terminal c. At terminal a, a setting signal is input. The terminal b is supplied with a current (signal current) from the constant current source 109 for video signals connected to the current line. In addition, the terminal c outputs the signal held in the current source circuit 420 through the switch 101. In other words, the current source circuit 420 is controlled by a setting signal input from the terminal a, a signal current supplied from the terminal b is input, and outputs a current proportional to the signal current from the terminal c. At this time, the switch 101 is installed between the current source circuit 420 and the pixel connected to the signal line, and the on or off of the switch 101 is controlled by the latch pulse.

Next, the signal line driver circuit of the present invention having a configuration different from that of FIG. 1 will be described with reference to FIG. In Fig. 2, the signal line driver circuit 403 is provided with two or more current source circuits 420 in each signal line (each column). The current source circuit 420 has a plurality of current source circuits. Here, for example, it is assumed that it has two current source circuits, and the current source circuit 420 has a first current source circuit 421 and a second current source circuit 422. The first current source circuit 421 and the second current source circuit 422 have a terminal a, a terminal b, a terminal c, and a terminal d. At terminal a, a setting signal is input. From the terminal b, a current (signal current) is supplied from the video signal constant current source 109 connected to the current line. In addition, the terminal c outputs a signal held in the first current source circuit 421 and the second current source circuit 422. In other words, the current source circuit 420 is controlled by a setting signal input from the terminal a and a control signal input from the terminal d, and a signal current supplied from the terminal b is input, and a current proportional to the signal current (signal current). ) Is output from terminal c. At this time, the switch 101 is provided between the current source circuit 420 and the pixel connected to the signal line, and the on or off of the switch 101 is controlled by a latch pulse. In addition, the control signal is input from the terminal d.

At this time, in the present specification, the current source circuit 420 is set so that the writing of the signal current Idata is terminated for the current source circuit 420 (set to output a current proportional to the signal current by the signal current, which sets the signal current). The operation of inputting the signal current Idata to the pixel is called an input operation (the operation of outputting the signal current by the current source circuit 420). In Fig. 2, since the control signals inputted to the first current source circuit 421 and the second current source circuit 422 are different from each other, one of the first current source circuit 421 and the second current source circuit 422 has a setting operation. And the other performs an input operation. Thereby, two operations can be performed simultaneously.

In the present invention, a light emitting device includes a panel in which a pixel portion having a light emitting element and a signal line driver circuit are enclosed between a substrate and a cover member, a module, an IC, and the like in which an IC or the like is mounted on the panel. In short, the light emitting device corresponds to a generic term for a panel module and a display.

In the signal line driver circuit of the present invention, latches each having a current source circuit are arranged. In addition, the signal line driver circuit of the present invention can be applied to both an analog gray scale system and a digital gray scale system.

In the present invention, the TFT can be applied in place of a transistor using an ordinary single crystal, a transistor using an SOI, an organic transistor, or the like.

The present invention relates to a signal line driver circuit having first and second current source circuits corresponding to each of a plurality of signal lines and a shift register and n constant current sources for video signals (n is a natural number of 1 or more), wherein the first and second Each of the two current source circuits has a capacitor means and a supply means, and the capacitor means of one of the first and second current source circuits is in accordance with a sampling pulse supplied from the shift register and a latch pulse supplied from the outside. A current obtained by adding current supplied from each of the n video signal constant current sources is converted into a voltage, and a supply means of the other supplies a current according to the converted voltage,

The current value supplied from the n video signal constant current sources is set to 2 ⁰ : 2 ¹ : ... 2 ^n-1 .

The present invention relates to a signal line driver circuit having (2 × n) current source circuits corresponding to each of a plurality of signal lines and a shift register and n constant current sources for video signals (n is a natural number of 1 or more),

The (2 × n) current source circuits have capacitor means for converting current supplied from any one of the n video signal constant current sources into voltage in accordance with a sampling pulse supplied from the shift register and a latch pulse supplied from the outside. And supply means for supplying a current according to the converted voltage,

Each of the plurality of signal lines is supplied with current from n selected from the (2 x n) current source circuits,

The current value supplied from the n video signal constant current sources is set to 2 ⁰ : 2 ¹ : ... 2 ^n-1 .

The signal line driver circuit of the present invention having the above structure has a shift register and a latch in which two or more current source circuits are arranged. The current source circuit having the supply means and the capacitor means can supply a current having a predetermined value without being affected by the characteristic variation of the transistors to be configured. A logic operator is arranged in the signal line driver circuit, and sampling pulses supplied from a shift register and latch pulses supplied from the outside are input to two input terminals of the logic operator. In the present invention, two or more current source circuits arranged in the latch are controlled by using the signal output from the output terminal of the logical operator. In this case, in the current source circuit, the operation for converting the supplied current into a voltage can be performed accurately over time.

The present invention provides a signal line driver circuit having the current source circuit as described above. In addition, the present invention suppresses the influence of the characteristic variation of the TFTs constituting both the pixel and the driving circuit by using the pixel of the circuit structure in which the influence of the characteristic variation of the TFT is suppressed, and also the desired signal current Idata can be obtained. It provides a light emitting device that can be supplied to.

1 is a view of a signal line driver circuit.

2 is a view of a signal line driver circuit.

3 is a view of a signal line driver circuit (1 bit, 2 bits).

4 is a view of a signal line driver circuit (1 bit).

5 is a diagram (2 bits) of a signal line driver circuit.

6 is a circuit diagram of a current source circuit.

7 is a circuit diagram of a current source circuit.

8 is a circuit diagram of a current source circuit.

Fig. 9 is a circuit diagram of a constant current source for video signal.                 

Fig. 10 is a circuit diagram of a constant current source for video signal.

Fig. 11 is a circuit diagram of a constant current source for video signal.

12 is a view showing an appearance of a light emitting device of the present invention.

13 is a circuit diagram of pixels of a light emitting device.

14 is a view for explaining a method of driving the light emitting device of the present invention.

Fig. 15 is a view showing the light emitting device of the present invention.

16 is a circuit diagram of pixels of a light emitting device.

17 is a diagram illustrating an operation of a pixel of a light emitting device.

18 is a view of a current source circuit.

19 is a diagram illustrating an operation of a current source circuit.

20 is a diagram illustrating an operation of the current source circuit.

21 is a diagram illustrating an operation of the current source circuit.

Fig. 22 is a diagram showing an electronic device to which the light emitting device of the present invention is applied.

Fig. 23 is a circuit diagram of a constant current source for video signal.

Fig. 24 is a circuit diagram of a constant current source for video signal.

Fig. 25 is a circuit diagram of a constant current source for video signal.

Fig. 26 is a view (2 bits) of a signal line driver circuit.

27 is a circuit diagram of a current source circuit.

Fig. 28 is a circuit diagram of a current source circuit.

29 is a circuit diagram of a current source circuit.                 

30 is a circuit diagram of a current source circuit.

31 is a circuit diagram of a current source circuit.

32 is a circuit diagram of a current source circuit.

33 is a view of a signal line driver circuit.

34 is a view of a signal line driver circuit.

35 is a view of a signal line driver circuit.

36 is a view of a signal line driver circuit.

37 is a view of a signal line driver circuit.

38 is a view of a signal line driver circuit.

39 is a view of a signal line driver circuit.

40 is a view of a signal line driver circuit.

Fig. 41 is a view of a signal line driver circuit.

42 is a view of a signal line driver circuit.

43 is a view of a signal line driver circuit.

Fig. 44 is a circuit diagram of a constant current source for video signal.

45 is a circuit diagram of a constant current source for video signal.

Fig. 46 is a circuit diagram of a constant current source for video signal.

Fig. 47 is a circuit diagram of a constant current source for video signal.

48 is a view of a signal line driver circuit.

49 is a layout diagram of a current source circuit.                 

50 is a circuit diagram of a current source circuit.

(The best mode for carrying out the invention)

(Embodiment 1)

In this embodiment, a circuit configuration of the current source circuit 420 included in the signal line driver circuit of the present invention and an example of its operation will be described.

In the present invention, the setting signal input from the terminal a indicates the signal input from the output terminal of the logical operator. In other words, the setting signal in FIG. 1 corresponds to a signal input from an output terminal of the logical operator. In the present invention, the current source circuit 420 is set in accordance with the signal input from the output terminal of the logical operator.

The sampling pulses from the shift register are input to one of the two input terminals of the logical operator, and the latch pulses are input to the other. The logical operator performs logical operation of two input signals, and outputs a signal from the output terminal. In the current source circuit, the setting operation or the input operation is performed by a signal input from the output terminal of the logical operator.

At this time, the shift register has a configuration in which a plurality of columns of the flip-flop circuit FF are used. The clock signal S-CLK, the start pulse S-SP, and the clock inversion signal S-CLKb are input to the shift register, and the signals sequentially output according to the timing of these signals are called sampling pulses.                 

In Fig. 6A, a circuit having a switch 104, 105a, 116, a transistor 102 (n-channel type), and a capacitor 103 holding the gate-source voltage VGS of the transistor 102 corresponds to the current source circuit 420. Figs.

In the current source circuit 420, the switch 104 and the switch 105a are turned on by the signal input through the terminal a. Then, a current is supplied from the constant current source 109 for video signals (hereinafter referred to as constant current source 109) connected to the current line (video line) through the terminal b, and the charge is held in the capacitor element 103. The charge is held in the capacitor 103 until the signal current Idata flowing from the constant current source 109 is equal to the drain current of the transistor 102.

Next, the switch 104 and the switch 105a are turned off by the signal input through the terminal a. In this case, since the predetermined charge is held in the capacitor 103, the transistor 102 has the ability to flow a current having a magnitude corresponding to the signal current Idata. For example, when the switch 101 and the switch 116 are in a conductive state, current flows through the pixel connected to the signal line through the terminal c. At this time, since the gate voltage of the transistor 102 is maintained at the predetermined gate voltage by the capacitor 103, a drain current corresponding to the signal current Idata flows in the drain region of the transistor 102. Therefore, the influence of the characteristic variation of the transistors constituting the signal line driver circuit can be suppressed and the magnitude of the current input to the pixel can be controlled.

At this time, the connection structure of the switch 104 and the switch 105a is not limited to the structure shown in FIG. 6A. For example, one side of the switch 104 is connected to the terminal b, the other side is connected between the gate electrodes of the transistor 102, and one side of the switch 105a is connected to the terminal b via the switch 104, and the other side is connected. The structure connected to the switch 116 may be sufficient. And switch 104 and switch 105a are controlled by the signal input from terminal a.

Alternatively, the switch 104 may be disposed between the terminal b and the gate electrode of the transistor 102, and the switch 105a may be disposed between the terminal b and the switch 116. In other words, referring to Fig. 27A, a wiring or a switch may be disposed so as to be connected as shown in Fig. 27A1 during the setting operation and as shown in Fig. 27A2 during the input operation. The number of wirings and the number of switches are not particularly limited.

At this time, in the current source circuit 420 shown in Fig. 6A, the operation of setting the signal (setting operation), the operation of inputting the signal to the pixel (input operation), that is, the operation of outputting the current from the current source circuit can be performed simultaneously. Can't.

In Fig. 6B, a circuit having a switch 124, a switch 125, a transistor 122 (n-channel type), a capacitor 123 holding the gate-source voltage VGS of the transistor 122, and a transistor 126 (n-channel type) are current sources. Corresponds to circuit 420.

Transistor 126 functions as either a switch or part of a current source transistor.

In the current source circuit 420 shown in FIG. 6B, the switches 124 and 125 are turned on by signals input through the terminal a. Then, the current is supplied from the constant current source 109 connected to the current line (video line) through the terminal b, and the charge is held in the capacitor 123. The predetermined charge is held in the capacitor 123 until the signal current Idata flowing from the constant current source 109 becomes equal to the drain current of the transistor 122. At this time, when the switch 124 is turned on, since the gate-source voltage VGS of the transistor 126 becomes 0V, the transistor 126 is turned off.

Next, the switch 124 and the switch 125 are turned off by the signal input through the terminal a. By doing so, since the predetermined charge is held in the capacitor 123, the transistor 122 has the ability to flow a current having the magnitude of the signal current Idata. For example, when the switch 101 is in a conductive state, current flows through the pixel connected to the signal line through the terminal c. At this time, since the gate voltage of the transistor 122 is maintained at the predetermined gate voltage by the capacitor 123, the drain current corresponding to the signal current Idata flows in the drain region of the transistor 122. Therefore, the influence of the characteristic variation of the transistors constituting the signal line driver circuit can be suppressed and the magnitude of the current input to the pixel can be controlled.

At this time, when the switches 124 and 125 are turned off, the gate and the source of the transistor 126 are not coincident. As a result, the charge held in the capacitor 123 is also distributed to the transistor 126, and the transistor 126 is automatically turned on. Here, the transistors 122 and 126 are connected in series and their gates are connected to each other. Thus, transistors 122 and 126 operate as transistors of a multi-gate. In other words, the gate length L of the transistor varies in the setting operation and the input operation. Therefore, the current value supplied from the terminal b in the setting operation can be made larger than the current value supplied from the terminal c in the input operation. Therefore, various loads (wiring resistance, cross capacitance, etc.) disposed between the terminal b and the constant current source 109 can be charged more quickly. Therefore, the setting operation can be completed very quickly.

At this time, the number of switches, the number of wirings and the connection configuration thereof are not particularly limited. In other words, referring to Fig. 27B, a wiring or a switch may be arranged so as to be connected as shown in Fig. 27B1 during the setting operation and as shown in Fig. 27B2 during the input operation. In particular, in FIG. 27B2, the charge stored in the capacitor 123 may be prevented from leaking. The number of wirings and the number of switches are not particularly limited.

At this time, in the current source circuit 420 shown in Fig. 6B, the operation of setting the signal (setting operation), the operation of inputting the signal to the pixel (input operation), that is, the operation of outputting the current from the current source circuit can be performed simultaneously. Can't.

In Fig. 6C, a circuit having a switch 108, a switch 110, transistors 105b, 106 (n-channel type), and a capacitor 107 holding the gate-source voltage VGS of the transistors 105b, 106 corresponds to the current source circuit 420. .

In the current source circuit 420 shown in FIG. 6C, the switches 108 and 110 are turned on by signals input through the terminal a. Then, current is supplied from the constant current source 109 connected to the current line through the terminal b, and the charge is held in the capacitor 107. The charge is held in the capacitor 107 until the signal current Idata flowing from the constant current source 109 becomes equal to the drain current of the transistor 105b. At this time, since the gate electrodes of the transistors 105b and 106 are connected to each other, the gate voltages of the transistors 105b and the transistor 106 are held by the capacitor 107.

Next, the switch 108 and the switch 110 are turned off by the signal input through the terminal a. By doing so, since the predetermined charge is held in the capacitor 107, the transistor 106 has the ability to flow a current having a magnitude corresponding to the signal current Idata. For example, when the switch 101 is in a conductive state, current flows through the pixel connected to the signal line through the terminal c. At this time, since the gate voltage of the transistor 106 is maintained at the predetermined gate voltage by the capacitor 107, the drain current corresponding to the signal current Idata flows in the drain region of the transistor 106. Therefore, the influence of the characteristic variation of the transistors constituting the signal line driver circuit can be suppressed and the magnitude of the current input to the pixel can be controlled.

At this time, in order for the drain current of the transistor 106 to correctly flow the drain current according to the signal current Idata, the characteristics of the transistor 105b and the transistor 106 need to be the same. More specifically, it is necessary to make the values of the mobility, the threshold, and the like of the transistors 105b and 106 equal to each other. In FIG. 6C, the values of W (gate width) / L (gate length) of the transistors 105b and 106 may be arbitrarily set so that a current proportional to the signal current Idata supplied from the constant current source 109 is supplied to the pixel. do.

In the transistor 105b, by setting the W / L of the transistor connected to the constant current source 109 large, a large current can be supplied from the constant current source 109 to increase the recording speed.                 

At this time, in the current source circuit 420 shown in Fig. 6C, the operation of setting the signal (setting operation) and the operation of inputting the signal to the pixel (input operation) can be performed simultaneously.

The current source circuit 420 shown in FIGS. 6D and 6E has the same connection structure with other circuit elements except that the connection structure between the current source circuit 420 and the switch 110 shown in FIG. 6C is different. In addition, since the operation | movement of the current source circuit 420 shown to FIG. 6D, 6E is the same as the operation | movement of the current source circuit 420 shown in FIG. 6C, description is abbreviate | omitted in this embodiment.

At this time, the number of switches, the number of wirings and the connection configuration thereof are not particularly limited. In other words, referring to Fig. 27C, a wiring or a switch may be arranged so as to be connected as shown in Fig. 27C1 during the setting operation and as shown in Fig. 27C2 during the input operation. In particular, in FIG. 27C2, the charge stored in the capacitor 107 may be prevented from leaking.

In Fig. 28A, a circuit having switches 195b, 195c, 195d, 195f, transistor 195a, and capacitor 195e corresponds to a current source circuit. In the current source circuit shown in Fig. 28A, the switches 195b, 195c, and 195f are turned on by the signal input through the terminal a, and the switch 195d is turned off. Then, a current is supplied from the constant current source 109 connected to the current line through the terminal b, and a predetermined charge is applied to the capacitor 195e until the signal current supplied from the constant current source 109 is equal to the drain current of the transistor 195a. maintain.

Next, the switches 195b, 195c, and 195f are turned off and the switch 195d is turned on by the signal input through the terminal a. At this time, since the predetermined charge is held in the capacitor 195e, the transistor 195a has the capability of flowing a current having a magnitude corresponding to the signal current. This is because the gate voltage of the transistor 195a is set to a predetermined gate voltage by the capacitor 195e, and the drain current corresponding to the current (video signal current) flows in the drain region of the transistor 195a. In this state, a current is supplied to the outside via the terminal c. At this time, in the current source circuit shown in Fig. 28A, the setting operation for setting the current source circuit to have the ability to flow the signal current and the input operation for inputting the signal current to the pixel cannot be performed simultaneously. At this time, when the switch controlled by the signal input through the terminal a is turned on and no current flows from the terminal c, the wiring of the terminal c and another potential must be connected. Here, the potential of the wiring is set to Va. Va may be a potential for allowing the current flowing from the terminal b to flow as it is, and an example may be a power supply voltage Vdd.

At this time, the number of switches and the connection configuration thereof are not particularly limited. In other words, referring to Figs. 28B and 28C, a wiring or a switch may be arranged so as to be connected as 28b1 and 28c1 during the setting operation and to be connected as 28b1 and 28c1 during the input operation. The number of wirings and the number of switches are not particularly limited.

6A and 6C to 6E, the direction in which the current flows (the direction from the pixel to the signal line driver circuit) is the same, and the polarity (conductive type) of the transistors 102, 105b, and transistor 106 can also be p-channel. Do.

Therefore, in Fig. 7A, the direction in which the current flows (the direction from the pixel to the signal line driver circuit) is the same, and the circuit configuration when the transistor 102 shown in Fig. 6A is p-channel type is shown. In FIG. 7A, by disposing the capacitor element between the gate and the source, the voltage between the gate and the source can be maintained even if the potential of the source is changed. 7B to 7D show a circuit diagram in which the current flows (the direction from the pixel to the signal line driver circuit) is the same, and the transistor 105b and the transistor 106 shown in FIGS. 6C to 6E are p-channel type.

FIG. 29A shows the case where the transistor 195a is p-channel in the configuration shown in FIG. FIG. 29B shows a case where the transistors 122 and 126 are p-channel type and the terminal Va and the switch 127 are further provided in the configuration shown in FIG. 6B.

In Fig. 31, a circuit having switches 104, 116, transistor 102, capacitor 103, and the like corresponds to a current source circuit.

FIG. 31A corresponds to a circuit in which a part of FIG. 6A is changed. In Figure 31A. In the current source circuit shown, the gate width W of the transistor is different in the setting operation of the current source and in the input operation. That is, at the time of the setting operation, it is connected as shown in Fig. 31B, and the gate width W is large. At the time of input operation, it is connected as shown in Fig. 31C, and the gate width W is small. Therefore, the current value supplied from the terminal b in the setting operation can be made larger than the current value supplied from the terminal c in the input operation. Therefore, various loads (wiring resistance, cross capacitance, etc.) disposed between the terminal b and the constant current source for video signal can be charged more quickly. Therefore, the setting operation can be completed very quickly.

At this time, FIG. 31 shows the circuit which changed a part of FIG. 6A. However, the present invention can be easily applied to other circuits of FIG. 6 and to circuits of FIGS. 7, 28, 30, 29 and the like.                 

At this time, in the current source circuit, current flows from the pixel in the direction of the signal line driver circuit. However, the current not only flows from the pixel in the direction of the signal line driver circuit but also flows from the signal line driver circuit in the direction of the pixel. At this time, whether the current flows from the pixel in the direction of the signal line driver circuit or whether the current flows from the signal line driver circuit in the direction of the pixel depends on the configuration of the pixel. When the current flows from the signal line driver circuit in the direction of the pixel, in the circuit diagram shown in Fig. 6, Vss (low potential power supply) is set to Vdd (high potential power supply), and transistors 102, transistor 105b, transistor 106, and transistor 122 are used. The transistor 126 may be a p-channel type. In the circuit diagram shown in FIG. 7, Vss may be set to Vdd, and the transistors 102, 105b, and 106 may be n-channel type.

However, the wiring and the switch may be arranged so as to be connected as shown in FIGS. 30A1 to 30D1 during the setting operation and to be connected as shown in FIGS. 30A2 to 30D2 during the input operation. The number of wirings, the number of switches and the connection thereof are not particularly limited.

At this time, in all of the current source circuits, the capacitors arranged do not need to be disposed by substituting the gate capacitance of the transistor or the like.

Hereinafter, the operation of the current source circuits of FIGS. 6A and 7A, 6C to 6E, and 7B to 7D will be described in detail among the current source circuits described with reference to FIGS. 6 and 7. First, the operation of the current source circuits of FIGS. 6A and 7A will be described with reference to FIG. 19.

19A to 19C schematically show paths through which current flows between circuit elements. Fig. 19D shows the relationship between the current flowing through each path and the time when the signal current Idata is written into the current source circuit, and Fig. 19E shows the voltage accumulated in the capacitor 16 when the signal current Idata is written into the current source circuit. That is, the relationship between the voltage and time between the gate and the source of the transistor 15 is shown. In the circuit diagrams shown in Figs. 19A to 19C, 11 is a constant current source for video signals, switches 12 to 14 are semiconductor devices having a switching function, 15 is a transistor (n-channel type), 16 is a capacitor and 17 is a pixel. In this embodiment, the switch 14, the transistor 15, and the capacitor 16 are electric circuits corresponding to the current source circuit. At this time, the leader line and the sign is attached to Fig. 19A, and the leader line and the sign in Fig. 19B, 19C is in accordance with Fig. 19A, and the illustration is omitted.

The source region of the n-channel transistor 15 is connected to Vss, and the drain region is connected to a constant current source 11 for video signal. One electrode of the capacitor 16 is connected to Vss (source of transistor 15), and the other electrode is connected to switch 14 (gate of transistor 15). The capacitor 16 plays a role of holding the gate-source voltage of the transistor 15.

At this time, in practice, the current source circuit 20 is provided in the signal line driver circuit. Then, the current according to the signal current Idata flows from the current source circuit 20 set in the signal line driver circuit to the light emitting element through a circuit element included in the signal line or the pixel. However, since FIG. 19 is a figure for briefly explaining the relationship with the constant current source 11, the current source circuit 20, and the pixel 17 for video signals, illustration of the detailed structure is abbreviate | omitted.

First, an operation (setting operation) in which the current source circuit 20 holds the signal current Idata will be described using Figs. 19A and 19B. In Fig. 19A, switch 12 and switch 14 are turned on, and switch 13 is turned off. In this state, the signal current Idata is output from the constant current source 11 for video signals, and current flows from the constant current source 11 for video signals in the direction of the current source circuit 20. At this time, since the signal current Idata flows from the constant current source 11 for video signal, as shown in FIG. 19A, the current path flows separately into I1 and I2 in the current source circuit 20. As shown in FIG. Although the relationship at this time is shown in FIG. 19D, it goes without saying that the relationship is the signal current Idata = I1 + I2.

At the moment when the current starts to flow from the constant current source 11 for video signal, since the charge to the capacitor 16 is not held, the transistor 15 is turned off. Therefore,: I2 = 0 and Idata = I1.

Then, charge gradually accumulates in the capacitor element 16, and a potential difference starts to occur between the positive electrodes of the capacitor element 16 (FIG. 19E). When the potential difference between the positive electrodes reaches Vth (point A in FIG. 19E), the transistor 15 is turned on and I2> 0. As Idata = I1 + I2 as described above, I1 gradually decreases, but current still flows. The capacitor 16 further accumulates charges.

The potential difference between the positive electrodes of the capacitor 16 becomes the gate-source voltage of the transistor 15. Therefore, the accumulation of charge in the capacitor element 16 can continue until the gate-source voltage of the transistor 15 becomes the desired voltage, that is, the voltage VGS that allows the transistor 15 to flow the current of Idata. . When the accumulation of charge ends (point B in FIG. 19E), the current I1 does not flow, and since the transistor 15 is completely on, Idata = I2 (FIG. 19B).

Next, an operation (input operation) of inputting the signal current Idata to the pixel will be described with reference to Fig. 19C. When the signal current Idata is input to the pixel, the switch 13 is turned on and the switch 12 and the switch 14 are turned off. Since the VGS recorded in the above-described operation is held in the capacitor element 16, the transistor 15 is turned on, and a current such as the signal current Idata flows in the direction of Vss through the switch 13 and the transistor 15, so as to signal to the pixel. The input of the current Idata is completed. At this time, if the transistor 15 is operated in the saturation region, even if the source-drain voltage of the transistor 15 is changed, the current flowing in the pixel can flow unchanged.

In the current source circuit 20 shown in Fig. 19, first, as shown in Figs. 19A to 19C, the operation of ending the writing of the signal current Idata to the current source circuit 20 (setting operation, corresponding to Figs. 19A and 19B) and , Inputting the signal current Idata to the pixel (input operation, corresponding to Fig. 19C). In the pixel, the current is supplied to the light emitting element based on the input signal current Idata.

In the current source circuit 20 shown in FIG. 19, the setting operation and the input operation cannot be performed simultaneously. Therefore, when it is necessary to simultaneously perform the setting operation and the input operation, it is preferable to provide at least two current source circuits in each of the signal lines arranged in plural in the pixel portion as signal lines in which a plurality of pixels are connected. However, as long as the setting operation can be performed within the period in which the signal current Idata is not input to the pixel, only one current source circuit may be provided for each signal line (in each column).                 

The transistor 15 of the current source circuit 20 shown in Figs. 19A to 19C is an n-channel type, but of course the transistor 15 of the current source circuit 20 may be a p-channel type. Here, Fig. 19F shows a circuit diagram when the transistor 15 is of p-channel type. In Fig. 19F, 31 is a constant current source for video signals, switches 32 to 34 are semiconductor elements (transistors) having a switching function, 35 is a transistor (p-channel type), 36 is a capacitor, and 37 is a pixel. In this embodiment, the switch 34, the transistor 35, and the capacitor 36 are electric circuits corresponding to the current source circuit 24.

The transistor 35 is of p-channel type, and the source region and the drain region of the transistor 35 are connected to one Vdd and the other to the constant current source 31. One electrode of the capacitor 36 is connected to Vdd and the other electrode is connected to the switch 36. The capacitor 36 plays a role of holding the gate-source voltage of the transistor 35.

The operation of the current source circuit 24 shown in FIG. 19F performs the same operation as the above-described current source circuit 20 except that the direction in which the current flows is different, and thus description thereof is omitted here. At this time, when designing a current source circuit in which the polarity of the transistor 15 is changed without changing the direction in which the current flows, the circuit diagram shown in FIG. 7A may be referred to.

At this time, in Fig. 32, the direction in which current flows is the same as in Fig. 19F, and the transistor 35 is n-channel type. The capacitor 36 is connected between the gate and the source of the transistor 35. The potential of the source is different between the setting operation and the input operation. However, since the voltage between the gate and the source is maintained even when the potential of the source changes, it operates normally.                 

Subsequently, operations of the current source circuits of FIGS. 6C to 6E and 7B to 7D will be described with reference to FIGS. 20 and 21. 20A to 20C schematically show paths through which current flows between circuit elements. 20D shows the relationship between the current flowing through each path and the time when the signal current Idata is written into the current source circuit, and FIG. 20E shows the voltage accumulated in the capacitor 46 when the signal current Idata is written into the current source circuit. In other words, the relationship between the voltage and the time between the gate and the source of the transistors 43 and 44 is shown. 20A to 20C, 41 is a constant current source for a video signal, 42 is a semiconductor element having a switching function, 43 and 44 are transistors (n-channel type), 46 is a capacitor and 47 is a pixel. In this embodiment, the switches 42, the transistors 43, 44, and the capacitor 46 are electric circuits corresponding to the current source circuit 25. At this time, a leader line and a sign are attached to FIG. 20A, and the leader line and the sign of FIG. 20B and 20C correspond to FIG.

The source region of the n-channel transistor 43 is connected to Vss, and the drain region is connected to the constant current source 41. The source region of the n-channel transistor 44 is connected to Vss and the drain region is connected to the pixel 47. One electrode of the capacitor 46 is connected to Vss (sources of the transistors 43 and 44), and the other electrode is connected to the gate electrodes of the transistors 43 and 44. The capacitor 46 plays a role of maintaining the voltage between the gate and the source of the transistor 43 and the transistor 44.

In this case, the current source circuit 25 is actually provided in the signal line driver circuit. Then, a current corresponding to the signal current Idata flows from the current source circuit 25 provided in the signal line driver circuit through the circuit element included in the signal line or the pixel. However, since FIG. 20 is a figure for demonstrating the outline of the relationship with the constant current source 41 for video signals, the current source circuit 25, and the pixel 47, the illustration of a detailed structure is abbreviate | omitted.

In the current source circuit 25 of FIG. 20, the sizes of the transistors 43 and 44 are important. Therefore, the case where the sizes of the transistors 43 and 44 are different from the same case will be described with reference numerals. 20A to 20C, when the sizes of the transistors 43 and 44 are the same, the signal current Idata will be described. When the sizes of the transistors 43 and 44 differ, the signal current Idata1 and the signal current Idata2 will be described. At this time, the sizes of the transistors 43 and 44 are determined using the values of W (gate width) / L (gate length) of each transistor.

First, the case where the transistors 43 and 44 are the same size will be described. First, an operation of holding the signal current Idata in the current source circuit 20 will be described with reference to FIGS. 20A and 20B. In FIG. 20A, when the switch 42 is turned on, the signal current Idata is provided in the constant current source 41 for video signals, and current flows from the constant current source 41 in the direction of the current source circuit 25. In FIG. At this time, since the signal current Idata flows from the constant current source 41 for video signal, as shown in FIG. 20A, the current path flows separately into I1 and I2 in the current source circuit 25. As shown in FIG. Although the relationship at this time is shown in FIG. 20D, it goes without saying that the relationship is the signal current Idata = I1 + I2.

At the moment when the current starts to flow from the constant current source 41, the electric charges to the capacitor 46 are not held, so the transistors 43 and 44 are turned off. Therefore, I2 = 0 and Idata = I1.

Then, charge gradually accumulates in the capacitor 46, and a potential difference starts to occur between the positive electrodes of the capacitor 46 (FIG. 20E). When the potential difference between the positive electrodes reaches Vth (point A in Fig. 20E), the transistors 43 and 44 are turned on, and I2> 0. As Idata = I1 + I2 as described above, I1 gradually decreases, but current still flows. In the capacitor 46, charges are further accumulated.

The potential difference between the positive electrodes of the capacitor 46 is the gate-source voltage of the transistors 43 and 44. Therefore, until the voltage between the gate and the source of the transistor 43 and the transistor 44 becomes the desired voltage, that is, the voltage VGS that is sufficient for the transistor 44 to flow the current of Idata, the charge accumulation in the capacitor 46 is You can continue. When the accumulation of charge ends (point B in FIG. 20E), the current I1 does not flow, and since the transistors 43 and 44 are completely on, Idata = I2 (FIG. 20B).

Next, an operation of inputting the signal current Idata to the pixel will be described with reference to FIG. 20C. First, switch 42 is turned off. Since the VGS recorded in the above-described operation is held in the capacitor 46, the transistors 43 and 44 are turned on, and a current such as the signal current Idata flows from the pixel 47. Accordingly, the signal current Idata is input to the pixel. At this time, if the transistor 44 is operated in the saturation region, even if the source-drain voltage of the transistor 44 is changed, the current flowing in the pixel can flow unchanged.                 

At this time, in the case of the current mirror circuit as shown in FIG. 20C, the current may flow through the pixel 47 using the current supplied from the constant current source 41 without turning off the switch 42. In other words, the operation for setting the signal (setting operation) and the operation for inputting the signal to the pixel (input operation) can be performed simultaneously with respect to the current source circuit 20.

Next, the case where the sizes of the transistors 43 and 44 are different will be described. Since the operation in the current source circuit 25 is the same as the operation described above, the description is omitted here. If the sizes of the transistors 43 and 44 are different, they are inevitably different from the signal current Idata1 set in the constant current source 41 for video signals and the signal current Idata2 flowing in the pixel 47. The difference between the two depends on the difference between the values of W (gate width) / L (gate length) of the transistor 43 and the transistor 44.

Usually, it is preferable to make the W / L value of the transistor 43 larger than the W / L value of the transistor 44. This is because the signal current Idata1 can be increased by increasing the W / L value of the transistor 43. In this case, when setting the current source circuit with the signal current Idata1, the load (cross capacitance, wiring resistance) can be charged, so that the setting operation can be performed very quickly.

The transistors 43 and 44 of the current source circuit 25 shown in Figs. 20A to 20C are n-channel type, but of course, the transistors 43 and 44 of the current source circuit 25 may be p-channel type. Here, FIG. 21 shows a circuit diagram when the transistors 43 and 44 are of p-channel type.

In Fig. 21, 41 is a constant current source, switch 42 is a semiconductor element having a switching function, 43 and 44 are transistors (p-channel type), 46 is a capacitor and 47 is a pixel. In this embodiment, the switches 42, the transistors 43, 44, and the capacitor 46 are assumed to be electric circuits corresponding to the current source circuits 26.

The source region of the p-channel transistor 43 is connected to Vdd and the drain region is connected to the constant current source 41. The source region of the p-channel transistor 44 is connected to Vdd and the drain region is connected to the pixel 47 . One electrode of the capacitor 46 is connected to Vdd (source), and the other electrode is connected to the gate electrodes of the transistors 43 and 44. The capacitor 46 plays a role of maintaining the voltage between the gate and the source of the transistor 43 and the transistor 44.

The operation of the current source circuit 26 shown in FIG. 21 performs the same operation as that in FIGS. 20A to 20C except that the direction in which the current flows is different, and thus description thereof is omitted here. At this time, when designing a current source circuit in which the polarities of the transistors 43 and 44 are changed without changing the direction in which the current flows, the circuit diagram shown in FIG. 7B and FIG. 32 may be referred to.

In summary, in the current source circuit of FIG. 19, a current having the same magnitude as that of the signal current Idata set in the constant current source flows to the pixel. In other words, the signal current Idata set in the constant current source and the current flowing in the pixel have the same value, and are not affected by the characteristic variation of the transistor provided in the current source circuit.

In the current source circuit of FIG. 19 and FIG. 6B, the signal current Idata cannot be output from the current source circuit to the pixel during the setting operation. Therefore, two current source circuits are provided for each of these signal lines to perform an operation (setting operation) for setting a signal in one current source circuit, and input Idata to the pixel using the other current source circuit (input operation). It is preferable to carry out.

However, when the setting operation and the input operation are not performed at the same time, only one current source circuit may be provided in each column. The current source circuits of FIGS. 28A and 29A are the same except that the current source circuit of FIG. 19 differs from the path of connection and current flow. The current source circuit of FIG. 31A is the same except that the current supplied from the constant current source is different from the magnitude of the current flowing in the current source circuit. 6B and 29B are the same except that the current supplied from the constant current source is different from the magnitude of the current flowing from the current source circuit. In other words, in Fig. 31A, the gate width W of the transistor differs between the setting operation and the input operation. In Figs. 6B and 29B, the gate length L of the transistor differs only between the setting operation and the input operation. It is the same structure as 19 current source circuit.

On the other hand, in the current source circuits of Figs. 20 and 21, the signal current Idata provided in the constant current source and the value of the current flowing in the pixel depend on the size of the two transistors provided in the current source circuit. In other words, the size (W (gate width) / L (gate length)) of two transistors provided in the current source circuit can be arbitrarily designed, so that the signal current Idata set in the constant current source and the current flowing in the pixel can be arbitrarily changed. However, when variations occur in characteristics such as the threshold value and mobility of the two transistors, it is difficult to output the correct signal current Idata to the pixel.

In the current source circuits of Figs. 20 and 21, it is possible to input a signal to the pixel during the setting operation. That is, the operation for setting the signal (setting operation) and the operation for inputting the signal to the pixel (input operation) can be performed simultaneously. Therefore, as in the current source circuit of Fig. 19, it is not necessary to provide two current source circuits in one signal line.

The present invention having the above structure can suppress the influence of the characteristic variation of the TFT and supply a desired current to the outside.

(Embodiment 2)

In a circuit as shown in Fig. 6A (and Fig. 19, Fig. 31A, Fig. 6B, Fig. 29B, etc.), two current source circuits are provided for each signal line (each column) to set signals in one current source circuit (setting) Operation) and inputting Idata to the pixel using the other current source circuit (input operation) have been described above. This is because the setting operation and the input operation can be performed at the same time. Therefore, in this embodiment, an example of a circuit configuration of the current source circuit 420 shown in FIG. 2 provided in the signal line driver circuit of the present invention will be described with reference to FIG.

In the present invention, the setting signal input from the terminal a indicates the signal input from the output terminal of the logical operator. In other words, the setting signal in FIG. 1 corresponds to a signal input from an output terminal of the logical operator. In the present invention, the current source circuit 420 is set in accordance with the signal input from the output terminal of the logical operator.

The sampling pulses from the shift register are input to one of the two input terminals of the logical operator, and the latch pulses are input to the other. The logical operator performs logical operation of two input signals, and outputs a signal from the output terminal. In the current source circuit, the setting operation or the input operation is performed by a signal input from the output terminal of the logical operator.

The current source circuit 420 is controlled by a setting signal input from the terminal a, a signal current supplied from the terminal b is input, and outputs a current proportional to the signal current (current for video signal) from the terminal c.

In Fig. 8A, a circuit having switches 134 to 139, a transistor 132 (n-channel type), and a capacitor 133 for holding the voltage VGS between the gate and the source of the transistor 132 is the first current source circuit 421 or the second. It corresponds to the current source circuit 422.

In the first current source circuit 421 or the second current source circuit 422, the switches 134 and 136 are turned on by signals input through the terminal a. The switch 135 and the switch 137 are turned on by the signal input from the control line through the terminal d. In this way, a current (current for video signal) is supplied from the constant current source 109 for video signals connected to the current line through the terminal b, and charge is retained in the capacitor 133. The charge is held in the capacitor 133 until the signal current Idata flowing from the constant current source 109 becomes equal to the drain current of the transistor 132.

Next, the switches 134 to 137 are turned off by the signals input through the terminals a and d. In this case, since the predetermined charge is held in the capacitor 133, the transistor 132 has the ability to flow a current having the magnitude of the signal current Idata. For example, when the switch 101, the switch 138, and the switch 139 are in a conductive state, current flows through the pixel connected to the signal line through the terminal c. At this time, since the gate voltage of the transistor 132 is maintained at the predetermined gate voltage by the capacitor 133, the drain current corresponding to the signal current Idata flows in the drain region of the transistor 132. Therefore, the influence of the characteristic variation of the transistors constituting the signal line driver circuit can be suppressed, and the magnitude of the current flowing in the pixel can be controlled.

In Fig. 8B, a circuit including switches 144 to 147, a transistor 142 (n-channel type), a capacitor 143 holding the gate-source voltage VGS of the transistor 142, and a transistor 148 (n-channel type) are provided. It corresponds to the first current source circuit 421 or the second current source circuit 422.

In the first current source circuit 421 or the second current source circuit 422, the switches 144 and 146 are turned on by the signal input through the terminal a. In addition, the switches 145 and 147 are turned on by signals input from the control line through the terminal d. In this way, a current is supplied from the constant current source 109 connected to the current line through the terminal b, and the charge is held in the capacitor 143. The charge is held in the capacitor 143 until the signal current Idata flowing from the constant current source 109 becomes equal to the drain current of the transistor 142. At this time, when the switches 144 and 145 are turned on, the gate-source voltage VGS of the transistor 148 becomes OV, so that the transistor 148 is automatically turned off.

Next, the switches 144 to 147 are turned off by the signals input through the terminals a and d. In this case, since the signal current Idata is held in the capacitor 143, the transistor 142 has the capability of flowing a current having a magnitude corresponding to the signal current Idata. For example, when the switch 101 is in a conductive state, current flows through the pixel connected to the signal line through the terminal c. At this time, since the gate voltage of the transistor 142 is maintained at the predetermined gate voltage by the capacitor 143, the drain current corresponding to the signal current Idata flows in the drain region of the transistor 142. Therefore, the influence of the characteristic variation of the transistors constituting the signal line driver circuit can be suppressed, and the magnitude of the current flowing in the pixel can be controlled.

At this time, when the switches 144 and 145 are turned off, the gate and the source of the transistor 126 are not coincident. As a result, the charge held in the capacitor 143 is also distributed to the transistor 148, and the transistor 148 is automatically turned on. Here, the transistors 142 and 148 are connected in series, and their gates are connected to each other. Thus, transistors 142 and 148 operate as transistors of the multigate. In other words, the gate length L of the transistor is different in the setting operation and the input operation. Therefore, the current value supplied from the terminal b in the setting operation can be made larger than the current value supplied from the terminal c in the input operation. Therefore, various loads (wiring resistance, cross capacitance, etc.) disposed between the terminal b and the constant current source for video can be charged more quickly. Therefore, the setting operation can be completed very quickly.

Here, FIG. 8A corresponds to the structure which added the terminal d with respect to FIG. 6A. FIG. 8B corresponds to the configuration in which the terminal d is added with respect to FIG. 6B. In this way, the switch is added and modified in series to modify the configuration in which the terminal d is added. At this time, in the first current source circuit 421 of FIG. 2, two switches are arranged in series in the second current source circuit 422, thereby configuring the current source circuit shown in FIGS. 6, 7, 28, 29, and 31. Can be used arbitrarily.

2 shows a configuration in which a current source circuit 420 having two current source circuits of the first current source circuit 421 or the second current source circuit 422 is provided for each signal line, but the present invention is limited thereto. It doesn't work. For example, three current source circuits 420 may be provided for each signal line. Each current source circuit 420 may be set with a signal current from another r constant current source 109. For example, in one current source circuit 420, a signal current is set using a constant current source for video signals for 1 bit, and a constant current source for video signals for 2 bits is used for one current source circuit 420. The signal current may be set, and the signal current may be set in one current source circuit 420 by using a 3-bit video signal constant current source.

This embodiment can be combined freely with the first embodiment. In other words, as shown in FIG. 4, FIG. 5, FIG. 26, and FIG. 27, one current source circuit is arranged in each column, and as shown in FIG. 2, two current source circuits of FIG. 6A may be arranged in each column. Then, for example, if the current supplied from the current source circuit 421 is 4.9A in FIG. 2 and the current supplied from the current source circuit 422 is 5.1A, the current source circuit 421 and the current source circuit 422 for each frame. By allowing the current to be supplied from either side, the variation in the current source circuit can be averaged.

This embodiment can be combined freely with the first embodiment.

(Embodiment 3)                 

In this embodiment, the structure of the light emitting device provided with the signal line driver circuit of the present invention will be described with reference to FIG.

The light emitting device of the present invention has a pixel portion 402 in which a plurality of pixels are arranged in a matrix on a substrate 401, and around the pixel portion 402, a signal line driver circuit 403 and a first scanning line. The driver circuit 404 and the second scan line driver circuit 405 are provided. In Fig. 15A, the signal line driver circuit 403 and two pairs of the scan line driver circuits 404 and 405 are provided, but the present invention is not limited to this. The number of drive circuits can be arbitrarily designed according to the structure of a pixel. In addition, a signal is supplied from the outside to the signal line driver circuit 403, the first scan line driver circuit 404, and the second scan line driver circuit 405 through the FPC 406.

The configurations of the first scan line driver circuit 404 and the second scan line driver circuit 405 will be described with reference to FIG. 15B. The first scan line driver circuit 404 and the second scan line driver circuit 405 have a shift register 407 and a buffer 408. Briefly describing the operation, the shift register 407 sequentially outputs sampling pulses in accordance with the clock signal G-CLKb. Thereafter, the sampling pulses amplified by the buffer 408 are inputted to the scanning line to make the selection state by row. The signal current Idata is sequentially written from the signal line to the pixels controlled by the selected scanning line.

At this time, a level shifter circuit may be disposed between the shift register 407 and the buffer 408. By arranging the level shifter circuit, the voltage amplitude can be increased.

The configuration of the signal line driver circuit 403 will be described later. In addition, the present embodiment can be freely combined with the first and second embodiments.

(Embodiment 4)

In this embodiment, the configuration and operation of the signal line driver circuit 403 shown in FIG. 15A will be described. In the present embodiment, the signal line driver circuit 403 used when performing analog gradation display or 1-bit digital gradation display will be described with reference to FIGS. 3A and 4.

Fig. 3A shows a schematic diagram of the signal line driver circuit 403 in the case of performing analog gradation display or 1-bit digital gradation display. The signal line driver circuit 403 includes a shift register 418 and a latch circuit 419.

In brief, the shift register 418 is configured by using a plurality of columns of the flip-flop circuit FF and the like, and include a clock signal S-CLK, a start pulse S-SP, and a clock inversion signal S-CLKb. ) Is entered. According to the timing of these signals, sampling pulses are sequentially output.

The sampling pulse output from the shift register 418 is input to the latch circuit 419. A video signal (analog video signal or digital video signal) is input to the latch circuit 419, and the video signal is held in each column in accordance with the timing at which the sampling pulse is input.

At this time, the video signal constant current source 109 is connected. The latch circuit 419 holds the signal current (corresponding to the video signal) set in the video signal constant current source 109.

In addition, a latch pulse is input to the latch circuit 419, and the video signal held in the latch circuit 419 is input to the pixel connected to the signal line. The latch circuit 419 may have a role of converting a digital signal into an analog signal.

Next, the configuration of the latch circuit 419 will be described with reference to FIG. 4 shows an outline of the signal line driver circuit 403 around the three signal lines of the i th column to the (i + 2) th column.

The latch circuit 419 has a switch 435, a switch 436, a current source circuit 437, a current source circuit 438, and a switch 439 for each column. The switch 435 is controlled by the sampling pulse input from the shift register 418. In addition, switches 436 and 439 are controlled by latch pulses.

At this time, the inverted signal is input to the switch 436 and the switch 439. As a result, the current source circuit 437 and the current source circuit 438 perform the setting operation on one side and the input operation on the other side.

In other words, when the current source circuit 437 is performing the setting operation, at the same time, the current source circuit 438 outputs a signal current to the pixel and performs the input operation. In this way, since the setting operation and the input operation of the current source circuit can be performed at the same time, the setting operation can be performed with time and accurate.

Therefore, it becomes possible to perform linear sequential driving.

At this time, the signal current supplied from the video data line has a magnitude dependent on the video signal. Therefore, since the current supplied to the pixel has a magnitude proportional to the signal current, the image (gradation) can be represented.                 

The current source circuit 437 and the current source circuit 438 are controlled by a signal input through the terminal a. In the current source circuit 437 and the current source circuit 438, the current (signal current Idata) set by using the constant current source 109 for video signals connected to the video line (current line) via the terminal b is held. A switch 439 is provided between the current source circuit 437 and the current source circuit 438 and the pixel connected to the signal line, and the on or off of the switch 439 is controlled by a latch pulse.

In the case of performing 1-bit digital gradation display, when the video signal is a bright signal, the signal current Idata is output from the current source circuit 437 or the current source circuit 438 to the pixel. On the contrary, when the video signal is a dark signal, the current source circuit 437 or the current source circuit 438 does not have the ability to flow a current, so that no current flows to the pixel. Further, in the case of performing the analog gradation display, the signal current Idata is output from the current source circuit 433 to the pixel in accordance with the video signal. In other words, the current source circuit 437 and the current source circuit 438 are controlled by the video signal with the ability VGS to flow a constant current, and the brightness is controlled by the magnitude of the current output to the pixel.

In the present invention, the setting signal input from the terminal a indicates the signal input from the output terminal of the logical operator. In other words, the setting signal in FIG. 1 corresponds to a signal input from an output terminal of the logical operator. In the present invention, the current source circuit 420 is set in accordance with the signal input from the output terminal of the logical operator.

The sampling pulses from the shift register are input to one of the two input terminals of the logical operator, and the latch pulses are input to the other. The logical operator performs logical operation of two input signals, and outputs a signal from the output terminal. In the current source circuit, the setting operation or the input operation is performed by a signal input from the output terminal of the logical operator.

In the current source circuit 437 and the current source circuit 438, the circuit configuration of the current source circuit shown in Figs. 6, 7, 29, 28, 31 and the like can be freely used. Each current source circuit uses not only one system but may employ a plurality of current source circuits.

In addition, although the setting operation | movement is performed line by line with respect to the latch circuit from the video signal constant current source 109 in FIG. 4, it is not limited to this. As shown in FIG. 33, setting operation | movement is performed simultaneously in multiple columns, in other words, you may multiply. Although two video signal constant current sources 109 are arranged in FIG. 33, the setting operation may be performed in the video signal constant current sources separately arranged for the two video signal constant current sources.

In Fig. 4, an example of a combination of the schemes used for the current source circuit 437 and the current source circuit 438 and the advantages thereof will be described. First, a case in which the circuit as shown in Fig. 6A is employed in the current source circuit 437 and the current source circuit 438 will be described. If the current source circuit of the circuit as shown in Fig. 6A is used, the number of transistors to be arranged can be reduced, so that the influence of the characteristic variation of the transistor can be further suppressed. In other words, since the transistor that performs the setting operation and the transistor that performs the input operation are the same transistor, they are not affected by the fluctuations between the transistors. However, since the current at the time of performing the setting operation cannot be increased, the setting operation cannot be performed faster. At this time, the current during the setting operation corresponds to the current supplied from the constant current source 109 for video signal to the latch circuit.

The circuit diagram in this case is shown in FIG.

At this time, in FIG. 34, current flowed from the pixel toward the current source circuit through the signal line. However, the direction of this current changes depending on the configuration of the pixel. 35 shows a circuit diagram when the current flows from the current source circuit to the pixel.

In this way, by changing the polarity of the transistor, a circuit in the case where the current direction is different can be configured. Alternatively, by using the circuit of FIG. 7A instead of FIG. 6A, it is also possible to configure a circuit in the case where the direction of the current is different without changing the polarity of the transistor.

Next, the case where the current mirror circuit as shown in FIG. 6C is employed in the current source circuit 437 and the current source circuit 438 will be described with reference to FIG.

In the two transistors of the current mirror circuit as shown in Fig. 6C, W (gate width) / L (gate length) of the transistor connected to the pixel compared to the transistor connected to the constant current source 109 for video signal. When the value is small, the current value supplied from the constant current source 109 for video signal can be increased.

In other words, the W / L of the transistor on the side of the setting operation is made larger than the W / L of the transistor on the side of the input operation. By doing so, the current for performing the setting operation, that is, the current flowing from the constant current source 109 for video signals to the latch circuit can be increased. If the current is large, the charge can be charged very quickly in the wiring cross-capacitance and the like accompanying the wiring, so that it can be brought to agile and steady state. Therefore, the setting operation can be performed more quickly.

At this time, in the current mirror circuit as shown in Fig. 6C, if the gate electrodes have at least two transistors connected in common or electrically, and the characteristics of the two transistors change, they are output from the source terminal or the drain terminal of the transistor. The current also fluctuates. However, if the characteristics of the two transistors are provided, the current output therefrom does not change. Conversely, in order to prevent the output current from fluctuating, the characteristics of the two transistors may be provided. In other words, in the current mirror circuit as shown in Fig. 6C, the characteristics may be provided between two transistors having the same gate electrode. The characteristics need not be provided between transistors in which the gate electrodes are not common. This is because the setting operation is performed for each current source circuit. In other words, the transistor that is the target of the setting operation and the transistor used in the input operation may have the same characteristics. Even if the characteristics are not provided between transistors in which the gate electrodes are not common, since the setting is performed for each current source circuit by the setting operation, the characteristic variation is corrected.

Normally, in the current mirror circuit as shown in Fig. 6C, two transistors having the same gate electrode are disposed in close proximity to suppress variations in the characteristics of the two transistors.

In Fig. 36, for example, the magnitude of the current supplied to the pixel is P. For example, in the two transistors of the current mirror circuit as shown in Fig. 6C in the current source circuits (current source circuits 437 and 438), when the W / L value of the transistor connected to the pixel is set to Wa, it is connected to the video signal line. The W / L value of the transistor on the side is set to (2 × Wa). Then, the current value is doubled in the current source circuits (current source circuits 437 and 438). In this case, a current of (2 x P) is supplied from the constant current source 109 for video signals. As a result, the current supplied from the video signal constant current source 109 can be increased, so that the setting operation of the current source circuits (current source circuits 437 and 438) can be performed quickly and accurately.

In summary, the current supplied from the video signal constant current source 109 can be increased by employing the current mirror circuit as shown in Fig. 6C and setting the W / L value to an appropriate value. As a result, the setting operation of the current source circuit can be performed accurately.

In other words, if the current is large, the charge can be charged very quickly, such as the parasitic capacitance that is parasitic in the wiring, so that it can be brought to a steady state very quickly. When the steady state is reached, the setting operation can be sufficiently performed. In the case where the setting operation is performed within a certain period of time, if the current is large, the setting operation can be performed very quickly, so that the setting operation can be sufficiently performed. If the current is small, the period for performing the setting operation ends before the steady state. In this case, since there is not enough time, the setting operation is not performed correctly. Therefore, when the current is large, the setting operation of the current source circuit can be performed very quickly and accurately.

However, in the current mirror circuit as shown in Fig. 6C, when the gate electrodes have at least two transistors in common, and the characteristics of the two transistors change, the current output therein also varies.

However, the magnitude of the current can be changed by setting the ratio W / L of the channel width W and the channel length L of the transistor to a different value between the two transistors. Normally, the current during the setting operation is increased. As a result, the setting operation can be performed very quickly.

At this time, the current during the setting operation corresponds to a current supplied from the constant current source 109 for video signal.

On the other hand, when the circuit shown in Fig. 6A is used, the current flowing in the setting operation and the current flowing in the input operation are almost the same. Therefore, the current for performing the setting operation cannot be increased. However, the transistor that supplies current when the setting operation is performed and the transistor that supplies current when the input operation is performed are the same transistor. Therefore, the influence of the fluctuation between transistors is not affected at all. Therefore, in the latch circuit, the current mirror circuit as shown in Fig. 6C is used for the portion where the current is large when the setting operation is performed, and the circuit shown in Fig. 6A is used for the portion where the more accurate current is to be output. It is preferable to use in combination.

Thus, the circuit diagram in the case of using the current mirror circuit as shown in Fig. 6C in the current source circuit for the lower bit (first bit) and the same circuit as in Fig. 6A in the current source circuit for the upper bit (the second bit). Is shown in FIG.

At this time, the polarity may be sufficient as the transistor operated as a simple switch. In FIG. 4, the case where the circuit of FIG. 2 is applied to the circuit of FIG. 3A was described. 37, the case where the circuit of FIG. 1 is applied to the circuit of FIG. 3A is described.

In Fig. 37A, the video signal (signal current) supplied from the video line is supplied to the current source circuit. The setting operation of the current source circuit is performed in accordance with the timing of the sampling pulse supplied from the shift register 418. For example, in the case of the configuration shown in Fig. 37A, after the setting operation of the current source circuit is finished, the input operation (output of the current to the pixel) is started. Therefore, the point-sequential driving can be realized by performing the setting operation of the current source circuit one by one in sequence and then performing the input operation.

37A shows the case of analog gradation display or 1-bit digital gradation, and FIG. 38 shows the case of 2-bit digital gradation.

39 shows a circuit in the case where the circuit of FIG. 6A is applied to the circuit of FIG. 38. 40 shows a circuit in the case where the circuit of FIG. 6C is applied to the circuit of FIG. 38. FIG. 41 shows a circuit in the case where the circuit of FIG. 6C is applied to the current source circuit for 1 bit and the circuit of FIG. 6A is applied to the current source circuit for 2 bit. In the case of the circuit of Fig. 41, the magnitude of the video signal current is increased by changing the W / L of the current source circuit for one bit. As a result, the setting operation can be performed in the same period as that in the case of the 2-bit current source circuit.

However, when the first to last columns are selected in order, the first column has a long period of inputting a signal to the pixels. On the other hand, in the last column, even if the video signal is input, the pixels in the next row are immediately selected. As a result, the period for inputting a signal to the pixel is shortened. In such a case, as shown in FIG. 37B, by dividing the scanning line arranged in the pixel portion 402 at the center, the period for inputting a signal to the pixel can be increased. In that case, one scanning line driver circuit is disposed on the left and right sides of the pixel portion 402, and the pixel is driven using the scanning line driver circuit. In this way, even in the pixels arranged in the same row, the right pixel and the left pixel can shift the input period of the signal. FIG. 37C shows the output waveforms of the scan line driver circuits disposed on the right and left sides of the first and second rows, and the start pulse S-SP of the shift register 411. By operating in the same manner as the waveform described with reference to Fig. 37C, even in the pixel on the left side, the period for inputting a signal to the pixel can be lengthened, so that it is easy to perform point sequential driving.

In the signal line driver circuit of the present invention, a layout diagram is shown in FIG. 49 and a corresponding circuit diagram is shown in FIG. 50 for the current source circuit disposed in the latch.

Moreover, in this embodiment, it can combine freely with Embodiment 1-3.

(Embodiment 5)

In this embodiment, a detailed configuration and operation of the signal line driver circuit 403 shown in FIG. 15A will be described. However, in this embodiment, the signal line driver circuit 403 used for performing 2-bit digital gradation display will be described. It demonstrates using FIG. 3B, FIG. 5, FIG.

3B shows a schematic diagram of the signal line driver circuit 403 in the case of performing 2-bit digital gradation display. The signal line driver circuit 403 includes a shift register 418 and a latch circuit 419.

Briefly describing the operation, the shift register 418 is configured by using a plurality of columns of the flip-flop circuit FF, and includes a clock signal S-CLK, a start pulse S-SP, and a clock inversion signal S-. CLKb) is input. According to the timing of these signals, three sequential sampling pulses are output.

The sampling pulse output from the shift register 418 is input to the latch circuit 419. A 2-bit digital video signal (Digital Data, Digital Data2) is input to the latch circuit 419, and the video signal is held in each column in accordance with the timing at which the sampling pulse is input.

The 1-bit digital video signal is supplied to the constant current source 109 for 1-bit video signal. It is input from the connected current source. The 2-bit digital video signal is input from a current source connected to the 2-bit video signal constant current source 109. The latch circuit 419 holds the signal current (corresponding to the video signal) set in the constant current source 109 for video signals for 1-bit and 2-bit.

In addition, a latch pulse is input to the latch circuit 419, and the 2-bit digital video signals (Digital Data1 and Digital Data2) held in the latch circuit 419 are input to a pixel connected to the signal line. At this time, the latch circuit 419 may have a role of converting a digital signal into an analog signal.

Next, the configuration of the latch circuit 419 will be described with reference to FIG. Fig. 5 shows an outline of a signal line driver circuit 403 which performs digital gradation display of two bits around the two signal lines of the i-th to (i + 1) th columns. Similarly, Fig. 26 shows an outline of a signal line driver circuit for performing digital gradation display of two bits around the three signal lines in the i-th to (i + 2) th columns.

5 shows a case where the constant current source 109 for video signals corresponding to each bit is arranged.

In Fig. 5, the latch circuit 419 has a switch 435a, a switch 436a, a current source circuit 437a, a current source circuit 438a, and a switch 439a for each column. Each column also has a switch 435b, a switch 436b, a current source circuit 437b, a current source circuit 438b, and a switch 439b.

The switches 435a and 435b are controlled by sampling pulses input from the shift register 418. In addition, switches 436a, 439a, 436b, and 439b are controlled by latch pulses.

At this time, the inverted signal is input to the switch 436a and the switch 439a. As a result, the current source circuit 437a and the current source circuit 438a perform the setting operation on one side and the input operation on the other side. In addition, the inverted signals are input to the switch 436b and the switch 439b. As a result, the current source circuit 437b and the current source circuit 438b perform the setting operation on one side and the input operation on the other side.

In other words, when the current source circuit 437 is performing the setting operation, at the same time, the current source circuit 438 outputs a signal current to the pixel and performs the input operation. In this way, since the setting operation and the input operation of the current source circuit can be performed at the same time, the setting operation can be performed with time and accurate.                 

At this time, the signal current supplied from the video data line has a magnitude dependent on the video signal. Therefore, since the current supplied to the pixel has a magnitude proportional to the signal current, the image can be represented.

Therefore, it becomes possible to perform linear sequential driving.

At this time, in Fig. 5, the current line and the constant current source for the video signal are arranged corresponding to each bit. The sum of the current values supplied from the current source of each bit is supplied to the signal line. In short, the constant current source circuit also has a function of digital-analog conversion.

Each current source circuit (current source circuits 437a, 438a, 437b, 438b) has a terminal a, a terminal b, and a terminal c. Each current source circuit (current source circuits 437a, 438a, 437b, 438b) is controlled by a signal input through the terminal a. In addition, the current (signal current Idata) set using the constant current source 109 for video signals connected to the video line via the terminal b is maintained. The current set in the constant current source 109 for one bit is held by the current source circuit 437a and the current source circuit 438a. The current set in the constant current source 109 for two bits is held by the current source circuit 437b and the current source circuit 438b. A switch 439a and a switch 439b are provided between each of the current source circuits (current source circuits 437a, 438a, 437b, and 438b) and the pixel connected to the signal line, and the switches 439a and 439b are turned on or off by a latch pulse. Controlled.

When the digital video signal is a bright signal, a signal current is output from each current source circuit (current source circuits 437a, 438a, 437b, 438b) to the pixel. On the contrary, when the video signal is a dark signal, each of the current source circuits (current source circuits 437a, 438a, 437b, 438b) does not have a capability of flowing a current, so that no current flows to the pixel. In other words, each current source circuit (current source circuits 437a, 438a, 437b, 438b) is controlled by a video signal with the ability (VGS) to allow a constant current to flow, and the brightness is controlled using the magnitude of the current output to the pixel.

At this time, the total current of any one of the one-bit current source circuit 437a and the current source circuit 438a and the two-bit current source circuit 437b and the current source circuit 438b flows to the pixel and the signal line connected to the pixel. .

Which one of the current source circuit 437a for one bit and the current source circuit 438a performs the setting operation, and which one performs the input operation (output of the current to the pixel) is controlled by the latch pulse. The same applies to the current source circuit 437b and the current source circuit 438b for two bits.

In other words, the current of the video signal of each bit is added together, and the DA conversion operation is performed in the portion flowing toward the pixel in the current source circuit 437a or 437b. Therefore, at that time, it is sufficient that the magnitude of the current is a current value corresponding to each bit.

Next, the outline of the signal line driver circuit shown in FIG. 26 will be described. In Fig. 26, the latch circuit has a switch 435c, a switch 435d, a switch 436c, a current source circuit 437c, a current source circuit 438c, and a switch 439c for each column. The switches 435c and 435d are controlled by sampling pulses input from the shift register 418. The switches 436c and 439c are also controlled by latch pulses.                 

At this time, the inverted signal is input to the switch 436c and the switch 439c. As a result, the current source circuit 437c and the current source circuit 438c perform the setting operation on one side and the input operation on the other side. The current source circuit 437c and the current source circuit 438c perform the setting operation on one side and the input operation on the other side.

In other words, when the current source circuit 437a performs the setting operation, at the same time, the current source circuit 438a outputs a signal current to the pixel and performs the input operation. In this way, since the setting operation and the input operation of the current source circuit can be performed at the same time, the setting operation can be performed with time and accurate.

In short, in order to perform the setting operation correctly, it is necessary to continue the setting operation until the steady state. When the steady state is reached, no current flows through the gate electrode of the transistor in the current source circuit (transistor supplying a constant current. In FIG. 6A, which corresponds to transistor 102 in FIG. 6A), the capacitor maintains the voltage between the gate and source of the transistor (FIG. 6A). In this case, the potential of the capacitor element 103) does not change. In this state, the setting operation can be sufficiently performed. In short, during the input operation, it is possible to flow a current of the correct magnitude. However, if the time for performing the setting operation is short, there is a possibility that the setting operation ends before the steady state. In that case, the capacitance holding the gate-source voltage of the transistor does not become an exact potential. Therefore, during the input operation, it is impossible to flow a current having the correct magnitude, and the influence of variations in the characteristics of the transistor is caused. From the above, if the setting operation is performed with time, the setting operation can be performed accurately.                 

Each of the current source circuits 437c and 438c has a terminal a, a terminal b, and a terminal c. Each of the current source circuits 437c and 438c is controlled by a signal input through the terminal a. In addition, the current (signal current Idata) set using the constant current source 109 for video signals connected to the video line via the terminal b is maintained. At this time, the current set in the constant current source 109 for 1-bit and 2-bit is held by the current source circuit 437a or the current source circuit 438a. A switch 439c is provided between each of the current source circuits 437a and 438a and the pixel connected to the signal line, and on or off of the switch 439c is controlled by a latch pulse.

When the digital video signal is a bright signal, a signal current is output from the current source circuits 437c and 438c to the pixel. On the contrary, when the video signal is a dark signal, each of the current source circuits 437c and 438c does not have the ability to flow a current, so that no current flows to the pixel. In other words, each of the current source circuits 437c and 438c is controlled by the video signal with the ability VGS to flow a constant current, and the brightness is controlled by using the magnitude of the current output to the pixel.

In the present invention, the setting signal input from the terminal a indicates the signal input from the output terminal of the logical operator. In other words, the setting signal in FIG. 1 corresponds to a signal input from an output terminal of the logical operator. In the present invention, the current source circuit 420 is set in accordance with the signal input from the output terminal of the logical operator.

Two input terminals of the logical operator are inputted with sampling pulses from the shift register on one side and latch pulses on the other. The logical operator performs logical operation of two input signals, and outputs a signal from the output terminal. In the current source circuit, the setting operation or the input operation is performed in accordance with the signal input from the output terminal of the logical operator.

Here, the case where the circuit like FIG. 6A is employ | adopted for each current source circuit shown in FIG. 5 and each current source circuit shown in FIG. 26 is demonstrated. If the current source circuit of the circuit as shown in Fig. 6A is used, the number of transistors to be arranged can be reduced, so that the influence of the characteristic variation of the transistor can be further suppressed. In other words, since the transistor that performs the setting operation and the transistor that performs the input operation are the same transistor, they are not affected by the fluctuations between the transistors. However, since the current at the time of performing the setting operation cannot be increased, the setting operation cannot be performed faster. At this time, the current in the setting operation corresponds to the current supplied from the constant current source 109 for video signal to the latch circuit.

The circuit diagram in this case is shown in FIG.

Next, the case where the current mirror circuit as shown in FIG. 6C is adopted in each of the current source circuits shown in FIG. 5 and each of the current source circuits shown in FIG. 26 will be described with reference to FIG. 43.

In the two transistors of the current mirror circuit as shown in Fig. 6C, W (gate width) / L (gate length) of the transistor connected to the pixel compared to the transistor connected to the constant current source 109 for video signal. When the value is small, the current value supplied from the constant current source 109 for video signal can be increased.

In other words, the W / L of the transistor on the side of the setting operation is made larger than the W / L of the transistor on the side of the input operation. By doing so, the current for performing the setting operation, that is, the current flowing from the constant current source 109 for video signals to the latch circuit can be increased. If the current is large, the charge can be charged very quickly in the wiring cross-capacitance and the like accompanying the wiring, so that it can be made very fast and in a normal state. Therefore, the setting operation can be performed more quickly.

At this time, in the current mirror circuit as shown in Fig. 6C, if the gate electrodes have at least two transistors connected in common or electrically, and the characteristics of the two transistors are provided, they are output from the source terminal or the drain terminal of the transistor. The current does not change. In short, in order to prevent the output current from fluctuating, the characteristics of the two transistors may be provided. In other words, in the current mirror circuit as shown in Fig. 6C, the characteristics may be provided between two transistors in which the gate electrodes are commonly or electrically connected. Characteristics do not need to be provided between transistors in which the gate electrodes are not commonly or electrically connected. This is because the setting operation is performed for each current source circuit. In other words, the transistor that is the target of the setting operation and the transistor used in the input operation may have the same characteristics. Even if the characteristics are not provided between transistors in which the gate electrodes are not commonly or electrically connected, the setting operation is performed for each current source circuit by the setting operation, so that the characteristic variation is corrected.

Usually, in the current mirror circuit as shown in Fig. 6C, two transistors in which the gate electrodes are commonly or electrically connected are arranged in close proximity to suppress variations in their characteristics.

For example, the magnitude of the current supplied to the pixel is P. For example, in the two transistors of the current mirror circuit in the current source circuit, if the W / L value of the transistor connected to the pixel is Wa, the W / L value of the transistor connected to the video signal line is (2). Let x be a). Then the current value is doubled in each current source circuit. Then, the current of (2 x P) or (4 x P) is supplied from the constant current source 109 (for 1 bit or for 2 bits) for the video signal. By doing so, since the current supplied from the constant current source 109 for video signals can be increased, the setting operation of each current source circuit can be performed very quickly and accurately.

In the present embodiment, since two bits of digital gradation display are performed, in FIG. 5, four current source circuits 437a, 438a, 437b, and 438b for each signal line, in FIG. 26, two current source circuits 437c, one for each signal line, 438c is installed.

In Fig. 5, the circuit configuration of each current source circuit (current source circuits 437a, 438a, 437b, 438b) and each of the current source circuits (current source circuits 437c, 438c) shown in Fig. 26 are shown in Figs. 6, 7, 29, 28, and 28. The circuit configuration of the current source circuit shown in Fig. 31, etc. can be used freely, each of the current source circuits 420 may not only use one method, but may adopt a plurality.

In addition, when the current source circuit of the latch circuit is a current mirror circuit as shown in Fig. 6C, the W (gate width) / L (gate length) value of the transistor may be changed in accordance with each bit. By doing so, the current during the setting operation of the low-bit current source circuit, that is, the current flowing from the low-bit video signal constant current source 109 can be made larger. As a result, the setting operation can be speeded up.

In other words, the W / L of the transistor connected to the video signal constant current source 109 is made larger than the W / L of the transistor connected to the pixel or the signal line. As a result, the W / L of the transistor on the side of the setting operation is made larger than the W / L of the transistor on the side of the input operation. By doing so, the current for performing the forward operation, that is, the current flowing from the constant current source 109 for video signal can be made larger.

However, in the current mirror circuit as shown in Fig. 6C, at least two transistors in which the gate electrodes are commonly or electrically connected are changed, and if the characteristics of the two transistors change, the current output therefrom also varies. However, the magnitude of the current can be changed by setting the ratio W / L of the channel width W and the channel length L of the transistors to different values in the two transistors. Normally, the current during the setting operation is increased. As a result, the setting operation can be performed very quickly.

At this time, the current during the setting operation corresponds to a current supplied from the constant current source 109 for video signal.

On the other hand, when the circuit shown in Fig. 6A is used, the current flowing in the setting operation and the current flowing in the input operation are almost the same. Therefore, the current for performing the setting operation cannot be increased. However, the transistor that supplies current when the setting operation is performed and the transistor that supplies current when the input operation is performed are the same transistor. Therefore, the influence of the fluctuation between transistors is not affected at all. Therefore, in each latch circuit, the current mirror circuit shown in Fig. 6C is used for the portion where the current when the setting operation is made large, and the circuit shown in Fig. 6A is used for the portion where the current is to be output more accurately. It is preferable to use combining suitably.

At this time, in the current mirror circuit as shown in Fig. 6C, when the gate electrodes have at least two transistors connected in common or electrically, and the characteristics of the two transistors change, the current output therein also changes. However, if the characteristics of the two transistors are provided, the current output from the source terminal and the drain terminal of the transistor does not change. Conversely, in order to prevent the output current from fluctuating, the characteristics of the two transistors may be provided. In other words, in the current mirror circuit as shown in Fig. 6C, the characteristics may be provided between two transistors in which the gate electrodes are connected in common or electrically. The characteristics need not be provided between transistors in which the gate electrodes are not commonly or electrically connected. This is because the setting operation is performed for each current source circuit. In other words, the transistor that is the target of the setting operation and the transistor used in the input operation may have the same characteristics. Even if the characteristics are not provided between transistors in which the gate electrodes are not commonly or electrically connected, the setting operation is performed for each current source circuit by the setting operation, so that characteristic variations are corrected.

Usually, in the current mirror circuit as shown in Fig. 6C, two transistors in which the gate electrodes are commonly or electrically connected are arranged in close proximity to suppress variations in the characteristics of the two transistors.

At this time, in the current source circuit included in the latch circuit, a circuit as shown in Fig. 6A may be used or a current mirror circuit as shown in Fig. 6C may be used or mixed.

At this time, the current mirror circuit as shown in Fig. 6C may be a current source circuit for all the bits or a current source circuit for some bits. More preferably, it is preferable to use the current mirror circuit as shown in Fig. 6C for the current source circuit for the lower bit and the circuit as shown in Fig. 6A for the current source circuit for the upper bit.

This is because the current source circuit of the upper bit has a large influence on the current value even if the characteristics of the transistor of the current source circuit are slightly changed. This is because even if the characteristics of the transistor fluctuate to the same extent, the current supplied from the current source circuit of the upper bit has a large current value itself, and therefore the absolute value of the difference of the current caused by the variation is also large. For example, it is assumed that the characteristics of the transistor fluctuate by 10%. If the magnitude of the first bit current is set to I, the variation amount is 0.1I. On the other hand, since the magnitude of the 3-bit current is 8I, the amount of variation is 0.8I. As described above, even if the characteristics of the transistors fluctuate slightly, the influence of the higher-order current source circuit is greatly reduced.

For this reason, it is desirable that the variation is not affected as much as possible. In addition, since the current value of the upper bit has a large current value, it is also easy to perform the setting operation. On the other hand, even if the current of the lower bit fluctuates somewhat, the current value itself is small, and thus the influence is small. In addition, since the current value of the lower bit has a small current value, it is not easy to perform the setting operation.

In order to solve this situation, it is preferable to use the current mirror circuit as shown in Fig. 6C for the current source circuit for the lower bit and the circuit as shown in Fig. 6A for the current source circuit for the higher bit.

In particular, in the current source circuit for the lower bit where the current flowing from the video signal constant current source 109 becomes small, it is effective to increase the current value by using the current mirror circuit as shown in Fig. 6C.

In short, the current source circuit for the lower bit has a small current value flowing through the current source circuit, and therefore, the setting operation takes time. Therefore, when the current value is increased by using the current mirror circuit as shown in Fig. 6C, the time for the setting operation can be shortened.

In the current mirror circuit as shown in Fig. 6C, at least two transistors in which the gate electrodes are commonly or electrically connected to each other, and if the characteristics of the two transistors change, the current output therefrom also varies. However, in the case of the current source circuit for the lower bit, the current value output to the pixel or the signal line is small. Therefore, even if the characteristics of the two transistors vary, the influence is small. From the above, it is effective to use the current mirror circuit as shown in Fig. 6C in the current source circuit for the lower bit. In summary, the current supplied from the video signal constant current source 109 can be increased by employing the current mirror circuit as shown in Fig. 6C and setting the W / L value to an appropriate value. As a result, the setting operation of the current source circuit can be performed accurately.

However, in the current mirror circuit as shown in Fig. 6C, at least two transistors in which the gate electrodes are commonly or electrically connected are changed, and if the characteristics of the two transistors change, the current output therefrom also varies.

On the other hand, when the circuit shown in Fig. 6A is used, the current flowing in the setting operation cannot be increased. However, the influence of the variation between transistors is not affected at all.

Therefore, in each circuit, the current mirror circuit as shown in FIG. 6C is used in the portion where the current is to be increased, and the circuit like FIG. 6A is used in the portion where the more accurate current is to be used. It is preferable.

At this time, the transistor which is simply operated as a switch may have either polarity.

At this time, in Fig. 5, the 1-bit video signal constant current source 109 is connected to a 1-bit video line (Video data line), and the 2-bit video signal constant current source 109 is used for 2 bits. It is connected to a video line (Video data line). For example, when the current supplied from the video signal constant current source 109 for 1 bit is set to I, the current supplied from the video signal constant current source 109 for 2 bits is set to 2I. However, the present invention is not limited to this, and the magnitude of the current supplied from the constant current source 109 for video signals for 1 bit and the constant current source 109 for video signals for 2 bits can also be made the same. By equalizing the magnitude of the current supplied from the constant current source 109 for video signal for 1 bit and the constant current source 109 for video signal for 2 bit, it is possible to equalize the operating conditions and load, and to provide a signal to the current source circuit. The time to record can be the same.                 

In this case, however, the current mirror circuit shown in Fig. 6C should be adopted for each of the current source circuits shown in Figs. In each of the current source circuits shown in Fig. 5, the W / L values of the transistors of the current source circuits 437a and 438a and the transistors of the current source circuits 437b and 438b need to be 2: 1. By doing so, the magnitude of the current output from the current source circuit 437a and the current source circuit 438a and the magnitude of the current output from the current source circuit 437b and the current source circuit 438b can be set to 2: 1. In each current source circuit shown in Fig. 26, it is necessary to set the W / L value of the transistor on the side connected to the video signal line and the transistor on the side connected to the pixel to be 2: 1.

In this embodiment, the configuration and operation of the signal line driver circuit in the case of performing 2-bit digital gradation display have been described. However, the present invention is not limited to 2 bits, and a signal line driver circuit corresponding to an arbitrary number of bits can be designed with reference to the present embodiment to display an arbitrary number of bits. In addition, this embodiment can be combined freely with Embodiment 1-4.

Embodiment 6

The video signal constant current source 109 shown in Figs. 2 to 5 may be formed integrally with a signal line driver circuit on the substrate, or as a video signal current 109, even if a constant current is input from the outside of the substrate using an IC or the like. do. And when integrally forming on a board | substrate, you may form using any one of the current source circuits shown to FIG. 6-8, FIG. 29, FIG. 28, FIG. Alternatively, one transistor may be simply arranged to control the current value according to the voltage applied to the gate. In this embodiment, the case where the 3-bit video signal current source 109 is constituted by the current source circuit of the current mirror circuit as shown in Fig. 6C will be described with reference to Figs.

At this time, the direction in which the current flows changes depending on the configuration of the pixel and the like. When changing the direction in which the current flows, it is possible to easily cope by changing the polarity of the transistor or the like.

In Fig. 23, the constant current source 109 for a video signal has a high value of a 3-bit digital video signal (Digital Data1 to Digital Data3) whether or not to output a predetermined signal current Idata to a video line (Video data line, current line). Or low information.

The constant current source 109 for video signals includes switches 180 to 182, transistors 183 to 188, and a capacitor 189. In the present embodiment, all of the transistors 180 to 188 are n-channel type.

The switch 180 is controlled by a 1 bit digital video signal. The switch 181 is controlled by a 2-bit digital video signal. The switch 183 is controlled by a 3-bit digital video signal.

The source region and the drain region of the transistors 183 to 185 are connected to one terminal of Vss and the other of the transistors 183 to 185 of one of the switches 180 to 182. The source region and the drain region of the transistor 186 are connected to one of the source and drain regions of the transistor 188 and the other of the source region and the drain region of the transistor 186.

Signals are input from the outside to the gate electrodes of the transistors 187 and 188 through the terminal e. In addition, current is supplied to the current line 190 from the outside through the terminal f.

The source region and the drain region of the transistor 187 are connected to one of the source region and the drain region of the transistor 186, and the other of the source region and the drain region of the transistor 187 is connected to one electrode of the capacitor 189. The source and drain regions of the transistor 188 are connected to one of the current lines 190 and the other of the source and drain regions of the transistor 188 to one of the source and drain regions of the transistor 186.

One electrode of the capacitor 189 is connected to the gate electrodes of the transistors 183 to 186, and the other electrode is connected to Vss. The capacitor 189 plays a role of maintaining the gate-source voltage of the transistors 183 to 186.

In the constant current source 109 for video signals, when the transistors 187 and 188 are turned on by the signal input from the terminal e, the current supplied from the terminal f flows through the current line 190 to the capacitor 189.

Then, charge gradually accumulates in the capacitor 189, and a potential difference starts to develop between the positive electrodes. When the potential difference between the positive electrodes reaches Vth, the transistors 183 to 186 are turned on.

In the capacitor 189, charge accumulation can be continued until the potential difference between the two electrodes, that is, the voltage between the gate and the source of the transistors 183 to 186, reaches a desired voltage. In other words, the accumulation of charge can be continued until the transistors 183 to 186 become a voltage enough to flow the signal current.

When the charge accumulation ends, the transistors 183 to 186 are completely turned on.

In the constant current source 109 for video signals, the conduction or non-conduction of the switches 180 to 182 is selected by the 3-bit digital video signal. For example, when the switches 180 to 182 are both in a conductive state, the current supplied to the current line is the sum of the drain current of the transistor 183, the drain current of the transistor 184, and the drain current of the transistor 185. When only the switch 180 is in a conductive state, only the drain current of the transistor 183 is supplied to the current line.

At this time, if the drain current of the transistor 183, the drain current of the transistor 184, and the drain current of the transistor 185 are set as 1: 2: 4, the magnitude of the current can be controlled in 2 ³ = 8 steps. Therefore, when the W (channel width) / L (channel length) values of the transistors 183 to 185 are designed as 1: 2: 4, each on current becomes 1: 2: 4.

23 shows the case where there is one current line (video) line. However, the number of current lines (video lines) arranged differs between the circuit as shown in Fig. 4 and the circuit as shown in Fig. 26. Thus, in the circuit of FIG. 23, a diagram in the case where there are a plurality of current lines (video lines) is shown in FIG.

Next, FIG. 24 shows a current source 109 for video signals having a different configuration from that in FIG. In FIG. 24, except for the transistors 187 and 188, one terminal of the capacitor 189 is connected to the current line 190 in comparison with the video signal current source 109 shown in FIG. Since it is the same as the operation of the video signal current source 109 shown in 23, the description is omitted in this embodiment.

In the configuration of FIG. 24, while the current is continuously supplied to the video line (current line), a signal (current) must be input from the terminal f. If the input of the current flowing from the terminal f is stopped, the charge in the capacitor 189 is discharged through the transistor 186. As a result, the potential of the gate electrode of the transistor 186 becomes small, and normal current cannot be output from the transistors 183 to 185. On the other hand, in the case of the configuration shown in Fig. 23, since the predetermined charge is held in the capacitor 189, it is necessary to continuously input the signal (current) from the terminal f even while the current is supplied to the video line (current line). There is no. Therefore, in the configuration of FIG. 24, the capacitor 189 may be omitted.

24 shows the case where there is one current line (video) line. However, the number of current lines (video lines) differs depending on the circuit as shown in FIG. 4 or the circuit as shown in FIG. Therefore, in the circuit of FIG. 24, the figure at the time of multiple current lines (video line) is shown in FIG.

Subsequently, a video signal current source 109 having a configuration different from that shown in FIGS. 23 and 24 is shown in FIG. In FIG. 25, except for the transistors 186, 187, 188, and the capacitor 189, the gate electrodes of the transistors 183 through 185 have a constant voltage from the outside through the terminal f, compared to the video signal current source 109 shown in FIG. Since it is the same as that of the video signal current source 109 shown in FIG. 23 except for the configuration which is applied, description is abbreviate | omitted in this embodiment.

In the case of FIG. 25, a voltage (gate voltage) is applied from the terminal f to the gate electrodes of the transistors 183 to 185. However, even when the same gate voltage is applied to the transistors 183 to 185, if the characteristics of the transistors 183 to 185 vary, the current value flowing between the source and the drain of the transistors 183 to 185 also changes. Thus, the current flowing through the video line (current line) also varies. In addition, since the characteristics change depending on the temperature, the current value supplied from the transistors 183 to 185 also changes.

On the other hand, in the case of FIGS. 23 and 24, a voltage can be applied from the terminal f, but a current can also be applied. When applied with a current, if the characteristics of the transistors 183 to 186 are provided, the current value does not change. Moreover, even if the characteristic changes with temperature, since the characteristics to transistors 183-186 change to the same extent, a current value does not change.

At this time, in Fig. 25, a voltage (gate voltage) is applied to the transistors 183 to 185 from the terminal f, and the voltage does not change with the video signal. In FIG. 25, the video signal controls whether or not current flows through the current line by controlling the switches 180 to 182. Thus, as shown in Fig. 46, a voltage (gate voltage) may be applied to the gate electrodes of the transistors 183 to 185, and the voltage may be changed by the video signal. Accordingly, the magnitude of the current for the video signal can be changed. In addition, as shown in FIG. 47, the voltage (gate voltage) applied to the gate electrode of the transistor 183 may be an analog voltage, and the voltage may be changed in accordance with the grayscale to change the current.

Subsequently, a video signal current source 109 having a configuration different from that shown in FIGS. 23, 24, and 25 is shown in FIG. In Fig. 23, the current source circuit of Fig. 6C is applied. In Fig. 9, the current source circuit of Fig. 6A is applied.

In the case of FIG. 23, when the characteristics of the transistors 183 to 186 change, the current value also changes. In Fig. 9, the setting operation is performed for each current source. Therefore, the influence of the fluctuation of the transistor can be reduced. However, in the case of Fig. 9, when the setting operation is being performed, the input operation (the operation of supplying the current to the current line) cannot be performed at the same time. Therefore, the setting operation must be performed in a period where the input operation is not performed. In order to be able to perform the setting operation even during the period of input operation, as shown in Fig. 10, when a plurality of current source circuits are arranged and one of the current source circuits is performing the setting operation, the input operation is performed by the other current source circuit. May be performed.

At this time, this embodiment can be combined freely with Embodiment 1-5.

(Embodiment 7)

Embodiment of this invention is described using FIG. In Fig. 11A, a signal line driver circuit is disposed above the pixel portion, a constant current circuit is disposed below, and a current source A is disposed in the signal line driver circuit and a current source B is placed in the constant current circuit. If the currents supplied from the current sources A and B are IA and IB, and the signal current supplied to the pixel is Idata, then IA = IB + Idata is established. When the signal current is written to the pixel, the current is set to supply current from both of the current sources A and B. At this time, by increasing IA and IB, the recording speed of the signal current to the pixel can be increased.

At this time, using the current source A, the setting operation of the current source B is performed. In the pixel, a current is obtained by subtracting the current from the current source IB from the current from the current source A. Therefore, by performing the setting operation of the current source B using the current source A, the influence of various noises and the like can be made smaller.

In Fig. 11B, constant current sources (hereinafter referred to as constant current sources) C and E for video signals are arranged above and below the pixel portion. Then, using the current sources C and E, the setting operation of the current source circuit disposed in the signal line driver circuit and the constant current circuit is performed. The current source D corresponds to a current source for setting the current sources C and E, and is supplied with a video signal current from the outside.

In this case, in Fig. 11B, the constant current circuit disposed below may be a signal line driver circuit. As a result, the signal line driver circuit can be disposed on both the upper side and the lower side. Each of them controls the top and bottom half of the screen (the whole pixel part). By doing in this way, as many pixels as two rows can be controlled simultaneously. Therefore, it is possible to take a long time for the setting operation (signal input operation) to the current source, the pixel, the current source of the pixel, or the like of the signal line driver circuit. Therefore, it becomes possible to set more correctly.

This embodiment can be arbitrarily combined with Embodiments 1-6.

<Example 1>

In this embodiment, the time gradation method will be described in detail with reference to FIG. Usually, in display devices such as liquid crystal display devices and light emitting devices, the frame frequency is about 60 Hz. In short, as shown in Fig. 14A, about 60 screens are drawn in one second. As a result, it is possible to prevent the human eye from feeling flicker. At this time, a period during which the screen is drawn once is called a one frame period.

In this embodiment, as an example, the time gradation method disclosed in the publication of Patent Document 1 will be described. In the time gradation method, one frame period is divided into a plurality of subframe periods. The number of divisions at this time is often the same as the number of gradation bits. Here, for the sake of simplicity, the case where the number of divisions is equal to the number of gradation bits is shown. In other words, in this embodiment, since it is a 3-bit gradation, an example of dividing into three subframe periods SF1 to SF3 is shown (Fig. 14B).

Each subframe period has an address (write) period Ta and a sustain (light emitting) period Ts. The address period is a period in which a video signal is recorded in the pixel, and the length in each subframe period is the same. The sustain period is a period during which the light emitting element emits light in accordance with the video signal recorded in the pixel in the address period. At this time, in the sustain (luminescence) periods SF1 to SF3, the ratio of the lengths is set to Ts1: Ts2: Ts3 = 4: 2: 1. In other words, when expressed n-bit gray scale, the ratio of the lengths of the n sustain periods ^{is, 2 (n-1):} 2 (n-2): ···: 2 1: 2 and ^0. The length of the period in which each pixel emits light is determined for each frame period according to which sustain period the light emitting element emits light, and gray scale expression is thereby performed.

Next, a specific operation of the pixel to which the time gradation method is applied will be described. In the present embodiment, a description will be given with reference to the pixel shown in FIG. 16B. The current input method is applied to the pixel shown in FIG. 16B.

First, in the address period Ta, the following operations are performed. The first scan line 602 and the second scan line 603 are selected, and the TFTs 606 and 607 are turned on. At this time, the current flowing through the signal line 601 is defined as the signal current Idata. When a predetermined charge is accumulated in the capacitor element 610, selection of the first scan line 602 and the second scan line 603 ends, and the TFTs 606 and 607 are turned off.

Next, in the sustain period Ts, the following operations are performed. The third scanning line 604 is selected, and the TFT 609 is turned on. Since the predetermined charge previously recorded is held in the capacitor 610, the TFT 608 is turned on, and a current similar to the signal current Idata flows from the current line 605. As a result, the light emitting element 611 emits light.

By performing the above operation in each subframe period, one frame period is constituted. According to this method, when the number of display gradations is to be increased, the number of divisions in the sub frame period may be increased. In addition, the order of the subframe periods does not necessarily have to be the order from the upper bits to the lower bits as shown in Figs. 14B and 14C, and may be randomly arranged for one frame period. Furthermore, within each frame period, the order may be changed.

In addition, the subframe period SF2 of the m-th scanning line is shown in Fig. 14D. As shown in Fig. 14D, in the pixel, when the address period Ta2 ends, the sustain period Ts2 starts immediately.

This embodiment can be combined arbitrarily with Examples 1-7.

<Example 2>

In the present embodiment, a configuration example of a circuit of pixels provided in the pixel portion will be described with reference to FIG.

In this case, any pixel having any configuration including a portion for inputting current can be applied to any pixel.

The pixel of Fig. 13A includes signal lines 1101, first and second scanning lines 1102, 1103, current lines (power lines) 1104, switching TFTs 1105, holding TFTs 1106, and driving TFTs. 1107, a conversion driving TFT 1108, a capacitor 1109, and a light emitting element 1110. Each signal line is connected to a current source circuit 1111.

At this time, the current source circuit 1111 corresponds to the current source circuit 420 disposed in the signal line driver circuit 403.

The gate electrode of the switching TFT 1105 is connected to the first scanning line 1102, the first electrode is connected to the signal line 1101, and the second electrode is a first electrode of the driving TFT 1107, and a first electrode of the conversion driving TFT 1108. Is connected to. The gate electrode of the holding TFT 1106 is connected to the second scanning line 1103, the first electrode is connected to the first electrode of the conversion driving TFT 1106, and the second electrode is the gate electrode of the driving TFT 1107 and the conversion driving. It is connected to the gate electrode of the TFT 1108. The second electrode of the driving TFT 1107 is connected to a current line (power supply line) 1104, and the second electrode of the conversion driving TFT 1108 is connected to one electrode of the light emitting element 1110. The capacitor 1109 is connected between the gate electrode of the conversion driving TFT 1108 and the second electrode, and holds the gate-source voltage of the conversion driving TFT 1108. Predetermined potentials are input to the other electrodes of the current line (power line) 1104 and the light emitting element 1110, respectively, and have a potential difference from each other.

13A corresponds to the case where the circuit of FIG. 29B is applied to the pixel. However, since the directions in which the current flows are different, the polarities of the transistors are reversed. The driving TFT 1107 of FIG. 13A corresponds to the TFT 126 of FIG. 29B, the conversion driving TFT 1108 of FIG. 13A corresponds to the TFT 122 of FIG. 29B, and the holding TFT 1106 of FIG. 13A corresponds to the TFT 124 of FIG. 29B. do.

The pixel in Fig. 13B includes signal lines 1151, first and second scan lines 1142 and 1143, current lines (power lines) 1144, switching TFT 1145, holding TFT 1146, and conversion driving. TFT 1147, driver TFT 1148, capacitor 1149, and light emitting element 1140. The signal line 1151 is connected to the current source circuit 1141.

At this time, the current source circuit 1141 corresponds to the current source circuit 420 disposed in the signal line driver circuit 403.

The gate electrode of the switching TFT 1145 is connected to the first scanning line 1142, the first electrode is connected to the signal line 1151, and the second electrode is a first electrode of the driving TFT 1148 and a first electrode of the conversion driving TFT 1147. Is connected to. The gate electrode of the holding TFT 1146 is connected to the second scanning line 1143, the first electrode is connected to the first electrode of the driving TFT 1148, and the second electrode is the gate electrode of the driving TFT 1148, and the conversion driving TFT. It is connected to the gate electrode of 1147. The second electrode of the conversion driving TFT 1147 is connected to the current line (power supply line) 1144, and the second electrode of the driving TFT 1148 is connected to one electrode of the light emitting element 1140. The capacitor 1149 is connected between the gate electrode of the conversion driving TFT 1147 and the second electrode, and holds the voltage between the gate and source of the conversion driving TFT 1147. Predetermined potentials are input to the other electrodes of the current line (power line) 1144 and the light emitting element 1140, respectively, and have potential differences with each other.

At this time, the pixel of FIG. 13B corresponds to the case where the circuit of FIG. 6B is applied to the pixel. However, since the directions in which the current flows are different, the polarities of the transistors are reversed. The conversion driving TFT 1147 of FIG. 13B corresponds to the TFT 122 of FIG. 6B, the driving TFT 1148 of FIG. 13B corresponds to the TFT 126 of FIG. 6B, and the holding TFT 1146 of FIG. 13B corresponds to the TFT 124 of FIG. 6B. do.

The pixel of FIG. 13C includes a signal line 1121, a first scan line 1122, a second scan line 1123, a third scan line 1135, a current line 1124, a current line 1138, and a switching transistor TFT 1125. ), An erasing TFT 1126, a driving TFT 1127, a capacitor 1128, a current source TFT 1129, a mirror TFT 1310, a capacitor 1113, a current input TFT 1132, a holding TFT ( 1133 and a light emitting element 1136. Each signal line is connected to a current source circuit 1137.

The gate electrode of the switching TFT 1125 is connected to the first scanning line 1122, the first electrode of the switching TFT 1125 is connected to the signal line 1121, and the second electrode of the switching TFT 1125 is the gate electrode of the driving TFT 1125, The first electrode of the erasing TFT 1126 is connected. The gate electrode of the erasing TFT 1126 is connected to the second scanning line 1123, and the second electrode of the erasing TFT 1126 is connected to the current line 1124. The first electrode of the driving TFT 127 is connected to one electrode of the light emitting element 1136, and the second electrode of the driving TFT 1127 is connected to the first electrode of the current source TFT 1129. The second electrode of the current source TFT 1129 is connected to the current line 1124. One electrode of the capacitor 1131 is connected to the gate electrode of the current source TFT 1129 and the gate electrode of the mirror TFT 1130, and the other electrode is connected to the current line 1124. The first electrode of the mirror TFT 1130 is connected to the current line 1124, and the second electrode of the mirror TFT 1130 is connected to the first electrode of the current input TFT 1132. The second electrode of the current input TFT 1132 is connected to the current line 1138, and the gate electrode of the current input TFT 1132 is connected to the third scan line 1135. The gate electrode of the current holding TFT 1133 is connected to the third scanning line 1135, the first electrode of the current holding TFT 1133 is connected to the power supply line 1138, and the second electrode of the current holding TFT 1133 is the gate electrode and the mirror TFT of the current source TFT 1129. It is connected to the gate electrode of 1130. Predetermined potentials are input to the other electrodes of the current line 1124 and the light emitting element 1136, respectively, and have a potential difference from each other.

This embodiment can be arbitrarily combined with Examples 1 to 7 and Example 1.

<Example 3>

In this embodiment, the study in the case of performing color display is described.

In the case where the light emitting element is an organic EL element, even if a current having the same magnitude is passed through the light emitting element, the luminance may be different depending on the color. In addition, when a light emitting element deteriorates over time, the degree of deterioration changes with color. Therefore, in the light emitting device using the light emitting element, when conducting color display, various studies are required to adjust the white balance.

The simplest technique is to change the magnitude of the current input to the pixel by color. Therefore, what is necessary is just to change the magnitude | size of the electric current of a constant current source for video signals according to a color.

As another method, circuits as shown in Figs. 6C to 6E are used in pixels, signal line driver circuits, constant current sources for video signals, and the like. 6C to 6E, the W / L ratios of the two transistors constituting the current mirror circuit are changed by color. Accordingly, the magnitude of the current input to the pixel can be changed by color.

As another method, the length of the lighting period is changed by color. This can be applied to either the case where the time gradation method is used or the case where the time gradation method is not used. By this method, the luminance of each pixel can be adjusted.

The white balance can be easily adjusted by using the above method or by using it in combination.

This embodiment can be arbitrarily combined with Examples 1 to 7, and Examples 1 and 2.

<Example 4>

In the present embodiment, the appearance of the light emitting device (semiconductor device) of the present invention will be described with reference to FIG. 12 is a plan view of a light emitting device formed by sealing a device substrate on which transistors are formed with a sealing material, FIG. 12B is a cross-sectional view taken along line AA ′ of FIG. 12A, and FIG. 12C is taken along BB ′ of FIG. 12A. It is a cross section.

A sealing material 4009 is provided so as to surround the pixel portion 4002 provided on the substrate 4001, the source signal line driver circuit 4003, and the gate signal line driver circuits 4004a and b. Furthermore, a sealing material 4008 is provided on the pixel portion 4002, the source signal line driver circuit 4003, and the gate signal line driver circuits 4004a and b. Therefore, the pixel portion 4002, the source signal line driver circuit 4003, and the gate signal line driver circuits 4004a and b are formed into the filler 4210 by the substrate 4001, the sealing member 4009, and the sealing member 4008. It is sealed.

The pixel portion 4002, the source signal line driver circuit 4003, and the gate signal line driver circuits 4004a and b set on the substrate 4001 have a plurality of TFTs. In Fig. 12B, typically, a driving TFT (in this case, an n-channel TFT and a p-channel TFT) shown in the source signal line driver circuit 4003 formed on the base film 4010 (4201) and the pixel portion ( The erasing TFT 4202 included in 4002 is shown.

In this embodiment, a p-channel TFT or an n-channel TFT manufactured by a known method is used for the driving TFT 4201, and an n-channel TFT manufactured by a known method is used for the erasing TFT 4202.

An interlayer insulating film (planarization film) 4301 is formed on the driving TFT 4201 and the erasing TFT 4202, and a pixel electrode (anode) 4203 electrically connected to the drain of the erasing TFT 4202 is formed thereon. Is formed. As the pixel electrode 4203, a transparent conductive film having a large work function is used. As the transparent conductive film, a compound of indium oxide and tin oxide, a compound of indium oxide and zinc oxide, zinc oxide, tin oxide or indium oxide can be used. Moreover, you may use what added gallium to the said transparent conductive film.

An insulating film 4302 is formed on the pixel electrode 4203, and an opening is formed on the pixel electrode 4203. In this opening portion, a light emitting layer 4204 is formed on the pixel electrode 4203. The light emitting layer 4204 may use a known light emitting material or an inorganic light emitting material. In addition, although there exist a low molecular weight (monomer type) material and a high molecular weight (polymer type) material as a light emitting material, either may be used.

The formation method of the light emitting layer 4204 may use a well-known vapor deposition technique or a coating technique. The light emitting layer 4204 may have a laminated structure or a single layer structure by arbitrarily combining a hole injection layer, a hole transport layer, a light emitting layer, an electron transport layer, or an electron injection layer.

On the light emitting layer 4204, a cathode 4205 made of a light shielding conductive film (typically, a conductive film mainly composed of aluminum, copper or silver, or a laminated film of these and other conductive films) is formed. In addition, it is preferable to exclude moisture and oxygen existing at the interface between the cathode 4205 and the light emitting layer 4204 as much as possible. Therefore, it is necessary to study that the light emitting layer 4204 is formed with nitrogen or a rare gas atmosphere, and the cathode 4205 is formed without being in contact with oxygen or moisture. In the present embodiment, film formation is possible as described above by using a film forming apparatus of a multi-chamber method (cluster tool method). The cathode 4205 is supplied with a predetermined voltage.

As described above, the light emitting element 4303 constituted by the pixel electrode (anode) 4203, the light emitting layer 4204, and the cathode 4205 is formed. A protective film is formed on the insulating film so as to cover the light emitting element 4303. The protective film is effective for preventing oxygen, moisture, and the like from entering the light emitting element 4303.

4005a is a drawing wiring connected to the power supply line, and is electrically connected to the source region of the erasing TFT 4202. The lead-out wiring 4005a is electrically connected to the FPC wiring 4301 of the FPC 4006 through the anisotropic conductive film 4300 between the sealing material 4009 and the substrate 4001.

As the sealing material 4008, a glass material, a metal material (typically stainless steel), a ceramic material, and a plastic material (including a plastic film) can be used. As the plastic material, a fiber glass-reinforced plastics (FRP) plate, a PVF (polyvinyl fluoride) film, a mylar film, a polyester film or an acrylic resin film can be used. Moreover, the sheet | seat of the structure which sandwiched the aluminum film with the PVF film or the mylar film can also be used.

However, the cover material must be transparent when the radiation direction of the light from the light emitting layer is directed to the cover material side. In that case, transparent materials such as glass plates, plastic plates, polyester films or acrylic films are used.

As the filler 4210, in addition to an inert gas such as nitrogen or argon, an ultraviolet curable resin or a thermosetting resin can be used, and PVC (polyvinyl chloride), acrylic, polyimide, epoxy resin, silicone resin, PVB (poly) Vinyl butyral) or EVA (ethylene vinyl acetate) may be used. In this example, nitrogen was used as the filler.

In addition, since the filler 4210 is exposed to a hygroscopic material (preferably barium oxide) or a material capable of adsorbing oxygen, a recess 4007 is provided on the surface of the sealing member 4008 on the substrate 4001 side. A material 4207 capable of absorbing hygroscopic material or oxygen is disposed. In order to prevent the hygroscopic material or the oxygen absorbent material 4207 from scattering, the recess cover material 4208 holds the hygroscopic material or the oxygen absorbable material 4207 in the recess 4007. It is. At this time, the concave cover member 4208 has a mesh shape, and has a structure in which air or moisture is passed through, and a material 4207 that can adsorb hygroscopic substances or oxygen does not pass. By providing a hygroscopic material or a material 4207 capable of adsorbing oxygen, deterioration of the light emitting element 4303 can be suppressed.

As shown in FIG. 12C, when the pixel electrode 4203 is formed, a conductive film 4203a is formed to be in contact with the lead-out wiring 4005a.

In addition, the anisotropic conductive film 4300 has a conductive filler 4300a. By thermally compressing the substrate 4001 and the FPC 4006, the conductive film 4203a on the substrate 4001 and the FPC wiring 4301 on the FPC 4006 are electrically connected by the conductive filler 4300a.

This example can be arbitrarily combined with Embodiments 1-7 and Examples 1-3.

<Example 5>

Since the light emitting device using the light emitting element is a self-luminous type, it is superior in visibility in a bright place and has a wide viewing angle as compared with a liquid crystal display. Therefore, it can be used for the display portion of various electronic devices.                 

As an electronic device using the light emitting device of the present invention, a video camera, a digital camera, a goggle type display (head mount display), a navigation system, a sound reproducing apparatus (car audio, an audio component stereo, etc.), a notebook type personal computer, a game machine, A portable information terminal (mobile computer, mobile phone, portable game machine or electronic book, etc.) and an image reproducing apparatus (specifically, a digital versatile disc (DVD)) equipped with a recording medium can be played back and displayed on the image. Device with a display). In particular, it is preferable to use a light emitting device for a portable information terminal having many opportunities to view a screen from an inclined direction, since the viewing angle is important. Specific examples of those electronic devices are shown in FIG. 22.

FIG. 22A illustrates a light emitting device, and includes an exterior case 2001, a support base 2002, a display unit 2003, a speaker unit 2004, a video input terminal 2005, and the like. The light emitting device of the present invention can be used for the display portion 2003. Further, according to the present invention, the light emitting device shown in Fig. 22A is completed. Since the light emitting device is self-luminous, no backlight is required, and the display can be made thinner than that of the liquid crystal display. At this time, the light emitting device includes all information display devices such as a personal computer, a TV broadcast receiver, and an advertisement display.

Fig. 22B shows a digital still camera and includes a main body 2101, a display portion 2102, an image receiving portion 2103, operation keys 2104, an external connection port 2105, a shutter 2106, and the like. The light emitting device of the present invention can be used for the display portion 2102. Moreover, according to this invention, the digital still camera shown in FIG. 22B is completed.

Fig. 22C shows a notebook personal computer and includes a main body 2201, an exterior case 2202, a display portion 2203, a keyboard 2204, an external connection port 2205, a pointing mouse 2206, and the like. The light emitting device of the present invention can be used for the display portion 2203. Further, according to the present invention, the light emitting device shown in Fig. 22C is completed.

22D is a mobile computer, and includes a main body 2301, a display portion 2302, a switch 2303, operation keys 2304, an infrared port 2305, and the like. The light emitting device of the present invention can be used for the display portion 2302. Moreover, according to this invention, the mobile computer shown in FIG. 22D is completed.

Fig. 22E is a portable image reproducing apparatus (specifically, DVD reproducing apparatus) provided with a recording medium, which includes a main body 2401, an external case 2402, a display portion A2403, a display portion B2404, a recording medium (DVD, etc.). A reading unit 2405, an operation key 2406, a speaker unit 2407, and the like. The display portion A2403 mainly displays image information, and the display portion B2404 mainly displays character information. However, the light emitting device of the present invention can be used for these display portions A, B 2403 and 2404. At this time, the image reproducing apparatus provided with the recording medium includes a home game machine and the like. Further, according to the present invention, the DVD player shown in Fig. 22E is completed.

22F is a goggle display (head mount display), and includes a main body 2501, a display portion 2502, and an arm portion 2503. The light emitting device of the present invention can be used for the display portion 2502. Moreover, according to this invention, the goggle type display shown in FIG. 22 (F) is completed.

22G shows a video camera, which includes a main body 2601, a display portion 2602, an exterior case 2603, an external connection port 2604, a remote control receiver 2605, a water receiver 2606, a battery 2607, and an audio input unit ( 2608, operation keys 2609, eyepiece 2610, and the like. The light emitting device of the present invention can be used for the display portion 2602. Moreover, according to this invention, the video camera shown in FIG. 22G is completed.

Here, Fig. 22H is a mobile phone, the main body 2701, the exterior case 2702, the display portion 2703, the audio input unit 2704, the audio output unit 2705, the operation key 2706, the external connection port 2707, Antenna 2708 and the like. The light emitting device of the present invention can be used for the display portion 2703. At this time, the display portion 2703 can suppress the current consumption of the cellular phone by displaying white characters on a black background. Moreover, according to this invention, the cellular phone shown in FIG. 22H is completed.

At this time, when the light emission luminance of the light emitting material is increased in the future, the light including the output image information can be enlarged and projected by a lens or the like to be used in a front or rear projector.

In addition, the electronic apparatuses often display information distributed through electronic communication lines such as the Internet and CATV (cable television), and in particular, opportunities for displaying moving image information are increasing. Since the response speed of the light emitting material is very high, the light emitting device is suitable for moving picture display.

In addition, since the light emitting device consumes power in the light emitting portion, it is preferable to display the information so that the light emitting portion is minimized. Therefore, when the light emitting device is used in a display unit mainly for text information such as a mobile information terminal, particularly a cellular phone or an audio reproducing apparatus, it is preferable to drive the non-light emitting portion so as to form the character information as the light emitting portion.

As described above, the scope of application of the present invention is very wide, and it can be used for electronic devices in all fields. In addition, the electronic device of this embodiment may use the light-emitting device of any of the structures shown in Embodiments 1-7 and Examples 1-6.

The present invention can provide a signal line driver circuit capable of suppressing the influence of variation in characteristics of a TFT and supplying a desired signal current to the outside.

The present invention provides a light emitting device in which a signal line driver circuit having a current source circuit as described above is set, and also uses a pixel having a circuit configuration in which the influence of TFT characteristics is suppressed, thereby forming both a pixel and a driver circuit. Provided is a light emitting device capable of suppressing the influence of a characteristic variation of a and supplying a desired signal current Idata to a light emitting element.

Claims (36)

In a signal line driver circuit having first and second current source circuits and shift registers corresponding to each of a plurality of signal lines, Each of the first and second current source circuits has a capacitor; According to a sampling pulse supplied from the shift register and a latch pulse supplied from the outside, one of the first and second current source circuits converts a current obtained by adding current supplied from each of the n video signal current sources into a voltage. Maintaining the voltage by the capacitor, N is a natural number, The other of the first and second current source circuits supplies a current corresponding to the voltage to a corresponding signal line, And a current value supplied from the n video signal current sources is set to 2 ⁰ : 2 ¹ : ... 2 ^n-1 . In a signal line driver circuit having (2 × n) current source circuits and shift registers corresponding to each of a plurality of signal lines, N is a natural number, The (2 × n) current source circuits each have a capacitor element, two (2 × n) current source circuits correspond to each of the n video signal current sources, One of the two current source circuits converts a current supplied from the corresponding video signal current source into a voltage in accordance with a sampling pulse supplied from the shift register and a latch pulse supplied from the outside, and the voltage is converted by the capacitor. To maintain The other of the two current source circuits supplies a current corresponding to the voltage to a corresponding signal line, Each of the plurality of signal lines is supplied with current from n selected from the (2 × n) current source circuits, And a current value supplied from the n video signal current sources is set to 2 ⁰ : 2 ¹ : ... 2 ^n-1 . The method according to claim 1 or 2, At least one of the current source circuits further has a transistor, When the drain and the gate of the transistor are in a shorted state, a potential difference is generated between the gate and the source of the transistor by the current supplied to the transistor, and the potential difference generated between the gate and the source of the transistor is converted into the capacitor. And a signal line driver circuit. The method according to claim 1 or 2, At least one of the current source circuits, Transistors, A first switch controlling conduction between the gate and the drain of the transistor; A second switch for controlling conduction between the video signal current source and the source or drain of the transistor; And a third switch for controlling the conduction of the drain of the transistor and the pixel. The method according to claim 1 or 2, At least one of the current source circuits further has first and second transistors connected in parallel between the video signal current source and the power supply, When the drain and the gate of both the first and second transistors are in a shorted state, a potential difference is generated between the gate and the source of the first and second transistors by the current supplied to the first and second transistors. And a potential difference generated between the gate and the source of the first or second transistor by the capacitor. The method according to claim 1 or 2, At least one of the current source circuits, A current mirror circuit including first and second transistors, A first switch for controlling the conduction between the gate and the drain of the first transistor; And a second switch for controlling the conduction of the video signal current source and the source or drain of the first transistor. The method according to claim 1 or 2, At least one of the current source circuits further has first and second transistors connected with their gates, When the drain and the gate of the first transistor are in a shorted state, a potential difference is generated between the gate and the source of the first transistor by the current supplied to the first transistor, and the gate and the source of the first transistor are generated. And a potential difference generated by the capacitor element, and outputting current through the first and second transistors at the time of outputting the current. The method according to claim 1 or 2, At least one of the current source circuits, A current mirror circuit including first and second transistors, A first switch for controlling conduction between the video signal current source and the source or drain of the first transistor; A second switch controlling one of conduction between a drain and a gate of the first transistor, a gate of the first transistor and a gate of the second transistor, gates of the first and second transistors and a current source for the video signal; And a signal line driver circuit. The method of claim 6, And the gate width / gate length of the first and second transistors is set to the same value. The method of claim 6, And the gate width / gate length value of the first transistor is set to a value larger than the gate width / gate length value of the second transistor. The method according to claim 1 or 2, At least one of the current source circuits, Transistors, First and second switches for controlling supply of current to the transistor; And a third switch for controlling the conduction of the gate and the drain of the transistor, A gate of the transistor is connected to one terminal of the third switch, another terminal of the third switch is connected to a drain of the transistor, a source of the transistor is connected to one terminal of the first switch, and The other terminal of the first switch is connected to a video signal current source, the drain of the transistor is connected to one terminal of the second switch, and the other terminal of the second switch is connected to a power source. Driving circuit. The method according to claim 1 or 2, At least one of the current source circuits has a current mirror circuit comprising m transistors, The value of the gate width / gate length of the m transistor is 2 ^0: 2 ^1: ···: 2 and setting the ratio of the ^m-1, And the drain currents of the m transistors are set at a ratio of 2 ⁰ : 2 ¹ : ... 2 ^{m -1} . The method according to claim 1 or 2, And at least one transistor constituting at least one of the current source circuits operates in a saturation region. The method according to claim 1 or 2, And at least one of the transistors constituting at least one of the current source circuits is an active layer formed of polysilicon. A light emitting device comprising the pixel portion in which the signal line driver circuit according to claim 1 or 2 and a plurality of pixels each including a light emitting element are arranged in a matrix. The method of claim 7, wherein And the gate width / gate length of the first and second transistors is set to the same value. The method of claim 8, And the gate width / gate length of the first and second transistors is set to the same value. The method of claim 7, wherein And the gate width / gate length value of the first transistor is set to a value larger than the gate width / gate length value of the second transistor. The method of claim 8, And the gate width / gate length value of the first transistor is set to a value larger than the gate width / gate length value of the second transistor. Shift register, Current source for video signal, A circuit for supplying a latch pulse, A latch circuit, wherein the latch circuit includes: A first switch electrically connected to the video signal current source; A second switch electrically connected to the signal line, A first logic circuit electrically connected to the circuit for supplying the shift register and the latch pulse; A second logic circuit electrically connected to the circuit for supplying the shift register and the latch pulse; A first current source circuit having a first terminal electrically connected to the first logic circuit, a second terminal electrically connected to the first switch, and a third terminal electrically connected to the second switch; A second current source circuit having a fourth terminal electrically connected to the second logic circuit, a fifth terminal electrically connected to the first switch, and a sixth terminal electrically connected to the second switch; , At least one of the first current source circuit and the second current source circuit includes a thin film transistor, And a current source for the video signal using an integrated circuit. Shift register, current sources for n video signals, A circuit for supplying a latch pulse, (n x m) latch circuits, each of the (n x m) latch circuits, A first switch electrically connected to at least one of the n video signal current sources, a second switch electrically connected to a corresponding one of the m signal lines, A first logic circuit electrically connected to the circuit for supplying the shift register and the latch pulse; A second logic circuit electrically connected to the circuit for supplying the shift register and the latch pulse; A first current source circuit having a first terminal electrically connected to the first logic circuit, a second terminal electrically connected to the first switch, and a third terminal electrically connected to the second switch; A second current source circuit having a fourth terminal electrically connected to the second logic circuit, a fifth terminal electrically connected to the first switch, and a sixth terminal electrically connected to the second switch; , each of n and m is a natural number greater than 1, The value of the current supplied from the n video-signal current source of ^20: is set to ^{2 n-1,: 2 1} : ··· At least one of the first current source circuit and the second current source circuit includes a thin film transistor, A signal line driver circuit comprising forming the n video signal current sources using an integrated circuit, The method of claim 20 or 21, At least one of the first current source circuit and the second current source circuit, Transistors, A capacitor device, The capacitor is configured to maintain a voltage between the gate terminal of the transistor and the source terminal of the transistor when the drain terminal and the gate terminal of the transistor are short-circuited and a current from the current source for video signal flows through the transistor. A signal line driver circuit, characterized in that. Shift register, Current source for video signal, A circuit for supplying a latch pulse, A latch circuit, wherein the latch circuit includes: A first switch electrically connected to the video signal current source; A second switch electrically connected to the signal line, A first logic circuit electrically connected to the circuit for supplying the shift register and the latch pulse; A second logic circuit electrically connected to the circuit for supplying the shift register and the latch pulse; A first current source circuit having a first transistor and a first capacitance element electrically connected between a gate terminal of the first transistor and a source terminal of the first transistor; A second current source circuit having a second transistor and a second capacitance element electrically connected between the gate terminal of the second transistor and the source terminal of the second transistor, A gate terminal of the first transistor and a drain terminal of the first transistor are electrically connected through a third switch, The drain terminal of the first transistor is electrically connected to the first switch and the second switch, The third switch is controlled by an output of the first logic circuit, A gate terminal of the second transistor and a drain terminal of the second transistor are electrically connected through a fourth switch, The drain terminal of the second transistor is electrically connected to the first switch and the second switch, The fourth switch is controlled by an output of the second logic circuit, At least one of the first current source circuit and the second current source circuit includes a thin film transistor, And a current source for the video signal using an integrated circuit. Shift register, current sources for n video signals, A circuit for supplying a latch pulse, (n x m) latch circuits, each of the (n x m) latch circuits, A first switch electrically connected to at least one of the n video signal current sources, a second switch electrically connected to a corresponding one of the m signal lines, A first logic circuit electrically connected to the circuit for supplying the shift register and the latch pulse; A second logic circuit electrically connected to the circuit for supplying the shift register and the latch pulse; A first current source circuit having a first transistor and a first capacitance element electrically connected between a gate terminal of the first transistor and a source terminal of the first transistor; A second current source circuit having a second transistor and a second capacitance element electrically connected between the gate terminal of the second transistor and the source terminal of the second transistor, A gate terminal of the first transistor and a drain terminal of the first transistor are electrically connected through a third switch, The drain terminal of the first transistor is electrically connected to the first switch and the second switch, The third switch is controlled by an output of the first logic circuit, A gate terminal of the second transistor and a drain terminal of the second transistor are electrically connected through a fourth switch, The drain terminal of the second transistor is electrically connected to the first switch and the second switch, The fourth switch is controlled by an output of the second logic circuit, each of n and m is a natural number greater than 1, The value of the current supplied from the n video-signal current source of ^20: is set to ^{2 n-1,: 2 1} : ··· At least one of the first current source circuit and the second current source circuit includes a thin film transistor, A signal line driver circuit comprising forming the n video signal current sources using an integrated circuit, Shift register, Current source for video signal, A circuit for supplying a latch pulse, A latch circuit, wherein the latch circuit includes: A first switch electrically connected to the video signal current source; A second switch electrically connected to the signal line, A first logic circuit electrically connected to the circuit for supplying the shift register and the latch pulse; A second logic circuit electrically connected to the circuit for supplying the shift register and the latch pulse; Between the first transistor, the second transistor, the gate terminal of the first transistor and the source terminal of the first transistor, and between the gate terminal of the second transistor and the source terminal of the second transistor. A first current source circuit having a first capacitor connected to the circuit;  Between the third transistor, the fourth transistor, the gate terminal of the third transistor and the source terminal of the third transistor, and between the gate terminal of the fourth transistor and the source terminal of the fourth transistor. A second current source circuit having a second capacitor connected to the circuit; A gate terminal of the first transistor and a drain terminal of the first transistor are electrically connected through a third switch, The drain terminal of the first transistor is electrically connected to the first switch, A drain terminal of the second transistor is electrically connected to the second switch, The third switch is controlled by an output of the first logic circuit, A gate terminal of the third transistor and a drain terminal of the third transistor are electrically connected through a fourth switch, The drain terminal of the third transistor is electrically connected to the first switch, A drain terminal of the fourth transistor is electrically connected to the second switch, The fourth switch is controlled by an output of the second logic circuit, At least one of the first current source circuit and the second current source circuit includes a thin film transistor, A signal line driver circuit comprising forming a current source for the video signal using an integrated circuit, Shift register, current sources for n video signals, A circuit for supplying a latch pulse, (n x m) latch circuits, each of the (n x m) latch circuits, A first switch electrically connected to at least one of the n video signal current sources, a second switch electrically connected to a corresponding one of the m signal lines, A first logic circuit electrically connected to the circuit for supplying the shift register and the latch pulse; A second logic circuit electrically connected to the circuit for supplying the shift register and the latch pulse; Between the first transistor, the second transistor, the gate terminal of the first transistor and the source terminal of the first transistor, and between the gate terminal of the second transistor and the source terminal of the second transistor. A first current source circuit having a first capacitor connected to the circuit;  Between the third transistor, the fourth transistor, the gate terminal of the third transistor and the source terminal of the third transistor, and between the gate terminal of the fourth transistor and the source terminal of the fourth transistor. A second current source circuit having a second capacitor connected to the circuit; The first capacitor and the drain terminal of the first transistor are electrically connected through a third switch, The drain terminal of the first transistor is electrically connected to the first switch, A drain terminal of the second transistor is electrically connected to the second switch, The third switch is controlled by an output of the first logic circuit, The second capacitor and the drain terminal of the third transistor are electrically connected through a fourth switch, The drain terminal of the third transistor is electrically connected to the first switch, A drain terminal of the fourth transistor is electrically connected to the second switch, The fourth switch is controlled by an output of the second logic circuit, each of n and m is a natural number greater than 1, The value of the current supplied from the n video-signal current source of ^20: is set to ^{2 n-1,: 2 1} : ··· At least one of the first current source circuit and the second current source circuit includes a thin film transistor, A signal line driver circuit comprising forming a current source for the video signal using an integrated circuit, The method of claim 25 or 26, The value of (gate width / gate length) of the first transistor is equal to the value of (gate width / gate length) of the second transistor, And a value of (gate width / gate length) of the third transistor is equal to the value of (gate width / gate length) of the fourth transistor. The method of claim 25 or 26, The value of (gate width / gate length) of the first transistor is larger than the value of (gate width / gate length) of the second transistor, And the value of (gate width / gate length) of the third transistor is larger than the value of (gate width / gate length) of the fourth transistor. The method of claim 26, The first current source circuit, i fifth switches, i fifth transistors, Each of the gate terminals of the i fifth transistors is electrically connected to a gate terminal of the second transistor, Each of the source terminals of the i fifth transistors is electrically connected to the first capacitor; Each of the drain terminals of the i fifth transistors is electrically connected to the second switch through a corresponding one of the i fifth switches, Each of the i fifth switches is controlled by a corresponding one of the current sources for the n video signals, The second current source circuit, i sixth switches, i sixth transistors, Each of the gate terminals of the i sixth transistors is electrically connected to a gate terminal of the fourth transistor, Each of the source terminals of the i sixth transistors is electrically connected to the second capacitor; Each of the drain terminals of the i sixth transistor is electrically connected to the second switch through a corresponding one of the i sixth switches, Each of the i sixth switches is controlled by a corresponding one of the current sources for the n video signals, And i is a natural number. The method of claim 29, The value of the (gate width / gate length) of the i fifth transistors is set to a ratio of 2 ⁰ : 2 ¹ : ... 2 ^m-1 , The value of (gate width / gate length) of the i of the sixth transistor ²⁰ is: the signal line driver circuit characterized in that the set ratio of the ^{2 m-1: 2 1:} ···. The method of claim 20 or 21, At least one of the first current source circuit and the second current source circuit includes a transistor, And said transistor operates in a saturation region. The method of claim 20 or 21, At least one of the first current source circuit and the second current source circuit includes a transistor, And the active layer of the transistor is formed of polysilicon. A light emitting device comprising the pixel portion in which the signal line driver circuit according to claim 20 or 21 and a plurality of pixels each including a light emitting element are arranged in a matrix form. The method according to any one of claims 23 to 26, And at least one of the first transistor and the second transistor operates in a saturation region. The method according to any one of claims 23 to 26, And at least one of the first transistor and the second transistor is formed of polysilicon. 27. A light emitting device comprising: the signal line driver circuit according to any one of claims 23 to 26, and a pixel portion in which a plurality of pixels including light emitting elements are arranged in a matrix.

Images