KR100914193B1 - Liquid crystal display television and driving method thereof - Google Patents

Abstract

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a liquid crystal television and a driving method thereof. Specifically, a data driver integrated circuit is arranged on a vertical side of a liquid crystal display panel so that the number of data driver integrated circuits can be reduced, thereby reducing the overall manufacturing cost. It is about a method. To this end, the present invention comprises an input controller for sequentially receiving the first frame and the second frame of x * y resolution from the timing controller; A first frame memory in which a first frame is stored at x * y resolution by the input controller; And a second frame memory in which a second frame is stored at x * y resolution by the input controller. A read controller for sequentially reading and outputting a first frame stored in the first frame memory and a second frame stored in the second frame memory as an image signal having y * x resolution; And a data driver integrated circuit which receives x * y * 3 image signals output from the readout controller.

Description

LCD TV and driving method thereof {LIQUID CRYSTAL DISPLAY TELEVISION AND DRIVING METHOD THEREOF}

1 is a plan view schematically showing a conventional liquid crystal display device.

2 is a plan view schematically showing a liquid crystal display device according to an embodiment of the present invention;

3 is an enlarged view illustrating an enlarged portion A of FIG. 2;

4 is a block diagram illustrating a method of driving a liquid crystal display panel according to an exemplary embodiment of the present invention.

5 is a block diagram showing operation of a read controller according to an embodiment of the present invention;

*** Explanation of symbols for the main parts of the drawing ***

100,200: liquid crystal display panel 110,210: gate driver integrated circuit

120, 220, 460: data driver integrated circuit 300: data wiring

310: gate wiring 320: thin film transistor

330a, 330b, and 330c: subpixel 340: pixel electrode

400: timing controller 410: input controller

420: read controller 430: first frame memory

440: second frame memory 450: scaler

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a liquid crystal television and a driving method thereof, and more particularly, to a liquid crystal television capable of reducing the number of data driver integrated circuits by arranging the data driver integrated circuits on the vertical sides of the liquid crystal display panel and reducing the overall manufacturing cost thereof. It relates to a driving method.

Currently, the liquid crystal display device, which is the main product of the flat panel display, has been rapidly developed in size and high resolution due to the mass production technology and the result of research and development, so it is developed not only for notebook computer but also as a television application product. As a result, the cathode ray tube (CRT) product is gradually replaced, and its portion in the display device industry is gradually increasing.

1 is a plan view schematically illustrating a conventional liquid crystal display device.

Driver integrated circuits 110 and 120 are connected to the liquid crystal display panel 100 in which a thin-film transistor (TFT) substrate and a color filter substrate are bonded.

Two types of driver integrated circuits 110 and 120 are used to drive the liquid crystal display. As shown in the drawing, the liquid crystal display panel 100 has a rectangular shape with a horizontal to vertical ratio of about 4: 3. The date driver integrated circuit 120 is attached along the long side of the horizontal side, and the gate driver integrated circuit 110 is attached along the short side of the long side.

The gate driver integrated circuit 110 serves to generate a scan signal by sequentially selecting the gate wirings arranged in the horizontal direction, and the data driver integrated circuit 120 changes the image signal to a pixel voltage in the longitudinal direction. It serves to apply to the data wiring arranged. When the gate driver integrated circuit 110 selects a gate wiring to apply a gate signal to turn the thin film transistor on, the data driver integrated circuit 120 applies a pixel voltage to each pixel through each data wiring. Play a role.

1 illustrates a liquid crystal display having a resolution of XGA, in which the resolution of the liquid crystal display is expressed by the number of pixels constituting the screen, and the amount of image information that can be simultaneously displayed on the screen is determined by the resolution and the number of colors that can be expressed. do.

XGA is a resolution commonly used in liquid crystal display devices. Since each pixel is composed of subpixels of R, G, and B to express colors, the data driver IC 120 has an output corresponding to three times the resolution. need. Thus, in the case of XGA, 3072 (= 1024 * 3) data driver ICs 120 need to be output. As shown, when using the data driver integrated circuit 120 having 384 outputs, eight data driver integrated circuits 120 are required. In addition, when using the gate driver integrated circuit 110 having 256 outputs, three gate driver integrated circuits 110 are required as shown.

The data driver integrated circuit 120 has a more complicated structure than the gate driver integrated circuit 110, and thus is about 3 to 4 times more expensive. Therefore, a method of reducing manufacturing cost by reducing the number of data driver integrated circuits 120 while maintaining the resolution has been required.

Accordingly, an object of the present invention is to reduce the number of data driver integrated circuits, which are more expensive than gate driver integrated circuits, to reduce the overall manufacturing cost.

Moreover, an object of this invention is to apply the above-mentioned liquid crystal display device to a liquid crystal television.

Other objects and features of the present invention will be described in the configuration and claims of the invention described below.

In order to achieve the above object, the present invention provides an input controller which sequentially receives a first frame and a second frame of x * y resolution from a timing controller; A first frame memory in which a first frame is stored at x * y resolution by the input controller; And a second frame memory in which a second frame is stored at x * y resolution by the input controller. A read controller for sequentially reading and outputting a first frame stored in the first frame memory and a second frame stored in the second frame memory as an image signal having y * x resolution; And a data driver integrated circuit configured to receive x * y * 3 image signals output from the readout controller. x is the number of pixels connected to one data line, and y is the number of pixels connected to one gate line.

Preferably, the output controller reads and outputs the first frame of the first frame memory while the input controller stores the second frame in the second frame memory.

The input controller and the output controller may be designed to be included in the timing controller.

It is preferable that x is larger than y.

According to another aspect of the present invention, there is provided a method of sequentially receiving first and second frames having an x * y resolution; A first storing step in which the first frame is stored in a first frame memory of a scaler at x * y resolution; A second storing step in which the second frame is stored in a second frame memory of a scaler at x * y resolution; A first reading step of sequentially reading and outputting the stored first frame as an image signal of y * x resolution; A second reading step of sequentially reading and outputting the stored second frame as an image signal having a y * x resolution; And sequentially outputting image signals of the first frame and the second frame, which have been read and output, to data lines of the liquid crystal display panel.

Preferably, the second storing step and the first reading step are performed simultaneously.

It is preferable that x is larger than y.                     

Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings.

FIG. 2 is a plan view schematically illustrating a liquid crystal display according to an exemplary embodiment of the present invention, and FIG. 3 is an enlarged view illustrating an enlarged portion A of FIG. 2.

The configuration of the embodiment of the present invention will be described with reference to FIGS. 2 and 3.

The liquid crystal is injected between the TFT substrate and the color filter substrate to form a liquid crystal display panel 200. A gate driver integrated circuit 210 is formed at a horizontal side of the outer side of the liquid crystal display panel 200, and a source driver integrated circuit is formed at a vertical side thereof. 220 is attached. As described above, the horizontal side represents the long side of the liquid crystal display panel, and the vertical side represents the short side of the liquid crystal display panel.

Each pixel is connected to the gate line 300 and the data line 310. In the exemplary embodiment of the present invention, unlike the conventional liquid crystal display, the gate line 310 is vertically and the data line 300 is horizontally. Are arranged. Pads (not shown) are formed at ends of the gate line 310 and the data line 300 to be connected to the outputs of the gate driver integrated circuit 210 and the data driver integrated circuit 220.

The liquid crystal display device in which the gate driver integrated circuit 210 and the data driver integrated circuit 220 are formed as described above will be referred to as a vertical drive liquid crystal display device, and the conventional liquid crystal display device will be referred to as a horizontal drive liquid crystal display device.

3 is an enlarged view of a portion corresponding to one pixel. As illustrated, one pixel is divided by two gate lines G1 and G2 310 arranged in the longitudinal direction and three data lines S1, S2, S3 and S4 300 arranged in the lateral direction. It consists of subpixels 330a, 330b, and 330c. Pixel electrodes 340 are deposited on the subpixels 330a, 330b, and 330c. The three subpixels 330a, 330b, and 330c are arranged in the longitudinal direction unlike conventional liquid crystal displays, and the subpixels 330a, 330b, and 330c are arranged over the entire liquid crystal display panel 200.

The thin film transistor 320 is formed as a switching element of each of the subpixels 330a, 330b, and 330c at an intersection point of the gate line 310 and the data line 320 to control the transmittance of the liquid crystal. The gate electrode of the thin film transistor 320 is electrically connected to the gate line 310, the source electrode to the data line 300, and the drain electrode to the pixel electrode 340. When the gate signal is applied to the gate line 300, all the thin film transistors 320 connected to the gate line 300 are turned on and the pixel voltage is applied to each pixel electrode 340 through the data line 300. Is approved.

A color filter is formed on the color filter substrate facing the TFT substrate on which the pixel electrode 340 is deposited. The color filter of R at the position corresponding to the subpixel 330a at the top, the color filter of G at the position corresponding to the subpixel 330b of the middle, and the color filter of B at the position corresponding to the subpixel 330c at the bottom. Is formed.

The gate driver integrated circuit 210 is attached to the horizontal side of the liquid crystal display panel 200 and connected to the gate wiring 310, and the data driver integrated circuit 220 is attached to the vertical side of the liquid crystal display panel 200 and the data wiring. Since it is connected to 300, 1024 gate wires 310 and 2304 (= 768 * 3) data wires 300 are required to express the resolution of the XGA. The reason why the data line 300 connected to the data driver integrated circuit 220 is 2304, which is three times that of 768, is because each pixel is composed of subpixels of R, G, and B to express colors. This is because a corresponding data line 300 is required, which causes the output of the data driver integrated circuit 220 to be three times the resolution.

In order to apply the gate signals to the 1024 gate lines 310, four (= 1024/256) gate driver integrated circuits 210 having 256 outputs are required. In addition, six (= 2304/384) data driver integrated circuits 220 having 384 outputs are required to apply data signals to the 2304 data lines 300.

Compared with the conventional liquid crystal display device, the number of gate lines 310 is increased by 256 (= 1024-768), but the number of data lines 300 is reduced by 768 (= 3072-2304). Accordingly, one gate driver integrated circuit 210 is increased, and two data driver integrated circuits 220 are decreased.

Since the data driver integrated circuit 220 is three to four times more expensive than the gate driver integrated circuit 210, the manufacturing cost can be reduced by reducing the expensive data driver integrated circuit 220 from eight to six. have. Since the gate driver integrated circuit 210 is less expensive than the data driver integrated circuit 220, the cost is reduced as a whole.

4 is a block diagram illustrating a method of driving the liquid crystal display panel.

A driving circuit of an embodiment of the present invention includes a scaler including a timing controller 400, an input controller 410, a read controller 420, a first frame memory 430, and a second frame memory 440. 450).

The timing controller 400 is used in a conventional horizontal driving liquid crystal display and processes image information received from a graphic controller according to a liquid crystal display panel and generates various control signals.                     

In the case of an XGA resolution liquid crystal display panel, there are 786432 (= 1024 * 768) pixels from 0 to 786431, and the timing controller 400 sequentially outputs image signals corresponding to one frame from 0 to 786431. do. After transmitting the image signal of the first frame, the image signals of the second frame and the third frame are continuously output.

The input controller 410 receives an image signal and a control signal of each pixel corresponding to the first frame from the timing controller 400 and sequentially stores the image signal and the control signal from 0 to 786431 in the first frame memory 430.

The image signal of the first frame stored in the first frame memory 430 is read by the read controller 420, which is 0, 1024, 2048, ..., 785408, 1, 1025, 2049, ..., 785409, 2, 1026, ... are read in order, and finally the information of the 786431 pixel is read out and output. That is, conventionally, pixel voltages are applied line by line in the longitudinal direction in which the data lines are arranged. However, in the embodiment of the present invention, the pixel voltages are applied line by line in the horizontal direction in which the data lines are arranged. It should be.

The input controller 410 and the read controller 420 may be manufactured as separate chips or included in the timing controller 400.

Reading in the above order can be performed by the simple algorithm shown in FIG.

Set -1024 as the initial value, perform an operation of +1024 on this value, and then perform MOD 786431 operation. The MOD 786431 allows the output value to be within the range of 0 to 786431. The value of the MOD 786431 is output and at the same time, a value of +1024 is returned. Therefore, the image signals of the horizontal drive liquid crystal display device output and stored by the timing controller are arranged and output in accordance with the image signals of the vertical drive liquid crystal display device. That is, in the conventional horizontal driving liquid crystal display, 1024 image signals are sequentially stored after being output 768 times in the line memory of the data driver integrated circuit, but in the vertical driving liquid crystal display according to the embodiment of the present invention, the 768 images are output. The signal is sequentially stored 1024 times in the line memory of the data driver integrated circuit and then output.

While the read controller 420 reads the image signal of the first frame from the first frame memory 430, the input controller cannot input the image information of the second frame, which is the next frame, into the first frame memory 430. . When the reading controller 420 reads the image signal at a slow rate, the rate at which the image signal is applied to the liquid crystal display panel is slowed to display the screen smoothly. Therefore, the input controller 410 inputs the image information of the second frame into the second frame memory while the read controller 420 reads the image signal of the first frame from the first frame memory 430. As soon as the read controller 420 finishes reading the image signal of the first frame from the first frame memory 430, it starts to read the image information of the second frame from the second frame memory 440. The order of storing and reading image information is indicated by numbers in FIG. That is, in the order of (1)-> (2), (3)-> (4), (1)-> (2), (3)-> (4), (1)-> ... Repeat the operation.

When the above process is repeated, the image information of 1024 * 768 is converted into the image information of 768 * 1024 and input to the data driver integrated circuit 460 of the vertical driving liquid crystal display according to the exemplary embodiment of the present invention.

Although the case of having a resolution of XGA has been described so far, those skilled in the art can apply the embodiment of the present invention to a case of having a resolution of x * y in general.

The first frame memory 430 and the second frame memory 440 are embedded in the scaler 450. The scaler 450 is embedded in a television, and serves to process image information according to the resolution of the display device. The embodiment of the present invention uses the memory built in the scaler as the first frame memory and the second frame memory, and thus does not require a separate memory for this. The memory of the scaler is used to store original image information before processing the image information, and also to support a picture-in-picture function.

According to the embodiment of the present invention, the R, G, and B subpixels are arranged in the longitudinal direction in order. Therefore, in the data driver integrated circuit, since the number of subpixels connected to one data line is increased from 768 to 1024 in the related art, a faster frequency is required than in the related art. In the case of the gate driver integrated circuit, since the number of gate wirings is increased, a frequency faster than that of the related art is required. However, since the frequency of the gate driver integrated circuit is usually designed with a margin, the same gate driver integrated circuit can be used in the embodiment of the present invention. For example, a driver integrated circuit used in an XGA resolution liquid crystal display device is designed to drive up to SXGA + having a resolution of 1280 * 1024.

While many details are set forth in the foregoing description, it should be construed as an illustration of preferred embodiments rather than to limit the scope of the invention. Accordingly, the scope of the invention should not be defined by the described embodiments, but should be defined by the claims and their equivalents.

According to the present invention, the number of data driver integrated circuits used can be reduced by arranging the data driver integrated circuit on the vertical side of the liquid crystal display panel and arranging the gate driver integrated circuit on the horizontal side of the liquid crystal display panel. The gate driver integrated circuit and the data driver integrated circuit may be the same as those used in the related art, and do not require a separate memory because a frame memory for driving the liquid crystal display is used as a built-in memory of the TV scaler. Do not. Therefore, this configuration can achieve the effect of reducing the overall manufacturing cost.

Claims (7)

An input controller sequentially receiving a first frame and a second frame having an x * y resolution from a timing controller; A scaler including a first frame memory in which a first frame is stored at x * y resolution by the input controller, and a second frame memory in which a second frame is stored at x * y resolution by the input controller; A read controller for sequentially reading and outputting a first frame stored in the first frame memory and a second frame stored in the second frame memory as an image signal having y * x resolution; And And a data driver integrated circuit for receiving an image signal having a y * x resolution output from the readout controller. The liquid crystal television according to claim 1, wherein said read controller reads and outputs a first frame of said first frame memory while said input controller stores a second frame in said second frame memory. The liquid crystal television according to claim 1, wherein the input controller and the read controller are included in the timing controller. The liquid crystal television according to claim 1, wherein x is larger than y. sequentially receiving a first frame and a second frame having an x * y resolution; A first storing step in which the first frame is stored in a first frame memory of a scaler at x * y resolution; A second storing step in which the second frame is stored in a second frame memory of a scaler at x * y resolution; A first reading step of sequentially reading and outputting the stored first frame as an image signal of y * x resolution; A second reading step of sequentially reading and outputting the stored second frame as an image signal having a y * x resolution; And sequentially outputting image signals of the first frame and the second frame, which have been read and output, to data lines of the liquid crystal display panel. 6. A method for driving a liquid crystal television according to claim 5, wherein the second storing step and the first reading step are performed simultaneously. 6. The method of claim 5, wherein x is greater than y.

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