KR100914197B1 - Apparatus of driving for liquid crystal display panel and method thereof - Google Patents

Abstract

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a driving apparatus and a method of a liquid crystal display panel. By instantaneously contacting the N + 1th gate line, it is possible to form a step in the scan signal without using a separate integrated circuit such as a modulation circuit.

Description

A driving device of a liquid crystal display panel and a driving method thereof {APPARATUS OF DRIVING FOR LIQUID CRYSTAL DISPLAY PANEL AND METHOD THEREOF}

1 is an equivalent circuit diagram of a unit liquid crystal cell of a general liquid crystal display panel.

FIG. 2 is a diagram of voltage waveforms applied to a general liquid crystal display panel in FIG. 1; FIG.

3 is an exemplary view showing a planar structure of a thin film transistor array substrate with respect to unit pixels of a liquid crystal display panel.

4A and 4B illustrate exemplary scan signal waveforms applied to gate lines of a general liquid crystal display panel.

5 is an exemplary view showing a block configuration of a modulator for forming a conventional gate modulated signal.

6 is an exemplary view showing a driving device of a liquid crystal display panel according to an embodiment of the present invention.

FIG. 7 is an exemplary view showing waveforms of scan signals applied to gate lines from the voltage sharing unit of FIG. 6; FIG.

*** Explanation of symbols for main parts of drawing ***

201: insulating substrate 210: liquid crystal display panel

220: gate driver 230: data driver                 

240: voltage sharing unit GL1 to GLm: gate line

DL1 to DLn: data line

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a driving device and a method of a liquid crystal display panel, and more particularly, to a driving device of a liquid crystal display panel which modulates a scan signal applied to the liquid crystal display panel to improve a poor quality of the liquid crystal display panel. And to a method thereof.

In general, a liquid crystal display device displays a desired image by individually supplying data signals according to image information to liquid crystal cells arranged in a matrix form, and adjusting a light transmittance of the liquid crystal cells. to be.

Accordingly, a liquid crystal display device includes: a liquid crystal display panel in which liquid crystal cells forming a pixel unit are arranged in an active matrix form; A driver integrated circuit (IC) for driving the liquid crystal cells is provided.

In this case, the liquid crystal display panel includes a color filter substrate and a thin film transistor array substrate facing each other, and a liquid crystal layer filled in a spaced interval between the color filter substrate and the thin film transistor array substrate.

Common electrodes and pixel electrodes are formed on opposite inner surfaces of the color filter substrate and the thin film transistor array substrate to apply an electric field to the liquid crystal layer. In this case, the pixel electrode is formed for each liquid crystal cell on the thin film transistor array substrate, while the common electrode is integrally formed on the entire surface of the color filter substrate. Therefore, by controlling the voltage applied to the pixel electrode in a state where a voltage is applied to the common electrode, it is possible to individually control the light transmittance of the liquid crystal cells.

The data lines for transmitting a data signal from a data driver integrated circuit to the liquid crystal cells and a gate for transmitting a scan signal from the gate driver integrated circuit to the liquid crystal cells on the thin film transistor array substrate of the liquid crystal display panel. The wirings are orthogonal to each other, and liquid crystal cells are defined at each intersection of these data wirings and the gate wirings.

The gate driver integrated circuit sequentially supplies scanning signals to the gate lines so that the liquid crystal cells arranged in a matrix form are sequentially selected one by one, and the selected one line of liquid crystal cells is selected from the data driver integrated circuit. The data signal is supplied.

As described above, in order to control the voltage applied to the pixel electrode for each liquid crystal cell, a thin film transistor used as a switching element is formed in each liquid crystal cell, and a liquid crystal in which a scan signal is supplied to the gate electrode of the thin film transistor through the gate lines. In the cells, a conductive channel is formed between the source electrode and the drain electrode of the thin film transistor, wherein a data signal supplied to the source electrode of the thin film transistor through the data lines is supplied to the pixel electrode via the drain electrode of the thin film transistor. The light transmittance of the liquid crystal cell is adjusted.                         

Referring to the driving of the general liquid crystal display as described above in more detail as follows.

First, a common voltage is supplied to the common electrode formed integrally on the front surface of the color filter substrate, and scan signals are sequentially supplied to the gate lines in the gate driver integrated circuit formed on the thin film transistor array substrate. Therefore, the liquid crystal cells arranged in a matrix form are sequentially selected in units of gate wirings.

Since the scan signals supplied to the liquid crystal cells of the selected gate line are applied to the gate electrodes of the thin film transistors respectively provided in the liquid crystal cells, a conductive channel is formed between the source electrode and the drain electrode of the thin film transistor.

In addition, a data signal is supplied to the liquid crystal cells of the selected gate line through the data line in the data driver integrated circuit, and the data signal is applied to the source electrode of the thin film transistor.

Therefore, the data signal supplied to the source electrode of the thin film transistor is supplied to the drain electrode through the conductive channel during the period in which the scan signal is applied.

The data signal supplied to the drain electrode is supplied to the pixel electrode connected to the drain electrode to apply an electric field to the liquid crystal layer together with the common voltage supplied to the common electrode.

When an electric field is applied to the liquid crystal layer, the liquid crystal is rotated by dielectric anisotropy to transmit light emitted from the backlight toward the color filter substrate through the pixel electrode, the liquid crystal layer, and the common electrode from the thin film transistor array substrate. At this time, the strength of the electric field is adjusted according to the voltage magnitude of the data signal applied to the pixel electrode, and the light transmittance of the liquid crystal layer is controlled by the strength of the electric field.

On the other hand, the voltage value of the data signal is charged in the storage capacitor provided in each liquid crystal cell during the scan signal is applied.

The voltage value of the data signal charged in the storage capacitor is supplied to the pixel electrode during the turn-off period of the thin film transistor to which the scan signal is not applied, thereby maintaining the driving of the liquid crystal.

In addition, when an electric field in a constant direction is continuously applied to the liquid crystal layer, the liquid crystal is deteriorated, resulting in afterimages occurring in the liquid crystal display panel by the DC voltage component. Therefore, in order to prevent deterioration of the liquid crystal and to remove the DC voltage component, the voltage value of the data signal is applied to repeat the positive / negative with respect to the common electrode. Such a driving method is called an inversion driving method. .

The driving of the liquid crystal display as described above will be described in detail with reference to the accompanying drawings.

1 is an equivalent circuit diagram of a unit liquid crystal cell of a general liquid crystal display panel.

Referring to FIG. 1, a unit liquid crystal cell includes a thin film transistor 100 having a gate electrode connected to a gate wiring 101, a source electrode connected to a data wiring 103, a drain electrode of the thin film transistor 100, Inverting driving method of the liquid crystal display panel having the liquid crystal capacitor 102 and the storage capacitor 104 connected in parallel between the common voltage Vcom and having the equivalent circuit of the unit liquid crystal cell is shown in FIG. It demonstrates in detail with reference.                         

1 and 2, the common voltage Vcom is applied to the common electrode, and the voltage V _DATA of the data signal is applied to the source electrode of the thin film transistor 100 through the data line 103. The scan signal V _G is applied to the gate electrode of the thin film transistor 100 through the gate wiring 101 every frame.

Therefore, first, in the turn-on period of the thin film transistor 100 to which the scan signal V _G of the nth frame is applied at high potential, a positive data signal voltage value V _DATA is transferred from the source electrode to the drain electrode. It is supplied to the pixel electrode to drive the liquid crystal, and is charged in the storage capacitor 104. In this case, the positive data signal voltage value V _DATA applied to the pixel electrode is gradually charged due to the influence of the liquid crystal capacitor 102 and the storage capacitor 104 in the turn-on period of the thin film transistor 100. charging), and are shown as a pixel voltage (V _P ) waveform as shown in FIG.

In addition, when the scan signal V _G transitions from the high potential to the low potential and the thin film transistor 100 is turned off, the gate may be formed due to parasitic capacitance caused by the overlap between the gate electrode and the drain electrode of the thin film transistor 100. Since the voltage variation of the electrode affects the pixel electrode connected to the drain electrode, a voltage drop occurs from the charged pixel voltage V _P , which is referred to as a change in pixel voltage ΔV _P.

On the other hand, in the turn-off period of the thin film transistor 100 to which the scan signal V _G is applied at low potential, the pixel voltage V _P charged in the storage capacitor 104 is continuously supplied to the pixel electrode, thereby It keeps running.

On the other hand, in the n + 1 frame, since the inversion driving method described above is applied, a negative data signal voltage value V _DATA is supplied from the source electrode to the pixel electrode through the drain electrode, and the storage capacitor 104 is provided. Is charged.

Thus, the turn of the n + 1 frame pixel voltage (V _P) is ideally thin film transistor 100 on the basis of the common voltage (Vcom) in-pixel voltage of the n-th frame in the off interval (-on, transition, and turns Must show a voltage waveform that is symmetric to V _P ).

However, the pixel voltage (V _P) is the pixel electrode voltage of practically the n-th frame and the n + 1 frame in accordance with the influence of the variation of the pixel voltage (△ V _P) becomes lower than the data signal voltage (V _DATA) (V _P ) are not symmetrical with each other as shown in FIG.

3 is an exemplary view showing a planar structure of a thin film transistor array substrate with respect to unit pixels of a liquid crystal display panel.

Referring to FIG. 3, the gate lines 4-1 and 4 are arranged in rows spaced apart on the substrate, and the data lines 2, 2 + 1 are arranged in columns spaced apart from each other. Thus, the gate lines 4-1 and 4 and the data lines 2 and 2 + 1 are arranged in a matrix. In this case, a unit pixel is defined at an intersection of the data line 2 and the gate line 4, and includes a thin film transistor TFT and a pixel electrode 14, respectively.                         

The TFT may include a gate electrode 10 extending at a predetermined position of the gate line 4; A source electrode 8 extending from a predetermined position of the data line 2 so that the gate electrode 10 and a predetermined region overlap with each other; The drain electrode 12 is formed to correspond to the source electrode 8 based on the gate electrode 10.

The source electrode 8 and the drain electrode 12 are formed to be uniformly spaced apart on the gate electrode 10, and the drain electrode 12 is electrically connected to the pixel electrode 14 through the drain contact hole 16. Contact. In this case, the pixel electrode 14 is formed of a transparent indium tin oxide (ITO) material having high light transmittance.

In addition, the thin film transistor TFT may include a semiconductor layer (not shown in the drawing) such that a conductive channel may be formed between the source electrode 8 and the drain electrode 12 by the scan signal supplied to the gate electrode 10. Not).

Therefore, when the scan signal is supplied to the gate electrode 10 through the gate lines 4, a conductive channel is formed between the source electrode 8 and the drain electrode 12 of the thin film transistor TFT. The data signal supplied to the source electrode 8 via the data lines 2 is transmitted to the drain electrode 12 by the conductive channel.

Since the drain electrode 12 is connected to the pixel electrode 14 through the drain contact hole 16, the data signal supplied to the drain electrode 12 is applied to the pixel electrode 14.

Accordingly, the pixel electrode 14 to which the data signal is applied generates an electric field in the liquid crystal layer together with a common transparent electrode (not shown) formed on the color filter substrate.

As described above, when an electric field is applied to the liquid crystal layer, the liquid crystal rotates by dielectric anisotropy to transmit light, and the amount of transmitted light is controlled by the voltage value of the data signal.

The pixel electrode 14 is connected to the storage electrode 20 through the storage contact hole 22, and the storage electrode 20 is connected to the preceding gate line 4-1 and the gate insulating film ( (Not shown in the figure) and overlapped to function as a storage capacitor 18.

Accordingly, the storage capacitor 18 is a voltage value of the image information applied through the data line 2 during the turn-on period of the thin film transistor TFT to which the scan signal is applied to the gate line 4. After charging the capacitor, the charged voltage is supplied to the pixel electrode 14 during the turn-off period of the thin film transistor TFT so that the driving of the liquid crystal is maintained.

As described above, the liquid crystal display panel has a parasitic capacitance as the gate electrode and the drain electrode of the thin film transistor are partially overlapped with each other. Thus, the voltage variation due to the transition of the scan signal applied to the gate electrode affects the drain electrode. give.

Since the drain electrode is connected to the pixel electrode, a positive voltage and a negative voltage are alternately applied every frame, so that the pixel voltage applied to the pixel electrode is affected by the voltage variation due to the transition of the scan signal, so that a constant voltage drop defined as the variation of the pixel voltage is defined. Occurs.

In particular, as the pixel voltage is affected by the falling edge of the scan signal, the pixel voltage is not symmetrical every frame based on the level of the common voltage. There was a problem in that image quality was degraded due to flicker or afterimage in the displayed image.

Therefore, conventionally, by minimizing the fluctuation of the pixel voltage by giving a step on the falling edge of the scan signal, the generation of flicker or afterimage in the image is suppressed.

4A is an exemplary diagram showing a waveform of a scan signal applied to gate lines of a general liquid crystal display panel, and FIG. 4B is an exemplary diagram showing a waveform having a step formed on a falling edge of the scan signal.

As illustrated in FIG. 4B, a separate integrated circuit (IC) such as a modulation circuit must be provided to generate a waveform having a step formed on the falling edge of the scan signal.

That is, as shown in FIG. 5, a separate unit such as a modulator 50 forming the gate modulated signal Vgh-m through the gate high voltage Vgh, the power supply voltage Vdd, and the gate start clock GSC. An integrated circuit (IC) must be provided.

The power supply voltage Vdd is a power source generally input to a driving integrated circuit or a buffer integrated circuit, and has a range of 10V to 15V.

Therefore, there is a problem of increasing the manufacturing cost of the liquid crystal display.

In addition, the waveform of the gate modulated signal Vgh-m is shaken when the gate start clock GSC is applied in a spread manner to improve the influence of electromagnetic interference (EMI). There was a problem that noise of a moire occurs in an image of a liquid crystal display panel.

Accordingly, the present invention has been devised to solve the above-described problems, and an object of the present invention is to provide a method of voltage sharing a scan signal sequentially applied to a liquid crystal display panel with an adjacent scan signal. The present invention provides a driving apparatus and a method of a liquid crystal display panel that can be modulated by using the same to improve a poor quality of the liquid crystal display panel.

The liquid crystal display panel driving apparatus for achieving the object of the present invention is a liquid crystal in which a plurality of gate lines and a plurality of data lines intersect, and pixels having a switching element and a pixel electrode at the intersection thereof are arranged in a matrix form. A display panel; A gate driver applying scan signals to the gate lines in gate line units; A data driver for applying image information to the data lines; And a voltage sharing unit for instantaneously contacting the Nth gate line and the N + 1th gate line before the scan signal applied to the Nth gate line transitions from the high potential to the low potential. The voltage sharing unit is connected between the first gate line and the M-th gate line, and the first gate line before the scan signals applied from the first gate line to the M-1 gate line sequentially transitions from high potential to low potential. And a second gate line, a second gate line and a third gate line.... A switching element for instantaneously conducting the M-1 gate line and the Mth gate line. In this case, N is smaller than M, and N and M are natural numbers.

According to an aspect of the present invention, there is provided a method of driving a liquid crystal display panel, comprising: applying a scan signal to an Nth gate line of a liquid crystal display panel where a plurality of gate lines and data lines intersect; Applying image information to an Nth gate line to which the scan signal is applied; Instantaneously contacting the Nth gate line and the N + 1th gate line before the scan signal applied to the Nth gate line transitions from the high potential to the low potential; Applying a scan signal to the N + 1th gate line; And applying image information to the N + 1th gate line to which the scan signal is applied.

The driving apparatus and method of the liquid crystal display panel according to the present invention as described above will be described in detail with reference to the accompanying drawings.

6 is an exemplary view illustrating a driving device of a liquid crystal display panel according to an exemplary embodiment of the present invention.

Referring to FIG. 6, the liquid crystal display panel 210 includes a plurality of data lines DL1 to DLn that are vertically spaced apart from the plurality of gate lines GL1 to GLm that are regularly spaced apart. The pixels are provided on the insulating substrate 201 so as to cross each other, and are individually arranged in a rectangular region of a matrix form defined by crossing gate lines GL1 to GLm and data lines DL1 to DLn on the insulating substrate 201. Are provided.

As described above, the pixels include a thin film transistor for switching pixels, a pixel electrode connected to the thin film transistor to apply an electric field to a liquid crystal layer together with a common electrode, and a voltage value of image information during the turn-on period of the thin film transistor. After charging the capacitor, a storage capacitor is provided to maintain the driving of the liquid crystal layer by supplying the charged voltage to the pixel electrode during the turn-off period of the thin film transistor.

Scan signals are sequentially applied to the gate lines GL1 to GLm on the insulating substrate 201, and image information is applied to the data lines DL1 to DLn from the data driver 230. do.

Meanwhile, the voltage sharing unit 240 of the gate driver 220 includes the first gate line GL1 and the second gate line GL2 just before the scan signal applied to the first gate line GL1 transitions from the high potential to the low potential. ) Are instantaneously contacted, and the scan signals applied to the respective gate lines GL2 to GLm-1 sequentially transition from the high potential to the low potential from the second gate line GL2 to the m-1 th gate line GLm-1. Immediately before this, the gate lines GL2 to GLm-1 and the next gate lines GL3 to GLm are instantaneously contacted.

The voltage sharing unit 240 may be manufactured in various ways in the gate driver 220.

For example, the first gate line GL1 and the second gate are connected between the first gate line GL1 and the second gate line GL2 and immediately before the scan signal applied to the first gate line GL1 transitions from the high potential to the low potential. A switching element for instantaneously conducting the line GL2 may be applied, and likewise connected between the second gate line GL2 and the last gate line GLm, respectively, and the m−1 th gate line GLm from the second gate line GL2. The second gate line GL2 and the third gate line GL3, the third gate line GL3, and the fourth gate line GL4 are immediately before the scan signal applied to the negative signal is sequentially transitioned from the high potential to the low potential. A switching element for instantaneously conducting the m−1 th gate line GLm−1 and the last gate line GLm may be applied.                     

Therefore, the scan signals SCAN1 to SCANm applied to the gate lines GL1 to GLm from the voltage sharing unit 240 have a waveform as illustrated in FIG. 7.

As shown in the example of FIG. 7, the scan signals SCAN1 to SCANm-1 applied to the gate lines GL1 to GLm-1 from the voltage sharing unit 240 have a step on the falling edge. By having the formed waveform, it is possible to minimize the fluctuation of the pixel voltage and to suppress the generation of flicker or afterimage in the image.

That is, as described above, the liquid crystal display panel generally has parasitic capacitance as the gate electrode and the drain electrode of the thin film transistor are partially overlapped with each other, whereby the voltage fluctuation due to the transition of the scan signal applied to the gate electrode is drained. Since the drain electrode is connected to the pixel electrode and the drain electrode is connected to the pixel electrode, the pixel voltage applied to the pixel electrode is alternately positive and negative for each frame, and the pixel voltage is affected by the voltage fluctuation due to the transition of the scan signal. A defined voltage drop occurs.

In particular, when the pixel voltage is affected by the falling edge of the scan signal and a variation of the pixel voltage occurs, the pixel voltage is applied every frame based on the level of the common voltage when the waveform of the scan signal shown in FIG. 4A is applied. There is a problem in that the image quality is deteriorated because the flicker or the afterimage occurs in the image displayed on the liquid crystal display.

Therefore, conventionally, as shown in FIG. 4B, a separate integrated circuit such as a modulation circuit is added to form a step on the falling edge of the scan signal, thereby increasing the manufacturing cost of the liquid crystal display device. When the gate start clock is applied in a spread method to improve the effect of the EMI, the waveform of the gate modulated signal is shaken, which causes a problem of fringe noise in the image of the liquid crystal display panel.

However, the driving device of the liquid crystal display panel according to the exemplary embodiment of the present invention includes the Nth gate line immediately before the scan signal applied to the Nth gate line transitions from the high potential to the low potential through the voltage sharing unit provided in the gate driver. By instantaneously contacting the N + th gate line, it is possible to form a step in the scan signal without using a separate integrated circuit such as a modulation circuit.

Looking at the driving method for the driving device of the liquid crystal display panel according to an embodiment of the present invention in detail as follows.

First, in the gate driver 220, the scan signal SCAN1 is applied to the first gate line GL1 of the liquid crystal display panel 210 through the voltage sharing unit 240, and the image information is first transmitted through the data driver 230. It is applied to the pixels corresponding to the gate line GL1.

The voltage sharing unit 240 instantly contacts the first gate line GL1 and the second gate line GL2 immediately before the scan signal SCAN1 applied to the first gate line GL1 transitions from the high potential to the low potential. Let's do it.

Therefore, the scan signal SCAN1 of the first gate line GL1 has an intermediate potential between the high potential and the low potential before transitioning from the high potential to the low potential and then has a low potential at the falling edge to form a step.

In addition, the scan signal SCAN2 of the second gate line GL2 has an intermediate potential between the high potential and the low potential before transitioning from the low potential to the high potential, and then has a high potential at the rising edge, thereby forming a step. Image information is applied to the pixels corresponding to the second gate line GL2 through the data driver 230.

As the scan signals SCAN2 to SCANm-1 are sequentially applied from the third gate line GL3 to the m-1 th gate line GLm-1 in the above-described manner, each scan signal SCAN3 to SCANm-1. ) Have a step at the rising and falling edges (RISING / FALLING EDGE), and the image information through the data driver 230 corresponds to the m-1 th gate line GLm-1 from the third gate line GL3. Is applied to the field.

Meanwhile, like the scan signal SCAN2 of the second gate line GL2 described above, the last gate line GLm has an intermediate potential between the high potential and the low potential before the transition from the low potential to the high potential, and then at the rising edge. A step is formed due to the high potential, but no step is formed at the falling edge because there is no next gate line.

However, when the scan signal SCANm of the last gate line GLm contacts the last gate line GLm and the first gate line GL1 momentarily in the voltage sharing unit 240 before the scan signal SCANm transitions from the high potential to the low potential. The scan signal SCANm of the last gate line GLm also has a step at the falling edge FALLING EDGE, and image information is applied to the pixels corresponding to the last gate line GLm through the data driver 230. An image of one frame is displayed.

 As described above, the driving device and method of the liquid crystal display panel according to the present invention include the Nth gate just before the scan signal applied to the Nth gate line transitions from the high potential to the low potential through the voltage sharing unit provided in the gate driver. By instantly contacting the line with the N + th gate line, it is possible to form a step in the scan signal without using a separate integrated circuit such as a modulation circuit.

Therefore, the manufacturing cost of the liquid crystal display device can be reduced.

In addition, even when the gate start clock is applied in a spread manner in order to improve the influence of electromagnetic interference (EMI), it is possible to suppress the occurrence of fringe noise in the image of the liquid crystal display panel and to improve image quality. have.

Since the scan signal has a mid potential between the high potential and the low potential before the scan signal transitions from the high potential to the low potential, and has a low potential on the falling edge, the delay time caused by the scan signal transitioning from the high potential to the low potential can be minimized. In addition, there is an effect of improving the image quality by minimizing the generation of noise of the wave pattern due to the delay of the scanning signal.

Claims (5)

A liquid crystal display panel in which a plurality of gate lines and a plurality of data lines cross each other, and pixels including a switching element and a pixel electrode at an intersection thereof are arranged in a matrix; A gate driver applying scan signals to the gate lines in gate line units; A data driver for applying image information to the data lines; And a voltage sharing unit for instantaneously contacting the Nth gate line and the N + 1th gate line before the scan signal applied to the Nth gate line transitions from a high potential to a low potential. Drive of the panel. The driving apparatus of claim 1, wherein the voltage sharing unit is inherent to the gate driving unit. The method of claim 1, wherein the voltage sharing unit is connected between the first gate line and the M-th gate line, respectively, before the scan signals applied from the first gate line to the M-1 gate line sequentially transition from high potential to low potential. The first and second gate lines, the second gate line and the third gate line .... The liquid crystal display panel comprising a switching element for instantaneously conducting the M-1 gate line and the M-th gate line Drive. (Where N <M and N and M are natural numbers) 4. The M gate line and the first gate line of claim 3, wherein the voltage sharing unit is connected between the M gate line and the first gate line and before the scan signal applied to the M gate line transitions from the high potential to the low potential. And a switching element for conducting momentarily through the liquid crystal display panel. Applying a scan signal to an Nth gate line of the liquid crystal display panel where the plurality of gate lines and the data lines cross each other; Applying image information to an Nth gate line to which the scan signal is applied; Contacting the Nth gate line and the N + 1th gate line instantaneously before the scan signal applied to the Nth gate line transitions from a high potential to a low potential; Applying a scan signal to the N + 1th gate line; And applying image information to an N + 1th gate line to which the scan signal is applied.

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