KR100806882B1 - A liquid crystal display panel having wide viewing angle and a thin film transistor array panel - Google Patents

Abstract

A lower first alignment layer is formed on the thin film transistor array of the lower substrate, a lower compensation layer made of discotic liquid crystal is formed on the lower first alignment layer, and a pixel electrode is formed on the lower compensation layer. The lower second alignment layer is formed on the pixel electrode. An upper first alignment layer is formed on the color filter of the upper substrate, and an upper compensation layer is formed on the upper first alignment layer. The common electrode is formed on the upper compensation layer, and the upper second alignment layer is formed on the common electrode. The liquid crystal is injected between the upper and lower second alignment layers and is twisted. In this case, the upper and lower second alignment layers have two regions having different alignment directions, and the upper and lower first alignment layers also have two regions having different alignment states corresponding to the second alignment layer. In this case, a liquid crystal display having a wider viewing angle is provided by varying compensation characteristics for each domain in consideration of alignment directions of liquid crystals different for each domain.

LCD, thin film transistor substrate, domain, alignment layer, compensation layer

Description

A liquid crystal display panel having wide viewing angle and a thin film transistor array panel

1 is a cross-sectional view of a liquid crystal display device according to a first embodiment of the present invention;

2 is a conceptual diagram illustrating an alignment state of liquid crystals in two domains in the liquid crystal display according to the exemplary embodiment of the present invention.

3 is a layout view of a thin film transistor substrate for a liquid crystal display according to a first embodiment of the present invention;

4 is a cross-sectional view taken along line IV-IV 'of FIG. 3,

5A, 6A, 7A, and 8A are layout views of a thin film transistor substrate, illustrating an intermediate process of manufacturing a thin film transistor substrate for a liquid crystal display device according to a first embodiment of the present invention, according to a process sequence thereof;

5B is a cross-sectional view taken along the line Vb-Vb ′ of FIG. 5a;

FIG. 6B is a cross-sectional view taken along line VIb-VIb ′ in FIG. 6A and is a cross-sectional view showing the next step in FIG. 5B;

FIG. 7B is a cross-sectional view taken along the line Ⅶb-Ⅶb 'of FIG. 7A and illustrating the next step of FIG. 6B;                 

FIG. 8B is a cross-sectional view taken along the line Ⅷb-Ⅷb 'of FIG. 8A and showing the next step of FIG. 7B;

9 is a cross-sectional view of a liquid crystal display according to a second exemplary embodiment of the present invention.

10A is a graph illustrating transmittances of viewing angles in a horizontal direction of a liquid crystal display according to an exemplary embodiment of the present invention.

10B is a graph illustrating transmittances of respective viewing angles in the vertical direction of the liquid crystal display according to the exemplary embodiment of the present invention.

10c is a vertical contrast ratio of the liquid crystal display according to the exemplary embodiment of the present invention;

FIG. 11A is a graph of transmittance for each viewing angle in a horizontal direction of a liquid crystal display according to the related art.

11B is a graph illustrating transmittances of respective viewing angles in the vertical direction of the liquid crystal display according to the related art.

11C is a vertical contrast ratio of a liquid crystal display according to the related art.

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a liquid crystal display, and more particularly, to a liquid crystal display that forms two regions having different twisting directions of liquid crystal in one pixel in order to secure a wide viewing angle.

In general, a liquid crystal display device injects a liquid crystal material between an upper substrate on which a common electrode and a color filter are formed, and a lower substrate on which a thin film transistor and a pixel electrode are formed. By applying different potentials to form an electric field to change the arrangement of the liquid crystal molecules, and through this to control the light transmittance is an apparatus that represents the image.

Among such liquid crystal display devices, a twisted nematic liquid crystal display device in which liquid crystal molecules in contact with a lower substrate and an upper substrate are twisted and aligned at a predetermined angle to each other has a wide range of application. However, the twisted nematic liquid crystal display has a narrow viewing angle and a large difference depending on the viewing direction. To compensate for this disadvantage, a compensation film is attached to the outer side of the upper substrate and the lower substrate to improve the viewing angle, and by dividing the pixel area into two domains to set the twist direction of the liquid crystal molecules differently, the difference in viewing angle according to the viewing direction is determined. Improve.

FIG. 11A is a graph of transmittances of horizontal (left and right) directions of a liquid crystal display by dividing a pixel area into two domains, and FIG. 11B is a view of vertical and vertical views of a liquid crystal display by dividing a pixel area into two domains. 11C is a graph showing transmittance, and a ratio of vertical (vertical) directions of a liquid crystal display obtained by dividing a pixel area into two domains.

11A and 11B, the horizontal viewing angle is symmetrical and no grayscale inversion occurs, but the vertical viewing angle is asymmetrical in the vertical direction and grayscale inversion occurs near 45 ° on the lower side. According to FIG. 11C, the viewing angle of the contrast ratio 10: 1 is only about 40 °. This is because the compensation film does not completely compensate for the torsional direction difference of different liquid crystals depending on the domain.

SUMMARY OF THE INVENTION The present invention has been made in an effort to provide a liquid crystal display having a wider viewing angle by compensating for a path of light in consideration of a difference in the torsional direction of liquid crystals depending on domains.

In order to solve this problem, in the present invention, a compensation layer is formed on the inside of the upper and lower substrates, and the optical path compensation is differentiated for each domain.

Specifically, an insulating substrate, a first wiring formed on the insulating substrate, a second wiring formed on the insulating substrate and insulated from and intersecting with the first wiring, and a first alignment film formed on the second wiring. A thin film transistor connected to the compensation layer in which the optical path compensation characteristic of the direction is determined by the first alignment layer, the pixel electrode formed on the compensation layer, the first wiring, the second wiring and the pixel electrode; A thin film transistor substrate is provided.

Here, further comprising a second alignment layer formed on the pixel electrode, wherein the first alignment layer and the second alignment layer has a first region and a second region different from each other in the alignment direction, the first region and the second It is preferable that the region divides each pixel electrode. The first and second regions of the first alignment layer may be formed by using a mask to cover any one of the two regions, and a difference in alignment characteristics may be formed by an optical alignment method of irradiating ultraviolet rays only to the remaining regions.

In addition, an insulating first substrate, a first wiring formed on the first substrate, a second wiring formed on the insulating substrate and insulated from and intersecting the first wiring, and a first wiring formed on the second wiring. An alignment layer, a first compensation layer for determining optical path compensation characteristics in a direction by the first alignment layer, a pixel electrode formed on the first compensation layer, an insulating second substrate facing the first substrate, and the first compensation layer A second alignment layer formed on the second substrate, a second compensation layer in which an optical path compensation characteristic of a direction is determined by the second alignment layer, a common electrode formed on the second compensation layer, the first substrate and the first A liquid crystal display device including a liquid crystal material injected between two substrates is provided.

Here, further comprising a third alignment layer formed on the pixel electrode and a fourth alignment layer formed on the common electrode, wherein the first to fourth alignment layer has a first region and a second region having different alignment states. Preferably, the first region and the second region divide the pixel electrodes, and the first and second compensation layers are discotic liquid crystal layers. In addition, the alignment direction of the third alignment layer and the alignment direction of the fourth alignment layer may form an angle between 0 degrees and 90 degrees with respect to each region, and are attached to the outside of the first substrate and the second substrate, respectively. A first polarizing plate and a second polarizing plate are further included, and the polarization directions of the first polarizing plate and the second polarizing plate preferably form 90 degrees to each other.

Next, a liquid crystal display according to an exemplary embodiment of the present invention will be described with reference to the drawings.

1 is a cross-sectional view of a liquid crystal display according to an exemplary embodiment of the present invention, and FIG. 2 is a conceptual diagram illustrating an alignment state of liquid crystals in two domains in the liquid crystal display according to an exemplary embodiment of the present invention.

The gate wiring 22 is formed on the lower insulating substrate 10, the gate insulating film 30 is formed on the gate wiring 22, and the data wiring intersecting the gate wiring on the gate insulating film 30 (not shown). ) Is formed. The lower first alignment layer 71 is formed on the data line, and the lower compensation layer 90 is formed on the lower first alignment layer 71. Here, the lower compensation layer 90 is formed by applying a discotic liquid crystal material, or the like, and then solidifying the lower compensation layer 90. The lower first alignment layer 71 is used to orient the liquid crystal of the lower compensation layer 90. In addition, the liquid crystal of the lower compensation layer 90 is aligned in different directions for each domain. The pixel electrode 82 is formed on the lower compensation layer 90, and the lower second alignment layer 72 is formed on the pixel electrode 82.

A black matrix 120 is formed on the transparent upper insulating substrate 110 to prevent light leakage from the boundary between the pixel region and the domain, and the red, green, and blue color filters are formed on the black matrix 120. 130 is formed. An upper first alignment layer 171 is formed on the color filter 130 and the black matrix 120, and an upper compensation layer 190 is formed on the upper first alignment layer 171. Here, the upper compensation layer 190 is formed by applying a discotic liquid crystal material or the like and then solidifying the upper compensation layer 190. The upper first alignment layer 171 is used to orient the liquid crystal of the upper compensation layer 190. In addition, the liquid crystal of the upper compensation layer 190 is aligned in different directions for each domain. A common electrode 180 made of a transparent conductive material such as indium tin oxide (ITO) is formed on the upper compensation layer 190, and an upper second alignment layer 172 is formed on the common electrode 180.

A liquid crystal material is injected between the lower second alignment layer 72 of the lower substrate 10 and the upper second alignment layer 172 of the upper substrate 110 to form the liquid crystal layer 300. At this time, the liquid crystal layer 300 is divided into domain I 310 and domain II 320 according to the alignment direction of the liquid crystal, and the domain I 310 and domain II 320 divide one pixel area into two divisions. have. The liquid crystals of the domains I 310 and 320 are aligned in different directions by the lower second alignment layer 72 and the upper second alignment layer 172.

As shown in FIG. 2, the liquid crystal of the domain I 310 and the liquid crystal of the domain II 320 differ from each other in alignment state. That is, the twisting directions of the liquid crystals are different from each other. The liquid crystal alignment of the upper and lower compensation layers 90 and 190 also varies with each domain according to the twist direction of the liquid crystal.

Polarizers 410 and 420 are disposed outside the upper substrate 110 and the lower substrate 10, respectively. At this time, it is common for the polarizing plates 410 and 420 to use a retardation film as a base film.

As described above, by forming the compensation layers 90 and 190 on the inner surfaces of the upper and lower substrates 10 and 110 and changing the alignment states of the liquid crystals in the compensation layers 90 and 190 for each domain, the twisting directions of the liquid crystals different in the domains. By compensating for the path of light in consideration of the difference, a liquid crystal display having a wider viewing angle may be provided.

Next, the thin film transistor substrate of the liquid crystal display will be described in more detail.

3 is a layout view of a thin film transistor substrate for a liquid crystal display according to a first exemplary embodiment of the present invention, and FIG. 4 is a cross-sectional view taken along line IV-IV ′ of FIG. 3.

The first gate wiring layers 221, 241, and 261 made of a material having excellent physicochemical properties such as chromium (Cr) on the insulating substrate 10 and the second gate wiring layer 222 made of a material having a low specific resistance such as aluminum (Al). Gate wirings formed of a double layer of 242 and 262 are formed.

The gate wire is connected to the gate line 22 and the gate line 22 extending in the horizontal direction, and are connected to the gate pad 24 and the gate line 22 which receive a gate signal from the outside and transmit the gate signal to the gate line. A gate electrode 26 of the thin film transistor.

A gate insulating film 30 made of silicon nitride (SiN _x ) is formed on the gate lines 22, 24, and 26.

A semiconductor layer 40 made of a semiconductor such as amorphous silicon is formed on the gate insulating layer 30 on the gate electrode 24, and a silicide or n-type impurity is doped with high concentration on the semiconductor layer 40. Resistive contact layers 54 and 56 made of a material such as n + hydrogenated amorphous silicon are formed, respectively.

On the ohmic contact layers 54 and 56 and the gate insulating layer 30, the first data wiring layers 621, 651, 661 and 681 made of chromium and the like and the second data wiring layers 622, 652, 662 and 682 made of aluminum and the like. The data wirings 62, 65, 66, and 68 formed of double layers of are formed.

The data lines 62, 65, 66, and 68 are formed in the vertical direction and intersect with the gate line 22 to define the pixel, the branch of the data line 62, the data line 62, and the resistive contact layer 54. It is connected to one end of the source electrode 65 and the data line 62 extending to the upper portion, and separated from the data pad 68 and the source electrode 65 to which an image signal from the outside is applied, and the gate electrode 26. And a drain electrode 66 formed over the ohmic contact layer 56 opposite the source electrode 65.

The lower first alignment layer 71 is formed on the data lines 62, 65, 66, and 68, and the lower compensation layer 90 is formed on the lower first alignment layer 71. Contact holes 74, 76, and 78 that expose the gate pad 24, the drain electrode 66, and the data pad 68 are formed in the lower first alignment layer 71 and the lower compensation layer 90. The lower compensation layer 90 is, for example, a layer formed by applying and aligning a discotic liquid crystal and then irradiating ultraviolet rays to cure the lower compensation layer 90. The lower compensation layer 90 serves as a compensation film for improving the viewing angle and protects the channel portion of the thin film transistor. Play a role. The discotic liquid crystals of the lower compensation layer 90 have different alignment states according to domains, and the alignment states of the discotic liquid crystals are determined in consideration of the alignment of the liquid crystals of the liquid crystal layer 300. The alignment state of the discotic liquid crystal is adjusted by using the lower first alignment layer 71. In order to change the orientation direction for each domain, it is preferable to form the first alignment layer 71 using a photoalignment material.

The pixel electrode 82 is electrically connected to the drain electrode 66 through the contact hole 76 on the lower compensation layer 90. In addition, an auxiliary gate pad 86 and an auxiliary data pad 88 connected to the gate pad 24 and the data pad 68 are formed on the lower compensation layer 90 through contact holes 74 and 78, respectively. have. Here, the pixel electrode 82, the auxiliary gates, and the data pads 86 and 88 are made of ITO or IZO. In this case, as shown in FIGS. 1 and 2, the pixel electrode 82 overlaps the gate line 22 to form a storage capacitor, and when the storage capacitor is insufficient, the same layer as the gate wirings 22, 24, and 26. It is also possible to add a storage capacitor wiring.

The lower second alignment layer 72 is formed on the pixel electrode 82.

Next, a method of manufacturing the thin film transistor substrate for a liquid crystal display according to the first exemplary embodiment of the present invention will be described in detail with reference to FIGS. 3 and 4 and FIGS. 5A to 8B.

5A, 6A, 7A, and 8A are layout views of a thin film transistor substrate illustrating an intermediate process of manufacturing a thin film transistor substrate for a liquid crystal display device according to a first embodiment of the present invention, according to a process sequence thereof, and FIG. 5B is illustrated in FIG. 5A. Is a cross-sectional view taken along the line Vb-Vb ', and FIG. 6b is a cross-sectional view taken along the line VIb-VIb' in FIG. 6a, and is a cross-sectional view showing the next step in FIG. 5b, and FIG. FIG. 8B is a cross-sectional view illustrating the next step of FIG. 6B as shown in the cut along the line 'b', and FIG. 8b is a cross-sectional view illustrating the next step in FIG.

First, as shown in FIGS. 5A and 5B, the first gate wiring layers 221, 241, and 261 made of a physicochemically stable conductive material such as chromium and the like are made of a material having a low resistance such as aluminum on the substrate 10. A gate line 22 extending in the horizontal direction by sequentially stacking and patterning two gate wiring layers 222, 242, and 262, a gate electrode 26 that is part of the gate line 22, and a second gate pad 24. A gate wiring is formed.

Next, as shown in FIGS. 6A and 6B, three-layer films of a gate insulating film 30 made of silicon nitride, a semiconductor layer 40 made of amorphous silicon, and a doped amorphous silicon layer 50 are successively stacked and photo-etched. As a result, the semiconductor layer 40 and the doped amorphous silicon layer 50 are patterned to form an island-like semiconductor layer 40 and an ohmic contact layer 50 on the gate insulating layer 30 on the gate electrode 24.

Next, as shown in FIGS. 7A to 7B, the first data wiring layers 651, 661, and 681 made of a physicochemically stable conductive material such as chromium and the second data wiring layer made of a low resistance conductive material such as aluminum ( 652, 662, and 682 are sequentially stacked and patterned by a photolithography process using a mask to be connected to the data line 62 and the data line 62 crossing the gate line 22 and to the upper portion of the gate electrode 26. It is separated from the extended source electrode 65, the data pad 68 and the source electrode 64 connected to one end of the data line 62, and the source electrode 65 with respect to the gate electrode 26; A data line including the opposite drain electrode 66 is formed.                     

Next, as shown in FIGS. 8A and 8B, after forming the lower first alignment layer 71 made of the light alignment material on the data line and performing partial alignment, the discotic liquid crystal material is applied and the ultraviolet ray is cured by irradiation. Let's do it. Subsequently, contact holes 74, 76, and 78 are formed through a photolithography process. Here, a method of split-aligning the lower first alignment layer 71 is performed by using two times of ultraviolet irradiation (first, the domain I is covered with a mask and irradiated with ultraviolet rays, and the domain II is covered with a next mask and irradiated with ultraviolet rays. These two UV irradiation conditions) and a method of rubbing the alignment film and then masking some of them with a mask and irradiating ultraviolet light to modify the alignment state of the exposed portion.

Next, as shown in FIGS. 3 and 4, the ITO film or the IZO film is stacked and photo-etched to connect the pixel electrode 82 and the first and third electrodes connected to the drain electrode 66 through the second contact hole 76. The auxiliary gate pad 86 and the auxiliary data pad 88 which are connected to the gate pad 24 and the data pad 68, respectively, are formed through the contact holes 74 and 78, respectively. Subsequently, a lower second alignment layer 72 is formed on the pixel electrode 82, and dividedly aligned by domains. In this case, the split alignment method uses two times of ultraviolet irradiation (first, the domain I is covered with a mask and irradiated with ultraviolet rays, and the second mask is irradiated with ultraviolet light. Different method), a method of rubbing the alignment film and then masking a part of it with a mask and irradiating ultraviolet light to modify the alignment state of the exposed portion, and partially (for example, only the domain I portion) of the ITO constituting the pixel electrode. After the treatment, the lower second alignment layer 72 is formed and the lower second alignment layer 72 is rubbed to change the rubbing state for each domain.

Detailed description of the color filter substrate facing the thin film transistor substrate is omitted. However, the upper first alignment layer 171, the upper compensation layer 190, and the upper second alignment layer 172 correspond to the lower first alignment layer 71, the lower compensation layer 90, and the lower second alignment layer 72, respectively. do. That is, the material, the formation method, the alignment method, and the like may be applied to the contents of the lower first alignment layer 71, the lower compensation layer 90, and the lower second alignment layer 72 as described above. In addition, the upper compensation layer 190 also serves as an overcoat layer protecting the color filter 130.

9 is a cross-sectional view of a liquid crystal display according to a second exemplary embodiment of the present invention.

The liquid crystal display according to the second exemplary embodiment of the present invention is the same as that of the first exemplary embodiment except for the shape of the domain in which the liquid crystal is partially aligned. That is, in the first embodiment, domains I and II are divided up and down by a boundary line parallel to the gate line. In the second embodiment, domains I and II are divided left and right by a boundary line parallel to the data line.

However, the shape of the divided domain is not limited to the first and second embodiments, and many other variations are possible. That is, the shape which divides a pixel electrode diagonally is also possible.

FIG. 10A is a graph of transmittances for each viewing angle in a horizontal direction of a liquid crystal display according to an exemplary embodiment of the present invention, and FIG. 10B is a graph for transmittances of viewing angles in a vertical direction of a liquid crystal display according to an embodiment of the present invention, and FIG. Vertical contrast ratio of the liquid crystal display according to the exemplary embodiment of the present invention.

10A to 10C are

, 선경사각 5도, 좌수회전, 계조 전압은 0.5V~5.5V 사이의 8계조, 도메인 I, II의 면적비는 1:1이고, LCD parameter

, 5 degrees of pretilt angle, left-turn rotation, gray scale voltage is 8V between 0.5V ~ 5.5V, area ratio of domains I, II is 1: 1,

, 두께가 2.0㎛, 광축 편광각(z=0)=7.5°, 광축 편광각(z=d)=52.5°이며,The compensation layer is composed of a discotic liquid crystal layer and its parameters

, Thickness is 2.0 μm, optical axis polarization angle (z = 0) = 7.5 °, optical axis polarization angle (z = d) = 52.5 °,

The retardation film constituting the polarizing plate has parameters R _e = 0 nm and R _th = 40 nm.

In this case, the permeability and the vertical contrast ratio of each viewing angle in the vertical direction and the horizontal direction are simulated.

Compared with FIGS. 11A to 11C, the transmittance graph (FIG. 10B) of the vertical viewing angles is remarkably changed up and down symmetrically, and it can be seen that the contrast ratio of 10: 1 reference viewing angles is at least 60 degrees or more.

As described above, the compensation layer is formed inside the thin film transistor substrate and the color filter substrate, and the liquid crystal display device having a wider viewing angle is provided by varying the compensation characteristics for each domain in consideration of the alignment direction of the liquid crystal different for each domain.

Claims (8)

Insulation board, A first wiring formed on the insulating substrate, A second wiring formed on the insulating substrate and insulated from and intersecting the first wiring; A first alignment film formed on the second wiring, A compensation layer in which an optical path compensation characteristic of a direction is determined by the first alignment layer; A pixel electrode formed on the compensation layer, A thin film transistor connected to the first wiring, the second wiring and the pixel electrode; A second alignment layer formed on the pixel electrode, The first alignment layer and the second alignment layer have a first region and a second region having different alignment characteristics, and the first region and the second region bisect the pixel electrodes. Thin film transistor substrate. delete In claim 1, The first region and the second region of the first alignment layer is a thin film transistor substrate having a difference in alignment characteristics formed by a photoalignment method of covering any one of the two regions using a mask and irradiating ultraviolet rays only to the remaining regions. Insulating first substrate, First wiring formed on the first substrate, A second wiring formed on the insulating substrate and insulated from and intersecting the first wiring; A first alignment film formed on the second wiring, A first compensation layer in which an optical path compensation characteristic of a direction is determined by the first alignment layer; A pixel electrode formed on the first compensation layer, An insulating second substrate facing the first substrate, A second alignment layer formed on the second substrate, A second compensation layer in which an optical path compensation characteristic of a direction is determined by the second alignment layer; A common electrode formed on the second compensation layer; A liquid crystal material injected between the first substrate and the second substrate, The first alignment layer and the second alignment layer have a first region and a second region having different alignment directions, and the first region and the second region divide the pixel electrodes. Liquid crystal display. In claim 4, And a third alignment layer formed on the pixel electrode and a fourth alignment layer formed on the common electrode, wherein the third alignment layer and the fourth alignment layer each include the first region and the second region having different alignment directions. And the first region and the second region divide the pixel electrodes. In claim 5, The first and second compensation layers are discotic liquid crystal layers. In claim 5, The alignment direction of the third alignment layer and the alignment direction of the fourth alignment layer form an angle between 0 degrees and 90 degrees with respect to each region. In claim 5, And a first polarizing plate and a second polarizing plate respectively attached to the outer side of the first substrate and the second substrate, wherein the polarization directions of the first polarizing plate and the second polarizing plate form 90 degrees to each other.

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