KR100734234B1 - Multilayer printed circuit board and fabricating method thereof - Google Patents

Abstract

A multilayer printed circuit board and a method for manufacturing the same are provided to have high resistance to an external impact by enclosing a circuit pattern with an insulation layer and to improve the yield and shorten a manufacturing time by integrally laminating laminated plates through thermal compression. A multilayer printed circuit board includes a first laminated plate, a second laminated plate. The first laminated plate has a first insulating layer(130), a first circuit pattern(115), a first via-hole(150), and a conductive material. The first circuit pattern(115) is laid on the first insulating layer(130). A lower part of the first circuit pattern(115) is exposed. The first via-hole(150) is formed on an upper part of the first circuit pattern(115) and penetrates the first insulating layer(130). The conductive material is filled in the first via-hole(150). A second circuit pattern is laid on a location corresponding to the first circuit pattern of a second insulating layer. An upper part of the second circuit pattern is exposed. A second via-hole is formed on a lower part of the second circuit pattern and penetrates the second insulating layer. A conductive material is filled in the second via hole. The second laminated plate is electrically connected to the first laminated plate when the conductive material filled in the first via-hole corresponds to the conductive material filled in the second via-hole.

Description

Multilayer Printed Circuit Board and Fabrication Method Thereof}

1A to 1G are cross-sectional views illustrating a method of manufacturing a multilayer printed circuit board according to a conventional build-up method.

2A to 2F are cross-sectional views illustrating a process of manufacturing the laminate of the present invention.

3 is a cross-sectional view showing a state of a via hole when the via hole is filled using a conductive paste.

4 is a cross-sectional view showing a step of collectively laminating each laminate of the present invention.

5 is a cross-sectional view showing an embodiment of a multilayer printed circuit board of the present invention.

Explanation of symbols on the main parts of the drawings

110: metal thin film 115: circuit pattern

120: first protective film 130: insulating layer

140: second protective film 150: via hole

160: bump

The present invention relates to a multilayer printed circuit board and a method of manufacturing the same.

Recently, due to the rapid development of the electronics industry, as electronic products become smaller, thinner, higher density, and lighter, micropatterning, high precision, and miniaturization are simultaneously progressed on a printed circuit board (PCB), which is the basis thereof.

In order to improve the pattern formation, reliability, and design density of the printed circuit board, there is a tendency to change the structure of the circuit layer with the change of raw materials, and the parts are also SMT in the DIP (Dual-In-Line Package) type. As the surface mount technology is changed, the mounting density is also increasing.

In addition to the portableization of electronic devices, high functionalization, the Internet, moving pictures, and high-capacity data transmission and reception make the design of printed circuit boards complicated and require high-level technology.

The printed circuit board includes a single-sided printed circuit board having wiring formed only on one surface of an insulated substrate, a double-sided printed circuit board having wiring formed on both sides, and a multi-layered printed circuit board (MLB) wired in multiple layers. In the past, single-sided printed circuit boards were used because of simple component parts and simple circuit patterns. Recently, double-sided printed circuit boards or multilayer printed circuit boards have been widely used due to the increased complexity of circuits and increased demand for high density and miniaturized circuits. have.

The multilayer printed circuit board further includes a layer capable of wiring in order to enlarge a wiring area. Specifically, the multilayer printed circuit board is divided into an inner layer and an outer layer. An inner layer forms a power supply circuit, a ground circuit, a signal circuit, and the like, and an insulating layer is formed between the inner layer and the outer layer or the outer layer. At this time, the wiring of each layer is connected using via holes.

As a material of the inner layer, a thin core is used, and a four-layer structure in which an outer layer and an inner layer are bonded to each other as an insulating layer is basic. As the complexity of the circuit increases, six layers, eight layers, ten layers, or the like It may be composed of the above.

1A to 1G are cross-sectional views illustrating a method of manufacturing a multilayer printed circuit board according to a conventional build-up method. As shown in the drawing, first, the via hole 102 is formed in a copper clad laminate (CCL) on which the copper foil 101 is coated on the insulating layer 100 (FIG. 1A).

Next, a plating layer 103 is formed on the surfaces of the copper foil 101 and the via hole 102 (FIG. 1B). The plating layer is formed by performing electroless plating first, followed by electroplating. The reason why electroless plating is performed before electrolytic plating is that electrolytic plating requiring electricity cannot be performed on the insulating layer. In other words, in order to form a conductive film necessary for electrolytic plating, electroless plating is thinly performed as a pretreatment.

Subsequently, the via hole 102 is filled to form a connecting portion 104 (FIG. 1C). The connection part 104 may be made of an insulating ink, or may be made of a conductive paste according to the purpose of using a printed circuit board.

Thereafter, the copper foil 101 and the plating layer 103 are etched to form a circuit pattern (FIG. 1D). The circuit pattern formed on the insulating layer 100 and the circuit pattern formed under the insulating layer 100 are electrically connected through the plating layer 103 formed in the via hole 102.

Next, the film which consists of the insulating layer 105 and the copper foil 106 is laminated | stacked on both surfaces of the said copper foil laminated board (FIG. 1E). The insulating layer 105 serves to insulate circuits formed on and under the insulating layer 105.

Subsequently, a via hole 108 serving as an electrical connection between the inner layer circuit and the outer layer circuit is formed, and plating is again performed to form the plating layer 107 (FIG. 1F). When the via hole 108 is formed, more precise processing is required than when the via hole 102 of the inner layer is formed. Therefore, it is preferable to use a laser drill.

Thereafter, the copper foil 106 and the plating layer 107 of the outer layer are etched to form an outer layer circuit pattern (FIG. 1G).

In the manner described above, by forming additional outer layers and forming circuit patterns, multilayer printed circuit boards having more layers can be produced.

Such a conventional method for manufacturing a multilayer printed circuit board takes a long time since the formation of the insulating layer and the formation of the circuit layer are repeated. If a failure occurs in the circuit layer of one layer, the laminated structure itself until now is There is a problem that the product yield is very low because becomes a defective product.

In addition, since the circuit pattern is formed only on the surface of the insulating layer, in a system requiring a high frequency region or a high signal transmission speed, there may be a problem in noise due to resistance or heat dissipation characteristics.

In addition, since the circuit pattern is formed on the surface of the insulating layer and finely patterned, the adhesion area with the insulating layer decreases, thereby causing problems of lifting and breakage of the circuit pattern due to external impact.

Accordingly, an object of the present invention is to form a circuit pattern on top of the protective film, and then to form the insulating layer surrounding the circuit pattern on the protective film, the circuit pattern is embedded in the insulating layer to exhibit a high reliability against external impact There is provided a printed circuit board and a method of manufacturing the same.

Another object of the present invention is to provide a multi-layer printed circuit board and a method of manufacturing the same by laminating each laminated plate and thermally compressing them to shorten manufacturing time and improve product yield.

A preferred embodiment of the multilayer printed circuit board of the present invention includes a first insulating layer, a first circuit pattern buried in the first insulating layer and exposed at a lower portion thereof, and formed on an upper portion of the first circuit pattern. Buried in a position corresponding to a first via hole penetrating the layer, a first laminated plate made of a conductive material filled in the first via hole, a second insulating layer, and a first circuit pattern of the second insulating layer; Is formed of the exposed second circuit pattern, a second via hole formed under the second circuit pattern and penetrating the second insulating layer, and a conductive material filled in the second via hole, and filled in the first via hole. And a second laminated plate pressed and electrically connected to the first laminated plate in a state in which the conductive material and the conductive material filled in the second via hole correspond to each other.

Preferred embodiments of the method of manufacturing a multilayer printed circuit board of the present invention include an insulating layer, a circuit pattern embedded in the insulating layer and a lower surface thereof exposed, a via hole formed through the insulating layer on the circuit pattern; Forming a first laminated plate and a second laminated plate each having a bump filling the via hole and protruding from the upper surface of the insulating layer, and placing the first laminated plate and the second laminated plate to correspond to the bumps. And thermally compressing the first laminated plate and the second laminated plate.

The forming of the first laminate and the second laminate may include forming a circuit pattern on an upper portion of the first protective film, forming an insulation layer surrounding the circuit pattern on the first protective film, and then insulating Forming a second protective film on the layer, forming a via hole penetrating the insulating layer and the second protective film formed on the circuit pattern, and filling the via hole with a conductive material to form a bump; And removing the first protective film and the second protective film to expose the lower surface of the circuit pattern, and protruding the bump from the upper surface of the insulating layer.

Hereinafter, a method of manufacturing a multilayer printed circuit board of the present invention will be described in detail with reference to FIGS. 2 to 5.

2A to 2F are cross-sectional views illustrating a process of manufacturing the laminate of the present invention. As shown in the drawing, first, the first protective film 120 is formed under the metal thin film 110 (FIG. 2A).

Here, the metal thin film 110 is made of one metal selected from gold (Au), silver (Ag), copper (Cu), aluminum (Al) or an alloy of two or more metals selected from the metals. In particular, in view of economics and electrical conductivity, it is preferable to consist of copper or an alloy containing copper.

In addition, the metal thin film 110 may have a thickness of 1 to 35 μm, preferably 12 to 18 μm. This is because if the thickness of the metal thin film 110 is less than 1 μm, the resistivity of the circuit is high. If the thickness of the metal thin film 110 is greater than 35 μm, the amount of metal to be inserted into the insulating layer 130 increases, and the insulating layer after curing of the resin is increased. This is because 130 can cause deformation.

Polyethylene terephthalate (PET), polyethylene (PE) and the like are used as the material of the first protective film 120 and are formed by a laminating process through thermocompression bonding on the lower portion of the metal thin film 110. The first protective film 120 uses a release film.

In addition, the first protective film 120 uses a low-shrink film, and in this case, the dimensions of the circuit pattern formed on the surface thereof are prevented from being changed by shrinkage of the film accompanying heat treatment in a circuit pattern forming process to be described later. can do.

Next, a circuit pattern 115 is formed on the first protective film 120 (FIG. 2B).

That is, after the photoresist is coated on the metal thin film 110, the photoresist is patterned. The metal thin film 110 is etched using the patterned photoresist as an etch mask, and the remaining photoresist is removed to form a circuit pattern 115 on the first protective film 120.

The circuit pattern 115 should be designed in advance in the correct position and dimensions in consideration of the combination with other laminates to be described later.

After the circuit pattern 115 is formed, a process of inspecting the appearance of the circuit by a method such as automatic optical inspection and a black oxide treatment to check whether the circuit is properly formed. You can do more processing.

Automatic optical inspection is a device for automatically inspecting the appearance of a printed circuit board. The device uses an image sensor and a computer's pattern recognition technology to automatically inspect the substrate's appearance. That is, the pattern information of the target circuit is read into the image sensor, and then compared with the reference data to read the defect.

In the multilayer printed circuit board, when a failure occurs in one laminate, the entire printed circuit board cannot be used. Therefore, a faithful inspection of each laminate is required.

Subsequently, the insulating layer 130 is formed while surrounding the circuit pattern 115 on the first protective film 120, and then the second protective film 140 is formed on the insulating layer 130 (FIG. 2c).

The insulating layer 130 is made of a synthetic resin, and preferably in the form of impregnating glass fibers with a synthetic resin. The thickness of the insulating layer 130 is preferably 7 ~ 50㎛.

As said synthetic resin, the thermosetting resin or the thermoplastic resin of a semi-hardened state is used. In the semi-cured thermosetting resin, in the step of thermocompression bonding a plurality of laminates, polymerization proceeds to complete curing.

As the thermosetting resin in the semi-cured state, polyimide is mainly used, and since polyimide has a high melting point, it has excellent thermal stability and can withstand long-term use. In addition, since the mechanical strength, electrical properties, chemical resistance, radiation resistance and the like is good, it is widely used as an insulating layer of a multilayer printed circuit board.

The semi-cured thermosetting polyimide is formed by impregnating the glass fibers in a polyamic acid solution and then proceeding the polymerization at a relatively low temperature. The polyamic acid is an intermediate of the polyimide, and becomes a polyimide while the amidation reaction and the crosslinking reaction proceed.

In addition, as the thermoplastic resin, polyethylene, polymethyl methacrylate, polyethylene terephthalate, polypropylene, or the like may be used. The thermoplastic resin is easily flowable by heating, and it is necessary to proceed polymerization in the curing process. Therefore, there is an advantage that the workability is good as compared to the thermosetting resin in the semi-cured state.

Subsequently, a via hole 150 penetrating through the insulating layer 130 and the second protective film 140 formed on the circuit pattern 115 is formed (FIG. 2D). The via hole 150 is filled with a conductive material to electrically connect circuit patterns formed on each laminate of the multilayer printed circuit board.

The via hole 150 is formed using a laser drill. The via hole 150 should not be formed in the circuit pattern 115, but should be formed only in the insulating layer 130 and the second protective film 140 formed on the circuit pattern 115. Is difficult to carry. More specifically, UV-YAG laser or CO ₂ laser is used.

After the via hole 150 is formed, it is preferable to clean the inside of the via hole 150. This is because dust and the like generated in the process of forming the via hole 150 are accumulated in the via hole 150, thereby preventing the formation of bumps to be described later.

Next, the via hole 150 is filled to form a bump 160 (FIG. 2E). The bumps 160 are made of a conductive material so that the circuit patterns formed on the respective laminates are electrically connected to each other.

The bumps 160 are formed by a plating method, and more specifically, copper bumps are formed by using an electroplating method. In the exemplary embodiment of the present invention, the via hole 150 is formed only in the insulating layer 130 and the second protective film 140 on the circuit pattern 115, thereby forming the bump 160 in the via hole 150 using an electroplating method. Can be formed.

The electroplating is preferably a copper sulfate 180-240 g / L, sulfuric acid 45-60 g / L and a thiourea, dextrin, or thiourea and molasses at a current density of 2-8 A / cm 2. It is carried out in a bath containing the same additives.

Plating is started from the surface of the circuit pattern 115 inside the via hole 150 to fill the entire via hole 150. Plating is continued to some extent even after the inside of the via hole 150 is filled. Since a plating film is often formed on the surrounding 2nd protective film 140, in this case, it is necessary to perform a grinding | polishing process so that the height of bump 160 may become the same as the 2nd protective film 140. FIG.

Subsequently, the lower surface of the circuit pattern 115 is exposed by removing the first protective film 120 and the second protective film 140, and the bumps 160 protruding from the upper surface of the insulating layer 130 are removed. The branches form a laminated plate A (FIG. 2F). Since the first protective film 120 and the second protective film 140 are release films, they can be easily removed.

As the first protective film 120 and the second protective film 140 are removed, the bumps 160 protrude from the surface of the insulating layer 130 by the thickness of the second protective film 140 to form protrusions. Done.

These protrusions improve the electrical connection of the bumps 160 during thermal compression of each laminate. Since the bumps 160 of the present invention are firmly formed by the plating method, they are less likely to be damaged by peeling of the first protective film 120 and the second protective film 140.

As described above, in the present invention, after the circuit pattern 115 is formed on the first protective film 120, the insulating layer 130 is formed, whereby the circuit pattern 115 is stably embedded in the insulating layer 130. Since the surface is very flat and the circuit pattern 115 is surrounded by the insulating layer 130 in three dimensions, there is a strong characteristic against external impact.

In addition, when the bumps 160 are formed by filling the via holes 150 with the conductive material, the bumps 160 are formed by the plating method, so that the protrusions of the bumps 160 are not damaged when the protective film is removed. .

In addition, when the height of the bumps 160 protruding from the upper surface of the insulating layer 130 is uniform, the interlayer connection is smoothly performed. In the present invention, the height of the bumps 160 is increased by using the second protective film 140. The plating film formed on the second protective film 140 in the plating process may be uniformly formed to uniform the height of the bumps 160 by performing a polishing process.

In the above embodiment, the via hole is filled by the plating method, but the via hole may be filled using a conductive paste.

3 is a cross-sectional view showing a state of a via hole when the via hole is filled using a conductive paste. As shown in the drawing, after forming the first via hole 250 penetrating the insulating layer 230 and the second protective film 240 formed on the circuit pattern 215, the circuit pattern 215 and the circuit A second via hole 260 penetrating the first protective film 220 positioned below the pattern 215 is formed.

The second via hole 260 has a diameter smaller than that of the first via hole 250 and is preferably about 25 to 30 μm.

The reason for forming the second via hole 260 is to fill the conductive paste better. That is, when the conductive paste is filled by only forming the first via hole 250, the conductive paste is hardly filled in the first via hole 250. In this case, voids are generated in the bumps, and thermal bonding of each laminate through the bumps is performed. The electrical connection is poor.

Subsequently, after the first via hole 250 and the second via hole 260 are formed, a conductive paste is filled into the first via hole 250 and the second via hole 260, and the first protective film 220 and The second protective film 240 is removed.

At this time, the conductive paste is filled using the screen printing method, the work environment during the screen printing work at atmospheric pressure or vacuum.

The main component of the conductive paste is a metal powder using a metal such as copper (Cu), silver (Ag), gold (Au), tin (Sn), lead (Pb), including an organic binder to bind the metal powder Play a role.

When the conductive paste is heated and pressed, the metal powders should be in contact with each other to ensure conductivity electrically or thermally.

4 is a cross-sectional view showing a step of collectively laminating a plurality of laminates of the present invention.

As shown therein, the circuit patterns of the plurality of laminated boards are positioned to be connected on the same line, and then compressed to fabricate a multilayer printed circuit board.

Here, the laminates (A, B) disposed on the upper side is a circuit pattern facing up, and the laminates (C, D) disposed on the bottom are arranged so that the circuit pattern faces downward, and compressed.

Here, a thermocompression method is used as a method of compressing the plurality of laminated plates to form a single printed circuit board. This is carried out by laminating a plurality of laminated plates in a case and inserting them into hot plates above and below the vacuum chamber to pressurize and heat them. This method is called VHL (Vacuum Hydraulic Lamination) method.

In addition, there is a vacuum crimping method in which a heat transfer heater is provided as a heating source in a vacuum chamber and laminated in a pressurized state using gas. Since this method does not require a hot plate, there is an advantage in that it can be laminated at one time regardless of the number of laminates.

Here, the insulating layer of the plurality of laminated plates is made of a thermoplastic resin or a thermosetting resin in a semi-cured state, in the case of the thermoplastic resin is heated above the glass transition temperature in the thermocompression process to increase the fluidity and adhesiveness to bond each laminated plate In the case of the thermosetting resin in the semi-cured state, as the polymerization proceeds in the thermocompression bonding process, the laminates are bonded.

The pressure applied in the thermocompression process is preferably 80 to 120 kg / cm 2, and the heating temperature is preferably about 150 to 350 ° C.

5 is a cross-sectional view showing an embodiment of a multilayer printed circuit board of the present invention.

As shown in the drawing, the first insulating layer 300, the first circuit pattern 310 buried in the first insulating layer 300 and exposed at the bottom thereof, are formed on the first circuit pattern 310. And a first via hole 320 passing through the first insulating layer 300, a first laminated plate I made of a conductive material filled in the first via hole 320, and a second insulating layer 400. A second circuit pattern 410 buried in a position corresponding to the first circuit pattern 310 of the second insulating layer 400 and exposed at an upper portion thereof, and formed under the second circuit pattern 410. A second via hole 420 penetrating the second insulating layer 400, and a conductive material filled in the second via hole 420, and a conductive material filled in the first via hole 320 and the first material. And a second laminated plate J which is pressed and electrically connected to the first laminated plate I in a state corresponding to the conductive material filled in the second via hole 420.

Here, a plurality of laminated plates may be further formed on the lower portion of the first laminated plate I or the upper portion of the second laminated plate J as necessary. In this case, the via holes of each laminate are positioned to be connected on the same line.

Although the present invention has been described in detail with reference to exemplary embodiments above, those skilled in the art to which the present invention pertains can make various modifications to the above-described embodiments without departing from the scope of the present invention. I will understand.

Therefore, the scope of the present invention should not be limited to the described embodiments, but should be defined by the claims below and equivalents thereof.

As described above, according to the present invention, by forming a circuit pattern on the upper portion of the protective film, surrounding the circuit pattern on the protective film and forming an insulating layer, the circuit pattern is stably embedded in the insulating layer, and the surface is very flat. Since the circuit pattern is surrounded by the insulating layer three-dimensionally, there is an effect of showing excellent reliability against external impact.

When bumps are formed by filling a conductive material in the via holes, bumps are formed by the electroplating method, so that the protrusions of the bumps are not damaged when the protective film is removed.

In addition, since the height of the bump is uniformly formed through the protective film formed on the insulating layer, the interlayer connection can be made smoothly.

In addition, it is possible to form each laminated plate separately, thereby improving the yield of the product through the pre-inspection before batch lamination, there is an effect that can reduce the manufacturing time.

Claims (10)

A first insulating layer, a first circuit pattern buried in the first insulating layer and exposed at a lower portion thereof, a first via hole formed on the first circuit pattern and penetrating through the first insulating layer, and the first via hole A first laminated plate made of a conductive material filled in; A second insulating layer, a second circuit pattern buried in a position corresponding to the first circuit pattern of the second insulating layer and having an exposed upper portion, and formed under the second circuit pattern and penetrating the second insulating layer And a second via hole, and a conductive material filled in the second via hole, and the conductive material filled in the first via hole and the conductive material filled in the second via hole correspond to the first laminated plate. A multilayer printed circuit board comprising a second laminated board electrically connected. The method of claim 1, And a plurality of laminates formed on the second laminate and electrically connected to the second laminate. The method of claim 1, The first circuit pattern and the second circuit pattern is a multilayer printed circuit board, characterized in that made of any one metal selected from gold, silver, copper, aluminum or an alloy of two or more metals selected from the metals. The method of claim 1, The first insulating layer and the second insulating layer is a multilayer printed circuit board, characterized in that made of a thermoplastic resin or a thermosetting resin in a semi-cured state. An insulating layer, a circuit pattern buried in the insulating layer to expose a lower surface, a via hole formed through the insulating layer on the circuit pattern, and filling the via hole and protruding from the upper surface of the insulating layer. Forming a first laminated plate and a second laminated plate each formed of a bump; Positioning the first laminate and the second laminate to correspond to the bumps; And It comprises the step of thermocompression bonding the first laminated plate and the second laminated plate, Forming the first laminated plate and the second laminated plate, Forming a circuit pattern on the first protective film, forming an insulating layer surrounding the circuit pattern on the first protective film, and then forming a second protective film on the insulating layer; Forming a via hole penetrating the insulating layer and the second protective film formed on the circuit pattern; Filling the via hole with a conductive material to form a bump; And Removing the first protective film and the second protective film to expose a lower surface of the circuit pattern, and protruding the bump from the upper surface of the insulating layer. Way. delete The method of claim 5, Forming the via hole; Method for manufacturing a multilayer printed circuit board, characterized in that formed using a laser drill. The method of claim 5, Forming the bumps; A method of manufacturing a multilayer printed circuit board, characterized in that it is formed using an electroplating method. The method of claim 5, The bump is a manufacturing method of a multilayer printed circuit board, characterized in that made of copper (Cu). The method of claim 5, The thermocompression step may include; Method of manufacturing a multilayer printed circuit board, characterized in that the pressing by pressing at a pressure of 80 ~ 120 kg / ㎠ in a 150 ~ 350 ℃ atmosphere.

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