KR100701699B1 - Method for forming isolation layer of semiconductor device - Google Patents

Abstract

The present invention discloses a method of forming a device isolation film of a semiconductor device for improving the trench filling characteristics in forming the device isolation film using a shallow trench isolation (STI) process. The disclosed method includes providing a semiconductor substrate having trenches of a first width and a second width greater than the first width; Depositing a first buried insulating film having a uniform thickness such that a trench of a first width is buried on the entire surface of the substrate; Isotropically etching the first buried insulating film to remove the first buried insulating film deposited on the surface of the substrate and the trench of the second width, and removing a portion of the first buried insulating film deposited on the trench of the first width to remove the first buried insulating film. Forming a groove on the trench to expose a seam generated in the first trench when the first buried insulating film is deposited; Depositing a second buried insulating film on the entire surface of the substrate including the first buried insulating film remaining to cover the seam exposed by the groove and completely fill the trench of the second width; And CMPing the second buried insulating film. According to the present invention, when filling trenches having different widths, a trench having a relatively narrow width is buried first, and then a groove is formed in the trench to expose the seams generated in the process. Then, by finally filling the trenches and other trenches, seams generated in the relatively narrow width of trenches can be hidden in the trenches, thereby preventing deterioration of device characteristics due to seams. have.

Description

Method for forming isolation layer of semiconductor device

1 is a plan view for explaining a semiconductor substrate having a trench defining an active region;

2A and 2B are cross-sectional views for explaining the problems of the prior art.

3A to 3D are cross-sectional views of processes for describing a method of forming a device isolation film according to the present invention.

Figure 4 is a photograph for explaining a device isolation film forming method according to the present invention.

Explanation of symbols on the main parts of the drawings

21 semiconductor substrate 22 first buried insulating film

23: groove 24: the second buried insulating film

T, T1, T2: trench A: active region

The present invention relates to a method for forming a device isolation film of a semiconductor device, and more particularly, to a method for improving trench filling characteristics in forming a device isolation film using a shallow trench isolation (STI) process.

As is well known, recent semiconductor devices have formed device isolation films using STI processes to electrically separate devices. In the case of the conventional LOCOS process, the size of the active region is reduced due to the occurrence of bird's-beak having a beak shape at the upper edge of the device isolation layer, but the width of the STI process is small. This is because the device isolation layer can be formed to secure the size of the active region, thereby realizing a highly integrated device.

Hereinafter, a conventional method of forming an isolation layer using an STI process will be described.

First, a pad oxide film and a pad nitride film are sequentially formed on a semiconductor substrate, and then the pad nitride film is patterned. Then, a trench is formed by etching the pad oxide layer and the substrate below using the patterned pad nitride layer.

Next, a buried insulating film is deposited on the substrate product to fill the trench, and the buried insulating film is chemical mechanical polished (CMP) until the pad nitride film is exposed.

Then, the pad nitride film used as the etch barrier is removed by a wet etching method using a phosphoric acid solution, and subsequently, the pad oxide film is removed by wet cleaning using a hydrogen fluoride solution to complete the formation of a trench type device isolation layer.

However, as the aspect ratio of the trench is increased as the design rule of the semiconductor device is reduced to 100 nm or less, the conventional device isolation layer forming method using the above-described STI process faces the limitation of trench filling. .

Hereinafter, the problems of the prior art will be described in more detail with reference to FIGS. 2A and 2B.

First, referring to FIG. 1, a plan view of a semiconductor substrate 1 in which a trench T is formed in a predetermined region of a device isolation film so as to form a device isolation film that defines an active region A will be described.

Referring to FIG. 1, the active area A has the shortest proximal distance in the short axis direction in areas crossing each other.

Therefore, the trench width in the D region is relatively narrow compared with the other regions, and the trench filling is relatively difficult.

Referring to FIG. 2A, when the trench is buried in the oxide film 2a by the conventional HDP (High Density Plasma) -CVD method, when fabricating a device having a class of 100 nm or less, in the trench T1 having the same width as the D region. Voids are generated, and these voids are exposed in subsequent wet etching processes, causing a poly stringer, resulting in an electrical failure of the device. Here, the unexplained symbol T2 indicates a trench having a width larger than the T1.

On the other hand, referring to Figure 2b, in order to suppress the generation of the void, when using a material having excellent step coverage (step coverage) as a buried insulating film, almost uniform thickness on the entire surface of the substrate including the trench Since the buried insulating film 2b is deposited and grown, void generation is suppressed, but there is a problem that a seam is caused in the narrow trench T1.

The seam is generated at a portion where the buried insulating film 2b deposited on both sidewalls of the trench abuts, and is exposed and enlarged in a subsequent cleaning process, resulting in a problem similar to voids, resulting in high reliability of the integrated device. It acts as a factor to lower the yield.

 Furthermore, as the device is highly integrated, the inclination angle of the trench sidewalls is also steeply increasing, so that the probability of occurrence of the seam is increasing.

Accordingly, the present invention has been made to solve the above-described conventional problems, the device isolation film of the semiconductor device that can prevent the deterioration of the device characteristics due to voids and seams during the trench filling in the STI process The purpose is to provide a formation method.

According to an aspect of the present invention, there is provided a method of forming a device isolation layer of a semiconductor device, the method including: providing a semiconductor substrate having trenches having a first width and a second width larger than the first width; Depositing a first buried insulating film having a uniform thickness such that a trench of a first width is buried on the entire surface of the substrate; Isotropically etching the first buried insulating film to remove the first buried insulating film deposited on the surface of the substrate and the trench of the second width, and removing a portion of the first buried insulating film deposited on the trench of the first width to remove the first buried insulating film. Forming a groove on the trench to expose a seam generated in the first trench when the first buried insulating film is deposited; Depositing a second buried insulating film on the entire surface of the substrate including the first buried insulating film remaining to cover the seam exposed by the groove and completely fill the trench of the second width; And CMPing the second buried insulating film.

Here, the first buried insulating film is an oxide film deposited by an O3-TEOS base thermal process or an insulating film deposited by an ALD process, while the second buried insulating film is an oxide film by an HDP-CVD process.

The first buried insulating film is deposited so that the sidewall deposition thickness in the trenches having the first and second widths is 100 to 1000 mW.

After the isotropic etching of the first buried insulating film, before the depositing of the second buried insulating film, or after the depositing of the second buried insulating film, the buried property of the first buried insulating film is improved. It further comprises the step of heat-treating the result.

(Example)

Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings.

3A to 3D are cross-sectional views illustrating processes of forming a device isolation film of a semiconductor device according to an embodiment of the present invention.

Referring to FIG. 3A, a pad oxide film (not shown) and a pad nitride film (not shown) are sequentially formed on the semiconductor substrate 21 according to a known process. Thereafter, the pad nitride film (not shown) is etched according to a known photolithography process, and then a predetermined depth of the pad oxide film (not shown) and the substrate 21 are prepared by using the etched pad nitride film (not shown) as an etching barrier. Etching forms trenches T1 and T2 in the field region of the substrate.

In this case, the trench is formed with various widths, as described with reference to FIG. 1. Here, for ease of description, the trench T1 having the narrowest first width among the trench widths and the larger than the first width are formed. A trench T2 having two widths is shown. In this case, the portion corresponding to the trench T1 having the first width is region D in FIG. 1.

Next, although not shown, a sidewall oxide film is formed on the trench surface through an oxidation process to prevent leakage current that may occur between the semiconductor substrate 21 and the interface of the trench. Thereafter, a linear nitride film is deposited on the sidewall oxide film so that the loss of the sidewall oxide film is prevented in a subsequent cleaning process, and subsequently a semiconductor substrate may be generated during the deposition of the subsequent trench buried insulating film. In order to prevent the defect of 21), a linear oxide is deposited.

Referring to FIG. 3B, a first buried insulating film 22 is deposited on a substrate resultant to fill the trench T1 of the first width. The first buried insulating film 22 is an oxide film by an O3-TEOS (Tetraethyl-orthosilicate) base thermal process or an insulating film by an atomic layer deposition (ALD) method, and has excellent step coverage.

Therefore, the first buried insulating film 22 has a uniform thickness and conformally deposited on the entire surface of the substrate. In the present invention, as shown, the trench T1 having the first width is completely buried. And the first buried insulating film 22 is deposited so as not to fill the trenches T2 having a width larger than the first width.

For example, the deposition thickness of the first buried insulating film 22 is in a range of 100 to 1000 GPa based on the thickness of the sidewall deposition in the trench. At this time, as shown in the drawing, a seam is generated in the portion of the first buried insulating film 22 embedded in the trench T1 having the first width.

Referring to FIG. 3C, the first buried insulating film 22 is isotropically etched to remove the first buried insulating film 22 deposited on the surface of the substrate 21 and the second trench T2. A portion of the upper portion of the first buried insulating layer 22 deposited in the trench T1 is removed to form a groove 23 exposing a seam on the upper portion of the trench T1 of the first width. In this case, the isotropic etching may be performed by a dry and wet etching method, a diluent containing hydrogen fluoride (HF) is used during the wet etching.

The first buried insulating film 22 deposited on the surface of the trench T1 having the second width is preferably removed by the isotropic etching, but a portion of the first buried insulating film 22 having a thickness of 200 μm or less may be left. .

As described above, through the isotropic etching process, the groove 23 is formed in the upper portion of the trench T1 of the first width, and the space of the trench T2 of the second width is widened.

FIG. 4 is a planar photograph of the semiconductor substrate after the isotropic etching. The first interlayer insulating layer 22 is embedded only in the trench T1 region having the first width after the isotropic etching, and the trench T2 region having the other large width is It can be seen that the first interlayer insulating film 22 is removed and exposed.

Although not shown, an additional protective film having a thickness of 100 μm or less is formed on the entire surface of the substrate 21 including the grooves 23 as necessary after the isotropic etching and before the deposition of the second buried insulating film 24. You can also

Referring to FIG. 3D, the entire surface of the substrate including the first buried insulating layer 22 remaining to cover the seam exposed by the groove 23 and to completely fill the trench T2 of the second width is shown in FIG. The second buried insulating film 24 is deposited.

Here, the second buried insulating film 24 is an oxide film by an HDP-CVD process, and as shown, is deposited with a relatively flat deposition height while filling the trenches T1 and T2.

In the present invention, as shown, after forming the groove 23 by etching the upper portion of the first buried insulating film 22 in the narrow trench (T1), the groove 23 to the second buried insulating film 24 By filling, the seam hides into the trench T1. Therefore, according to the method of the present invention, the seam is not exposed to the cleaning liquid in the subsequent cleaning process, thereby preventing deterioration of device characteristics due to the seam.

In the present invention, since the trench T2 having the second width is buried by the second buried insulating film 24 in the state where the internal space is secured by the isotropic etching process as described above, the trench T2 is easily buried.

After depositing the second buried insulating film 24, the substrate is heat-treated to improve the buried characteristics of the first buried insulating film 22.

The heat treatment process may be performed after isotropically etching the first buried insulating film 22 and before depositing the second buried insulating film 24.

Subsequently, although not shown, the second buried insulating film 24 is CMP to complete the device isolation film forming process of the present invention. Subsequently, a subsequent known step is sequentially performed to complete the semiconductor device.

As mentioned above, although the present invention has been illustrated and described with reference to specific embodiments, the present invention is not limited thereto, and the following claims are not limited to the scope of the present invention without departing from the spirit and scope of the present invention. It can be easily understood by those skilled in the art that can be modified and modified.

As described above, the present invention fills a trench with a relatively narrow width first, and then forms a groove on the buried trench, and finally fills the groove and the other trenches, so that the trench has a relatively narrow width. The generated seam can be hidden inside the trench. Accordingly, the present invention can prevent the deterioration of the characteristics of the device due to the seam, thereby improving the reliability and characteristics of the device.

In particular, the method of the present invention is a method that can improve the buried characteristics of the relatively narrow trench, there is an advantage that can be easily applied in the manufacturing of the device isolation film of the highly integrated device.

Claims (5)

Providing a semiconductor substrate having trenches of a first width and a second width larger than the first width: Depositing a first buried insulating film having a uniform thickness such that a trench of a first width is buried on the entire surface of the substrate; Isotropically etching the first buried insulating film to remove the first buried insulating film deposited on the surface of the substrate and the trench of the second width, and removing a portion of the first buried insulating film deposited on the trench of the first width to remove the first buried insulating film. Forming a groove on the trench to expose a seam generated in the first trench when the first buried insulating film is deposited; Depositing a second buried insulating film on the entire surface of the substrate including the first buried insulating film remaining to cover the seam exposed by the groove and completely fill the trench of the second width; And CMPing the second buried insulating film; Device isolation film forming method of a semiconductor device comprising a. The method of claim 1, wherein the first buried insulating film is an oxide film deposited by an O3-TEOS base thermal process or an insulating film deposited by an ALD process. 2. The method of claim 1, wherein the first buried insulating film is deposited so that the sidewall deposition thickness in the trenches of the first and second widths is 100 to 1000 mW. The method of claim 1, wherein the second buried insulating film is an oxide film by an HDP-CVD process. The method of claim 1, wherein after the isotropic etching of the first buried insulating film, before the depositing of the second buried insulating film, or after depositing the second buried insulating film, The method of claim 1 further comprising the step of heat-treating the resulting substrate to improve the buried characteristics.

Images