KR100699694B1 - LCD Display - Google Patents

Abstract

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a liquid crystal display device, comprising a thin film transistor comprising an active layer formed of first, second, and third electrodes and amorphous silicon, and a gate wiring and a data wiring formed to cross each other. A method for forming a driving unit of the present invention, comprising: outputting a plurality of input signals inputted from a gate driving circuit and a data driving circuit by flowing a plurality of gate wirings and data input signals through a multiplexing circuit (MUX) The line can be reduced to 1/3 or 1/5 of the conventional level, which greatly reduces the number of gate pads or data pads, and also reduces the number of circuits.

Accordingly, a circuit board (PCB) connected to each of the driving circuits may be configured on one side of the liquid crystal panel.

Therefore, there is an effect that can produce a liquid crystal display device that can ensure the production yield in the process, the reliability and price competitiveness of the panel.

Description

Liquid crystal display device             

1 is a cross-sectional view showing a tape carrier package structure,

2 is a plan view schematically showing a liquid crystal display according to the related art,

3 is a plan view schematically showing a liquid crystal display according to the present invention;

4 is a circuit diagram briefly illustrating a driver of a liquid crystal panel;

FIG. 5 is a diagram showing the operating characteristics of the circuit shown in FIG.

<Brief description of the main parts of the drawing>

111: liquid crystal panel 113: upper substrate

114: lower substrate 115a: first signal wiring (gate signal) mux circuit

115b: mux circuit for second signal wiring (data signal)

117: printed circuit board 119a: gate TCP

119b: source TCP 121: control circuit

The present invention relates to a liquid crystal display device, and more particularly, to a method of forming a driving unit of the liquid crystal display device.

In general, a liquid crystal display device includes a transparent upper substrate and a lower substrate, and a liquid crystal is injected between the upper substrate and the lower substrate.

In the above-described structure, in the case of an active matrix liquid crystal display (AMLCD), which is a large-area liquid crystal display device, a plurality of switching elements corresponding to a plurality of pixels are formed in a matrix on the lower substrate.

The switching element may be a general thin film transistor including a source electrode, a drain electrode, and a gate electrode. In this case, a gate wiring for transmitting a scanning signal to the gate electrode and a data signal to the source electrode may be transferred. Data wirings are formed, and the gate wirings and the data wirings are formed to cross each other with an insulating film interposed therebetween.

In addition, a pixel electrode in contact with the drain electrode is formed for each pixel.

Meanwhile, a transparent conductive metal is deposited on the upper substrate to form a common electrode.

In this case, when the liquid crystal display device is a color display means, after forming a color filter on the upper substrate, a common electrode is formed on the color filter. As described above, the lower substrate and the upper substrate each configured are injected with liquid crystal therebetween, and are bonded to each other by a sealant to form a liquid crystal panel.

In the liquid crystal panel having the above configuration, the signal voltage flowing through the data wiring is transmitted to the liquid crystal by the scanning signal applied to the gate electrode, and the gray voltage in the liquid crystal display device is changed because the signal voltage changes the polarization state of the liquid crystal in stages. (Gray level) can be expressed in various ways. Such a liquid crystal display device mounts a driving IC which serves as a means for applying a signal to each wiring formed on the lower substrate of the liquid crystal panel in various ways. Such techniques can be used in various ways.

For example, there are methods such as chip on board (COB), chip on class (COG), tape automatic bonding (TAB), and the like.

The COB (chip on board) method corresponds to a segment type liquid crystal display device or a low resolution panel, and because the number of leads is small, the driving IC is a printed circuit board. Circuit board ”, and a lead of the printed circuit board is connected to the liquid crystal panel by a predetermined method.

However, as the liquid crystal display becomes higher resolution, it is not easy to mount a driving IC having a large number of leads on the printed circuit board.

On the other hand, the tape automated bonding (TAB) method solves this problem by mounting the driving IC on a tape carrier. The COG method, which is another method, integrates a chip on a panel by a chip-on glass method. By mounting, it is excellent in connection stability and there is no addition of a connection terminal, and micro pitch can be mounted.

In the chip-on-glass method, a multilayer flexible printed circuit board (flexible printed circuit board), instead of a printed circuit board, contacts the panel with ACF to give an input signal to the IC.

The biggest advantage of the chip-on glass method is that cost reduction and reliability are improved.

On the other hand, there is a problem in that the repair of defects is difficult and the panel size is increased due to the pad area for IC mounting by the chip-on glass method.

Another type of tape carrier package (TCP) is a package that mounts a driving IC chip on a polymer film.

This technology is widely used in products that require light and small package, such as LCD as well as mobile phones.

1 is a cross-sectional view showing a general TCP structure.

As shown, the TCP structure is a liquid crystal in which the driving IC 17 is mounted on the polymer film 19, and the polymer film on which the driving IC chip is mounted is bonded to the upper substrate 13 and the lower substrate 11. It is produced by attaching an anisotropic conductive film (ACF) 18 over the lower substrate of the panel and the printed circuit board.

The tape carrier package having such a configuration is located on one side or both sides of the data wiring (not shown) of the array substrate, and on the one side or both sides of the gate wiring (not shown). The panel is driven by applying a signal to the data wiring.

2 is a schematic plan view of a liquid crystal display device in which a driving IC is mounted using a general TCP method.

As illustrated, the liquid crystal display device 21 is a liquid crystal in which the lower substrate 23 and the upper substrate 25 on which the data wiring (not shown) formed in the vertical direction and the gate wiring (not shown) formed in the horizontal direction are joined. A source TCP 27 mounted on one side of the data line and mounted with a source driver IC chip connected to the data line to apply a signal to the data line, and located at one side of the gate line; And a gate TCP 29 connected to and mounted with a gate driving IC chip for transmitting a scan signal to the gate wiring.

In addition, it includes a source PCB 31 is connected to the source TCP (27) which is an intermediary means for transferring external control signals and data signals, and a gate PCB (33) connected to the gate TCP (29). At this time, the external circuit for controlling the gate driving IC flows to the gate PCB through the printed circuit board (hereinafter referred to as PCB) substrate, and at this time, the flexible printed circuit (hereinafter referred to as FPC). The gate driving signal flowing through the source PCB is transferred to the gate PCB by using a.

That is, through the FPC 35, signals such as V _com , V _gh , V _gl , V _cc , G _sp , G _sc , _{Co e} , Gnd, etc., flow from the source PCB through the gate PCB. As described above, the gate control signal is transmitted by using a separate component called the FPC 35, thereby increasing the material cost of manufacturing the liquid crystal display, and connecting the FPC 35 to the gate PCB and the source PCB. In the process of defects in the liquid crystal module due to poor soldering occurs.

In addition, when the TCP including each of the driving ICs is attached by the TAB method, reliability is reduced. As shown in the drawing, the L-shaped circuit board has to be considered for compatibility with other structures when assembling the liquid crystal panel. There is complexity.

In addition, there is a problem of process delay caused by two TAB process.

The liquid crystal display device according to the present invention for solving the above problems is to improve the reliability through the process simplification to simplify the configuration of the driver by reducing the number of the gate driver IC and the data driver IC for applying a signal, An object of the present invention is to propose a method of manufacturing a liquid crystal display device having a large display effective area.

According to an aspect of the present invention, there is provided an LCD device including: an upper substrate; A lower substrate on which a plurality of first signal wires and a plurality of second signal wires cross each other; A liquid crystal panel having liquid crystal injected between the upper substrate and the lower substrate; A first signal wiring driving circuit for driving the plurality of first signal wirings and a second signal wiring for driving the plurality of second signal wirings, and a second signal located on the same side of the liquid crystal panel where the first signal wiring driving circuit is located; A wiring driving circuit; A first signal wiring multiplexer having a first input terminal coupled to the first signal wiring driving circuit and a first output terminal coupled to the plurality of first signal wiring lines; And a second input line multiplexer connected to the second signal line driving circuit and a second output line connected to the plurality of second signal lines.

And a control unit for controlling signal outputs of the multiplexer control circuit for controlling the first signal wiring multiplexer and the second signal wiring multiplexer, and the first signal wiring driving circuit and the second signal wiring driving circuit. .
The first signal wiring driving circuit and the second signal wiring driving circuit are connected to a single circuit board.

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The channel of each element of the first signal wiring multiplexer and the second signal wiring multiplexer may be made of polysilicon or microcrystal.

Hereinafter, exemplary embodiments of the present invention will be described with reference to the accompanying drawings.

According to the present invention, a multiplexer (hereinafter, referred to as a "mux circuit") is formed in each of a driver for transmitting signals to the gate wiring and the data wiring.

3 is a schematic plan view of a liquid crystal display according to the present invention.

As shown, the gate driving mux circuit 115a and the data driving are formed on one side of the liquid crystal panel where the upper substrate 113, the lower substrate 114 formed by crossing the gate wiring, and the data wiring are bonded to each other and in a direction perpendicular thereto. The dragon mux circuit 115a, 115b is comprised, respectively. In addition, a single PCB 117 is configured at one side of the liquid crystal panel 111, and connects the TCP 119 to the TAB method between the PCB 117 and the liquid crystal panel 111.

The TCPs connected to the single PCB 117 are the gate TCP 119a and the source TCP 119b, which each include a gate driver circuit and a data driver circuit.

A controller 121 is attached to one side of the PCB 117 to which each TCP is connected.

The control circuit 121 controls the flow of an input signal input to the gate driver circuit and the data driver circuit.

The mux circuits 115a and 115b are simply mediation means for sequentially transferring a plurality of input signals using one output line.

The control signal for controlling the mux circuit (115a, 115b) is applied through the mux control circuit 122 mounted on the PCB 117, if the mux control circuit 122 is not set aside the mux control signal May be applied to the mux circuits 115a and 115b through the control circuit 121.

The mux circuits 115a and 115b are useful for a device that transmits signals at high speed, and the channel of the element driving the mux circuit is made of polysilicon having a high electron mobility (˜10 cm 2 / Vsec or more) or a similar microcrystal ( micro crystalline). When the channel of the switching element constituting each pixel uses amorphous silicon, the amorphous silicon is formed of polysilicon or microcrystal by locally performing laser or heat treatment for the mux circuit configuration. FIG. 4 illustrates driving circuits 27 and 29 of FIG. 1, MUX circuits 115a and 115b connected thereto, and respective wirings connected to the MUX circuits 115a and 115b. Is a schematic partial circuit diagram of.

As shown, the driving unit according to the present invention includes a gate driver circuit 133, a data driver circuit (not shown), and a mux circuit 115a and 115b, and the mux circuits 115a and 115b are the liquid crystal panel. It is connected to the gate wiring 135a and data wiring 135b for applying a signal to (111 in FIG. 3).

The gate driver will be described below by way of example.

In general, the gate driving circuit is an IC having many output terminals. In general, the number of outputs is determined by the resolution of the panel in which the IC is used. Since an infinite number of outputs cannot be drawn in one IC, an integer number of driving ICs are used. Used in series.

In terms of time, the output signal has only one pulse per frame.

It is common that no output signal exists at the same time.

_1,

₂,

₃,

₄)를 통해 동기되어 순차적으로 게이트라인(g_i,g_i+1,g_i+2,g_i+3)에 주사신호가 입력된다.In this configuration, instead of reducing the number of gate driver ICs, at least four scan signals may be generated through one output point (for example, G _i ) of the gate driver IC having a limited output point, and each of these gate driver ICs may be generated. A plurality of output points of are connected to the mux circuit, the output point in the mux circuit (

_One,

₂ ,

₃ ,

₄ ) the scanning signals are sequentially input to the gate lines g _i , g _{i + 1} , g _{i + 2} and g _{i + 3} in synchronization with each other.

5 is a diagram illustrating a signal synchronization method of the gate driver having the configuration of FIG. 4. As illustrated, the driving IC applies one pulse to one output point for one frame and sequentially through each output point. Scan signals G _i , G _{i + 1} , and G _{i + 2} are applied.

₁,

₂,

₃,

₄)의 신호에 의해 순차적으로 동기되어 각 해당 게이트배선(g_i,g_i+1,g_i+2,g_i+3)에 인가된다.Scanning signal (G _i) which is applied during one frame for each control circuit in the MUX circuit (

₁ ,

₂ ,

₃ ,

The signals of ₄ ) are sequentially synchronized to the corresponding gate wirings g _i , g _{i + 1} , g _{i + 2} and g _{i + 3} .

Here, if the output number of the gate driver IC is K, the control signal generation circuit of the MUX circuit is 4, and the number of the drive IC is 2, the number of gate lines to which signals are applied through the driver is K × 4. It can be calculated as x2.

Therefore, since the gate driving circuit or the data driving circuit is not a direct connection method directly connected to each of the gate wiring lines and the data wiring lines, a plurality of scan signals may be applied using a limited channel of the driving circuit. It may be sequentially synchronized with the mux circuit control signal and applied to each gate wiring.

As described above, when the driver of the liquid crystal panel is configured, the gate pad and the data pad connected to the gate driver IC can be reduced to about 1/3 or 1/5 of the conventional one, and thus, the process is very simple.

Therefore, the liquid crystal display according to the present invention uses a mux circuit to sequentially synchronize signals output through a single output point of a gate driver IC or a data driver IC with signals input to a plurality of gate wirings or data wirings. As a result, the respective driving ICs can be reduced.                     

Second, since the respective driving ICs can be reduced, the gate driver IC and the data driver IC can be mounted on one side of the liquid crystal panel.

Third, since each of the driving ICs can be configured on one side, the TAB process is reduced, thereby reducing the driving failure of the liquid crystal panel due to defects that may occur during the TAB process.

Fourth, since the PCBs to which the respective driving ICs are connected can be configured on only one side, the assembly process with other structures may not be considered when assembling the liquid crystal display device, thereby simplifying the assembly process.

Claims (3)

An upper substrate; A lower substrate on which a plurality of first signal wires and a plurality of second signal wires cross each other; A liquid crystal panel having liquid crystal injected between the upper substrate and the lower substrate; A first signal wiring driving circuit for driving the plurality of first signal wirings and a second signal wiring for driving the plurality of second signal wirings, and a second signal located on the same side of the liquid crystal panel where the first signal wiring driving circuit is located; A wiring driving circuit; A first signal wiring multiplexer having a first input terminal coupled to the first signal wiring driving circuit and a first output terminal coupled to the plurality of first signal wiring lines; A second signal multiplexer having a second input terminal connected to the second signal wiring driving circuit and a second output terminal connected to the plurality of second signal wiring lines; Liquid crystal display comprising a The method of claim 1, And a controller configured to control the multiplexer control circuit for controlling the first signal wiring multiplexer and the second signal wiring multiplexer, and a signal output of the first signal wiring driving circuit and the second signal wiring driving circuit. The method of claim 2, The control unit may further apply a multiplexer control signal to the first signal wiring multiplexer and the second signal wiring multiplexer.

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