KR100683792B1 - Method for driving plasma display panel - Google Patents

Abstract

An object of the present invention is to provide a driving method in which address discharge efficiency is improved for a plasma display panel having a new structure having improved light emission efficiency and permanent afterimage.

In order to achieve the above object, the present invention provides a plurality of unit frames in order to drive a plasma display panel in which discharge cells are defined in regions where a plurality of electrodes intersect, and the plurality of electrodes surrounds the discharge cells. The subfields are divided into subfields, and each subfield is divided into reset, address, and sustain periods, and a falling pulse is applied to the first electrode of the plurality of electrodes in the reset period, and sequentially scanned to the first electrode in the address period. A pulse is applied but the potential of the low level of the scan pulse is lower than the potential of the lowest level of the falling pulse provides a driving method of the plasma display panel.

Description

Method for driving plasma display panel {Method for driving plasma display panel}

1 is a partially separated perspective view of a three-electrode surface discharge plasma display panel according to the prior art.

FIG. 2 is a plan view of the plasma display panel of FIG. 1 taken along line II-II. FIG.

3 is an example of a plasma display panel with improved luminous efficiency and permanent afterimage driven by the method of driving a plasma display panel of the present invention.

4 is a cross-sectional view taken along the line IV-IV.

FIG. 5 is a layout view illustrating a discharge cell and an electrode structure illustrated in FIGS. 3 and 4.

6 is a timing diagram briefly illustrating a driving method for driving the plasma display panel of FIG. 3.

FIG. 7 is a simplified block diagram of a plasma display device illustrating the plasma display panel of FIG. 3 and a driving device for driving the same.

8 is a diagram illustrating a driving signal for driving the plasma display panel of FIG. 3 according to one embodiment of the present invention.

9 is another example of the plasma display panel having improved light emission efficiency and permanent afterimage driven by the plasma display panel driving method of the present invention.

10 is a cross-sectional view taken along the line VII-VII.

FIG. 11 is a layout view illustrating a discharge cell and an electrode structure illustrated in FIGS. 9 and 12.

FIG. 12 is a simplified block diagram of a plasma display device showing the plasma display panel of FIG. 9 and a driving device for driving the same.

FIG. 13 is a diagram illustrating a driving signal for driving the plasma display panel of FIG. 9 according to another embodiment of the present invention.

Explanation of symbols on the main parts of the drawings

200, 300 ... plasma display panel of Figs.

210,310 ... first substrate 220,320 ... second substrate

212,312 ... First electrode 213,313 ... Second electrode

214,314 Bulkhead 322 Third electrode

Phosphor layer Ce ... discharge cell

701,1201 ... plasma display device of Figs.

700,1200 Image Processing Unit 702,1202 Logic Controller

704,1204 ... Y drive 706,1206 ... A drive

ΔV1, ΔV2 ... Potential difference between low level potential of injection pulse and lowest level potential of falling pulse

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a plasma display panel, and more particularly, to a driving method for a plasma display panel having a new structure in which luminous efficiency and permanent afterimage are improved.

Recently, a plasma display panel, which is drawing attention as a replacement of a conventional cathode ray tube display device, is discharged after a discharge gas is filled between two substrates on which a plurality of electrodes are formed. The phosphor formed in a predetermined pattern by the ultraviolet rays is excited to obtain a desired image.

1 is a partially separated perspective view of a three-electrode surface discharge plasma display panel according to the prior art, and FIG. 2 is a plan view of the plasma display panel of FIG. 1 taken along line II-II. A description with reference to FIGS. 1 and 2 below.

The plasma display panel 1 of FIGS. 1 and 2 includes a first panel 110 and a second panel 120.

The first panel 110 may include a first substrate 111, a first dielectric layer 115 disposed to cover the scan electrode lines 112 and the sustain electrode line 113 on a rear surface of the first substrate, and a first dielectric layer 115. A first passivation layer 116 is provided to protect the first dielectric layer 115. The scan electrode lines 112 and the sustain electrode lines 113 form a pair of sustain electrode pairs 114, and bus electrodes 112a and 113a made of a metallic material to increase conductivity, and indium tin oxide (ITO). Transparent electrodes 112b and 113b made of a transparent conductive material, and the like.

The second panel 120 covers the second substrate 121 and the address electrode line 122 formed in a direction orthogonal to a direction in which the scan electrode lines 112 and the sustain electrode lines 113 extend. The second dielectric layer 123 disposed in the direction of the first substrate from the front surface of the second substrate, the partition wall 124 partitioning discharge cells on the second dielectric layer 123, and the partition wall 124. A phosphor layer 125 disposed in a confined space and a second passivation layer 128 are provided on the entire surface of the phosphor layer 125 to protect the phosphor layer 125. Discharge gas is injected into the discharge cell Ce, which is a space defined by the partition wall 124.

In the conventional three-electrode plasma display panel shown in FIGS. 1 and 2, a frame is divided into a plurality of subfields, and each subfield is divided into a reset period, an address period, and a sustain period to display an image. However, the conventional three-electrode plasma display panel 1 has the following problems.

First, visible light emitted from the fluorescent layer 128 includes the sustain electrode lines 113, the scan electrode lines 112, and the electrode lines 106 and 107 disposed under the first substrate 110. As the substantial portion (approximately 40%) is absorbed by the first dielectric layer 115 and the first passivation layer 116 covering the portion, the luminous efficiency is low.

Second, when the conventional plasma display panel 1 as described above displays the same image for a long time, the fluorescent layer 128 is ion sputtered by the charged particles of the discharge gas, thereby providing a permanent afterimage. Cause.

Disclosure of Invention The present invention has been made to solve various problems including the above problems, and an object of the present invention is to provide a driving method in which the efficiency of address discharge is improved for a plasma display panel having a new structure having high luminous efficiency and improved permanent afterimage. do.

In order to achieve the above object, in the plasma display panel driving method,

The plasma display panel includes a first electrode and a second electrode extending to cross each other, a discharge cell is defined in the crossing area, the first electrode and the second electrode surround the discharge cell,

In the driving method, a unit frame for displaying an image is divided into a plurality of subfields, each subfield having a reset period for initializing all discharge cells, an address period for distinguishing cells to be turned on and cells not to be turned on, and to be turned on. In the discharge cell selected as the cell, it is divided into a sustain period for performing sustain discharge according to the gray scale weight allocated to each subfield.

The falling pulse is applied to the first electrode in the reset period, and the scanning pulse is sequentially applied to the first electrode in the address period, wherein the potential of the low level of the scanning pulse is lower than that of the lowest level of the falling pulse. A driving method of a display panel is provided.

According to another aspect of the present invention, in the sustain period, a sustain pulse having a high level and a low level is alternately applied to the first electrode, and a rising pulse is applied before the falling pulse is applied to the first electrode in the reset period. The rising pulse and the falling pulse may be ramp pulses.

According to another aspect of the present invention, a bias voltage is applied to the second electrode while a falling pulse is applied in the reset period, a display data signal is applied in accordance with the scanning pulse in the address period, and the sustain pulse is applied in the sustain period. Intermediate potentials of high and low levels can be applied.

In order to achieve the above object, the present invention also provides a plasma display panel driving method.

The plasma display panel includes a first electrode and a second electrode extending in one direction, a third electrode extending to intersect the first electrode and the second electrode, and a discharge cell is defined in the crossing region. The first electrode, the second electrode and the third electrode surrounds the discharge cell,

In the driving method, a unit frame for displaying an image is divided into a plurality of subfields, each subfield having a reset period for initializing all discharge cells, an address period for distinguishing cells to be turned on and cells not to be turned on, and to be turned on. In the discharge cell selected as the cell, it is divided into a sustain period for performing sustain discharge according to the gray scale weight allocated to each subfield.

The falling pulse is applied to the first electrode in the reset period, and the scanning pulse is sequentially applied to the first electrode in the address period, wherein the potential of the low level of the scanning pulse is lower than that of the lowest level of the falling pulse. A driving method of a display panel is provided.

According to another aspect of the present invention, a sustain pulse having a high level and a low level is alternately applied to the first electrode and the second electrode in the sustain period, and the rising pulse before the falling pulse is applied to the first electrode in the reset period. Is applied, and the rising pulse and the falling pulse may be ramp pulses.

According to another aspect of the present invention, the bias voltage is applied to the second electrode from the time of applying the falling pulse of the reset period to the address period, and the display data signal is applied to the third electrode in accordance with the scanning pulse in the address period.

In order to achieve the above object, the present invention also provides a plurality of discharge cells disposed together with a first substrate and a second substrate, and disposed between the first substrate and the second substrate together with the first substrate and the second substrate. A plasma display panel including a barrier rib defining the barrier ribs, a first electrode and a second electrode spaced apart from each other, extending in a cross direction, and surrounding the barrier rib, a phosphor layer disposed in the discharge cell, and a discharge gas in the discharge cell; And

In order to drive the plasma display panel, a unit frame is divided into a plurality of subfields, and each subfield includes a reset period for initializing all discharge cells, an address period for distinguishing cells to be turned on and cells to be turned off, and cells to be turned on. And a driving unit which is divided into a sustain period in which sustain discharge is performed according to the gray scale weights assigned to each subfield in the selected discharge cell, and applies a drive signal divided into a reset, an address, and a sustain period to each electrode. It is divided into a first driver for applying a drive signal to the electrode and a second driver for applying a drive signal to the second electrode,

The first driving unit applies the falling pulse in the reset period and the scanning pulse in the address period, wherein the potential of the low level of the scanning pulse is lower than the potential of the lowest level of the falling pulse.

According to another aspect of the present invention, the first driving unit applies a sustain pulse alternately having a high level and a low level in the sustain period, applies a rising pulse before applying the falling pulse in the reset period, and the rising pulse. And the falling pulse may be a ramp pulse.

According to another aspect of the present invention, the second driver applies a bias voltage while the first driver applies the falling pulse in the reset period, applies the display data signal in accordance with the scan pulse in the address period, and the sustain period. At the high voltage and low level of the sustain pulse can be applied.

In order to achieve the above object, the present invention also provides a plurality of discharge cells disposed together with a first substrate and a second substrate, and disposed between the first substrate and the second substrate together with the first substrate and the second substrate. Barrier ribs defining the barrier ribs; a first electrode and a second electrode spaced apart from each other and extending in one direction and surrounding the barrier rib; and a third electrode spaced apart from and intersecting the first electrode and the second electrode and surrounding the barrier rib; A plasma display panel comprising a phosphor layer disposed in a cell and a discharge gas in the discharge cell; And a unit frame is divided into a plurality of subfields to drive the plasma display panel, each subfield having a reset period for initializing all discharge cells, an address period for distinguishing cells to be turned on and cells not to be turned on, and turned on. And a driving unit which is divided into a sustain period in which sustain discharge is performed according to a gray scale weight assigned to each subfield in a discharge cell selected as a cell, and applies a drive signal divided into a reset, an address, and a sustain period to each electrode. It is divided into a first driver for applying a drive signal to the first electrode, a second driver for applying a drive signal to the second electrode, and a third driver for applying a drive signal to the third electrode,

The first driving unit applies the falling pulse in the reset period and the scanning pulse in the address period, wherein the potential of the low level of the scanning pulse is lower than the potential of the lowest level of the falling pulse.

According to another aspect of the present invention, the first driving unit and the second driving unit alternately apply a sustain pulse having a high level and a low level in the sustain period, and the first driver raises the rising pulse before applying the falling pulse in the reset period. The rising pulse and the falling pulse may be a lamp pulse.

According to another aspect of the present invention, the second driver applies a bias voltage from the application of the falling pulse in the reset period to the address period, and the third driver applies the display data signal in accordance with the scan pulse in the address period.

Hereinafter, with reference to the accompanying drawings will be described in detail an embodiment of the present invention.

3 is an example of a plasma display panel with improved luminous efficiency and permanent afterimage driven by the method of driving a plasma display panel of the present invention. FIG. 4 is a cross-sectional view taken along the line IV-IV. 4 is a layout view illustrating a discharge cell and an electrode structure shown in FIG. 4.

Referring to FIGS. 3 to 5, the plasma display panel 200 may include a first substrate 210, a second substrate 220, a partition 214, a first electrode 212, and a second electrode 213. And a phosphor layer 225, a first passivation film 216, and a discharge gas.

The first substrate 210 and the second substrate 220 are disposed to be spaced apart from each other.

The partition wall 214 may be integrally formed as shown in the drawing, and may be separately formed (attached to the first and second substrates 210 and 220) (front partition and rear partition). The partition wall 214 forms a discharge cell Ce, which is a space in which discharge is performed, together with the first substrate 210 and the second substrate 220. As shown in the drawing, the discharge cell Ce may be formed as an opening having a circular cross section in the partition wall 214, but is not limited thereto. The discharge cell Ce may have a cross section such as a triangle, a square, a pentagon, or an ellipse. May be formed. In addition, the partition wall 214 is shown as partitioning the discharge cells (Ce) in the form of a matrix, but is not limited to this, as long as it can form a plurality of discharge space, for example, in the waffle, delta shape in various patterns You can also partition with

In the partition wall 214, the first electrode 212 and the second electrode 213 extend in a direction intersecting with each other, surrounding the discharge cell Ce forming an opening having a circular cross section. That is, the first electrode 212 and the second electrode 213 extend in the x direction and the y direction, respectively, and are formed to be spaced apart from each other and surround the discharge cell. In the drawing, the second electrode 213 and the first electrode 212 are sequentially arranged in the direction of the second substrate (-z direction) from the first substrate, but the embodiment is not limited thereto.

It is preferable that a first passivation film 216 made of MgO or the like is formed on the outer surface of the partition wall 214 forming the discharge cell Ce. The first passivation layer 216 protects the first electrode 212 and the second electrode 213 and the partition wall 214 formed of the dielectric covering the first electrode 212 and the second electrode 213 during discharge, and easily discharges by discharging secondary electrons during discharge. Make it happen.

The phosphor layer 225 is formed on the first substrate 210, in detail, in the groove 210a formed on the first substrate in the direction of the second substrate. The position of the phosphor layer 225 is not limited to that shown in the drawings, and may be formed in a groove (not shown) formed on the second substrate in the direction of the first substrate, and on both the first substrate and the second substrate. It may be formed.

The discharge gas is filled in the discharge cell Ce, and any one or two of neon (Ne), helium (He), or argon (Ar) including Xenon gas before and after 10% as discharge gas. The above may be a mixed gas.

The first substrate 210 and the second substrate 220 are made of a material having excellent light transmittance mainly containing glass. The second substrate 220 is positioned to face away from the first substrate 210. Preferably, the first substrate 210 and the second substrate 220 are formed using substantially the same material. In this case, the thermal expansion rate of the first substrate 210 and the thermal expansion rate of the second substrate 220 are the same. There is an advantage to becoming.

The partition wall 214 prevents the first electrode 212 and the second electrode 213 from directly energizing during discharge, and the charged particles directly collide with the first electrode 212 and the second electrode 213 to damage them. It is formed as a dielectric material which can prevent the formation and induce charged particles to accumulate wall charges. Such dielectrics include PbO, B2O3, SiO2 and the like.

Since the first electrode 212 and the second electrode 213 are each applied with a predetermined voltage to perform discharge, it is preferable that the first electrode 212 and the second electrode 213 are formed of Ag, Cu, Cr, or the like having high electrical conductivity.

The phosphor layer 225 may be dried and baked after a phosphor paste in which one of the phosphors, solvents, and binders of the red, green, and blue phosphors is mixed is applied to the groove 210a of the first substrate. It is formed by roughness. Examples of the red light emitting phosphor include Y (V, P) O 4: Eu, and examples of the green light emitting phosphor include ZnSi 4 4: Mn, YBO 3: Tb, and the blue light emitting phosphor include BAM: Eu.

Meanwhile, a second passivation layer (not shown) made of MgO or the like may be formed on the entire surface of the phosphor layer 225 (-z direction). The second passivation layer prevents the phosphor layer 225 from deteriorating due to the collision of the discharge particles when the discharge occurs in the discharge cell Ce and helps the discharge to occur easily by emitting secondary electrons. Can be.

 The plasma display panel 200 illustrated in FIGS. 3 to 5 has the following advantages over the conventional plasma display panel 1.

First, separate dielectric layers for the first electrode 212 and the second electrode 213 are not needed, and the electrodes are disposed on the side of the discharge cell so as to surround the discharge cell, thereby preventing the discharge in the discharge space cell Ce. The visible light generated by the light is directly emitted through the first substrate 210 or the second substrate 220 to increase the luminous efficiency, and thus, there is no need for a transparent electrode such as ITO.

Second, the first electrode 212 and the second electrode 213 are formed to surround the discharge cell so that the electric field is concentrated in the center of the discharge cell (Ce), the plasma display panel 200 is the same image for a long time Although displayed, since the fluorescent layers 225 are not ion sputtered by the charged particles of the discharge gas, permanent afterimage can be prevented. In addition, since discharge may occur in all spaces of the discharge cell Ce, the response speed and the discharge efficiency may be increased.

6 is a timing diagram briefly illustrating a driving method for driving the plasma display panel of FIG. 3.

The unit frame for displaying an image is divided into a plurality of subfields, and each subfield is divided into a reset period, an address period, and a sustain period. The reset period is a period for initializing all the discharge cells, and the address period is a period for distinguishing the discharge cells that should be turned on and the discharge cells that should not be turned on among all the discharge cells, and the sustain period is a discharge cell selected as the discharge cells to be turned on. A sustain discharge period is performed according to the gray scale weights allocated to each subfield. The plasma display panel is driven by a time division driving method for applying a driving signal in accordance with the reset, address, and sustain periods for each subfield as described above.

In the drawing, the unit frame is divided into eight subfields SF1 to SF8, each subfield is divided into a reset period (not shown), an address period PA1 to PA8, and a sustain period PS1 to PS8. The gray scale weight is allocated from the first subfield to the eighth subfield as 1T, 2T, ... 128T, but this is only an example and the present invention is not limited thereto. That is, the number of subfields of a unit frame may be less or more than eight, and the allocation of gray scale weights for each subfield may be changed according to a design specification, unlike illustrated.

FIG. 7 is a simplified block diagram of a plasma display device illustrating the plasma display panel of FIG. 3 and a driving device for driving the same.

The structure of the plasma display panel 200 of FIG. 3 is a new electrode structure surrounding the discharge cells, and has a two-electrode structure. Therefore, the plasma display apparatus 701 of FIG. 7 is more concise than the conventional plasma display apparatus having a three-electrode structure.

Referring to FIGS. 3 to 8, the plasma display apparatus 701 of FIG. 7 includes an image processor 700, a logic controller 702, a Y driver 704, an A driver 706, and a plasma display panel 200. ).

The image processor 700 receives an external image signal such as a PC signal, a DVD signal, a video signal, or a TV signal from the outside, converts an analog signal into a digital signal, and processes the digital signal into an internal image signal. The internal video signals are 8-bit red (R), green (G), and blue (B) image data, clock signals, and vertical and horizontal sync signals, respectively.

The logic controller 702 receives an internal image signal from the image processor 700 and undergoes a gamma correction or an automatic power control (APC) step, respectively, to drive the Y drive control signal SY and the A drive control signal SA. Outputs

The Y driver 704 receives the Y driving control signal SY from the logic controller 702 and applies a driving signal to the first electrode 212 of FIG. 3, and the A driver 706 is the logic controller 702. A driving control signal SA is input from the driving signal to the second electrode 213 of FIG. 3. Hereinafter, the first electrode will also be described as the Y electrode and the second electrode as the A electrode.

The Y driver 704 applies the falling pulse to the Y electrode in the reset period, the scanning pulse in the address period, and the sustain pulse in the sustain period. Here, the low level potential of the scanning pulse is applied so that it is lower than the potential of the lowest level of the falling pulse (the difference is referred to as ΔV1 as shown in FIG. 8). This is to improve the discharge efficiency by making the potential difference between the Y electrode and the A electrode larger than the reset period during the address discharge occurring in the address period, and also accumulate a large amount of wall charges around the Y electrode after the address discharge to maintain the discharge period. This is to cause the sustain discharge to occur more efficiently. Meanwhile, the Y driver 704 may apply a rising pulse before applying the falling pulse, and may apply the rising pulse and the falling pulse in the form of a ramp pulse. When the rising pulse and the falling pulse are applied as the lamp pulses, the wall charges in the discharge cells in the reset period can be linearly controlled, and thus the reset discharges can be generated as weak discharges rather than strong inversions.

The A driver 706 applies a display data signal in accordance with the scan pulse in the address period. The address discharge is performed in the address period by the display data signal and the scanning pulse. As the Y driver 704 applies to the Y electrode such that the low level potential of the scanning pulse is less than the lowest potential level of the falling pulse, there is room to adjust the high level potential of the display data signal. Specifically, the high level potential of the display data signal can be lowered on the assumption that address discharge is performed smoothly.

 8 is a diagram illustrating a driving signal for driving the plasma display panel of FIG. 3 according to one embodiment of the present invention.

Referring to FIGS. 3 to 8, each subfield SF is divided into a reset period PR, an address period PA, and a sustain period PS.

The reset period PR is a period for initializing all discharge cells. A rising ramp pulse and a falling ramp pulse are applied to the Y electrode, and a low level voltage, for example, a ground voltage Vg is applied to the A electrode. The bias voltage Vb1 is applied during the down ramp pulse application. The rising ramp pulse rises from the sustain discharge voltage Vs1 to reach the rising maximum voltage Vs1 + Vset1, and the falling ramp pulse falls from the sustain discharge voltage Vs1 and falls down to the falling minimum voltage Vnf1. Due to the application of the rising ramp pulse, negative wall charges accumulate around the Y electrode in the discharge cell, and reset discharge occurs between the Y electrode and the A electrode. Due to the application of the falling lamp pulse, the reset discharge is performed between the Y electrode and the A electrode while the negative wall charges accumulated around the Y electrode in the discharge cell are erased. By the reset discharge, the wall charge state in the discharge cell is initialized, and a wall charge state suitable for the address discharge in the address period PA is established.

The address period PA is a period for distinguishing the discharge cells to be turned on and the discharge cells not to be turned on. In the drawing, the address discharge method, that is, a method of performing address discharge only in the discharge cells to be turned on, is not limited thereto. In addition, the selective erasing method, that is, the address discharge is performed in all the discharge cells, and the erasing discharge is performed only in the discharge cells that should not be turned on. As shown in the figure, according to the write discharge method, a scanning pulse having a high level potential Vsch1 and a low level potential Vscl1 is sequentially applied to the Y electrode, and the low level potential Vscl1 of the scanning pulse is applied. In accordance with this, a display data signal having a positive potential Va1 is applied to the A electrode. Due to the application of the scanning pulse and the display data signal, address discharge is performed between the Y electrode and the A electrode in the discharge cell.After the address discharge, positive wall charges are accumulated around the Y electrode and negative wall charges are accumulated around the A electrode. do. In the present invention, the potential Vscl1 of the low level of the scanning pulse is applied to be smaller than the falling minimum voltage Vnf1 of the falling lamp pulse. That is, the potential Vscl1 of the low level of the scanning pulse applies a potential less than the minimum potential Vnf1 of the falling ramp pulse by the predetermined potential difference ΔV1. As a result, the potential difference between the Y electrode and the A electrode at the address discharge becomes larger than the potential difference at the reset discharge, so that the address discharge is efficiently performed. After the address discharge ends, a considerable amount of wall charges are accumulated around each electrode in the discharge cell. Occurs. Also, under the assumption that the address discharge is performed smoothly, the larger the magnitude of the predetermined potential difference ΔV1 is, the lower the potential Va1 of the positive polarity level of the display data signal can be, thereby reducing the switching loss of the display data signal having a high switching frequency. Will be.

The sustain period PS is a period during which the sustain discharge is performed according to the gray scale weight assigned in the discharge cell selected as the cell to be turned on, and the sustain pulse having the high level (Vs1) and the low level (-Vs1) alternately is present at the Y electrode. The high potential Vs1 of the sustain pulse and the intermediate potential Vg of the low level (-Vs1) are applied to the A electrode. The high level potential of the sustain pulse is also referred to as the sustain discharge voltage Vs1. The number of sustain pulses is applied in proportion to the gray scale weight. That is, the gradation is expressed by the gradation weight assigned by the number of sustain discharges. First, when the high-level potential Vs1 of the sustain pulse is applied to the Y electrode, positive wall charges accumulated around the Y electrode in the discharge cell, negative wall charges accumulated around the A electrode, and applied to the Y electrode The sustain discharge is performed by the potential Vs1 and the potential Vg applied to the A electrode. After the completion of the sustain discharge, positive wall charges are accumulated around the A electrode, and negative wall charges are accumulated around the Y electrode. Next, when the low-level potential (-Vs1) of the sustain pulse is applied to the Y electrode, the negative wall charges accumulated around the Y electrode in the discharge cell, the positive wall charges accumulated around the A electrode, and Y The sustain discharge is performed by the potential (-Vs1) applied to the electrode and the potential (Vg) applied to the A electrode, and after the end of the sustain discharge, the negative wall charges are around the A electrode, and the positive wall is around the Y electrode. Electric charges will accumulate. In this manner, sustain discharge is continuously performed according to the number of sustain pulses according to the gray scale weight.

FIG. 9 is another example of the plasma display panel with improved luminous efficiency and permanent afterimage driven by the method of driving the plasma display panel of the present invention. FIG. 10 is a cross-sectional view taken along the line VII-VII, and FIG. 12 is a layout view showing the structure of the discharge cell and the electrode shown in FIG.

The plasma display panel 300 of FIGS. 9 to 11 is similar to the plasma display panel 200 of FIGS. 3 to 5, except that the plasma display panel of FIGS. 3 to 5 has a two-electrode structure. In contrast, the plasma display panel of FIGS. 9 to 11 has a three-electrode structure. Hereinafter, the differences will be described.

9 to 11, the plasma display panel 300 includes a first substrate 310, a second substrate 320, a partition 314, a first electrode 312, and a second electrode 313. And a third electrode 322, phosphor layer 325, first protective film 316, and discharge gas.

The description of the first substrate 310, the second substrate 320, the partition wall 314, the phosphor layer 325, the first passivation layer 316, and the discharge gas is replaced with the description of FIGS. 3 to 5.

The first electrode 312, the second electrode 313, and the third electrode 322 are formed so as to be spaced apart from each other, surrounding the discharge cells Ce forming an opening having a circular cross section in the partition wall. The first electrode 312 and the second electrode 313 extend in one direction (x direction), and the third electrode 322 crosses the directions in which the first electrode 312 and the second electrode 313 extend. Direction (y direction). Meanwhile, in the drawing, the second electrode 313, the third electrode 322, and the first electrode 312 are arranged in the direction of the second substrate from the first substrate (-z direction), but are not limited thereto. It is possible to arrange variously according to design specification.

The plasma display panel 300 illustrated in FIGS. 9 to 11 has the same advantages as those of the plasma display panel illustrated in FIGS. 3 to 5.

FIG. 12 is a simplified block diagram of a plasma display device showing the plasma display panel of FIG. 9 and a driving device for driving the same.

Since the plasma display device 1201 of FIG. 12 is similar to the plasma display device 701 of FIG. 7, a description thereof will be mainly given.

9 to 13, the plasma display apparatus 1201 of FIG. 12 includes an image processor 1200, a logic controller 1202, a Y driver 1204, an A driver 1206, and an X driver 1208. And a plasma display panel 300.

The image processor 1200 performs the same function as the image processor 700 of FIG. 7.

The logic controller 1202 receives an internal image signal from the image processor 1200 and undergoes a gamma correction or an automatic power control (APC) step, respectively, to drive the Y drive control signal SY and the A drive control signal SA. And an X driving control signal SX.

The Y driver 1204 receives the Y drive control signal SY from the logic controller 1202 and applies a drive signal to the first electrode 312 of FIG. 9, and the X driver 1208 is the logic controller 1202. A driving signal is applied to the second electrode (313 in FIG. 9) by receiving the X driving control signal SX from the A driving unit 1206, and the A driving control signal SA is input from the logic controller 1202. In response, a driving signal is applied to the third electrode (322 in FIG. 9). Hereinafter, the first electrode will also be described as the Y electrode, the second electrode as the X electrode, and the third electrode as the A electrode.

The Y driver 1204 applies the falling pulse to the Y electrode in the reset period, the scanning pulse in the address period, and the sustain pulse in the sustain period. Here, the low level potential of the scanning pulse is applied so that it is lower than the potential of the lowest level of the falling pulse (the difference is referred to as ΔV2 as shown in FIG. 13). This is to improve the discharge efficiency by making the potential difference between the Y electrode and the A electrode larger than the reset period during the address discharge occurring in the address period, and also accumulate a large amount of wall charges around the Y electrode after the address discharge to maintain the discharge period. This is to cause the sustain discharge to occur more efficiently. Meanwhile, the Y driver 1204 may apply a rising pulse before applying the falling pulse, and may apply the rising pulse and the falling pulse in the form of a ramp pulse. When the rising pulse and the falling pulse are applied as the lamp pulses, the wall charges in the discharge cells in the reset period can be linearly controlled, and thus the reset discharges can be generated as weak discharges rather than strong inversions.

The X driver applies the bias voltage Vb2 from the time of applying the falling pulse in the reset period to the address period, and applies the sustain pulse in the sustain period. The sustain pulses output from the Y driver and the sustain pulses output from the X driver alternate with each other, whereby sustain discharge is performed in the discharge cell.

The A driver 1206 applies a display data signal in accordance with the scan pulse in the address period. The address discharge is performed in the address period by the display data signal and the scanning pulse. As the Y driver 1204 applies to the Y electrode such that the low level potential of the scanning pulse is less than the lowest potential level of the falling pulse, there is room for adjusting the high level potential of the display data signal. Specifically, on the assumption that address discharge is performed smoothly, the high level potential of the display data signal can be lowered.

FIG. 13 is a diagram illustrating a driving signal for driving the plasma display panel of FIG. 9 according to another embodiment of the present invention.

The driving method of FIG. 9 is based on the time division gray scale representation method, which is based on the method shown in FIG. 6. Meanwhile, since the driving signal of FIG. 13 is similar to the driving signal of FIG. 8, the description will be mainly focused on the difference.

9 to 13, each subfield SF is divided into a reset period PR, an address period PA, and a sustain period PS.

The reset period PR is a period for initializing all discharge cells. A rising ramp pulse and a falling ramp pulse are applied to the Y electrode, and a low level voltage, for example, a ground voltage Vg is applied to the X electrode. The bias voltage Vb2 is applied when the falling lamp pulse is applied, and a low level voltage Vg is applied to the A electrode. The rising ramp pulse rises from the sustain discharge voltage Vs2 to reach the rising maximum voltage Vs2 + Vset2, and the falling ramp pulse falls from the sustain discharge voltage Vs2 to the falling minimum voltage Vnf2. Due to the application of the rising ramp pulse, negative wall charges accumulate around the Y electrode in the discharge cell, and reset discharge occurs between the Y electrode and the A electrode and between the Y electrode and the X electrode. Due to the application of the falling ramp pulse, the reset discharge is performed between the Y and A electrodes and between the Y and X electrodes while the negative wall charges accumulated around the Y electrode in the discharge cell are erased. By the reset discharge, the wall charge state in the discharge cell is initialized, and a wall charge state suitable for the address discharge in the address period PA is established.

The address period PA is a period for distinguishing the discharge cells to be turned on and the discharge cells not to be turned on. In the drawing, the address discharge method, that is, a method of performing address discharge only in the discharge cells to be turned on, is not limited thereto. In addition, the selective erasing method, that is, the address discharge is performed in all the discharge cells, and the erasing discharge is performed only in the discharge cells that should not be turned on. As shown in the figure, according to the write discharge method, a scan pulse having a high level potential Vsch2 and a low level potential Vscl2 is sequentially applied to the Y electrode, and the low level potential Vscl2 of the scan pulse is applied. In accordance with this, a display data signal having a positive potential Va2 is applied to the A electrode, and a bias voltage Vb2 is subsequently applied to the X electrode. The address discharge is performed between the Y electrode and the A electrode in the discharge cell due to the application of the scan pulse and the display data signal.After the address discharge, positive wall charges are formed around the Y electrode and negative wall charges are around the A electrode. The negative wall charges are accumulated around the X electrode. In the present invention, the potential Vscl2 of the low level of the scanning pulse is applied to be smaller than the falling minimum voltage Vnf2 of the falling lamp pulse. That is, the low-level potential Vscl2 of the scan pulse applies a potential less than the lowest potential Vnf2 of the falling ramp pulse by a predetermined potential difference ΔV2. As a result, the potential difference between the Y electrode and the A electrode at the address discharge becomes larger than the potential difference at the reset discharge, so that the address discharge is efficiently performed. After the address discharge ends, a considerable amount of wall charges are accumulated around each electrode in the discharge cell. Occurs. Also, under the assumption that the address discharge is performed smoothly, the larger the magnitude of the predetermined potential difference ΔV2 is, the lower the potential Va2 of the positive polarity level of the display data signal can be, thereby reducing the switching loss of the display data signal having a high switching frequency. Will be.

The sustain period PS is a period during which the sustain discharge is performed according to the gray scale weight assigned in the discharge cell selected as the cell to be turned on, and the sustain pulse having the high level (Vs2) and the low level (Vg) at the Y electrode and the X electrode is Alternately applied, the low-level potential Vg of the sustain pulse is applied to the A electrode. The high level potential of the sustain pulse is also referred to as the sustain discharge voltage Vs2. The number of sustain pulses is applied in proportion to the gray scale weight. That is, the gradation is expressed by the gradation weight assigned by the number of sustain discharges. First, when the high-level potential Vs2 of the sustain pulse is applied to the Y electrode, positive wall charges accumulated around the Y electrode in the discharge cell, negative wall charges accumulated around the X electrode, and applied to the Y electrode The sustain discharge is performed by the potential Vs2 and the potential Vg applied to the X electrode. After the completion of the sustain discharge, positive wall charges are accumulated around the X electrode, and negative wall charges are accumulated around the Y electrode. Next, when the high-level potential Vs2 of the sustain pulse is applied to the X electrode, the negative wall charges accumulated around the Y electrode in the discharge cell, the positive wall charges accumulated around the X electrode, and the Y electrode The sustain discharge is performed by the potential Vg applied to the X electrode and the potential Vs2 applied to the X electrode, and after the end of the sustain discharge, negative wall charges are formed around the X electrode, and positive wall charges are around the Y electrode. Will accumulate. In this manner, sustain discharge is continuously performed according to the number of sustain pulses according to the gray scale weight.

According to the present invention as described above, the following effects can be obtained.

First, the plasma display panel of the new structure has improved light emission efficiency, permanent afterimage, and the like.

Second, according to the driving method of the present invention for the plasma display panel of the new structure, the address discharge is performed stably and efficiently, and thus the sustain discharge is stably performed.

Third, the high level potential of the display data signal having a high switching frequency can be lowered, thereby reducing the switching loss.

Although the present invention has been described with reference to the embodiments shown in the drawings, this is merely exemplary, and it will be understood by those skilled in the art that various modifications and equivalent other embodiments are possible. Therefore, the true technical protection scope of the present invention will be defined by the technical spirit of the appended claims.

Claims (10)

In the driving method of the plasma display panel, The plasma display panel includes a first electrode and a second electrode extending to cross each other, a discharge cell is defined in the crossing area, the first electrode and the second electrode surround the discharge cell, In the driving method, a unit frame for displaying an image is divided into a plurality of subfields, each subfield having a reset period for initializing all discharge cells, an address period for distinguishing cells to be turned on and cells not to be turned on, and In the discharge cell selected as the cell to be divided into sustain periods for performing sustain discharge according to the gray scale weights assigned to each subfield, In the reset period, a falling pulse is applied to the first electrode, In the address period, the scan pulse is sequentially applied to the first electrode,  And a low level potential of the scan pulse is lower than a potential of the lowest level of the falling pulse. The method of claim 1, And a sustain pulse alternately having a high level and a low level is applied to the first electrode in the sustain period. The method of claim 1, In the reset period, a rising pulse is applied before the falling pulse is applied to the first electrode. The method of claim 3, And the rising and falling pulses are ramp pulses. The method of claim 2, wherein the second electrode, In the reset period, a bias voltage is applied while the falling pulse is applied, In the address period, a display data signal is applied in accordance with the scanning pulse, In the sustaining period, an intermediate potential of a high level and a low level of the sustain pulse is applied. In the driving method of the plasma display panel, The plasma display panel includes a first electrode and a second electrode extending in one direction, and a third electrode extending to intersect the first electrode and the second electrode. The first electrode, the second electrode, and the third electrode surround the discharge cell; In the driving method, a unit frame for displaying an image is divided into a plurality of subfields, each subfield having a reset period for initializing all discharge cells, an address period for distinguishing cells to be turned on and cells not to be turned on, and In the discharge cell selected as the cell to be divided into sustain periods for performing sustain discharge according to the gray scale weights assigned to each subfield, In the reset period, a falling pulse is applied to the first electrode, In the address period, the scan pulse is sequentially applied to the first electrode,  And the low level potential of the scan pulse is lower than the potential of the lowest level of the falling pulse. The method of claim 6, In the sustain period, a sustain pulse having a high level and a low level is alternately applied to the first electrode and the second electrode. The method of claim 6, In the reset period, a rising pulse is applied before the falling pulse is applied to the first electrode. The method of claim 8, And the rising and falling pulses are ramp pulses. The method of claim 7, wherein A bias voltage is applied to the second electrode from the time of applying the falling pulse of the reset period to the address period, And a display data signal is applied to the third electrode in accordance with the scanning pulse in the address period.

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