KR100649642B1 - Compound semiconductor light emitting device having an esd protecting element and method for manufacturing the same - Google Patents

Abstract

A compound semiconductor light emitting device with an ESD protection device is provided to more simply supply a compound semiconductor light emitting device with improved ESD tolerance by incorporating an MIS-type capacitor for ESD protection in a light emitting device on a single substrate. A light emitting part(140) includes an n-type semiconductor layer, an active layer(104) and a p-type semiconductor layer(106) which are sequentially stacked in a first region of a substrate(101), having an n-side electrode(114) and a p-side electrode(112) that are respectively formed on the n-type semiconductor layer and the p-type semiconductor layer. At least one capacitor(150,160) includes a n-type semiconductor layer, an insulation layer and a metal electrode layer(122,126) that are sequentially stacked on a second region of the substrate. The at least one capacitor is connected in parallel with the light emitting part. A transparent electrode layer(108) is further formed between the p-type semiconductor layer and the p-side electrode.

Description

Compound Semiconductor Light Emitting Device Having an ESD Protecting Element and Method for Manufacturing the Same

1 is a cross-sectional view showing an example of a conventional light emitting device having an ESD protection device.

2 is a cross-sectional view of a compound semiconductor light emitting device according to one embodiment of the present invention.

3 is a plan view of a compound semiconductor light emitting device according to one embodiment of the present invention.

4 is an equivalent circuit diagram of the compound semiconductor light emitting device of FIG. 2.

5 to 12 are cross-sectional views illustrating a method of manufacturing a compound semiconductor light emitting device according to an embodiment of the present invention.

13 is a cross-sectional view of a compound semiconductor light emitting device according to another embodiment of the present invention.

14 is an equivalent circuit diagram of the compound semiconductor light emitting device of FIG. 13.

15 to 18 are cross-sectional views illustrating a method of manufacturing a compound semiconductor light emitting device according to another embodiment of the present invention.

<Description of the symbols for the main parts of the drawings>

101: sapphire substrate 102: n-type semiconductor layer

104: active layer 106: p-type semiconductor layer

108: transparent electrode layer 110: insulating layer

112: p-side electrode 114: n-side electrode

122, 126: metal electrode layers 124, 125: connection wiring

140: light emitting unit 150, 160: capacitor

The present invention relates to a compound semiconductor light emitting device and a method for manufacturing the same, and more particularly to a compound semiconductor light emitting device having a high resistance to electrostatic discharge (ESD) and a method for manufacturing the same.

At present, compound semiconductor light emitting devices are becoming smaller and lower in power. As a result, the input capacitance is reduced, especially at the input and output terminals with the outside, so that the compound semiconductor light emitting diode (LED) or the laser diode (LD) is increasingly vulnerable to ESD. In order to implement a compound semiconductor light emitting device having high reliability, the light emitting device must be sufficiently protected from a sudden surge voltage or an ESD voltage.

In particular, Group III nitride LEDs based on Al _x Ga _y In _(1-xy) N (0≤x≤1, 0≤y≤1, 0≤x + y≤1) materials are more reverse ESD than forward ESD. More vulnerable to The resistance voltage for forward ESD of a commonly used Group III nitride LED is about 1 kV to 3 kV, while the resistance voltage for reverse ESD is about several hundred volts. Therefore, if a reverse ESD voltage exceeding the immunity voltage is applied to the group III nitride LED, the LED may be damaged. This reverse ESD phenomenon impairs the reliability of the group III nitride light emitting device and causes a drastic reduction in the life of the device.

In order to solve this problem, several methods for increasing the ESD resistance of the compound semiconductor light emitting device have been proposed. For example, a technique of protecting a light emitting device from electrostatic discharge by connecting a compound semiconductor light emitting device in parallel to a silicon-based zener diode has been proposed. 1 is a cross-sectional view of a conventional light emitting device showing an example thereof.

Referring to FIG. 1, the group III nitride light emitting device 10 includes a group III nitride LED 18 and a silicon zener diode 24. The LED 18 includes an n-type GaN cladding layer 12, an active layer 13, and a p-type GaN cladding layer 14 sequentially stacked on the sapphire substrate 11. Zener diode 24 includes n-type silicon layer 21 and p-type silicon layer 22. The p-side electrode 15 of the LED 18 is connected to the n-type silicon layer 21 of the zener diode 24, and the n-side electrode 16 of the LED 18 is the p-type silicon of the zener diode 24. Connected to layer 22.

When a reverse ESD voltage is applied to the LED 18 via the two terminals V ₁ , V ₂ , most of the discharge current flows through the zener diode 24. This protects the LED 18 device from reverse ESD. European Patent Publication No. EP1207563 discloses a technique in which a LED element and a zener diode are directly bonded on an electrode pad to connect both in parallel in order to improve the ESD resistance of the group III nitride LED.

However, these ESD protection schemes require the purchase or manufacture of a separate zener diode to bond and assemble to the LED, making the packaging process difficult, increasing the cost, and limiting the size of the device.

SUMMARY OF THE INVENTION The present invention has been made to solve the above problems, and an object of the present invention is to provide a compound semiconductor light emitting device that is advantageous for miniaturization and has improved ESD resistance.

Another object of the present invention is to provide a method for manufacturing a compound semiconductor light emitting device capable of increasing ESD resistance without assembling a separate zener diode.

In order to achieve the above technical problem, the compound semiconductor light emitting device according to the present invention,

A light emitting unit including an n-type semiconductor layer, an active layer and a p-type semiconductor layer sequentially stacked on the first region of the substrate, and an n-side electrode and a p-side electrode formed on the n-type semiconductor layer and the p-type semiconductor, respectively; And

At least one capacitor having an n-type semiconductor layer, an insulating layer, and a metal electrode layer sequentially stacked on a second region of the substrate,

The one or more capacitors are connected in parallel with the light emitting unit.

According to an embodiment of the present invention, the light emitting part may include an Al _x Ga _y In _(1-xy) N (0≤x≤1, 0≤y≤1, 0≤x + y≤1) layer. . The light emitting part may further include a transparent electrode layer between the p-type semiconductor layer and the p-side electrode. The n-type semiconductor layer of the first region may be separated from the n-type semiconductor layer of the second region by an isolation region.

According to one embodiment of the invention, the light emitting element comprises one capacitor portion. In this case, the metal electrode layer of the capacitor is electrically connected to the n-side electrode of the light emitting part, and the n-type semiconductor layer of the second region is electrically connected to the p-side electrode of the light emitting part.

According to another embodiment of the present invention, the light emitting element includes a plurality of capacitors. In this case, the plurality of capacitors are connected in series with each other.

According to one embodiment of the invention, the insulating layer extends on the light emitting portion. In this case, the insulating layer may serve as a dielectric film of the capacitor and a passivation film for protecting the light emitting part.

Compound semiconductor light emitting device according to a preferred embodiment of the present invention,

A light emitting unit including an n-type semiconductor layer, an active layer, and a p-type semiconductor layer sequentially stacked on the first region on the substrate, and an n-side electrode and a p-side electrode formed on the n-type semiconductor layer and the p-type semiconductor, respectively; And

A first capacitor and a second capacitor formed on the second region of the substrate,

The first capacitor has an n-type semiconductor layer, an insulating layer, and a first metal electrode layer sequentially stacked on a portion of the second region of the substrate, and the second capacitor is on another portion of the second region of the substrate. An n-type semiconductor layer, an insulating layer, and a second metal electrode layer sequentially stacked;

The n-type semiconductor layer of the first region is separated from the n-type semiconductor layer of the second region by an isolation region, the first metal electrode layer is electrically connected to the p-side electrode, and the second metal The electrode layer is electrically connected to the n-side electrode.

In the preferred embodiment, the n-type semiconductor layer, the active layer and the p-type semiconductor layer is Al _x Ga _y In _(1-xy) N (0≤x≤1, 0≤y≤1, 0≤x + y≤1 It can be made of). The light emitting part may further include a transparent electrode layer between the p-type semiconductor layer and the p-side electrode.

In the preferred embodiment, the insulating layer may extend on the light emitting portion. In this case, electrical connection between the first metal electrode layer and the p-side electrode may be made through a first wiring formed on the insulating layer. In addition, electrical connection between the second metal electrode layer and the n-side electrode may also be made through a second wiring formed on the insulating layer.

In order to achieve the another object of the present invention, the method for manufacturing a compound semiconductor light emitting device according to the present invention is to sequentially form an n-type semiconductor layer, an active layer and a p-type semiconductor layer on a substrate having a first region and a second region Steps; Mesa-etching a portion of the p-type semiconductor layer, the active layer and the n-type semiconductor layer to expose a portion of the first region and the n-type semiconductor layer in the second region, thereby mesas in the first region Forming a structure; Forming an insulating layer on the front of the n-type semiconductor layer and the mesa structure to open a p-side electrode region and an n-side electrode region; Manufacturing a light emitting part by forming a p-side electrode and an n-side electrode in the p-side electrode region and the n-side electrode region opened by the insulating layer, respectively; Manufacturing at least one capacitor by forming at least one metal electrode layer on the insulating layer of the second region; Connecting the light emitting units to the at least one capacitor in parallel.

According to one embodiment of the present invention, the n-type semiconductor layer, the active layer and the p-type semiconductor layer is Al _x Ga _y In _(1-xy) N (0≤x≤1, 0≤y≤1, 0≤x + y≤1). After the p-type semiconductor layer is formed, a transparent electrode layer may be formed on the p-type semiconductor layer. After forming the mesa structure, the method may further include separating the n-type semiconductor layer of the first region from the n-type semiconductor layer of the second region.

According to an embodiment of the present invention, in the manufacturing of the capacitor, one capacitor may be manufactured by forming one metal electrode layer on the insulating layer of the second region. In this case, after the capacitor is manufactured, the light emitting unit may be connected to the capacitor by electrically connecting the metal electrode layer to the n-side electrode and electrically connecting the n-type semiconductor layer of the second region to the p-side electrode. have.

According to another embodiment of the present invention, in the manufacturing of the capacitor, a plurality of metal electrode layers may be formed on the insulating layer of the second region to manufacture a plurality of capacitors. In this case, the plurality of capacitors may be connected in series with each other, and the light emitting unit may be connected to the plurality of capacitors in parallel.

Method for producing a compound semiconductor light emitting device according to a preferred embodiment of the present invention,

Sequentially forming an n-type semiconductor layer, an active layer, and a p-type semiconductor layer on a substrate having a first region and a second region;

Mesa-etching a portion of the p-type semiconductor layer, the active layer and the n-type semiconductor layer to expose a portion of the first region and an n-type semiconductor layer in the second region;

Selectively removing the n-type semiconductor layer to separate the n-type semiconductor layer in the first region and the n-type semiconductor layer in the second region;

Forming an insulating layer on the entire surface of the resultant surface, the insulating layer opening the p-side electrode region and the n-side electrode region;

Forming a p-side electrode and an n-side electrode in the p-side electrode region and the n-side electrode region opened by the insulating layer, respectively;

Forming a first metal electrode layer and a second metal electrode layer on the insulating layer of the second region;

Electrically connecting the first metal electrode layer and the second metal electrode layer to the p-side electrode and the n-side electrode, respectively.

In the preferred embodiment, electrically connecting the metal electrode layers to the p-side and n-side electrodes may include forming a first wire on the insulating layer connecting the first metal electrode layer and the p-side electrode. And forming a second wiring connecting the second metal electrode layer and the n-side electrode on the insulating layer.

In the preferred embodiment, the n-type semiconductor layer, the active layer and the p-type semiconductor layer is Al _x Ga _y In _(1-xy) N (0≤x≤1, 0≤y≤1, 0≤x + y≤1 It can be formed into). After the p-type semiconductor layer is formed, a transparent electrode layer may be formed on the p-type semiconductor layer.

According to the present invention, a compound semiconductor light emitting device having high reverse ESD resistance can be provided by a simpler method by embedding an ESD protection capacitor in a light emitting device on a single substrate. Therefore, it is not necessary to use a separate ESD protection device such as a zener diode, and the packaging process can be simplified and the volume increase due to the ESD protection device can be suppressed.

In the present specification, the term 'gallium nitride (GaN) -based semiconductor' or 'group III nitride' means Al _x Ga _y In _(1-xy) N (0≤x≤1, 0≤y≤1, 0≤x + y It means a bicomponent, ternary or quaternary compound semiconductor represented by ≤ 1).

Hereinafter, embodiments of the present invention will be described with reference to the accompanying drawings. However, embodiments of the present invention may be modified in various other forms, and the scope of the present invention is not limited to the embodiments described below. Embodiments of the present invention are provided to more completely explain the present invention to those skilled in the art. Accordingly, the shape and size of elements in the drawings may be exaggerated for clarity, and the elements denoted by the same reference numerals in the drawings are the same elements.

2 is a cross-sectional view of a compound semiconductor light emitting device according to one embodiment of the present invention, and FIG. 3 is a plan view of the light emitting device of FIG. 2 is a cross-sectional view taken along the line YY ′ of FIG. 3. The light emitting element 100 of the present embodiment corresponds to a GaN-based or group III nitride light emitting element. In the present embodiment, two capacitors are included in the light emitting element 100.

2 and 3, the light emitting device 100 includes a light emitting unit 140, a first capacitor 150, and a second capacitor 160 formed on the sapphire substrate 101. The light emitting unit 140 is formed to emit light, and the two capacitors 150 and 160 are formed to protect the light emitting unit 140 from an ESD voltage applied to the light emitting unit 140. The light emitting unit 140 corresponds to a GaN-based LED.

The upper surface of the sapphire substrate 101 has a first region A and a second region B. FIG. The light emitting unit 140 is formed on the first region A, and the capacitors 150 and 160 are formed on the second region B. FIG. The n-type semiconductor layer 102a of the first region A is separated from the n-type semiconductor layer 103b of the second region B by the device isolation region I.

The light emitting unit 140 includes an n-type semiconductor layer 102a, an active layer 104, and a p-type semiconductor layer 106 sequentially formed on the first region A of the sapphire substrate 101. The n-type and p-type semiconductor layers and the active layer are composed of GaN-based semiconductors (Al _x Ga _y In _(1-xy) N (0≤x≤1, 0≤y≤1, 0≤x + y≤1) The active layer 104 may include, for example, multiple quantum well layers, and a transparent electrode layer 108 forming ohmic contacts thereon is formed on the p-type semiconductor layer 106. The transparent electrode layer 108 For example, it may be formed of an ITO (Indiun Tin Oxide) layer, a SnO ₂ layer, or a Ni / Au layer, and the p-side electrode 112 of the light emitting part 40 is formed on the transparent electrode layer 108. The n-side electrode 114 of the light emitting part 140 is formed on the n-type GaN-based semiconductor layer 102a of the first region A exposed by mesa etching.

The first capacitor 150 includes a GaN-based n-type semiconductor layer 102b, an insulating layer 110, and a first metal electrode layer 122 sequentially formed on the second region B. As shown in FIG. The second capacitor 160 includes a GaN-based n-type semiconductor layer 102b, an insulating layer 102, and a second metal electrode layer 126 that are sequentially formed on the second region B. As shown in FIG. The n-type semiconductor layer 102b formed in the second region B serves as a lower electrode of the capacitors 150 and 160, and the first metal electrode layer 122 and the second metal electrode layer 126 are capacitors 150 and 160. It serves as the upper electrode of). Accordingly, the capacitors 150 and 160 correspond to MIS capacitors having a stacked structure of metal, insulating layer, and semiconductor.

The insulating layer 110 may be formed of, for example, a SiO ₂ film. The insulating layer 110 may be made of any material as long as it can be used as the dielectric of the capacitors 150 and 160 in addition to the SiO ₂ film. The insulating layer 110 extends over the light emitting part 140 to cover the entire surface except for the p-side electrode 112 and the n-side electrode 114. Therefore, the insulating layer 110 serves as a capacitor dielectric in the second region B and also serves as a passivation film for protecting the light emitting unit 140 in the first region A. FIG.

As shown in the plan view of FIG. 3, the n-type semiconductor layer 102b (the n-type semiconductor layer on the left side of FIG. 2) of the first capacitor 150 is the n-type semiconductor layer 102b of the second capacitor 160. ) (N-type semiconductor layer on the right side of Fig. 2) is integrally connected. This means that the lower electrode (n-type semiconductor layer) of the first capacitor 150 and the lower electrode (n-type semiconductor layer) of the second capacitor 160 are electrically connected to each other.

As illustrated in FIGS. 2 and 3, the light emitting unit 140 is connected to the first capacitor 150 and the second capacitor 160 through the first wiring 124 and the second wiring 125. That is, the p-side electrode 112 of the light emitting unit 140 is connected to the first metal electrode layer (upper electrode) 122 of the first capacitor 150 through the first wiring 124. In addition, the n-side electrode 114 of the light emitting unit 140 is connected to the second metal electrode layer (upper electrode) 126 of the second capacitor 160 through the second wiring 125.

Accordingly, the p-side electrode 112 of the light emitting unit 140 is connected to the upper electrode 122 of the first capacitor 150, and the lower electrode 102b of the first capacitor 150 is the second capacitor 160. The upper electrode 126 of the second capacitor 160 is integrally connected to the n-side electrode 114 of the light emitting unit 140. As a result, the light emitting unit 140 is connected to the first and second capacitors 150 and 160 in parallel. In addition, the first capacitor 150 and the second capacitor 160 are connected in series with each other. This connection state is well illustrated in an equivalent circuit diagram of the light emitting device 100 shown in FIG. 4.

Hereinafter, the operation of the light emitting device 100 according to the applied voltages V ₁ and V ₂ will be described with reference to FIGS. 2 and 4. As shown in FIG. 4, the light emitting device 100 includes two capacitors 150 and 160 connected in series with each other, and a light emitting unit 140 connected in parallel thereto. The light emitting unit 140 corresponds to a GaN-based LED as shown in FIG.

First, when a normal forward voltage is applied to the light emitting unit 140 through two terminals V ₁ and V ₂ , light is generated from the active layer 104 by a current flowing through the light emitting unit 140. The capacitors 150 and 160 do not pass current under a direct current voltage but only when a voltage change occurs. Therefore, under normal operating conditions of the light emitter 140, the capacitors 150 and 160 do not affect the light emitter 140.

However, when an instantaneous overvoltage such as a reverse or forward ESD voltage is applied to the terminals V ₁ and V ₂ of the light emitting device 100, a significant current flows in the capacitors 150 and 160. Accordingly, the light emitting unit 140 is protected from the sudden overvoltage, and the adverse effect on the light emitting unit 140 is minimized. As a result, the ESD resistance of the light emitting device 100 is increased.

In the present embodiment, the operation of the light emitting unit 140 can be further stabilized by connecting the two capacitors 150 and 160 to the light emitting unit 140. This is because even if one of the two capacitors is insulated-breakdown and a leakage current occurs therein, no problem occurs in the normal operation of the light emitting unit 140 unless the remaining capacitors are insulated-breakdown.

Specifically, when an excessive ESD voltage is applied to both terminals V ₁ and V ₂ , any one of the two capacitors 150 and 160 may be dielectrically destroyed. In this case, the dielectrically broken capacitor will still pass significant (leakage) current even at normal operating voltage. However, since the remaining capacitors that are not dielectric breakdown perform normal capacitor operation, the direct current characteristic of the entire light emitting device 100 may be maintained. That is, even if one capacitor is insulated and destroyed, the normal DC flow through the light emitting unit 140 is not disturbed by the other normal capacitor.

In another embodiment, three or more capacitors connected in series with each other may be connected to the light emitting unit 140 in parallel. For example, in FIG. 2, one more capacitor may be formed in the second region B to make three capacitors connected in series to the second region B. As another embodiment, as described below, only one capacitor may be manufactured and then connected to the light emitting unit 140 in parallel (see FIGS. 13 to 18). However, in order to more stably ensure the operation of the light emitting unit 140, it is preferable to connect two or more capacitors in parallel to the light emitting unit 140.

Hereinafter, a method of manufacturing a compound semiconductor light emitting device according to one embodiment of the present invention will be described with reference to FIGS. 5 to 12.

First, referring to FIG. 5, on an sapphire substrate 101 having a first region A and a second region B, an n-type semiconductor layer 102 made of a GaN-based semiconductor 102, an active layer 104, and p The type semiconductor layer 106 is formed sequentially. Such GaN-based semiconductor layers may be formed using, for example, an organometallic chemical vapor deposition process (MOCVD). In FIG. 5, the second region B is one region that surrounds the first region A (see plan view of FIG. 3). The first region A corresponds to the region where the light emitting unit is to be formed, and the second region B corresponds to the region where the capacitor is to be formed.

Thereafter, a transparent electrode layer 108 in ohmic contact with the p-type semiconductor layer 106 is formed on the p-type semiconductor layer 106. For example, the transparent electrode layer 108 may be formed of an ITO layer, a SnO ₂ layer, or a Ni / Au layer.

Next, as shown in FIG. 6, a portion of the transparent electrode layer 108, the p-type semiconductor layer 106, the active layer 104, and the n-type semiconductor layer 102 may be mesa-etched to form a first layer. A portion of the region A and the n-type semiconductor layer 102 of the second region B are exposed. Accordingly, the mesa structure 140a is formed in the first region A. FIG. Such mesa etching may be performed by dry etching using an inductively coupled plasma (ICP).

Next, as shown in FIG. 7, the n-type semiconductor layer 102 is selectively etched to form an isolation region I separating the first region A and the second region B. Referring to FIG. Accordingly, the n-type semiconductor layer 102a of the first region A is separated from the n-type semiconductor layer 102b of the second region B. As shown in FIG.

Next, as shown in FIG. 8, the insulating layer 110 is formed on the entire surface of the resultant product. The insulating layer 110 may be formed of, for example, a SiO ₂ film. The insulating layer 110 serves as a dielectric of the capacitor in the second region (B). Thus, the insulating layer 110 may be formed of a dielectric constant of high dielectric constant to obtain higher capacitance.

Next, as shown in FIG. 9, the insulating layer 110 is selectively etched to form a p-side electrode region (region where p-side electrode is to be formed) 112a and an n-side electrode region (n-side electrode). Region 114a is opened. The selective etching of the insulating layer 110 may be performed using a photolithography method commonly used in the manufacturing process of the semiconductor device.

Thereafter, as shown in FIG. 10, the p-side electrode 112 and the n-side electrode 114 are disposed in the p-side electrode region 112a and the n-side electrode region 114a opened by the insulating layer 110. Form. As a result, a light emitting portion made of GaN-based LEDs is formed in the first region A. FIG.

Next, as shown in FIG. 11, the first metal electrode layer 122 and the second metal electrode layer 126 are formed on the insulating layer 110 of the second region B. Referring to FIG. The metal electrode layer 126 may be formed using, for example, electron beam evaporation. The metal electrode layers 122 and 126 may be formed of any metal material as long as it can be used as the upper electrode of the capacitor. For example, the metal electrode layers 122 and 126 may include Al, Cu, Ni, Au, or Ag. As a result, two MIS capacitors 150 and 160 including the n-type semiconductor layer 102b, the insulating layer 110, and the metal electrode layers 122 and 126 are formed in the second region B. FIG.

Next, as shown in FIG. 12, the first wiring 124 connecting the first metal electrode layer 122 and the p-side electrode 112 to each other, the second metal electrode layer 124, and the n-side electrode 114 are shown. ) Are formed on the insulating layer 110. As a result, the light emitting unit 140 is connected in parallel with the two capacitors 150 and 160, and the two capacitors 150 and 160 are connected to each other in series. Accordingly, the light emitting device 100 having the ESD protection capability is manufactured.

13 is a cross-sectional view of a compound semiconductor light emitting device according to another embodiment of the present invention. In particular, the light emitting device 200 of FIG. 13 represents a light emitting device having only one capacitor as an ESD protection device. Referring to FIG. 13, unlike the light emitting device 100 of FIG. 2, a single capacitor 160 is formed in the second region B. Referring to FIG. The metal electrode layer 126 of the capacitor 160 is electrically connected to the n-side electrode 114 of the light emitting unit 140 through the wiring 125. In addition, the n-type semiconductor layer 102b of the second region B is electrically connected to the p-side electrode 112 of the light emitting unit 140 through the wiring 124 and the ohmic metal layer 123. Accordingly, the single capacitor 160 is connected in parallel with the light emitting unit 140. In this embodiment, the n-type semiconductor layer 102b and the p-side electrode 112 are connected through the ohmic metal layer 123 and the wiring 124. However, if the wiring 124 material itself can make ohmic contact with the n-type semiconductor layer 102b, no separate ohmic metal layer 123 is needed.

14 is an equivalent circuit diagram of the light emitting device 200 of FIG. 13. As shown in FIG. 14, the single capacitor 160 is parallel to the light emitting unit 140. Accordingly, the capacitor 160 protects the light emitting unit 140 when a sudden voltage such as an ESD voltage is applied.

15 to 18 are cross-sectional views illustrating a method of manufacturing the light emitting device 200 of FIG. 13. In this embodiment, like the above-described embodiment, the process steps described with reference to FIGS. Thus, the result as shown in FIG. 15 is obtained. Thereafter, as illustrated in FIG. 16, the insulating layer 110 is selectively etched to thereby p-side electrode region (region where p-side electrode will be formed) 112a and n-side electrode region (region where n-side electrode will be formed). Open 114a. In this case, the partial etching 123a of the n-type semiconductor layer 102b of the second region B is also exposed through the selective etching. The exposed partial region 123a corresponds to a region where an ohmic metal layer is to be formed later.

After that, as shown in FIG. 17, the p-side electrode 112 and the n-side electrode 114 are disposed in the p-side electrode region 112a and the n-side electrode region 114a opened by the insulating layer 110. Form. In this case, an ohmic metal layer 123 is also formed on the exposed partial region 123a. As a result, the light emitting unit 140 made of GaN-based LED is formed in the first region A. FIG.

Next, as shown in FIG. 18, the metal electrode layer 126 is formed on the insulating layer 110 of the second region B, and the wiring 124 is formed to form the ohmic metal layer 123 and the p-side electrode. 112 is connected, and another wiring 125 is formed to connect the metal electrode layer 126 and the n-side electrode 114. As a result, the light emitting unit 140 is connected in parallel with one capacitor 160. Accordingly, the light emitting device 200 having the ESD protection capability is manufactured. If the wiring 124 material is capable of making ohmic contact with the n-type semiconductor layer 102b, the n-type semiconductor layer 102b is directly connected to the p-side electrode 112 with the wiring 124 without the ohmic metal layer 123. You can also connect.

The present invention can be applied not only to the GaN-based semiconductor light emitting device described above but also to other compound semiconductor light emitting devices. For example, the light emitting device according to the present invention may be an AlGaInP light emitting device or an AlGaAs light emitting device.

The present invention is not limited by the above-described embodiment and the accompanying drawings, but is intended to be limited by the appended claims, and various forms of substitution, modification, and within the scope not departing from the technical spirit of the present invention described in the claims. It will be apparent to those skilled in the art that changes are possible.

As described above, according to the present invention, a compound semiconductor light emitting device having improved ESD resistance can be provided by a simpler method by embedding a MIS capacitor for ESD protection in a light emitting device on a single substrate. Therefore, it is not necessary to use a separate ESD protection device such as a zener diode, and the packaging process can be simplified and the volume increase due to the ESD protection device can be suppressed. In addition, since the n-type semiconductor layer is used as the lower electrode of the capacitor, it is not necessary to form a separate capacitor lower electrode, and the manufacturing process of the light emitting device having the ESD protection capability is simplified more.

Claims (26)

A light emitting unit including an n-type semiconductor layer, an active layer and a p-type semiconductor layer sequentially stacked on the first region of the substrate, and an n-side electrode and a p-side electrode formed on the n-type semiconductor layer and the p-type semiconductor, respectively; And At least one capacitor having an n-type semiconductor layer, an insulating layer, and a metal electrode layer sequentially stacked on a second region of the substrate, The at least one capacitor is a compound semiconductor light emitting device, characterized in that connected in parallel with the light emitting portion. The method of claim 1, The light emitting unit comprises a Al _x Ga _y In _(1-xy) N (0≤x≤1, 0≤y≤1, 0≤x + y≤1) layer. The method of claim 1, The light emitting unit further comprises a transparent electrode layer between the p-type semiconductor layer and the p-side electrode. The method of claim 1, The n-type semiconductor layer of the first region is separated from the n-type semiconductor layer of the second region. The method of claim 4, wherein The light emitting device includes a compound semiconductor light emitting device comprising a capacitor. The method of claim 5, And the metal electrode layer of the capacitor is electrically connected to the n-side electrode of the light emitting part, and the n-type semiconductor layer of the second region is electrically connected to the p-side electrode of the light emitting part. The method of claim 4, wherein The light emitting device includes a compound semiconductor light emitting device, characterized in that a plurality of capacitors. The method of claim 7, wherein And the plurality of capacitors are connected in series with each other. The method of claim 1, The insulating layer extends over the light emitting portion. A light emitting unit including an n-type semiconductor layer, an active layer, and a p-type semiconductor layer sequentially stacked on the first region on the substrate, and an n-side electrode and a p-side electrode formed on the n-type semiconductor layer and the p-type semiconductor, respectively; And A first capacitor and a second capacitor formed on the second region of the substrate, The first capacitor has an n-type semiconductor layer, an insulating layer, and a first metal electrode layer sequentially stacked on a portion of the second region of the substrate, and the second capacitor is on another portion of the second region of the substrate. An n-type semiconductor layer, an insulating layer, and a second metal electrode layer sequentially stacked; The n-type semiconductor layer of the first region is separated from the n-type semiconductor layer of the second region by an isolation region, the first metal electrode layer is electrically connected to the p-side electrode, and the second metal And an electrode layer is electrically connected to the n-side electrode. The method of claim 10, The n-type semiconductor layer, the active layer and the p-type semiconductor layer is characterized by consisting of Al _x Ga _y In _(1-xy) N (0≤x≤1, 0≤y≤1, 0≤x + y≤1) Compound semiconductor light emitting device. The method of claim 10, The light emitting part further comprises a transparent electrode layer between the p-type semiconductor layer and the p-side electrode. The method of claim 10, The insulating layer extends over the light emitting portion. The method of claim 13, Electrical connection between the first metal electrode layer and the p-side electrode is made through a first wiring formed on the insulating layer, The electrical connection between the second metal electrode layer and the n-side electrode is made through a second wiring formed on the insulating layer. Sequentially forming an n-type semiconductor layer, an active layer, and a p-type semiconductor layer on a substrate having a first region and a second region; Forming a mesa structure in the first region by mesa etching a portion of the p-type semiconductor layer, the active layer, and the n-type semiconductor layer to expose a portion of the first region and an n-type semiconductor layer in the second region. ; Forming an insulating layer on the front of the n-type semiconductor layer and the mesa structure to open a p-side electrode region and an n-side electrode region; Manufacturing a light emitting part by forming a p-side electrode and an n-side electrode in the p-side electrode region and the n-side electrode region opened by the insulating layer, respectively; Manufacturing at least one capacitor by forming at least one metal electrode layer on the insulating layer of the second region; And And connecting the light emitting units to the at least one capacitor in parallel. delete The method of claim 15, The n-type semiconductor layer, the active layer and the p-type semiconductor layer is formed of Al _x Ga _y In _(1-xy) N (0≤x≤1, 0≤y≤1, 0≤x + y≤1) The manufacturing method of the compound semiconductor light emitting element made into. The method of claim 15, And after forming the p-type semiconductor layer, forming a transparent electrode layer on the p-type semiconductor layer. The method of claim 15, After forming the mesa structure, further comprising separating the n-type semiconductor layer of the first region from the n-type semiconductor layer of the second region. The method of claim 19, In the step of manufacturing the capacitor, a method of manufacturing a compound semiconductor light emitting device, characterized in that to form one metal electrode layer on the insulating layer of the second region. The method of claim 20, And electrically connecting the metal electrode layer to the n-side electrode after the capacitor is manufactured, and electrically connecting the n-type semiconductor layer of the second region to the p-side electrode. Method of manufacturing a light emitting device. The method of claim 19, In the manufacturing of the capacitor, a plurality of metal electrode layers are formed on the insulating layer of the second region to form a plurality of capacitors, And manufacturing the plurality of capacitors and connecting the light emitting units to the plurality of capacitors in parallel after manufacturing the plurality of capacitors. Sequentially forming an n-type semiconductor layer, an active layer, and a p-type semiconductor layer on a substrate having a first region and a second region; Mesa-etching a portion of the p-type semiconductor layer, the active layer and the n-type semiconductor layer to expose a portion of the first region and an n-type semiconductor layer in the second region; Selectively removing the n-type semiconductor layer to separate the n-type semiconductor layer of the first region and the n-type semiconductor layer of the second region; Forming an insulating layer on the entire surface of the resultant surface to open the p-side electrode region and the n-side electrode region; Forming a p-side electrode and an n-side electrode in the p-side electrode region and the n-side electrode region opened by the insulating layer, respectively; Forming a first metal electrode layer and a second metal electrode layer on the insulating layer of the second region; And And electrically connecting the first metal electrode layer and the second metal electrode layer to the p-side electrode and the n-side electrode, respectively. The method of claim 23, wherein Electrically connecting the metal electrode layers to the p-side and n-side electrodes, Forming a first wiring connecting the first metal electrode layer and the p-side electrode on the insulating layer; And And forming a second wiring connecting the second metal electrode layer and the n-side electrode on the insulating layer. The method of claim 23, wherein The n-type semiconductor layer, the active layer and the p-type semiconductor layer is formed of Al _x Ga _y In _(1-xy) N (0≤x≤1, 0≤y≤1, 0≤x + y≤1) The manufacturing method of the compound semiconductor light emitting element made into. The method of claim 23, wherein And after forming the p-type semiconductor layer, forming a transparent electrode layer on the p-type semiconductor layer.

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