KR100580391B1 - Polycrystalline silicon thin film transistor and thin film transistor substrate for liquid crystal display including the same and manufacturing method thereof - Google Patents

Abstract

The data line and the source and drain electrodes in the vertical direction are formed through a patterning process using a mask on a transparent insulating substrate. Subsequently, a transparent conductive film is stacked and a pixel electrode directly connected to the drain electrode is formed through a patterning process using a mask. In this case, the pixel electrode and the drain electrode are formed to be directly connected to each other, so that a process of forming contact holes for connecting them is not necessary. Next, amorphous silicon is laminated, amorphous silicon is polycrystalline, and then a semiconductor layer of polycrystalline silicon is formed through a patterning process using a mask, and then silicon oxide or silicon nitride is laminated to form a gate insulating film. In this case, the semiconductor layer does not need to be directly connected to the source and drain electrodes to form contact holes for connecting them. Subsequently, a gate wiring metal film is deposited on the gate insulating film and patterned by a photolithography process using a mask to form a gate line including the gate line and the gate electrode and the storage electrode line. In this case, the gate electrode is formed on the semiconductor layer, and a part of the storage electrode line overlaps the pixel electrode. Next, N-type impurities are implanted into the semiconductor layer using the gate wiring as a mask to form highly doped source and drain regions and channel regions.

Description

Polycrystalline silicon thin film transistor and thin film transistor substrate for liquid crystal display including the same and manufacturing method thereof

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a thin film transistor, a thin film transistor substrate for a liquid crystal display including the same, and a method for manufacturing the same. In particular, a polycrystalline silicon thin film transistor using polycrystalline silicon as a semiconductor layer, and a thin film transistor substrate for a liquid crystal display including the same It relates to a manufacturing method.

The liquid crystal display includes a data line for transmitting an image signal, a gate line for transmitting a scan signal for opening a gate, a thin film transistor as a switching element, a liquid crystal capacitor to which an image signal voltage is applied, and a storage capacitor.

When the open voltage is applied to the gate of the thin film transistor, the thin film transistor is turned on and the charge is charged to the liquid crystal capacitor. The charged charge is applied to the gate and the closing voltage is applied again by the holding capacitor even after the thin film transistor is closed. The charge remains until the next frame in which the transistor is opened.

Amorphous or polycrystalline silicon is mainly used as a semiconductor layer of the thin film transistor. When polycrystalline silicon is used, the field effect mobility is greater than that of amorphous silicon, so that a better display image quality can be obtained. Integration at the same time as part formation reduces chip prices.

However, in the method of manufacturing a substrate for a liquid crystal display device having a polysilicon thin film transistor, an N-type thin film transistor and a P-type thin film transistor must be manufactured together in the driving circuit portion. Thus, a patterning process using a photoresist is added to increase the number of masks. The overall process cost will increase. In the etching process of forming a contact hole on the polycrystalline silicon layer, a separate process of forming a buffer layer as a silicon nitride layer or a metal layer is performed under the polycrystalline silicon layer in order to prevent the polycrystalline silicon layer from being removed. In addition, when forming the polycrystalline silicon layer or the gate wiring of the thin film transistor, the number of masks increases because the portion to be the sustain electrode of the storage capacitor must be formed in a separate metal pattern or the ion doping is performed on the silicon layer.

An object of the present invention is to simplify the manufacturing process of a polycrystalline silicon thin film transistor and a polycrystalline silicon thin film transistor substrate for a liquid crystal display including the same, thereby minimizing the process cost.

In the polycrystalline silicon thin film transistor and a method of manufacturing the same according to the present invention for solving the above problems, the source and drain electrodes are formed in direct contact with the semiconductor layer.

More specifically, a semiconductor layer made of polycrystalline silicon is formed so as to form source and drain electrodes separated from each other on a substrate and partially cover the source and drain electrodes. Next, a gate insulating film covering the semiconductor layer and the source and drain electrodes is formed, and a gate electrode is formed on the gate insulating film of the semiconductor layer.

Here, the semiconductor layer of polycrystalline silicon can be formed using amorphous silicon.

In the method of manufacturing a polycrystalline thin film transistor according to the present invention, since the semiconductor layer and the source and drain electrodes are directly connected, a process of forming contact holes for connecting them is unnecessary.

In addition, in the method for manufacturing a liquid crystal display substrate including the polysilicon thin film transistor, the pixel electrode is formed to be directly connected to the drain electrode, and the gate wiring is formed by two patterning processes using a mask. At this time, after each patterning process, the conductive region is formed in the N-type or P-type thin film transistor in the driving circuit portion using the gate wiring as a mask.

More specifically, in the polycrystalline silicon thin film transistor substrate for a liquid crystal display device according to the present invention and a method of manufacturing the same, separation from the data line, the source electrode and the source electrode which is a branch of the data line through a photo process using a first mask on a transparent insulating substrate A data line formed of the drain electrode is formed. Subsequently, a pixel electrode made of a transparent conductive material in the pixel region and connected to the drain electrode is formed through the photolithography process using the second mask. Next, a semiconductor layer of polycrystalline silicon is formed through a photolithography process using a third mask directly in contact with the source and drain electrodes, and a gate insulating film covering the data line, the pixel electrode, and the semiconductor layer is formed. Subsequently, a gate line including a gate line defining a pixel region crossing the data line and a gate electrode which is a branch of the gate line is formed on the gate insulating layer by a photolithography process using a fourth mask. Next, an N-type or P-type impurity is ion-implanted into the semiconductor layer using the gate wiring as a mask to form source and drain regions in the semiconductor layer. Finally, silicon oxide or silicon nitride is laminated on the substrate to form a semiconductor layer.

Here, in order to connect the gate line and the data line, after forming the gate insulating film, a process of forming a first contact hole using a fifth mask in the gate insulating film on the data line may be added.

The second contact hole may further include a gate pad and a data pad connected to the gate line and the data line, respectively, and expose the gate pad and the data pad by etching the passivation layer or the gate insulating layer through a photolithography process using a sixth mask. Forming process can be added.

In addition, in the case of forming the N-type and P-type transistors on the substrate, the photolithography process using the seventh mask may be added before and after the photolithography process using the fourth mask, and the gate wiring may be formed through two photolithography processes. . In this case, an N-type or P-type transistor is formed by ion-implanting one of two impurities using a gate wiring formed through a photolithography process using a fourth mask as a mask, and the other conductive transistor is a photo using a seventh mask. A portion of the gate wiring is patterned using the photoresist formed through the process, and ion implantation is performed using the photoresist as a mask.

Therefore, in the method of manufacturing a polycrystalline silicon thin film transistor substrate for a liquid crystal display according to the present invention, the pixel electrode, the source, and the drain electrode are directly connected, and thus the process of forming contact holes for connecting them can be omitted. In addition, the number of manufacturing masks can be reduced by forming the conductive region of the N-type or P-type transistor using the gate wiring and the photoresist as the ion implantation mask.

Next, a method of manufacturing a liquid crystal display according to an exemplary embodiment of the present invention will be described in detail with reference to the accompanying drawings so that a person skilled in the art may easily implement the present invention.

First, a structure of a polysilicon liquid crystal display according to an exemplary embodiment of the present invention will be described with reference to FIGS. 1 and 2.

1 is a layout view of a liquid crystal display according to the present invention, and FIG. 2 is a cross-sectional view taken along the line II-II 'of FIG. 1. 1 and 2 are views illustrating only a unit pixel in the structure of a polysilicon thin film transistor substrate for a liquid crystal display according to the present invention.

1 and 2, a buffer insulating film 200 is formed over the transparent insulating substrate 100.

On the buffer insulating layer 200, a data line including a vertical data line 300, a source electrode 310 which is a part of the data line 300, and a drain electrode 320 separated from the source electrode 310 is formed. have. In addition, an N-type impurity is heavily doped in both the undoped channel region 430 and the channel region 430 on the buffer insulating layer 200 and directly covers the source and drain electrodes 310 and 320, respectively. A semiconductor layer 400 having drain regions 420 and 410 and made of polycrystalline silicon is formed. In addition, a pixel electrode 800 directly connected to the drain electrode 320 and formed of a transparent conductive material is formed on the buffer insulating layer 200 of the pixel region P.

The gate insulating layer 500 is formed on the semiconductor layer 400, the pixel electrode 800, and the data lines 300, 310, and 320 not covered by the semiconductor layer and the pixel electrode.

On the gate insulating layer 500, a gate line including a gate electrode 600 in a horizontal direction and a branch of the gate line 600 and overlapping the channel region 430 is formed, and the storage electrode line ( 620 is formed in the horizontal direction. The storage electrode line 620 is formed to partially overlap the pixel electrode 800, so that a storage capacitor is formed between the storage electrode line 620 and the pixel electrode 800.

A passivation layer 700 is formed on the gate insulating layer 500 to cover the gate lines 600 and 610 and the storage electrode line 620.

In the polycrystalline silicon thin film transistor substrate for a liquid crystal display device according to the present invention, the polycrystalline silicon thin film transistor includes a gate electrode 610, a source electrode 310, a drain electrode 320, a gate insulating film 500, and a semiconductor layer 400. Is done.

Although FIG. 1 and FIG. 2 which show only a unit pixel are not shown here, a contact hole for electrically connecting the gate line 600 and the data line 300 is formed in the gate insulating film 500. In addition, the gate insulating layer 500 or the passivation layer 700 is connected to the gate line 600 and the data line 300, and has a contact hole exposing a gate pad and a data pad, which are paths for transmitting a scan signal and a data signal. Formed.

In addition, although not shown in the drawing, a drive integrated circuit can be directly formed on the polycrystalline silicon thin film transistor substrate for a liquid crystal display device, and N-type and P-type transistors are formed.

Next, a method of manufacturing the polysilicon thin film transistor substrate for a liquid crystal display device will be described with reference to FIGS. 3A to 3E.

3A to 3E are cross-sectional views illustrating a method of manufacturing a liquid crystal display device according to a first embodiment of the present invention according to a process sequence.

As shown in FIG. 3A, silicon oxide or silicon nitride is laminated on the transparent insulating substrate 100 to form an insulating film for buffer 200. Next, a metal layer for data wiring is deposited and patterned by a photolithography process using a first mask to form vertical data lines 300 and source and drain electrodes 310 and 320.

Subsequently, as shown in FIG. 3B, an indium tin oxide (ITO), which is a transparent conductive layer, is stacked and patterned by a photolithography process using a second mask to form a pixel electrode 800 directly connected to the drain electrode 320. .

In this case, the pixel electrode 800 and the drain electrode 320 are formed to be directly connected, so that a photo process for forming contact holes for connecting them is unnecessary.

Next, as shown in FIG. 3C, amorphous silicon is laminated, amorphous silicon is polycrystalline, and then patterned by a photolithography process using a third mask to form a semiconductor layer 400 of polycrystalline silicon, and then silicon oxide or nitride Silicon is stacked to form a gate insulating film 500.

In this case, the process of forming the contact hole for connecting the semiconductor layer 400 by connecting the source and drain electrodes 310 and 320 may be omitted.

Here, although not shown in the drawing, when the semiconductor layer 400 is formed using the third mask, the semiconductor layers of the N-type and P-type transistors of the driving integrated circuit that can be directly formed on the substrate 100 are also formed. .

Further, in order to electrically connect the gate line and the data line 300 to be formed later, a patterning process of forming a contact hole in the gate insulating film 500 by adding a fourth mask to expose a portion of the data line 300 is performed. You can also add

If only the unit pixel is considered, the process using the fourth mask may be omitted.

Subsequently, as shown in FIG. 3D, a gate wiring metal film is deposited on the gate insulating film 500, and patterned by a photolithography process using a fifth mask, thereby forming and maintaining the gate wiring including the gate line 600 and the gate electrode 610. The electrode line 620 is formed. In this case, the gate electrode 610 is formed on the semiconductor layer 400, and a part of the storage electrode line 620 overlaps the pixel electrode 800.

Next, N-type impurities are implanted into the semiconductor layer 400 using the gate lines 600 and 610 as masks to form the heavily doped source and drain regions 410 and 420 and the channel region 430.

Here, a process of forming the P-type and N-type transistors of the driving integrated circuit together on the substrate 100 may be added. In this case, a pattern is further included to cover a portion where the P-type transistor is formed in the gate wiring, and when the source and drain regions 410 and 420 are formed, the N-type high concentration in the semiconductor layer of the N-type transistor among the driving integrated circuits is formed. Only areas are formed together. At this time, since the gate wiring has a pattern covering a portion where the P-type transistor is formed, the semiconductor layer of the P-type transistor is in an undoped state. Next, a photoresist is applied on the substrate 100 and patterned by a photolithography process using a sixth mask to remove the added P-type transistor pattern from the gate wiring. Here, the remaining photoresist is formed so as to expose only the portion where the P-type transistor is formed. Next, using the remaining photoresist as an ion implantation mask, a P-type high concentration region is formed in the semiconductor layer of the P-type transistor.

If only the unit pixel is considered, the photo process using the sixth mask may be omitted.

Next, as shown in FIG. 3E, a passivation layer 700 covering the gate line 600, the gate electrode 610, and the storage electrode line 620 is formed on the gate insulating film 500.

Although not shown in the drawing, a process of exposing the gate pad and the data pad connected to the gate line 600 and the data line 300 may be added. In this case, the passivation layer 700 covering the gate pad is removed through the photolithography process using the seventh mask, and the passivation layer 700 and the gate insulating layer 500 covering the data pad are removed.

Of course, if only the unit pixel is considered, the photographic process using the seventh mask may be omitted.

As described above, the polycrystalline silicon thin film transistor according to the embodiment of the present invention, the polycrystalline silicon thin film transistor for a liquid crystal display including the same, and a method of manufacturing the same, using only three masks of the first, third, and fifth masks Silicon thin film transistors can be formed. In addition, unit pixels may be formed using only four masks of the first, second, third, and fifth masks, and in total, seven crystals of the first to seventh masks may be used to form a polycrystal for a liquid crystal display device. A silicon thin film transistor substrate can be formed.

As described above, in the method of manufacturing a polysilicon thin film transistor substrate for a liquid crystal display according to the present invention, a process of forming a contact hole for connecting a separate source and drain electrode and a semiconductor layer or connecting a pixel electrode and a drain electrode is performed. Not required. Therefore, the number of processes can be reduced and the cost can be saved.

1 is a layout view of a polysilicon thin film transistor substrate for a liquid crystal display according to an exemplary embodiment of the present invention.

2 is a cross-sectional view taken along the line II-II of FIG. 1,

3A to 3E are cross-sectional views illustrating a method of manufacturing a polysilicon thin film transistor substrate for a liquid crystal display according to an exemplary embodiment of the present invention according to a process sequence thereof.

Claims (10)

Forming a data line formed of a data line, a source electrode, and a drain electrode on a transparent insulating substrate; Depositing a transparent conductive film on the substrate; Patterning the transparent conductive film to form a pixel electrode in contact with the drain electrode; Forming a semiconductor layer formed on the substrate, the semiconductor layer comprising polycrystalline silicon covering the source electrode and the drain electrode; Forming a gate insulating film covering the data line, the pixel electrode, and the semiconductor layer; Forming a gate line on the gate insulating layer, the gate line including a gate line crossing the data line and a gate electrode connected to the gate line; Method of manufacturing a thin film transistor substrate for a liquid crystal display device comprising a. In claim 1, And forming a first contact hole for exposing the data line by patterning the gate insulating layer after forming the gate wiring. In claim 2, The gate line and the data line further include gate pads and data pads connected to the gate line and the data line, respectively. Forming a passivation layer covering the gate wiring and patterning the gate insulating layer or the passivation layer to form second and third contact holes exposing the gate pad and the data pad. Method for manufacturing a transistor substrate. In claim 1, And second and third portions in which N-type and P-type transistors are formed on the substrate. The gate wiring further includes a pattern covering one of the second and third portions, In the forming of the first semiconductor layer, further forming second and third semiconductor layers of the N-type and P-type transistors, One of the N-type and P-type impurities is ion-implanted using the gate wiring as a mask to form a highly doped source and drain region in the first semiconductor layer, and in one of the second or third semiconductor layers. Forming a high concentration region in one of the Applying photoresist on the gate insulating film and the gate wiring; Patterning the photoresist to expose the pattern, Removing the pattern by using the photoresist as an etching mask; And ion implanting the other impurities of the N-type and P-type impurities using the photoresist as an ion implantation mask. Transparent insulation substrate, A data line formed on the substrate and including a data line having a source electrode and a drain electrode separated from the source electrode; A pixel electrode formed on the substrate and partially covering the drain electrode and made of a transparent conductive material; A semiconductor layer formed on the substrate and partially covering the source and drain electrodes, the semiconductor layer comprising polycrystalline silicon, A gate insulating film covering the pixel electrode, the data line, and the semiconductor layer; A gate wiring formed on the gate insulating layer, the gate wiring including a gate line and a gate electrode connected to the gate line to cross the data line; Thin film transistor substrate for a liquid crystal display device comprising a. In claim 5, The gate insulating layer has a first contact hole exposing the data line, And the gate line and the data line are electrically connected to each other through the first contact hole. In claim 6, And a passivation layer covering the gate line. In claim 7, And a gate pad and a data pad respectively connected to the gate line and the data line, wherein the gate insulating layer and the passivation layer further include second and third contact holes exposing the gate pad and the data pad. Thin film transistor substrate for display device. Board, A source electrode and a drain electrode formed on the substrate and separated from each other; A semiconductor layer formed on the substrate and covering the source and drain electrodes and made of polycrystalline silicon; A pixel electrode formed on the substrate and covering a portion of the drain electrode; A gate insulating film covering the source and drain electrodes and the semiconductor layer, And a gate electrode formed on the gate insulating film of the semiconductor layer. Stacking and patterning a first metal film on the substrate to form source and drain electrodes, Forming a semiconductor layer on the substrate, the semiconductor layer made of polycrystalline silicon and partially covering the source and drain electrodes; Forming a gate insulating film covering the source and drain electrodes and the semiconductor layer, Stacking and patterning a second metal film on the gate insulating film to form a gate electrode.