KR100531243B1 - High sensitivity image sensor using nano size channel and its manufacturing method - Google Patents

Abstract

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to the formation of an efficient photoexcitation charge generation and transfer structure within an image sensor unit pixel, wherein at least two nano-sized electron channels are formed in a photodetector transistor to form a hole pocket formed between each nanochannel. The present invention relates to a high-sensitivity image sensor composed of unit pixels capable of increasing photoelectric conversion efficiency by efficient threshold voltage modulation of a signal transfer transistor, and a method of manufacturing the same.

A high sensitivity image sensor using the nano-sized electron channel of the present invention and a method of manufacturing the same are Si substrate; A first conductive region doped with P-type in the Si substrate by an ion implantation process; A high concentration n-type doped source and drain region spaced at predetermined intervals on both sides of the surface layer of the first conductive region; A channel region between the source and drain regions; Second conductive regions spaced at predetermined intervals from each other on both side surface layers of the channel region and formed by high concentration n-type doping; At least two nanoelectronic channels spaced apart at predetermined intervals between a second conductive region formed in the channel region and a central portion of the channel region; And a unit pixel comprising a high concentration n-type doped gate formed over the channel region through a gate insulating film, the first step of forming a nanoelectronic channel on a Si substrate using a photomask; A second step of removing the photomask and forming a p-type doped first conductive region in a region including a nanoelectronic channel by an ion implantation process; A third step of forming a high concentration n-type second conductive region on the surface of the first conductive region surface layer so as to be spaced apart from each other by a predetermined interval; Forming a gate insulating film and a gate to include both the nanoelectronic channel and the second conductive region; A fifth step of doping the gate to a high concentration n-type region by an ion implantation process; A fifth step of forming a high concentration n-type source and drain regions in the first conductive region surface layers on both sides of the gate; And a sixth step of forming a contact between the source, the drain and the gate.

Therefore, the high sensitivity image sensor using the nano-sized electron channel of the present invention and a method of manufacturing the same are provided so that hole holes are formed by random doping and bias between the nano-sized electron channels formed by the separation. Because it accumulates, it serves to amplify the flow of electrons in the photodetector transistor channel, so that even if a small amount of light is irradiated, efficient photoelectric conversion characteristics can be obtained. In addition, in a region where light intensity is increased, a large dynamic range can be secured by a side bipolar transistor effect of the hole pocket, and a high pixel image sensor array can be manufactured with a minimum of unit pixels. Can be.

Description

High sensitivity image sensor using nano size channel and its manufacturing method

The present invention relates to a high-sensitivity image sensor using a nano-sized electron channel and a method for manufacturing the same, and more particularly, to a high-sensitivity image sensor that can increase the photoelectric conversion efficiency without a separate amplification device by forming a nanowire in the channel. .

In general, an image sensor is a semiconductor device that converts an optical image into an electrical signal, and a CCD (Charge Coupled Device) is an individual MOS (Metal-Oxide-Silicon). The capacitors are located in close proximity to each other, and charge carriers are stored and transported in the capacitors. CMOS (Complementary Metal-Oxide Semiconductor, or CMOS) image sensors use control circuits and signal processing circuits as peripheral circuits. It is a device that adopts a switching method of making MOS transistors by the number of pixels using CMOS technology and sequentially detecting outputs using the same.

In particular, the CMOS image sensor has a lower power consumption than the CCD image sensor, and can be manufactured by the same CMOS technology, so that the sensor element and the peripheral circuit element have excellent mass productivity. The unit pixel is composed of one photodiode (PD) and four MOS transistors (Tx, Rx, Sx, Dx), so the unit pixel is larger than the CCD element, and the signal is amplified and transmitted from each unit pixel. Therefore, the dark current and the noise have a big problem.

Accordingly, in Korean Registered Patent No. 0377598, Korean Laid-Open Patent Publication No. 2001-0062028, and the like, a highly-filled buried layer (carrier pocket) is formed to accumulate holes in the potential well of the carrier pocket, which is proportional to the accumulation amount of the holes. Although an image sensor for detecting an optical signal is provided, the MOS type image sensor has a complicated problem in manufacturing a method for forming a high concentration buried layer.

Accordingly, the present invention is to solve the problems of the prior art as described above, by forming at least two nano-sized electron channels in the photodetector transistor and by using a hole pocket formed between each nano channel (light pocket) Holes excited by the electrons are accumulated in the hole pockets to amplify the flow of electrons, thereby providing a phototransistor having high photoelectric conversion efficiency by efficient threshold voltage modulation of the signal transfer transistor. Accordingly, an object of the present invention is to provide a highly sensitive image sensor that can be manufactured by a relatively simple manufacturing process, and can minimize the unit pixel size of the image sensor, thereby enabling a high pixel image sensor array.

The object of the present invention is a Si substrate; A first conductive region doped with P-type in the Si substrate by an ion implantation process; A high concentration n-type doped source and drain region spaced at predetermined intervals on both sides of the surface layer of the first conductive region; A channel region between the source and drain regions; Second conductive regions spaced at predetermined intervals from each other on both side surface layers of the channel region and formed by high concentration n-type doping; At least two nanoelectronic channels spaced apart at predetermined intervals between a second conductive region formed in the channel region and a central portion of the channel region; And a unit pixel comprising a high concentration n-type doped gate formed on the channel region through a gate insulating layer.

Still another object of the present invention is a first step of forming a nano electronic channel using a photomask on a Si substrate; A second step of removing the photomask and forming a p-type doped first conductive region in a region including a nanoelectronic channel by an ion implantation process; A third step of forming a high concentration n-type second conductive region on the surface of the first conductive region surface layer so as to be spaced apart from each other by a predetermined interval; Forming a gate insulating film and a gate to include both the nanoelectronic channel and the second conductive region; A fifth step of doping the gate to a high concentration n-type region by an ion implantation process; A fifth step of forming a high concentration n-type source and drain regions in the first conductive region surface layers on both sides of the gate; And a sixth step of forming a contact between the source, the drain, and the gate.

Details of the above object and technical configuration of the present invention and the effects thereof according to the present invention will be more clearly understood by the following detailed description with reference to the drawings showing preferred embodiments of the present invention.

First, FIG. 1 is a cross-sectional view of an image sensor unit pixel according to the present invention, and FIG. 2 is a plan view of FIG. 1 and 2 will be described the structure of the image sensor according to the present invention.

In the image sensor unit pixel of the present invention, a P-type doped first conductive region 12 is formed on the Si substrate 11 by an ion implantation process, and is spaced apart at predetermined intervals on both sides of the surface layer of the first conductive region to have a high concentration. The n-type doped source 13 and drain 14 regions are formed. A channel region is formed between the source and drain regions, and at least two nanoelectronic channels 15 are formed at the center of the channel region at predetermined intervals. At this time, the nano-sized electron channel has a V-shaped groove shape, and the second conductive region 16 doped with a high concentration n-type is formed on both side surface layers of the channel region, which are spaced apart by the nanochannel. A high concentration n-type doped gate 17 is formed on the channel region through a gate insulating layer (not shown).

Photoexcited holes accumulate between the at least two nanoelectronic channels to form hole holes arbitrarily, and when photoexcited holes accumulate, an npn type side bipolar transistor is formed along with a high concentration n-type doped second conductive region. .

The photoelectric conversion method according to the present invention having the above structure is as follows.

First, when light is irradiated, electron-hole pairs are generated in the depletion region by the PN junction of the second conductive region, and the generated holes are accumulated in a hole pocket arbitrarily formed between the nano electron channels under the gate. This accumulated charge can linearly increase the flow of electrons flowing from the source to the drain. In addition, the accumulated holes drive the high-concentration n-type second conductive region and the npn-type side bipolar transistor formed apart from each other to further amplify the photocurrent.

The manufacturing method of the image sensor according to the present invention as described above will be described with reference to the process diagram shown in Figs.

In the image sensor according to the present invention, as shown in FIG. 3A, the nanowire pattern 29 is formed on the Si substrate 21 using a photomask, and then the (111) plane is etched through a microlithography process or an etching process. The V-shaped grooves form at least two or more nano-sized electron channels 25 at depths of 100 to 200 nm (FIG. 3B). 3C, the photomask is removed and a field oxide film 28 is formed to separate the devices.

Next, as shown in FIG. 3D, a p-type doped first conductive region 24 is formed in the body separated by the field oxide film, and the surface layer of the first conductive region is spaced at a predetermined interval by a nano electron channel. The second conductive region 30 is formed by doping with a high concentration n-type (FIG. 3E). Next, a gate insulating film and a gate 27 are formed on the top including both the nanoelectronic channel and the second conductive region (FIG. 3F). Finally, a high concentration n-type source and drain region are formed in the surface layers of the first conductive region on both sides of the gate, and the contact between the source, drain and gate is formed (not shown). A photo transistor is formed.

It will be apparent that changes and modifications incorporating features of the invention will be readily apparent to those skilled in the art by the invention described in detail. It is intended that the scope of such modifications of the invention be within the scope of those of ordinary skill in the art including the features of the invention, and such modifications are considered to be within the scope of the claims of the invention.

Therefore, the high-sensitivity image sensor using the nano-sized electron channel of the present invention and a method of manufacturing the same have at least two nano-sized electron channels formed in the photodetector transistor and use a hole pocket formed between each nano channel. As a result, holes excited by light accumulate in the hole pockets, thereby amplifying the flow of electrons, thereby providing a phototransistor having high photoelectric conversion efficiency through efficient threshold voltage modulation of a signal transfer transistor. Therefore, it is possible to manufacture in a relatively simple manufacturing process, it is possible to minimize the unit pixel size of the image sensor to enable a high pixel image sensor array.

1 is a cross-sectional view of an image sensor according to the present invention.

2 is a plan view of an image sensor according to the present invention;

3A to 3F are process drawings showing a manufacturing method of an image sensor according to the present invention;

Claims (6)

An image sensor comprising unit pixels including a photo transistor, Si substrate; A first conductive region doped with P-type in the Si substrate by an ion implantation process; A high concentration n-type doped source and drain region spaced at predetermined intervals on both sides of the surface layer of the first conductive region; A channel region between the source and drain regions; Second conductive regions spaced at predetermined intervals from each other on both side surface layers of the channel region and formed by high concentration n-type doping; At least two nanoelectronic channels spaced apart at predetermined intervals between a second conductive region formed in the channel region and a central portion of the channel region; And High concentration n-type doped gate formed over the channel region through a gate insulating film High sensitivity image sensor using a nano-sized electron channel, characterized in that made. The method of claim 1, A high sensitivity image sensor using a nano-sized electron channel is formed between the at least two nano-electron channels formed in the channel region, a hole pocket for accumulating holes generated by light. The method according to claim 1 or 2, The channel region and the second conductive region are nano-sized electrons, characterized in that the holes generated by light accumulate in the hole pocket between the nano-electron channel formed at least two or more in the channel region to exhibit an npn-type side bipolar transistor effect High sensitivity image sensor using channel. Forming a nanoelectronic channel on the Si substrate using a photomask; A second step of removing the photomask and forming a p-type doped first conductive region in a region including a nanoelectronic channel by an ion implantation process; A third step of forming a high concentration n-type second conductive region on the surface of the first conductive region surface layer so as to be spaced apart from each other by a predetermined interval; Forming a gate insulating film and a gate to include both the nanoelectronic channel and the second conductive region; A fifth step of doping the gate to a high concentration n-type region by an ion implantation process; A fifth step of forming a high concentration n-type source and drain regions in the first conductive region surface layers on both sides of the gate; And A sixth step of forming a contact between the source, drain and gate Method of manufacturing a high sensitivity image sensor using a nano-sized electron channel, characterized in that made. The method of claim 4, wherein The nanoelectronic channel formed in the first step is a manufacturing method of a high sensitivity image sensor using a nanoelectronic channel, characterized in that formed in the V-shaped groove. The method according to claim 4 or 5, The nano electron channel is a method of manufacturing a high sensitivity image sensor using a nano-sized electron channel, characterized in that formed by a fine lithography process or an etching process.