KR100496421B1 - Flat Panel Display with improved white balance - Google Patents

Abstract

According to the present invention, the geometric structure is changed by changing the shape and size of the drain offset region of the driving transistor in the R, G, and B unit pixels of each pixel, thereby improving the white balance according to the change in the resistance value of the drain region. Disclosed is a flat panel display device.

The flat panel display device of the present invention includes R, G, and B unit pixels for implementing red (R), green (G), and blue (B), and each unit pixel includes a transistor having a source / drain region. A plurality of pixels including the plurality of pixels, each of the transistors of at least two unit pixels of the R, G, B unit pixels has a different geometric structure of the drain region.

The drain regions of the transistors of the R, G, and B unit pixels have offset regions having different geometrical structures, and each unit pixel includes a light emitting device driven by the transistor, and among the transistors, luminous efficiency is the highest. The drain offset region of the transistor for driving the high light emitting device has a resistance value larger than the drain offset region of the transistor for driving the light emitting device having a lower luminous efficiency than the light emitting device.

Description

Flat Panel Display with improved white balance

The present invention relates to a full-color flat panel display, and more specifically, by changing the geometric structure by changing the shape and size of the drain offset region, the white balance can be realized by changing the resistance value of the drain region of each unit pixel. The present invention relates to a flat panel display device.

In general, an organic light emitting display device, which is a flat panel display device, includes a plurality of pixels 100 arranged in a matrix form as shown in FIG. 1, and each pixel 100 is a unit for implementing red (R). It consists of three unit pixels: a pixel 110R, a unit pixel 120G for implementing green (G), and a unit pixel 130B for implementing blue (B).

The R unit pixel 110R includes a red EL element 115 having a red (R) light emitting layer, a driving transistor 113 for supplying current to the red EL element 115, and the driving transistor 113. To the red EL element 113 from the switching transistor 111 for switching. The G unit pixel 120G includes a green EL element 125 having a green (G) light emitting layer, a driving transistor 123 for supplying current to the green EL element 125, and the driving transistor 123. Switching transistor 121 for switching the supply of current to the green EL element 123. The B unit pixel 130B includes a blue EL element 135 having a blue (B) light emitting layer, a driving transistor 133 for supplying current to the blue EL element 135, and the driving transistor 133. Switching transistor 131 for switching the current supply to the blue EL element 135.

Typically, the R, G, and B unit pixels 110R, 120G, and 130B of the OELD have a size W of the driving transistors 113, 123, and 133, that is, a ratio W of the width W to the length L of the channel layer. / L) are all constant, and the EL element has high luminous efficiency in order of B, R, and G. Therefore, while the size (W / L) of the channel layers of the driving transistors 113, 123, and 133 of the R, G, and B unit pixels 110R, 120G, and 130B are all the same, each of the R, G, and B EL layers ( Since the luminous efficiencies of the 115, 125, and 135 are different from each other, it is difficult to realize a white balance.

In order to realize white balance, a relatively small amount of current must be supplied to an EL device having a high luminous efficiency, for example, a green EL device, and a relatively large amount of current is supplied to a red and blue EL device having a low luminous efficiency. You should.

At this time, the current Id flowing through the driving transistor to the EL element is expressed by Equation (1) since the driving transistor is operated in a saturated state.

Id = Cox mu W {(Vg-Vth)} ^ {2} / 2L ..... (1)

Therefore, one of the methods for controlling the current flowing to the EL element to realize the white balance is the size of the driving transistors of the R, G, and B unit pixels, that is, the width W of the channel length L of the transistor. There is a method of controlling the amount of current flowing through the EL elements of R, G, and B unit pixels by varying the ratio (W / L). Thus, a method of controlling the amount of current flowing to the EL element according to the size of the transistor is disclosed in Japanese Patent Laid-Open No. 2001-109399. In the Japanese patent, the size of the driving transistors of the R, G and B unit pixels is formed differently according to the luminous efficiency of the EL element for each of the R, G and B unit pixels. That is, the size of the driving transistor of the unit pixel for implementing green (G) having high luminous efficiency is made smaller than that of the unit transistor for implementing red (R) or blue (B) having low luminous efficiency. The amount of current flowing to the EL elements of the R, G, and B unit pixels was controlled by zooming.

Another method for implementing the white balance is a method of differently forming the area of the light emitting layer of the R, G, B unit pixels, which is disclosed in Japanese Patent Laid-Open No. 2001-290441. The Japanese patent forms light emitting areas differently according to the luminous efficiency of EL elements of R, G and B unit pixels, thereby generating the same luminance of R, G and B unit pixels. That is, the light emitting area of the R unit pixel or B unit pixel having low luminous efficiency than the G unit pixel having high luminous efficiency is formed to be relatively large so that the same luminance is generated through the R, G, and B unit pixels.

However, the conventional method for implementing the white balance as described above is to form a large light emitting area of the unit pixels of low luminous efficiency among the R, G, B unit pixels, or to increase the luminous efficiency of the R, G, B unit pixels. By increasing the size of the transistor of a low unit pixel, the area occupied by each pixel increases, and thus there is a problem that it is difficult to apply to high resolution.

Accordingly, an object of the present invention is to provide a flat panel display device capable of realizing a white balance without increasing the pixel area.

Another object of the present invention is to provide a flat panel display device which can realize a white balance by changing the geometrical structure of the drain region of the driving transistor for each R, G, B unit pixel, by changing the resistance value of the drain region. There is a purpose.

Another object of the present invention is to provide a flat panel display device capable of implementing white balance by varying the shape and size of a drain offset region of a driving transistor for each R, G, and B unit pixel.

In order to achieve the object as described above, the present invention is provided with R, G, B unit pixels for implementing red (R), green (G), blue (B), respectively, wherein each unit pixel is source / And a plurality of pixels including a transistor having a drain region, wherein the transistors of at least two unit pixels among the R, G, and B unit pixels provide a flat panel display device having a geometrical structure having different drain regions. It is done.

Each unit pixel includes a light emitting device driven by the transistor, and the resistance value of the drain region of the transistor for driving the light emitting device having the highest luminous efficiency among the transistors is driven by the light emitting device having the relatively low luminous efficiency. It is characterized by being larger than the resistance value of the drain region of the transistor for cycles.

The drain region of the driving transistors of the R, G, and B unit pixels has a constant length, a different width, or a constant width and a different length, and preferably have a zigzag shape.

The R, G, and B unit pixels each include a light emitting device driven by the transistor, and a drain region of the transistor for driving the light emitting device having the highest luminous efficiency among the transistors has a relatively low luminous efficiency. It is characterized in that the length is longer or narrower than the drain region of the transistor for driving the.

The drain regions of the transistors of the R, G, and B unit pixels have offset regions having different geometrical structures, and each unit pixel includes a light emitting device driven by the transistor, and among the transistors, luminous efficiency is the highest. The drain offset region of the transistor for driving the high light emitting device is longer or narrower than the drain offset region of the transistor for driving the light emitting device having lower luminous efficiency than the light emitting device.

The drain offset region of the driving transistors of the R, G and B unit pixels has a constant length and a different width or a constant width and a different length, and preferably has a zigzag shape. .

Hereinafter, embodiments of the present invention will be described with reference to the accompanying drawings.

2A to 2C illustrate a planar structure of an organic light emitting display device according to a first embodiment of the present invention, and are limited to driving transistors of R, G, and B unit pixels, respectively.

2A to 2C, the driving transistors 113, 123, and 133 of the R, G, and B unit pixels according to the first embodiment are the semiconductor layer 210, the gate 230, and Source / drain electrodes 251 and 255 are provided. The semiconductor layer 210 includes a channel layer 224 formed at a portion corresponding to the gate 230, and source / drain regions 221 and 225 formed at both sides of the channel layer 224. In this case, the source / drain regions 221 and 225 are electrically connected to the source / drain electrodes 251 and 255 through the contacts 241 and 245, respectively.

In the driving transistors 113, 123, and 133 of the R, G, and B unit pixels, the semiconductor layer 210 includes an offset region formed between the channel layer 224 and the drain region 225. 227R), (227G), and (227B). The offset regions 227R, 227G, and 227B have a constant length L2, but the widths have different values depending on the luminous efficiency. That is, the width WR2 of the driving transistor of the R unit pixel is larger than the width WG2 of the driving transistor 123 of the G unit pixel having the highest luminous efficiency, and the driving transistor 133 of the B unit pixel having the lowest luminous efficiency. Has a smaller value than the width WB2.

3A to 3C illustrate a planar structure of an organic light emitting display device according to a second exemplary embodiment of the present invention, and are limited to driving transistors of R, G, and B unit pixels, respectively.

3A through 3C, the driving transistors 113, 123, and 133 of the R, G, and B unit pixels according to the second exemplary embodiment may include the semiconductor layer 310, the gate 330, and the source. / Drain electrodes 351, 355 are provided. The semiconductor layer 310 includes a channel layer 324 formed at a portion corresponding to the gate 330, and source / drain regions 321 and 325 formed at both sides of the channel layer 324. The source / drain regions 321 and 325 are electrically connected to the source / drain electrodes 351 and 355 through the contacts 341 and 345, respectively.

Further, in the driving transistors 113, 123, and 133 of each of the R, G, and B unit pixels, the semiconductor layer 310 is an offset region formed between the channel layer 324 and the drain region 325. 327R, 327G, and 327B are further provided. The offset areas 327R, 327G, and 327B have a constant width of W3, but the lengths have different values depending on the luminous efficiency. That is, the length LR2 of the driving transistor of the R unit pixel is smaller than the length LG2 of the driving transistor 123 of the G unit pixel having the highest luminous efficiency, and the driving transistor 133 of the B unit pixel having the lowest luminous efficiency. Has a value larger than the length LB2.

As described above, the present invention can realize white balance by varying the resistance value by changing the size of the drain offset region of the driving transistor of the R, G, and B unit pixels.

4A to 4C illustrate a planar structure of an organic light emitting display device according to a third exemplary embodiment of the present invention, and are limited to driving transistors of R, G, and B unit pixels, respectively.

4A to 4C, the driving transistors 113, 123, and 133 of the R, G, and B unit pixels according to the third embodiment may include the semiconductor layer 410, the gate 430, and the source. And drain electrodes 451 and 455. The semiconductor layer 410 includes a channel layer 424 formed at a portion corresponding to the gate 430, and source / drain regions 421 and 425 formed at both sides of the channel layer 424. The source / drain regions 421 and 425 are electrically connected to the source / drain electrodes 451 and 455 through contacts 441 and 445, respectively.

Further, in the driving transistors 113, 123, and 133 of each of the R, G, and B unit pixels, the semiconductor layer 410 is an offset region formed between the channel layer 424 and the drain region 425. 427R, 427G, and 427B are further provided. The offset regions 427R, 427G, and 427B are formed to have different geometric shapes within a predetermined distance L4 between the drain region 425 and the channel region 424. The offset areas 427R, 427G, and 427B are formed to have a zigzag geometric structure having different lengths according to the luminous efficiency. That is, the length of the driving transistor of the R unit pixel is smaller than the length of the driving transistor 123 of the G unit pixel having the highest luminous efficiency, and has a value larger than the length of the driving transistor 133 of the B unit pixel having the lowest luminous efficiency. It has a zigzag shape.

In the third embodiment of the present invention, the white balance can be realized by changing the resistance value by changing the shape of the drain offset region of the driving transistor of the R, G, and B unit pixels.

In the embodiment of the present invention, the offset region is formed in the drain regions of all the driving transistors of the R, G, and B unit pixels, but the B unit pixel having the lowest luminous efficiency does not form the drain offset region, but only in the R and G unit pixels. It is also possible to form an offset region of geometric formation having different resistance values.

In the exemplary embodiment of the present invention, the drain side offset region is formed to have a zigzag shape, but the geometric shapes of the offset regions of the R, G, and B unit pixels having the difference in resistance values for implementing the white balance are all applicable.

According to the embodiment of the present invention as described above, by forming the drain offset region of the R, G, B unit pixels to have a geometric structure of different shape and size (W / L), the resistance value of the drain region is changed By doing so, white balance can be realized without increasing the pixel area.

Although described above with reference to a preferred embodiment of the present invention, those skilled in the art will be variously modified and changed within the scope of the invention without departing from the spirit and scope of the invention described in the claims below I can understand that you can.

1 is a view showing an arrangement of R, G, B unit pixels of a conventional flat panel display;

2A to 2C illustrate planar structures of driving transistors of R, G, and B unit pixels in the flat panel display according to the first embodiment of the present invention;

3A to 3C illustrate planar structures of driving transistors of R, G, and B unit pixels in the flat panel display according to the second embodiment of the present invention;

4A to 4C illustrate planar structures of driving transistors of R, G, and B unit pixels in the flat panel display according to the third embodiment of the present invention;

* Description of the symbols for the main parts of the drawings *

113, 123, 133: driving transistors of R, G, B unit pixels

210, 310, 410: semiconductor layers 230, 330, 430: gate

221, 225, 321, 325, 421, 425: source / drain regions

241, 245, 341, 345, 441, 445: source / drain contacts

251, 255, 351, 355, 451, 455: source / drain regions

227R, 327R, 427R: Drain offset area of R unit pixel

227G, 327G, 427G: Drain offset area of G unit pixel

227B, 327B, 427B: Drain offset area of B unit pixel

Claims (9)

R, G, and B unit pixels for implementing red (R), green (G), and blue (B), respectively, and each unit pixel includes a plurality of pixels including a transistor having a source / drain region. , And the transistors of at least two unit pixels among the R, G, and B unit pixels have different geometric structures of drain regions. The light emitting device of claim 1, wherein each unit pixel includes a light emitting device driven by the transistor, and a resistance value of a drain region of the transistor for driving the light emitting device having the highest light emitting efficiency is relatively high. A flat panel display, characterized in that it is larger than the resistance of the drain region of the transistor for driving a low light emitting element. The drain region of the driving transistor of the R, G, and B unit pixels has a structure having a constant length and a different width or a structure having a constant width and a different length. Flat panel display device. The flat panel display of claim 1, wherein the drain region of the transistors of the R, G, and B unit pixels has a zigzag shape. The light emitting device of claim 1, wherein each unit pixel includes a light emitting device driven by the transistor, and a drain region of the transistor for driving the light emitting device having the highest luminous efficiency among the transistors is lower than the light emitting device. A flat display device, characterized in that the length is longer or narrower than the drain region of the transistor for driving the light emitting element. The flat panel display of claim 1, wherein the drain regions of the transistors of the R, G, and B unit pixels have offset regions having different geometries. The light emitting device of claim 6, wherein each unit pixel includes a light emitting device driven by the transistor, and a drain offset region of the transistor for driving the light emitting device having the highest luminous efficiency among the transistors has a light emitting efficiency that is higher than that of the light emitting device. A flat display device, characterized in that the length is longer or narrower than the drain offset region of the transistor for driving the low light emitting device. The flat panel display of claim 1, wherein the drain offset region of the driving transistors of the R, G, and B unit pixels has a constant length, a different width, or a constant width and a different length. The flat panel display of claim 8, wherein the drain offset region of the transistors of the R, G, and B unit pixels has a zigzag shape.