KR100363329B1 - Liquid cystal display module capable of reducing the number of source drive ic and method for driving source lines - Google Patents

Abstract

The liquid crystal display (LCD) module disclosed herein includes switching means for connecting a group of source lines and another group of source lines, in turn, with output terminals of the source drive IC in response to switching control signals. . The source drive IC sequentially outputs data for providing to the group of source lines and data for providing to the other group of source lines while a predetermined gate line is activated by the gate drive IC. Such a source drive IC can drive K source lines through one output terminal. Therefore, the source drive IC required in the LCD module is reduced to 1 / K in comparison with the prior art. This reduces the production cost of the LCD module.

Description

LIQUID CYSTAL DISPLAY MODULE CAPABLE OF REDUCING THE NUMBER OF SOURCE DRIVE IC AND METHOD FOR DRIVING SOURCE LINES}

The present invention relates to a liquid crystal display (LCD) module, and more particularly to a method of driving a liquid crystal display module and a source line that can reduce the number of source drive ICs for driving the liquid crystal display module. will be.

FIG. 1 is a diagram illustrating a general relationship between a host system and a thin film transistor liquid crystal display (TFT-LCD) module. Referring to FIG. 1, the LCD module 20 includes color data Red; R, Green; G, Blue; B, horizontal sync signal Hsync, and vertical provided from the graphics controller 12 of the host system 10. A color image is displayed on the LCD panel 40 by receiving the synchronization signal Vsync and the dot clock signal DCLK.

The LCD module 20 includes a gray voltage generator 22, a timing controller 24, a plurality of gate drive integrated circuits 26A to 26C, and source drive ICs. Integrated Circuits (28A ~ 28D), and the LCD panel 40.

The timing controller 24 stores the color data R, G, and B provided by the graphic controller 12 of the host system 10 in the gate drive ICs 26A to 26C and the source drive ICs 28A to 28D. Adjust the output to meet the timing required by the controller. The timing controller 24 also controls signals (eg, start horizontal signal, load signal, gate clock) for controlling the gate drive ICs 26A to 26C and the source drive ICs 28A to 28D. A start vertical signal, a line inversion signal, a gate on enable signal, and the like.

The gray voltage generator 22 provides the voltages V1 to Vm corresponding to the m-gray levels to the source drive ICs 28A to 28D. For example, when each of the color data R, G, and B provided from the graphics controller 12 of the host system 10 is 6-bit, the LCD panel 40 produces 64-gradations corresponding to 2 ⁶ . In this case, the gray voltage generator 22 should generate voltages V1 to V64 corresponding to 64-gradations.

The gate drive IC 26A outputs voltages for sequentially activating the gate lines one by one in response to a control signal provided from the timing controller 24. After activating the gate lines connected thereto, the gate drive IC 26A generates a carry signal GC1 to control the next gate drive IC 26B to start operation. In this way, all the gate lines of the LCD panel 40 are activated one by one in sequence.

A detailed block diagram of the source drive IC 28A is shown in FIG. 2, the source drive IC 28A includes a shift register 30, a digital / analog converter 32, and an output buffer 34. Referring to FIG.

The shift register 30 shifts and stores the color data R, G, and B provided from the timing controller 24 in order. The digital / analog converter 32 outputs an analog voltage corresponding to each digital data stored in the shift register 30 among the analog voltages V0 to Vm provided from the gray voltage generator 22. The output buffer 34 latches the data D0 to Dn provided from the digital / analog converter 32 and provides them to the source lines of the LCD panel 40 in response to the load signal TP.

1 and 2, when data is filled in the shift register 30 in the source drive IC 28A, the shift register 30 outputs a carry signal SC1 to the next source drive IC 28B. to provide. The next source drive IC 28B performs a data shift operation when the carry signal SC1 is input. In this way, when all the data is filled in all the source drive ICs 28A to 28D, the digital / analog converters included in each source drive IC perform a conversion operation. When the load signal TP is input after the digital / analog conversion operation is completed, the source drive ICs 28A to 28D simultaneously provide data to source lines. In this way, the source lines of the LCD panel 30 are driven.

In the LCD panel 30, in response to each pixel signal voltage input from the gate drive IC 10 and the source drive IC 20, a white plane light incident from a backlight unit (not shown) is a pixel. It controls the light transmitted to the color image.

3 is a diagram illustrating the configuration of an LCD panel in an equivalent circuit.

Referring to FIG. 3, the gate lines G _j to G _{j + 3} and the source lines S _i to S _{i + 3} are arranged to cross each other in a lattice form. One pixel is connected to the gate line and the source line, respectively, and includes a thin film transistor T1, a storage capacitor C _ST , and a liquid crystal capacitor C _LC . The gate of the thin film transistor T1 is connected with the gate line, and its source is connected with the source line. One end of the storage capacitor C _ST and the liquid crystal capacitor C _LC is connected to the drain terminal of the thin film transistor T1, and the other ends thereof are connected to the common electrode voltage V _COM .

When the thin film transistor T1 is turned on in response to a gate drive signal input from the gate drive IC 26A, an applied voltage input from the source drive IC 28A through a source line is applied to the storage capacitor C. _ST ) and the liquid crystal capacitor C _LC . Subsequently, when the thin film transistor T1 is turned off, the charge accumulated in the storage capacitor C _ST and the liquid crystal capacitor C _LC maintains the charged charge for one frame. Since the storage capacitor C _ST is difficult to maintain the charged charge for one frame only with the liquid crystal capacitor C _LC , the storage capacitor C _ST serves to store the charge. As described above, as the turn-on / off of the thin film transistor T1 is repeated, a desired applied voltage is transferred to the storage capacitor C _ST and the liquid crystal capacitor C _LC to express a color image.

In the liquid crystal display module having the above-described configuration, the source drive IC 28A transfers data corresponding to the gate line activated by the gate drive IC 26A to the source lines S _i to S _{i + 3} . By providing at the same time a color image is represented. For example, a liquid crystal display device employing an extended graphics array (XGA) display mode has 1024 * 768 * 3 (R, G, B) pixels, so that the total number of source lines is 3072. Multiple source drive ICs are required.

In general, the source drive IC accounts for about 50% of the total cost of producing TFT-LCD modules. Therefore, if the number of source drive ICs included in one TFT-LCD module is reduced, the production cost of the TFT-LCD module will be significantly reduced. Therefore, there is a need for a source line driving method and apparatus capable of reducing the number of source drive ICs provided in a TFT-LCD module.

Accordingly, it is an object of the present invention to provide a source line driving method and apparatus capable of reducing the number of source drive ICs provided in a TFT-LCD module.

1 is a diagram for showing a general relationship between a host system and a TFT-LCD module;

2 is a detailed block diagram of the source drive IC shown in FIG. 1;

3 is a diagram representing the configuration of an LCD panel in an equivalent circuit;

4 is a view showing the configuration of an LCD module according to a preferred embodiment of the present invention;

5 is a timing diagram showing the operation of the LCD module according to the preferred embodiment of the present invention;

FIG. 6 is a flowchart showing a procedure in which a source drive IC provides data to source lines for displaying a color image; FIG. And

7A through 7D are exemplary views illustrating a method of scanning a source line.

* Description of the symbols for the main parts of the drawings *

100: LCD module 110A: gate drive IC

120A: Source Drive IC 130: LCD Panel

140: switching unit T1: thin film transistor

C _LC : Liquid Crystal Capacitor C _ST : Auxiliary Capacitor

G _j to G _{j + 3} : Gate line S _ai , S _bi , S _{ai + 1} , S _{bi + 1} : Source line

S _i , S _{i + 1} : Source drive IC output

According to an aspect of the present invention for achieving the object of the present invention as described above, the liquid crystal display module, a plurality of source lines and gate lines arranged in a grid form, the pixel connected to the source line and the gate line Array of pixels, a gate drive IC for sequentially activating the gate lines, a source drive having a plurality of output stages and providing data for displaying a color image to pixels connected to the gate line activated by the gate drive IC. And switching means for connecting a group of source lines and another group of source lines with the output terminals of the source drive IC in order, in response to the first and second switching control signals. The source drive IC sequentially outputs data for providing to the group of source lines and data for providing to the other group of source lines while a predetermined gate line is activated by the gate drive IC. .

In a preferred embodiment, the group of source lines is composed of odd-numbered source lines, and the other group of source lines is composed of even-numbered source lines.

In this case, the switching means comprises: an array of first transistors having a current path formed between an output terminal of the source drive IC and a corresponding odd-numbered source line and a gate controlled by the first switching control signal, and the source drive And an array of second transistors having a current path formed between an output terminal of the IC and a corresponding even source line and a gate controlled by the second switching control signal.

According to another aspect of the present invention, a plurality of source lines and gate lines arranged in a lattice form, a gate drive IC for sequentially activating the gate lines, and a plurality of output stages, and driving the source lines A method of driving the source lines while a predetermined gate line is activated in a liquid crystal display device including a source drive IC providing data for supplying a group of source lines of the plurality of source lines may include: Connecting the output terminals, providing data to the group of source lines through the output terminals, and connecting other source lines among the plurality of source lines with the output terminals of the source drive IC. Step, and the source drive IC Through the output terminal comprises the step of providing the data to the source line of the other groups.

(Example)

Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to FIGS. 4 to 7.

The novel liquid crystal display module of the present invention includes switching means for connecting a group of source lines and another group of source lines, in turn, with output terminals of the source drive IC in response to switching control signals. The source drive IC sequentially outputs data for providing to the group of source lines and data for providing to the other group of source lines while a predetermined gate line is activated by the gate drive IC. Such a source drive IC can drive K source lines through one output terminal. Therefore, the source drive IC required in the LCD module is reduced to 1 / K in comparison with the prior art.

4 is a view showing the configuration of an LCD module according to a preferred embodiment of the present invention. Referring to FIG. 4, the LCD panel 130 includes gate lines G _j to G _{j + 3} and source lines S _ai , S _bi , S _{ai + 1} , and S _bi arranged in a lattice form. _{+ 1} ), an array of pixels connected to the gate line and the source line, and a switching unit 140.

One pixel is connected to a gate line and a source line, respectively, and includes a thin film transistor (T1), a storage capacitor C _ST , and a liquid crystal capacitor C _LC . The gate of the thin film transistor T1 is connected with the gate line, and its source is connected with the source line. One end of the storage capacitor C _ST and the liquid crystal capacitor C _LC is connected to the drain terminal of the thin film transistor T1, and the other ends thereof are connected to the common electrode voltage V _COM .

The switching unit 140 configured in the LCD panel 130 includes an array of first transistors MN _ai and MN _{ai + 1} and an array of second transistors MN _bi and MN _{bi + 1} . NMOS transistor (MN _ai) is a current path and a first switching control signal is formed between the source drives the output terminal of the IC (120A) (S _i) and the source line (S _ai) consisting in an array of the first transistor (SW _a) Has a gate controlled by. By the NMOS transistor (MN _{ai + 1)} is the source output terminal of the drive _{IC (120A) (S i +} 1) and the source line (S _{ai + 1)} a current path, and the first switching control signal (SW _a) formed between Has a gate controlled. NMOS transistor (MN _bi) is a current path and a second switching control signals is formed between the source drives the output terminal of the IC (120A) (S _i) and the source line (S _bi) comprising the array of the second transistor (SW _b) Has a gate controlled by. By the NMOS transistor (MN _{bi + 1)} is the output (S _{i + 1)} and the source line (S _{bi + 1)} a current path, and the second switching control signal (SW _a) formed between the source drive IC (120A) Has a gate controlled.

That is, the odd-numbered source lines S _ai and S _{ai + 1} are output terminals S _i and S _{i + 1} of the source drive IC 120A through the array of first transistors MN _ai and MN _{ai + 1} . ) and the connection is, the output terminal of the even-numbered source lines (s _bi, s _{bi + 1)} is a second transistor array (MN _bi, MN _{bi + 1),} the source drive IC (120A through by) (s _i, s _{i + 1} ), respectively. Therefore, the source drive IC 120A according to the present invention can drive two source lines through one output terminal.

Subsequently, a method of driving the source lines of the LCD module according to the preferred embodiment of the present invention shown in FIG. 4 will be described with reference to FIG.

5 is a timing diagram showing the operation of the LCD module according to an embodiment of the present invention.

4 and 5, the gate drive IC 110A sequentially activates the gate lines G _j to G _{j + 3} one by one. The source drive IC (120A) has a predetermined gate line (G _j) to (H), a source line data for displaying a color image on that is associated with the active gate line of pixels while it is enabled (S _ai, S _bi , S _{ai + 1} , S _{bi + 1} ).

6 is a flowchart illustrating a method of providing data for displaying a color image to the source lines _Sa , S _bi , S a _{+ 1} , and S _{bi + 1 by} the source drive IC 120A. have.

5 and 6, when a predetermined gate line G _j is activated, the first switching signal SW _a transitions to a high level and the second switching signal SW _b transitions to a low level. . The first and second switching signals SW _a and SW _b are repeatedly inverted with a predetermined pulse width as complementary signals.

In response to the first and second switching signals SW _a and SW _b , the arrays of first transistors MN _ai and MN _{ai + 1} are all turned on and the arrays of second transistors MN _bi , MN _{bi + 1} ) are all turned off. Therefore, the odd-numbered source lines S _ai and S _{ai + 1} are output terminals S _i and S _{i + 1} of the source drive IC 120A through the array of first transistors MN _ai and MN _{ai + 1} . (Step S210).

In step S220, the source drive IC 120A outputs data for driving the odd-numbered source lines S _ai and S a _{+ 1} through output terminals _Si and S _{i + 1} . The odd-numbered source lines S _ai and S _{ai + 1} are driven by data provided from the source drive IC 120A.

Subsequently, in step S230, the first and second switching signals SW _a and SW _b are inverted at a half point of the time when the gate line is activated. That is, the first switching signal SW _a transitions from a high level to a low level, and the second switching signal SW _b transitions from a low level to a high level. In response to the first and second switching signals SW _a and SW _b , the arrays of first transistors MN _ai and MN _{ai + 1} are both turned off and the array of second transistors MN _bi , MN _{bi + 1} ) are all turned on. Therefore, even-numbered source lines S _bi , S _{bi + 1} are output terminals S _i , S _{i + 1 of} source drive IC 120A via array of second transistors MN _bi , MN _{bi + 1} . ).

In step S240, the source drive IC 120A outputs data for driving even-numbered source lines S _bi and S _{bi + 1} through output terminals S _i and S _{i + 1} . Even-numbered source lines S _bi and S _{bi + 1} are driven by data provided from the source drive IC 120A.

The pixels of the LCD panel 130 including the switching unit 140 operating as described above operate as follows. First, the thin film transistors T1 connected to the gate line Gj are turned on in response to the gate drive signal input from the gate drive IC 110A. The arrays of the first transistors MN _ai and MN _{ai + 1} in the switching unit 140 are all turned on so that the odd-numbered source lines S _ai and S _{ai + 1} are output stages of the source drive IC 120A. S _i , S _{i + 1} ). The applied voltage provided from the source drive IC 120A is charged in the storage capacitor C _ST and the liquid crystal capacitor C _LC of odd pixels. Subsequently, when the arrays of first transistors MN _ai and MN _{ai + 1} are turned off at half of the time when the gate line is activated, the storage capacitor C _ST and the liquid crystal capacitor C _LC are turned off. Accumulated charge maintains charged charge for half a frame. On the other hand, when all of the arrays of second transistors MN _bi and MN _{bi + 1} are turned on at half of the time when the gate line is activated, even-numbered source lines _Sa and S _{ai + 1} are sourced. the output terminal of the drive IC (120A) is coupled to _{(s i, s i + 1} ). The applied voltage provided from the source drive IC 120A is charged to the storage capacitor C _ST and the liquid crystal capacitor C _LC of even pixels. That is, a color image is expressed by sequentially transferring the storage capacitor C _ST and the liquid crystal capacitor C _LC of odd and even pixels among the pixels connected to the gate line where the desired applied voltage is activated.

As described above, when two source lines are sequentially driven to one output terminal of the source drive IC 120A, the number of source drive ICs required in the entire LCD module is reduced to 1/2 compared with the related art. Therefore, the production cost of the LCD module is significantly reduced.

7A through 7D are exemplary views illustrating a method of scanning a source line.

In particular, FIG. 7A illustrates a timing diagram of FIG. 5 and a scanning method according to the flowchart of FIG. 6. As shown in FIGS. 7A to 7D, the odd-numbered source lines and the even-numbered source lines may be sequentially scanned, but the scanning order may be variously modified.

In this embodiment, the source lines arranged on the LCD panel are separated into odd-numbered source lines and even-numbered source lines, and the adjacent odd-numbered source lines and even-numbered source lines are driven to one output terminal of the source drive IC. It is apparent to those skilled in the art that three or more source lines can be driven by one output stage. When driving three source lines with one output stage, the number of source drive ICs required by the LCD module is reduced to one third compared to the conventional method.

In this embodiment, the NMOS transistors included in the switching unit 140 are arranged in the LCD panel 130 by being composed of an a-Si thin film transistor or a p-Si thin film transistor, but may be formed inside the source drive IC 120A. .

According to the present invention as described above, the number of source drive ICs configured in the LCD module is reduced. Therefore, the production cost of the LCD module is reduced.

Claims (4)

In the liquid crystal display module: A plurality of source lines and gate lines arranged in a lattice form; An array of pixels connected to the source line and the gate line; A gate drive IC for activating the gate lines sequentially; A source drive IC having a plurality of output terminals and outputting data signals for driving pixels connected to the gate line activated by the gate drive IC through the output terminals; And In response to first and second switching control signals, switching means for connecting a group of source lines and another group of source lines with the output terminals of the source drive IC in sequence; The source drive IC sequentially supplies data signals for driving the group of source lines and data signals for providing the other group of source lines while a gate line is activated by the gate drive IC. Outputting a liquid crystal display module. The method of claim 1, And the source group of the source group is composed of odd-numbered source lines, and the source group of the other group is composed of even-numbered source lines. The method of claim 2, The switching means, An array of first transistors having a current path formed between an output terminal of the source drive IC and a corresponding odd-numbered source line and a gate controlled by the first switching control signal; And And an array of second transistors having a current path formed between an output terminal of the source drive IC and a corresponding even source line and a gate controlled by the second switching control signal. A source drive having a plurality of source lines and gate lines arranged in a lattice form, a gate drive IC for sequentially activating the gate lines, and a plurality of output terminals and providing data signals for driving the source lines A method of driving the source lines while a predetermined gate line is activated in a liquid crystal display device comprising an IC: Coupling a group of source lines of the plurality of source lines with output terminals of the source drive IC; Providing, by the source drive IC, data signals to the group of source lines through output terminals; Connecting other source lines among the plurality of source lines with output terminals of the source drive IC; And And the source drive IC providing data signals to the other group of source lines through output terminals.