KR100354795B1 - Matrix type display device - Google Patents

Abstract

A matrix display device includes a plurality of gate signal lines extending in a first direction; A gate signal line driver for driving the plurality of gate signal lines; A plurality of source signal lines extending in a second direction perpendicular to the first direction; A source signal line driver for driving the plurality of source signal lines; And a plurality of pixel electrodes. The plurality of pixel electrodes are respectively connected to one corresponding source signal line among the plurality of source signal lines and one corresponding gate signal line among the plurality of gate signal lines. The plurality of source signal lines are assigned to at least one first pixel electrode assigned to a first color element among the plurality of pixel electrodes, at least one second pixel electrode assigned to a second color element, and a third color element. Connected to at least one third pixel electrode. The source signal line driver supplies a first display signal to a first source signal line among the plurality of source signal lines, and polarizes the first display signal to a second source signal line adjacent to the first source signal line among the plurality of source signal lines. The reverse of the second display signal is supplied, and the polarity of the first display signal and the polarity of the second display signal are inverted every predetermined cycle.

Description

Matrix display device {MATRIX TYPE DISPLAY DEVICE}

The present invention relates to an active matrix liquid crystal display device, and more particularly, to a matrix display device capable of color display.

A matrix display device capable of color display employs a pixel arrangement generally referred to as a stripe arrangement.

17 shows an exemplary stripe arrangement. Rectangle boxes indicated by R, G, and B in Fig. 17 indicate pixels (referred to as red pixels, green pixels, and blue pixels, respectively) assigned to red, green, and blue, respectively. The red, green, and blue pixels emit red, green, and blue light, respectively, when they are turned on.

As shown in Fig. 17, the matrix display device employing the stripe arrangement has three red, green, and blue pixels arranged in the y direction and alternately arranged in the order of red, green, and blue in the x direction. And blue pixels. The pixel electrodes corresponding to the pixels arranged in the x direction are connected to one gate signal line, and the pixel electrodes corresponding to the pixels in the y direction are connected to one source signal line.

Conventional matrix type liquid crystal display employing a stripe arrangement has a problem that crosstalk or shadowing, which adversely affects display quality, causes shadows on the display screen of the device.

18 shows that shadows appear on the display screen of the matrix type display device 180 employing the stripe arrangement.

The matrix display device 180 includes a source signal line driver 1, a gate signal line driver 2, source signal lines DS1H, DS2H, DS1W, DS2W, a gate signal line DG1, and a pixel electrode DP1H, DP1W. Include. Although not shown, the matrix type display device 180 includes a plurality of gate signal lines including a gate signal line DG1, a pixel electrode connected to each source signal line, and each gate signal line.

On the display screen 181 of the matrix display device 180, a background 182 and a window pattern 5 are displayed. The window pattern means a graphic pattern displayed on the display screen. When the window pattern 5 is displayed on the display screen of the matrix display device 180, the shadow 6 is displayed on the upper and lower regions of the display screen 181 in relation to the window pattern 5 due to crosstalk or shadowing. Often appears. The terms "upper" and "lower" are used with reference to the direction along the source signal lines DS1H, DS2H, DS1W, DS2W. The reason why the shadow 6 is generated is parasitic capacitance CSD1 generated between the pixel electrode DP1W and the source signal line DS1W, and parasitic capacitance generated between the pixel electrode DP1W and the source signal line DS2W. This is because signals supplied to the source signal lines DS1W and DS2W through the capacitor CSD2 affect the pixel electrode DP1W.

The source signal lines DS1H and DS2H pass through an area where the window pattern is not displayed, and the source signal line DS2H is adjacent to the source signal line DS1H. The source signal lines DS1H and DS2H are supplied with a signal corresponding to the brightness level of the background 182.

The source signal lines DS1W and DS2W pass through the area where the window pattern is displayed, and the source signal lines DS2W are adjacent to the source signal line DS1W. The source signal lines DS1W and DS2W receive a signal corresponding to the luminance level of the background 182 for a predetermined time period, and receive a signal corresponding to the luminance level of the window pattern for another time period.

The pixel electrode DP1H is connected to the source signal line DS1H through, for example, an active element such as a thin film transistor. The pixel electrode DP1W is also connected to the source signal line DS1W through an active element.

As described above, in the matrix display device employing the stripe arrangement, the pixel electrodes corresponding to the pixels of the same color are connected to one source signal line. In FIG. 18, all pixel electrodes connected to the source signal lines DS1H and DS1W correspond to blue pixels, and all pixel electrodes connected to the source signal lines DS2H and DS2W correspond to red pixels.

The signals supplied to the source signal lines DS1H, DS2H, DS1W, and DS2W are called signals VS1H, VS2H, VS1W, and VS2W, respectively.

The signal supplied to the gate signal line DG1 is called a signal VG1.

The voltages applied to the pixel electrodes DP1H and DP1W are called liquid crystal applied voltages VP1H and VP1W, respectively.

The matrix display device 180 is driven by the source line inversion driving method. By the source line inversion driving method, adjacent source signal lines are supplied with signals having opposite polarities, and the polarities of the signals are inverted every vertical scanning period.

FIG. 19 is a waveform diagram showing waveforms of signals supplied to source signal lines DS1H, DS2H, DS1W, DS2W (FIG. 18), pixel electrodes DP1H, DP1W, and gate signal line DG1.

The pixel electrode DP1H is supplied with a desired voltage VW (liquid crystal applied voltage VP1H) corresponding to the luminance level of the background 182 (Fig. 18).

The pixel electrode DP1W should also be supplied with the desired voltage VW (liquid crystal applied voltage VP1H), but different from the liquid crystal applied voltage VP1H during the window display period. To be supplied. The "window display period" refers to a period in which the area of the window pattern 5 is vertically scanned in one vertical scanning period.

Background 182 (Fig. 18) is assumed to be cyan (green and blue pixels are on, red pixels are off) and window pattern 5 is black (red, green, and blue pixels are all off). do. In the present specification, when light is emitted through a pixel from a light source, the pixel is expressed as being on.

In the matrix display device 180, when the liquid crystal applied voltage is higher than the specified voltage (reference voltage), a black display is obtained (that is, the pixel is turned off), and the liquid crystal applied voltage is a reference voltage (usually white mode). If lower than)), a white display is obtained (i.e. the pixel is on).

During the window display period, the liquid crystal applied voltage VP1W has a value corresponding to the sum of the desired voltage VW and the influence voltage. The influence voltage VS is generated by the signal VS1W which affects the liquid crystal applied voltage VP1W through the parasitic capacitance CSS1 between the source signal line DS1W and the pixel electrode DP1W.

The influence voltage VS is represented by equation (1) using the voltages VB and VW in FIG. In the present specification, the voltage VB corresponds to the black display, and the voltage VW corresponds to the white display.

VS = (VS-VW) X CSD1 / (CP + CSD1 + CSD2) ..... (1)

Where CP is the capacitance between the pixel electrode DP1W (Fig. 18) and the counter electrode (not shown), CSD1 is the parasitic capacitance between the source signal line DS1W and the pixel electrode DP1W, and CSD2 is the source signal line DS2W. And parasitic capacitance between the pixel electrode DP1W.

As shown in equation (1), the influence voltage VS is never zero. The effective value of the liquid crystal applied voltage VP1H at the pixel electrode DP1H is different from the effective value of the liquid crystal applied voltage VP1W at the pixel electrode DP1W. Therefore, the transmittance of the liquid crystal material in the pixel electrode DP1H is different from that of the liquid crystal material in the pixel electrode DP1W. This explains why the shadow 6 which adversely affects the display quality appears on the display screen 182 (Fig. 18).

In particular, in the case of a matrix display device having a structure in which the distance between two adjacent pixel electrodes is shorter than the width of each source signal line, the influence voltage VS is considerably high, so that the shadow 6 has a significant influence on the display quality. This is because the parasitic doses (CSD1, CSSD2) are quite large.

20 shows an exemplary structure of a matrix type display device 190 whose distance between two adjacent pixel electrodes is shorter than the width of each source signal line. As shown in FIG. 20, the matrix display device 190 includes gate signal lines 27, source signal lines 20a and 20b, pixel electrodes 22a and 22b, and thin film transistors 26. As shown in FIG. The matrix display device 190 is described in, for example, Japanese Patent No. 2,814,752. The matrix display device 190 may have a sufficiently large aperture ratio.

As shown in Fig. 20, the distance d ₁ between the pixel electrodes 22a and 22b is shorter than the width d ₂ of the source signal line 20b. At least one portion of each pixel electrode 20a, 20b overlaps with a portion 28 (a plurality of overlapping portions 28 are shown in FIG. 20) overlapping at least one portion of the source signal lines 22a, 22b. Therefore, the parasitic capacitance CSD1 generated between the pixel electrode 22a and the source signal line 20a and the parasitic capacitance CSD2 generated between the pixel electrode 22a and the source signal line 20b increase.

FIG. 21 is a sectional view taken along the line A-A of the matrix display device 190 shown in FIG. In the vertical direction, the matrix type display device 190 includes an insulating layer provided on the substrate 25 to shield the substrate 25, the source signal lines 20a and 20b provided on the substrate 25, and the source signal lines 20a and 20b. (23), and pixel electrodes 22a and 22b provided on the insulating layer 23. Furthermore, the matrix type display device 190 includes a liquid crystal material inserted between the other substrate 25, the counter electrode 21 provided on the other substrate 25, the pixel electrodes 22a and 22b, and the counter electrode 21. The liquid crystal layer 2100 is included. As shown in Fig. 21, the pixel electrodes 22a and 22b are positioned so as to partially overlap with portions of the source signal lines 20a and 20b while the insulating layer 23 is inserted therebetween.

Conventional matrix type liquid crystal displays employing a stripe arrangement have a " block-by-block brightness difference " due to dispersion of exposure conditions generated during stepper processing, which will be described in detail below. Has another problem that arises.

During the production of the liquid crystal display, for example, when the liquid crystal display panel not only depends on the stepper process at the same time, but also on the stepper process in the state divided into the upper part and the lower part, the image displayed on the upper part and the lower part The image differs in its brightness. This phenomenon is called "block by block luminance difference".

22 shows the configuration of the matrix display device 220 in which the block by block luminance difference occurs. The matrix display device 220 employs a stripe arrangement.

The matrix display device 220 includes a source signal line driver 1, a gate signal line driver 2, source signal lines DS1 and DS2, gate signal lines DGU and DGD, and pixel electrodes DP1U and DP1D. Although not shown, the matrix type display device 220 includes a plurality of gate signal lines including gate signal lines DGU and DGD, pixel electrodes connected to each source signal line, and each gate signal line.

The display screen of the matrix display device 220 is divided into an upper region 29 and a lower region 30.

The source signal lines DS1 and DS2 are adjacent to each other. The gate signal line DGU passes through the region 29. The gate signal line DGD passes through the region 30.

The pixel electrode DP1U is in the region 29, and the pixel electrode DP1D is in the region 30. The pixel electrodes DP1U and DP1D are connected to the source signal line DS1 through an active element (not shown).

As described above, in the matrix display device employing the stripe arrangement, the pixel electrodes corresponding to the pixels of the same color are connected to one source signal line. In FIG. 22, it is assumed that all pixel electrodes connected to the source signal line DS1 correspond to blue pixels, and all pixel electrodes connected to the source signal line DS2 correspond to red pixels.

The signals supplied to the source signal lines DS1 and DS2 are called signals VS1 and VS2, respectively.

The signals supplied to the gate signal lines DGU and DGD are called signals VGU and VGD, respectively.

The voltages applied to the pixel electrodes DP1U and DP1D are called liquid crystal applied voltages VP1U and VP1D, respectively.

The matrix display device 220 is driven by the source line inversion driving method. As described above, by the source line inversion driving method, a signal of opposite polarity is supplied to an adjacent source signal line, and the polarity of the signal is inverted every vertical scanning period.

The parasitic capacitance CSD1u is generated between the pixel electrode DP1U and the source signal line DS1, and the parasitic capacitance CSD2u is generated between the pixel electrode DP1U and the source signal line DS2. The parasitic capacitance CSD1d is generated between the pixel electrode DP1D and the source signal line DS1, and the parasitic capacitance CSD2d is generated between the pixel electrode DP1D and the source signal line DS2. CSD1u is larger than CSD2u and CSD1d is smaller than CSD2d. The discrepancy in the parasitic capacitance is due to the stepper process performed separately for the upper region 29 and the lower region 30 of the display screen.

Now, it is assumed that a uniform cyan pattern is displayed on the entire display screen of the matrix display device 220.

Fig. 23 is a waveform diagram showing waveforms of signals supplied to source signal lines DS1 and DS2 (Fig. 22), pixel electrodes DP1U and DP1D, and gate signal lines DGU and DGD.

The liquid crystal applied voltage VP1U is greatly influenced by the signal VS1 supplied to the source signal line DS1 since CSD1u is larger than CSD2u. The liquid crystal applied voltage VP1D is greatly influenced by the signal VS2 supplied to the source signal line DS2 because CSD1d is smaller than CSD2d. The luminance of the pixel corresponding to the pixel electrodes DP1U and DP1D changes depending on the effective values of the liquid crystal applied voltages VP1U and VP1D. As shown in Fig. 23, the effective value of the liquid crystal applied voltage VP1D is larger than the effective value of the liquid crystal applied voltage VP1U. Thus, the lower region 30 is darker than the upper region 29. In other words, a luminance difference between blocks occurs between the regions 29 and 30.

According to an aspect of the present invention, a matrix display device includes: a plurality of gate signal lines extending in a first direction; A gate signal line driver for driving the plurality of gate signal lines; A plurality of source signal lines extending in a second direction perpendicular to the first direction; A source signal line driver for driving the plurality of source signal lines; And a plurality of pixel electrodes. The plurality of pixel electrodes are respectively connected to one corresponding source signal line among the plurality of source signal lines and one corresponding gate signal line among the plurality of gate signal lines. The plurality of source signal lines are assigned to at least one first pixel electrode assigned to a first color element among the plurality of pixel electrodes, at least one second pixel electrode assigned to a second color element, and a third color element. Connected to at least one third pixel electrode. The source signal line driver supplies a first display signal to a first source signal line among the plurality of source signal lines, and polarizes the first display signal to a second source signal line adjacent to the first source signal line among the plurality of source signal lines. The reverse of the second display signal is supplied, and the polarity of the first display signal and the polarity of the second display signal are inverted every predetermined cycle.

In one embodiment of the present invention, a portion of at least one of the plurality of pixel electrodes overlaps a portion of one of the plurality of source signal lines.

In one embodiment of the present invention, a distance between all two pixel electrodes adjacent in a first direction among the plurality of pixel electrodes is equal to that of a source signal line among a plurality of source signal lines disposed between the two pixel electrodes. Shorter than width

In example embodiments, the source signal line driver may include voltages applied to two adjacent pixel electrodes of the at least one first pixel electrode, at least one second pixel electrode, and at least one third pixel electrode. The plurality of source signal lines are driven to have the same polarity.

In example embodiments, the source signal line driver may include voltages applied to two adjacent pixel electrodes of the at least one first pixel electrode, at least one second pixel electrode, and at least one third pixel electrode. The plurality of source signal lines are driven to have different polarities.

In one embodiment of the present invention, the number of the at least one first pixel electrode, the number of the at least one second pixel electrode, and the number of the at least one third pixel electrode connected to each of the plurality of source signal lines are mutually different. same.

In an embodiment, the plurality of gate signal lines may include at least one first pixel electrode assigned to a first color element among the plurality of pixel electrodes, and at least one second pixel electrode assigned to a second color element. And at least one third pixel electrode assigned to the third color element, respectively. The number of the at least one first pixel electrode, the number of the at least one second pixel electrode, and the number of the at least one third pixel electrode connected to each of the plurality of gate signal lines are equal to each other. The pitch of the plurality of pixel electrodes in the first direction is 1/3 of the pitch of the plurality of pixel electrodes in the second direction.

In one embodiment of the present invention, the source signal line driver may include a first external display signal corresponding to a first color element, a second external display signal corresponding to a second color element, and a third external display corresponding to a third color element. Receive the signal. The source signal line driver includes a switch for selecting one of a first external display signal, a second external display signal, and a third external display signal, and drives the plurality of source signal lines in accordance with the selected external display signal.

According to another aspect of the present invention, a matrix display device includes: a plurality of gate signal lines extending in a first direction; A gate signal line driver for driving the plurality of gate signal lines; A plurality of source signal lines extending in a second direction perpendicular to the first direction; A source signal line driver for driving the plurality of source signal lines; And a plurality of pixel electrodes. The plurality of pixel electrodes are respectively connected to one corresponding source signal line among the plurality of source signal lines and one corresponding gate signal line among the plurality of gate signal lines. The plurality of source signal lines are assigned to at least one first pixel electrode assigned to a first color element among the plurality of pixel electrodes, at least one second pixel electrode assigned to a second color element, and a third color element. Connected to at least one third pixel electrode. A fourth pixel electrode in which the plurality of pixel electrodes are disposed between a first source signal line among the plurality of source signal lines and a second source signal line adjacent to the first source signal line among the plurality of source signal lines, and the first source And a fifth pixel electrode disposed between the signal line and the second source signal line at a position different from that of the fourth pixel electrode. A first capacitor is generated between the fourth pixel electrode and the first source signal line, and a second capacitor is generated between the fourth pixel electrode and the second source signal line, and between the fifth pixel electrode and the first source signal line. A third capacitor is generated, and a fourth capacitor is generated between the fifth pixel electrode and the second source signal line. The ratio of the first dose and the second dose is different from the ratio of the third dose and the fourth dose.

In one embodiment of the present invention, a portion of at least one of the plurality of pixel electrodes is disposed to overlap a portion of one of the plurality of source signal lines.

In one embodiment of the present invention, a distance between all two pixel electrodes adjacent in a first direction among the plurality of pixel electrodes is equal to that of a source signal line among a plurality of source signal lines disposed between the two pixel electrodes. Shorter than width

In one embodiment of the present invention, the number of the at least one first pixel electrode, the number of the at least one second pixel electrode, and the number of the at least one third pixel electrode connected to each of the plurality of source signal lines are mutually different. same.

In an embodiment, the plurality of gate signal lines may include at least one first pixel electrode assigned to a first color element among the plurality of pixel electrodes, and at least one second pixel electrode assigned to a second color element. And at least one third pixel electrode assigned to the third color element. The number of the at least one first pixel electrode, the number of the at least one second pixel electrode, and the number of the at least one third pixel electrode connected to each of the plurality of gate signal lines are equal to each other. The pitch of the plurality of pixel electrodes in the first direction is 1/3 of the pitch of the plurality of pixel electrodes in the second direction.

In one embodiment of the present invention, the source signal line driver may include a first external display signal corresponding to a first color element, a second external display signal corresponding to a second color element, and a third external display corresponding to a third color element. Receive the signal. The source signal line driver includes a switch for selecting one of a first external display signal, a second external display signal, and a third external display signal, and drives the plurality of source signal lines in accordance with the selected external display signal.

Therefore, in the present invention, (1) the matrix display device capable of color display without shadowing, in particular, the distance between two adjacent pixel electrodes is shorter than the width of the source signal line so as to improve the aperture ratio, so that the source signal line and the pixel electrode A matrix display device capable of color display, in which shadowing is not caused even if parasitic capacitances exist between them; And (2) a matrix display device capable of color display without affecting the block-by-block luminance difference.

These and other advantages of the present invention will become more apparent by understanding the following detailed description with reference to the accompanying drawings.

1A-1D show the principle of different methods of driving the matrix type display device.

2A to 2B show the configuration of the matrix display device in the first example according to the present invention.

FIG. 3 schematically shows a pixel configuration of the matrix display device shown in FIGS. 2A and 2B.

FIG. 4 shows the matrix display device shown in FIGS. 2A and 2B with the background and the window pattern displayed on the display screen.

FIG. 5 is a waveform diagram showing waveforms of signals supplied to the source signal line, the pixel electrode, and the gate signal line of the matrix display device shown in FIGS. 2A and 2B in the state shown in FIG.

FIG. 6 shows a circuit configuration that can be used as the source signal line driver of the configuration shown in FIGS. 2A and 2B.

FIG. 7 shows another circuit configuration that can be used as the source signal line driver of the configuration shown in FIGS. 2A and 2B.

8A and 8B show the structure of the matrix display device shown in FIGS. 2A and 2B when driven by the dot inversion driving method.

9A and 9B show changes in the mosaic arrangement of the pixels shown in Figs. 2A and 2B.

10A and 10B show the structure of the matrix display device shown in FIGS. 9A and 9B when driven by the dot inversion driving method.

11A and 11B show a modification of the matrix display device shown in FIGS. 2A and 2B in which the y-direction length and the x-direction length of each pixel are 3: 1.

12A and 12B show the structure of the matrix display device shown in Figs. 11A and 11B when driven by the dot inversion driving method.

13A and 13B show the structure of a matrix display device in a second example according to the present invention.

FIG. 14 shows the relationship between the signal line and the pixel electrode of the matrix display device shown in FIGS. 13A and 13B.

15A and 15B show the pixel electrodes of the upper region and the lower region of the display screen of the matrix display device shown in FIGS. 13A and 13B and the configuration thereof.

FIG. 16 is a waveform diagram showing waveforms of signals supplied to a source signal line, a pixel electrode, and a gate signal line when a uniform shiyan pattern is displayed on the display screen of the matrix display device shown in FIGS. 13A and 13B.

17 illustrates an exemplary stripe arrangement of pixels of a conventional matrix display.

18 illustrates a principle of generating shadows in a conventional matrix display device having a stripe arrangement of pixels.

19 is a waveform diagram illustrating waveforms of signals supplied to source signal lines, pixel electrodes, and gate signal lines of a conventional matrix display device when a background and a window pattern are displayed on a display screen.

20 shows an exemplary configuration of a matrix display device having a distance between adjacent pixel electrodes shorter than the width of the source signal line.

FIG. 21 is a cross-sectional view of the matrix display device shown in FIG. 20.

22 shows the structure of a conventional matrix display device in which a luminance difference occurs for each block.

FIG. 23 is a waveform diagram showing waveforms of signals supplied to source signal lines, pixel electrodes, and gate signal lines of the conventional matrix display device shown in FIG. 22 when a uniform shiyan pattern is displayed on the display screen of the device.

1A to 1D, a method of driving an active matrix liquid crystal display is described.

In order to drive the active matrix liquid crystal display device, it is necessary to reverse the polarity of the voltage applied to the liquid crystal material according to the unit time so as to prevent deterioration of the liquid crystal material.

1A to 1D, rectangular boxes each represent a pixel to be included in an active matrix display device. Pixels arranged in the X direction are connected to one gate signal line, and pixels arranged in the y direction are connected to one source signal line. The "+" symbol on some pixels indicates that the liquid crystal applied voltage (ie, the voltage applied to the liquid crystal material of the pixel) is positive, and the "-" symbol on other pixels indicates the liquid crystal applied voltage (ie, the liquid crystal material of the pixel). Voltage to be applied). On the display screen of the active matrix display device, the polarity state indicated by the "first field" and the polarity state indicated by the "second field" alternately appear.

1A shows the principle of a driving method called "field inversion". By the field inversion method, all the pixels have the same polarity in the same field.

Fig. 1B shows the principle of the driving method called "gate line inversion". According to the gate line inversion method, pixels connected to the same gate signal line have the same polarity, but pixels connected to the adjacent gate signal line have opposite polarities.

1C shows the principle of the driving method called "source line inversion". According to the source line inversion method, pixels connected to the same source signal line have the same polarity, while pixels connected to adjacent source signal lines have opposite polarities.

1D shows the principle of a driving method called " dot inversion ". By the dot inversion method, two adjacent pixels connected to the same source signal line have opposite polarities, and pixels connected to adjacent source signal lines have opposite polarities.

Hereinafter, embodiments of the present invention will be described with reference to FIGS. 2A through 16.

(Example 1)

2A and 2B show a matrix display device 100 of Embodiment 1 according to the present invention.

The matrix display device 100 includes a source signal line driver 110, a gate signal line driver 120, a plurality of source signal lines 111, a plurality of gate signal lines 112, and a plurality of pixel electrodes 130.

The plurality of gate signal lines 121 extend in the x direction (first direction), and the plurality of source signal lines 111 extend in the y direction (second direction). The x and y directions are perpendicular to each other.

The plurality of pixel electrodes 130 are arranged in a matrix, and each pixel electrode 130 has a corresponding one of a plurality of source signal lines 111 and a corresponding one of a plurality of gate signal lines 121. It is connected to the signal line.

The matrix display device 100 has pixels in a mosaic arrangement. In a mosaic arrangement, a pixel electrode (red pixel electrode; first electrode) corresponding to a red pixel, a pixel electrode (green pixel electrode; second electrode) corresponding to a green pixel, and a pixel electrode (blue pixel electrode corresponding to a blue pixel) A third electrode is connected to each of the plurality of source signal lines 111.

2A and 2B, the rectangular box label R represents a red pixel, the rectangular box label G represents a green pixel, and the rectangular box label B represents a blue pixel. The polarity (polarity of the liquid crystal applied voltage) of each pixel is represented by "+" or "-". FIG. 2A shows the polarity of each pixel of the first field, and FIG. 2B shows the polarity of each pixel of the second field. The first field and the second field are alternated every every vertical scanning period.

The source signal line driver 110 drives the plurality of source signal lines 111. For example, the source signal line driver 110 has a function of providing a display signal to each of the plurality of source signal lines 111.

The gate signal line driver 120 drives the plurality of gate signal lines 121. For example, the gate signal line driver 120 has a function of providing a scanning signal to each of the plurality of gate signal lines 121 to execute vertical scanning.

3 schematically illustrates a pixel structure of the matrix display device 100. A parasitic capacitance CSD1 is generated between the first source signal line DS1 and the pixel electrode DP1 (one of the pixel electrodes 130 shown in FIGS. 2A and 2B) connected to the first source signal line DS1. . Parasitic capacitance CSD2 is generated between the second signal line DS2 and the pixel electrode DP1. The second source signal line DS2 is adjacent to the first source signal line DS1 and adjacent to the pixel electrode DP1. The pixel electrode DP1 is connected to the gate signal line DG1 and the source signal line DS1 through the active element TFT1. The counter electrode DT disposed toward the pixel electrode DP1 is connected to the counter electrode driver 140. The pixel capacitor CP is generated between the pixel electrode DP1 and the counter electrode DT. In an actual matrix display device, an auxiliary capacitor that assists the pixel capacitor CP is generated in parallel to the pixel capacitor CP. In this specification, the supplemental dose is not described for simplicity.

One vertical scanning period includes one horizontal scanning period, and the active element TFT1 is turned on during this horizontal scanning period (this period is referred to as an "ON period"). Except for the horizontal scanning period, the active element TFT1 is turned off (this period is called "OFF period"). When the TV signal is an NTSC signal, one vertical scanning period is about 16.7 ms and one horizontal scanning period is 62.5 μs. As described above, the active element TFT1 is turned off for most of the vertical scanning period. The active element TFT1 is turned off, but the pixel capacitor CP holds a charge corresponding to the voltage applied during the ON period. The active element TFT1 is controlled to be turned on and off by a signal supplied to the gate signal line DG1 (scanning signal).

The liquid crystal material is inserted between the pixel electrode DP1 and the counter electrode DT. The transmittance of the liquid crystal material changes depending on the liquid crystal application voltage VP1 applied between the pixel electrode DP1 and the counter electrode DT. In the matrix display device 100, when the liquid crystal applied voltage VP1 is higher than a predetermined voltage (reference voltage), black display is obtained; When the liquid crystal applied voltage VP1 is lower than the reference voltage, white display is obtained (normally white mode). The counter electrode DT is supplied with a constant DC voltage.

All of the pixel electrodes 130 included in the matrix display device 100 have the same structure as the pixel electrode DP1 shown in FIG. 3.

4 shows a matrix display device 100 displaying a background 42 and a window pattern 5 on the display screen 41. As described above, "window pattern" means a graphic pattern displayed on the display screen.

In Fig. 4, some of the plurality of source signal lines 111 (Figs. 2A and 2B) are denoted by reference numerals DS1H, DS2H, DS1W, DS2W. One gate signal line 121 (FIGS. 2A and 2B) is indicated by reference numeral DG1. Some of the plurality of pixel electrodes 130 (FIGS. 2A and 2B) are denoted by reference numerals DP1H and DP1W.

The source signal lines DS1H and DS2H pass through an area where no window pattern is displayed, and the source signal lines DS2H are adjacent to the source signal line DS1H. Signals corresponding to the luminance level of the background 42 are supplied to the source signal lines DS1H and DS2H.

The source signal lines DS1W and DS2W pass through the area where the window pattern 5 is displayed. The source signal line DS2W is adjacent to the source signal line DS1W. The signal corresponding to the luminance level of the background 42 is supplied to the source signal lines DS1W and DS2W for a predetermined time, and the signal lines corresponding to the luminance level of the window pattern 5 are supplied to the source signal lines DS1W and DS2W during the other time.

The pixel electrode DP1H is connected to the source signal line DS1H through an active element (for example, a TFT). The pixel electrode DP1W is connected to the source signal line DS1W through the active element.

In the matrix display device 100 employing a mosaic arrangement, each source signal line is connected to a red pixel electrode, a green pixel electrode, and a blue pixel electrode. The number of red pixel electrodes, the number of green pixel electrodes, and the number of blue pixel electrodes connected to each of the source signal lines are substantially the same. Two adjacent pixel electrodes in the x direction have different colors, and two adjacent pixel electrodes in the y direction have different colors.

The signals supplied to the source signal lines DS1H, DS2H, DS1W, and DS2W are called signals VS1H, VS2H, VS1W, and VS2W, respectively.

The signal supplied to the gate signal line DG1 is shown as the signal VG1.

Voltages applied to the pixel electrodes DP1H and DP1W are referred to as liquid crystal application voltages VP1H and VP1W, respectively.

The matrix display device 100 is driven by the source line inversion driving method. As described above, by the source line inversion driving method, signals of opposite polarities are supplied to adjacent source signal lines, and the polarities of the signals are inverted in all vertical scanning periods. For example, the source signal line driver 110 supplies the signal VS1W to the source signal line DS1W (first source signal line), and supplies the signal VS2W to the source signal line DS2W (second source signal line). The signal VS2W has a polarity opposite to that of the signal VS1W. The polarities of the signals VS1W and VS2W are inverted at every vertical scanning period (predetermined period). The source signal line driver 110 drives the plurality of source signal lines 111 so that voltage is applied to two adjacent pixel electrodes 130 (FIGS. 2A and 2B) connected to each source signal line 111 having the same polarity. .

FIG. 5 shows the background 42 and the window pattern 5 in the source signal lines DS1H, DS2H, DS1W, DS2W (FIG. 4), the pixel electrodes DP1H, DP1W, and the gate signal line DG1. As described above, the waveforms of the signals supplied in the state displayed on the display screen 41 of the matrix display device 100 are shown.

The signal VG1 is a scan signal for turning on the active elements connected to the pixel electrodes DP1H and DP1W during all vertical scanning periods. While the active element is on, the signals VS1H and VS1W supplied to the source signal lines DS1H and DS1W are supplied to the pixel electrodes DP1H and DP1W through corresponding active elements. Therefore, the liquid crystal applying voltage VP1H is generated between the pixel electrode DP1H and the counter electrode disposed toward the pixel electrode DP1H, and the counter electrode disposed toward the pixel electrode DP1W and the pixel electrode DP1W. The liquid crystal applied voltage VP1W is generated in between. Since the signal supplied to each counter electrode is a DC signal having a constant voltage, the waveform of the voltage supplied to the pixel electrode DP1H is almost the same as the waveform of the liquid crystal applied voltage VP1H, and the waveform of the voltage supplied to the pixel electrode DP1W is The waveform is almost the same as the waveform of the liquid crystal applied voltage VP1W.

Assume that the background 42 is cyan and the window pattern 5 is black. Cyan color is obtained by turning off the red pixel and turning on the green and blue pixels. In addition, a black color is obtained by turning off the red, green and blue pixels.

The signals VS1H, VS2H, VS1W, VS2W are supplied to the source signal line 111, and its polarities change from negative to positive and from positive to negative every vertical scanning period. The voltage VB corresponds to the black display, and the voltage VW corresponds to the white display. The voltages VB and VW are represented by the distance of the signals in the positive and negative directions from the center of the polarity inversion when the center of the polarity inversion is indicated by a dotted line in FIG. 5. The absolute value of the voltage corresponding to the black display when the signal supplied to the source signal line is positive is equal to the absolute value of the voltage corresponding to the black display when the signal supplied to the source signal line is negative. The absolute value of the voltage corresponding to the white display when the signal supplied to the source signal line is positive is equal to the absolute value of the voltage corresponding to the white display when the signal supplied to the source signal line is negative.

Each of the source signal lines DS1H and DS1W is connected to the red, green, and blue pixels. Therefore, the voltage VB for turning off the red pixel (black display) and the voltage VW for turning on the green and blue pixel (white display) (signal VS1H) are supplied to the source signal line DS1H. Except during the window display period W, the source signal line DS1W is supplied with the same voltage as that of the source signal line DS1H. During the window display period W, the voltage VB (the source signal line DS1W is applied to the source signal line DS1W. Signal VS1W) is supplied.

During the window display period W, the active element connected to one of the pixel electrodes corresponding to the pixel included in the window pattern 5 is turned on.

During the ON period of the signal VG1, the signals VS1H and VS1W are applied to the pixel electrodes DP1H and DP1W, respectively. During this period, charges supplied from the source signal lines DS1H and DS1W to the pixel electrodes DP1H and DP1W by the active elements (not shown) are held during the OFF period of the signal VG1.

As shown in FIG. 5, the influence voltage VS is added to the liquid crystal applied voltage VP1H by signals VS1H and VS2H through corresponding parasitic capacitances.

Similarly, the voltage added to the liquid crystal applied voltage VP1W by the signals VS1W and VS2W through the corresponding parasitic capacitance is also represented as the influence voltage VS.

The influence voltage VS is represented by equation (2) using the parasitic capacitances CSD1 and CSD2 and the pixel capacitance CP shown in FIG.

VS = (VB-VW) xCSD1 / (CP + CSD1 + CSD2) + (VW-VB) xCSD2 / (CP + CSD1 + CSD2) .... (2)

The signals VS1W and VS2W do not change at the same time. Equation (2) is represented by equation (3) when the parasitic doses CSD1 and CSD2 are equal to each other and thus CSD1 = CSD2 = C.

VS = (VB-VW) xC / (CP + 2C) ........ (3)

As understood in equation (3), the influence voltage VS is zero.

The transmittance of the liquid crystal material changes depending on the effective value VRMS of the liquid crystal applied voltage. In general, the effective value VRMS is the square root of the value obtained by integrating the square of the voltage at the unit cycle time T. When the function f is a function of time t, f (t) is represented by equation (4).

When the function f is a square pie and its amplitude is 2xV, the effective value VRMS of the function f is 1xV.

In Fig. 5, since the liquid crystal applied voltages VP1H and VP1W are generally regarded as square waves, their effective values VRMS are both (VW + VS). Since the effective values of the voltages applied to the pixel electrodes DP1H and DP1W are the same, the luminance of the pixels corresponding to the pixel electrodes DP1H and DP1W is not different from each other. Therefore, the shadow 6 shown in FIG. 18 is not generated in the matrix display device 100. That is, shadowing is prevented.

In the above description, the background 42 is cyan and the window pattern 5 is black. The matrix display device 100 may prevent shadowing even when the background 42 and the window pattern 5 have different colors.

In particular, the distance between two adjacent pixel electrodes in which the matrix display device 100 is arranged in the x direction is shorter than the width of the source signal line, and a portion of each pixel electrode is disposed between a portion of one of the plurality of source signal lines and between them. When having an overlapping structure (corresponding to the structure shown in Figs. 20 and 21) with the insulating layer inserted, a mosaic arrangement and a source line inversion driving method are preferable for the following reasons. In the above structure, a part of each pixel electrode overlaps with a part of one of the plurality of source signal lines, so that parasitic capacitance between the pixel electrode and one source signal line becomes larger than the pixel capacitor CP, causing shadowing. . Therefore, the effect of eliminating the shadowing provided by the mosaic arrangement and the source line inversion driving method is important.

6 shows a configuration of a circuit 110a that can be employed as the source signal line driver 110 of the matrix display device 100.

The circuit (source signal line driver) 110a shown in Fig. 6 includes a switch 7, a D / A converter 9, an output buffer 10, an inverter 11 (only one is shown in Fig. 6), and a sampling circuit ( 12), the shift register 13 and the latch circuit 14 are included. The sampling circuit 12, the shift register 13 and the latch circuit 14 each include a flip-flop circuit 8. From the signal source (not shown) to the matrix type display device 100, the external red display signal R (the first external display signal corresponding to red) and the external green display signal G (the second external display corresponding to green) Signal) and an external blue display signal B (a third external display signal corresponding to blue) are input.

For example, the switch 7 can be an analog switch or a selector. Its connection point can be changed by the control signals SEL1 and SEL2.

An inverter 11 is provided for all other source signal lines 111. A POL signal or a signal obtained by inverting the POL signal acts as a control signal for controlling the polarity of each D / A converter 9.

The sampling circuit 12 samples the external display signal selected by the switch 7 in accordance with the sampling signal.

The shift register 13 sequentially transfers the sampling start signal SP in accordance with the timing given by the clock signal CK, and provides a sampling signal to the sampling circuit 12. FIG.

The latch circuit 14 latches the signal sampled by the sampling circuit 12 in accordance with the timing given by the latch signal LS.

In the case of a mosaic arrangement, the color of the pixel corresponding to the pixel electrode electrically connected to one source signal line 111 changes from red to green and again to blue during all horizontal scanning periods. The switch 7 is switched in all horizontal scanning periods so as to supply a display signal corresponding to the color of the pixel to the source signal line. In the present specification, the term "electrical connection" means that the active element between the source signal line and the pixel electrode is turned on. The switch 7 is switched by the control signals SEL1 and SEL2. The switch 7 selects one of the external red, green and blue display signals R, G, and B.

The shift register 13 receives the sampling start signal SP in every horizontal scanning period to generate a sampling signal. The external display signal selected by the switch 7 is sampled in the sampling circuit 12 by the sampling signal. When sampling for one horizontal scanning period is completed, the sampled signal is latched by the latch circuit 14 in response to the latch signal LS, which is latched by the source signal line 111 through the output buffer 10. )

In this example, the source line inversion driving method is used, so that the POL signal is inverted in all vertical scanning periods.

In summary, the source signal line driver 110a receives the external red, green and blue display signals R, G, and B, selects one of them by each switch 7, and according to the selected external display signal. The plurality of source signal lines 111 are driven.

7 shows a configuration of a circuit 110b that can be employed as the source signal line driver 110 of the matrix display device 100.

The circuit (source signal line driver) 110b shown in FIG. 7 differs from the source signal line driver 110a at the position of each switch 7. Like elements described in FIG. 6 are designated by like reference numerals and description thereof will be omitted.

In the source signal line drivers 110a and 110b shown in Figs. 6 and 7, the number of bits of the external display signals R, G, and B is one. Even when the external display signals R, G, and B are 1 bit or more, the matrix display device 100 uses the same number of switches 7, sampling circuits 12, and latch circuits 14 as the number of bits. Can be driven.

When the external display signals R, G, and B are analog signals, the matrix display device 100 includes a latch circuit 14 and a sampling circuit 12 having a capacitor or the like except for the D / A converter 9. Can be driven by converting an external input display signal into a positive and negative signal.

In addition, the matrix display device 100 may be driven by a dot inversion driving method. Even when the dot inversion driving method is used, the effective values of the voltages applied to the pixel electrodes DP1H and DP1W (FIG. 4) are the same by integrating the waveforms of the voltages applied to the pixel electrodes DP1H and DP1W in unit cycle time. do.

By the dot inversion driving method, signals of opposite polarities are supplied to adjacent source signal lines, and the polarities of the signals supplied to the source signal lines are inverted at every vertical scanning period. For example, referring to FIGS. 4 and 5, the source signal line driver 110 supplies a signal VS1W (first display signal) to the source signal line DS1W (first source signal line), and the source signal line DS2W (first signal). The signal VS2W (second display signal) is supplied to the two source signal lines. The signal VS2W has a polarity opposite to that of the signal VS1W, and the polarities of the signals VS1W and VS2W are inverted at every vertical scanning period (predetermined period). The source signal line driver 110 drives the plurality of source signal lines 111 such that two adjacent pixel electrodes 130 (FIGS. 2A and 2B) connected to each source signal line 111 have the same polarity.

8A and 8B show the configuration of the matrix display device 100 when driven by the dot inversion driving method. FIG. 8A shows the polarity ("+", "-") of each pixel in the first field, and FIG. 8B shows the polarity of each pixel in the second field. The first field and the second field are alternated every every vertical scan period.

Even in this case, the matrix type display device 100 has a distance between two adjacent pixel electrodes shorter than the width of the source signal line, and a portion of each pixel electrode has a portion of one of the plurality of source signal lines and an insulating layer therebetween. It has an overlapping structure in the inserted state.

When the dot inversion driving method is used to drive the matrix type display device 100, the source signal line driver 110a can be a circuit 110a (Fig. 6) or a circuit 110b (Fig. 7). In all horizontal and vertical scan periods, the POL signal is inverted.

A modification of the mosaic arrangement that can be employed in the matrix display device 100 will be described.

9A and 9B show variations of the mosaic arrangement shown in FIGS. 2A and 2B. FIG. 9A shows the polarity ("+", "-") of each pixel of the first field, and FIG. 9B shows the polarity of each pixel of the second field. The first field and the second field are alternated every every vertical scan period.

In the arrangement shown in Figs. 9A and 9B, pixels of the same color are discontinuous in the oblique direction. This arrangement eliminates the inconvenience in the arrangements shown in FIGS. 2A and 2B, in which oblique lines detected on the display screen are obstructed by the eyes due to pixels of the same color consecutive in the oblique direction.

9A and 9B are driven by the source line inversion driving method, but can also be driven by the dot inversion driving method.

10A and 10B show a mosaic arrangement of the matrix display device 100 shown in FIGS. 2A and 2B when driven by the dot inversion driving method. FIG. 10A shows the polarity ("+", "-") of each pixel in the first field, and FIG. 10B shows the polarity of each pixel in the second field. The first field and the second field are alternated in every vertical scan period.

In the configuration of the matrix type display device 100 shown in Figs. 9A and 9B and Figs. 10A and 10B using a modification of the mosaic arrangement, the source signal line driver 110 may be a circuit 110a (Fig. 6) or a circuit 110b ( 7). However, the circuit 110a needs to be modified so that the connection positions for inputting the external display signals R, G, and B to the source signal line 111 are changed in all three source signal lines 111. Similarly, the circuit 110b also needs to be adapted such that the connection positions of the switch 7 are changed in all three source signal lines 111.

As illustrated in FIGS. 11A and 11B, each of the pixels of the matrix display device 100 may have a ratio of vertical length to horizontal length of 3: 1. FIG. 11A shows the polarity ("+", "-") of each pixel in the first field, and FIG. 11B shows the polarity of each pixel in the second field. The first field and the second field are alternated in every vertical scan period.

11A and 11B, "a" is the length of each pixel in the y direction (pixel pitch in the y direction) and "b" is the length of each pixel in the x direction (pixel pitch in the x direction), a = 3xb. The y direction is parallel to the source signal line 111, and the x direction is parallel to the gate signal line 121 (FIGS. 2A and 2B).

The gate signal line 121 is connected to the red pixel electrode, the green pixel electrode, and the blue pixel electrode, respectively. The number of red pixel electrodes, the number of green pixel electrodes, and the number of blue pixel electrodes connected to each gate signal line are almost the same.

The mosaic arrangement shown in Figs. 11A and 11B is preferable for the following reasons. The display unit in the case where three pixels (red pixel, green pixel and blue pixel) corresponding to the RGB color are each adjacent in the horizontal direction to form one display unit with a ratio of the length in the x direction: the length in the y direction is 1: 1. X-direction length: y-direction length is 1: 3. Therefore, it is difficult to form data by a computer or the like. In the arrangement shown in Figs. 11A and 11B, the ratio of the length in the x direction to the length in the y direction of the display unit is 1: 1 (indicated by reference numeral 1101 in Fig. 11A), and thus it is much easier to form data by computer or the like. It is easy.

In the example shown in Figs. 11A and 11B, it is driven by the source line inversion driving method, but can also be driven by the dot inversion driving method.

12A and 12B show a mosaic arrangement of the matrix display device 100 shown in FIGS. 11A and 11B when driven by the dot inversion driving method. 12A shows the polarity ("+", "-") of each pixel of the first field, and FIG. 12B shows the polarity of each pixel of the second field. The first field and the second field are alternated every every vertical scan period.

In the case of the mosaic arrangement shown in Figs. 11A and 11B and 12A and 12B, the source signal line driver 110 may be a circuit 110a (Fig. 6) or a circuit 110b (Fig. 7).

As described above, the matrix type display device of Embodiment 1 according to the present invention can prevent shadowing by adopting one of various mosaic arrangements of pixels and a source line inversion driving method or a dot inversion driving method.

In order to improve the aperture ratio, the distance between two adjacent source signal lines becomes shorter than the width of the source signal lines, so that even when the parasitic capacitance becomes considerably large, shadowing can be prevented.

The matrix display device 100 employs a mosaic arrangement of pixels. Therefore, the external display signals (the levels of the signals VS1H, VS2H, VS1W, VS2W of FIG. 5) supplied to the source signal line 111 are red pixels, green pixels, and blue pixels in all horizontal scanning periods. To change. In addition, the matrix display device 100 is driven by a source line inversion driving method or a dot inversion driving method. Thus, display signals of opposite polarities are supplied to adjacent source signal lines. By providing the display signal to the source signal line in this manner, the influence of the display signal supplied to the source signal line adjacent to the pixel electrode acting according to the effective value of the voltage of the pixel electrode through the parasitic capacitance can be eliminated and thus shadowing Can be prevented.

In the above description, an RGB color is assigned to the pixels. The present invention is also applicable to the case where cyan, magneta and yellow are assigned to the pixels.

(Example 2)

A matrix type display device 200 according to Embodiment 2 of the present invention will be described with reference to FIGS. 13A and 16.

13A and 13B show an exemplary configuration of the matrix display device 200.

The matrix display device 200 includes a source signal line driver 210, a gate signal line driver 220, a plurality of source signal lines 211, a plurality of gate signal lines 221, and a plurality of pixel electrodes 230.

The plurality of gate signal lines 221 extend in the x direction (first direction), and the plurality of source signal lines 211 extend in the y direction (second direction). The x and y directions are perpendicular to each other.

The plurality of pixel electrodes 230 are arranged in a matrix, and each pixel electrode 230 corresponds to one source signal line corresponding to one of the plurality of source signal lines 211 and one gate corresponding to one of the plurality of gate signal lines 221. It is connected to the signal line.

The matrix display device 200 has pixels in a mosaic arrangement. In a mosaic arrangement, a pixel electrode (red pixel electrode; first electrode) corresponding to a red pixel, a pixel electrode (green pixel electrode; second electrode) corresponding to a green pixel, and a pixel electrode (blue pixel electrode corresponding to a blue pixel) A third electrode is connected to each of the plurality of source signal lines 211.

In FIGS. 13A and 13B, the rectangular box label R represents a red pixel, the rectangular box label G represents a green pixel, and the rectangular box label B represents a blue pixel. The polarity (polarity of the liquid crystal applied voltage) of each pixel is represented by "+" or "-". FIG. 13A shows the polarity of each pixel of the first field, and FIG. 13B shows the polarity of each pixel of the second field. The first field and the second field are alternated every every vertical scanning period.

The source signal line driver 210 drives the plurality of source signal lines 211. For example, the source signal line driver 210 has a function of providing a display signal to each of the plurality of source signal lines 211.

The gate signal line driver 220 drives the plurality of gate signal lines 221. For example, the gate signal line driver 220 has a function of providing a scanning signal to each of the plurality of gate signal lines 221 to execute vertical scanning.

14 illustrates a relationship between a signal line and a pixel electrode of the matrix display device 200.

The display screen of the matrix display device 200 is divided into an upper region 29 and a lower region 30.

In Fig. 14, two of the plurality of source signal lines 211 (Figs. 13A and 13B) are denoted by reference numerals DS1 and DS2. Two of the plurality of gate signal lines 221 are denoted by reference numerals DGU and DGD. Two of the plurality of pixel electrodes 130 are denoted by reference numerals DP1U (upper region 29) and DP1D (lower region 30). The source signal lines DS1 and DS2 are adjacent to each other.

The pixel electrode (fourth pixel electrode) is provided between the source signal line DS1 (first source signal line) and the source signal line DS2 (second source signal line). The pixel electrode DP1D (the fifth pixel electrode) is provided at a position different from the pixel electrode DP1U between the source signal line DS1 (first source signal line) and the source signal line DS2 (second source signal line).

Each pixel electrode DP1U and DP1D is connected to the same source signal line DS1 through an active element (not shown).

In the matrix display device 200 employing a mosaic arrangement, each source signal line is connected to a red pixel electrode, a green pixel electrode, and a blue pixel electrode. The number of red pixel electrodes, the number of green pixel electrodes, and the number of blue pixel electrodes connected to each of the source signal lines are substantially the same. Two adjacent pixel electrodes in the x direction have different colors, and two adjacent pixel electrodes in the y direction have different colors.

The signals supplied to the source signal lines DS1 and DS2 are called signals VS1 and VS2, respectively.

The signal supplied to the gate signal line DGU is shown as the signals VGU and VGD.

Voltages applied to the pixel electrodes DP1U and DP1D are referred to as liquid crystal application voltages VP1U and VP1D, respectively.

The matrix display device 200 is driven by the source line inversion driving method. By the source line inversion driving method, signals of opposite polarities are supplied to adjacent source signal lines, and the polarities of the signals are inverted at every vertical scanning period. For example, the source signal line driver 210 supplies a signal VS1 (first display signal) to the source signal line DS1 and supplies a signal VS2 (second display signal) to the source signal line DS2. The signal VS2 has the opposite polarity as the signal VS1. The polarities of the signals VS1 and VS2 are inverted at every vertical scanning period (predetermined period). The source signal line driver 210 drives the plurality of source signal lines 211 so that a voltage is applied to two adjacent pixel electrodes 230 (FIGS. 13A and 13B) connected to each source signal line 211 having the same polarity. .

A parasitic capacitance CSD1u (first capacitance) is generated between the pixel electrode DP1U and the source signal line DS1, and a parasitic capacitance CSS2u (second capacitance) is formed between the pixel electrode DP1U and the source signal line DS2. Is generated. A parasitic capacitor CSD1d (third capacitor) is generated between the pixel electrode DP1D and the source signal line DS1, and a parasitic capacitor CSD2d is generated between the pixel electrode DP1D and the source signal line DS2. CSD1u> CSD2u and CSD1d <CSD2d. Inhomogeneity of the parasitic capacitance is caused by a stepper process that is executed separately for the upper region and the lower region of the display screen. As a result, the above "block by block luminance difference" occurs. The block-by-block luminance difference occurs when the ratio of CSD1u / CSD2u and the ratio of CSD1d / CSD2d are different, and do not occur only when CSD1u> CSD2u and CSD1d <CSD2d. The block by block luminance difference is erased by the matrix display device 200.

First, the principle of occurrence of non-identity of parasitic capacitance will be described with reference to FIGS. 15A and 15B.

15A shows the structure of the pixel electrode DP1U and its vicinity. The pixel electrode DP1U is an upper region 29 of the display screen illustrated in FIG. 14.

A part of the pixel electrode DP1U overlaps a part of the source signal line DS1 with an insulating layer (not shown) inserted therebetween. This portion of the pixel electrode DP1U is referred to as "overlapped portion 28a". The other part of the pixel electrode DP1U overlaps a part of the source signal line DS2 with an insulating layer (not shown) inserted therebetween. This portion of the pixel electrode DP1U is referred to as "overlapped portion 28b". The parasitic capacitance CSD1u between the pixel electrode DP1U and the source signal line DS1 is determined according to the region of the overlapped portion 28a. The parasitic capacitance CSD2u between the pixel electrode DP1U and the source signal line DS2 is determined according to the region of the overlapped portion 28b. As shown in FIG. 15A, the area of the overlapped portion 28a is larger than the area of the overlapped portion 28b. Therefore, the parasitic capacitances CSD1u and CSD2u satisfy CSD1u> CSd2u.

15B shows the structure of the pixel electrode DP1D and its vicinity. The pixel electrode DP1D is a lower region 30 of the display screen illustrated in FIG. 14.

A part of the pixel electrode DP1D overlaps a part of the source signal line DS1 with an insulating layer (not shown) inserted therebetween. This portion of the pixel electrode DP1D is called " overlapped portion 28c. &Quot; The other part of the pixel electrode DP1D overlaps a part of the source signal line DS2 with an insulating layer (not shown) inserted therebetween. This portion of the pixel electrode DP1D is called " overlapped portion 28d. &Quot; The parasitic capacitance CSD1d between the pixel electrode DP1D and the source signal line DS1 is determined according to the region of the overlapped portion 28c. The parasitic capacitance CSD2d between the pixel electrode DP1D and the source signal line DS2 is determined according to the region of the overlapped portion 28d. As shown in FIG. 15B, the area of the overlapped portion 28c is smaller than the area of the overlapped portion 28d. Therefore, the parasitic capacitances CSD1d and CSD2d satisfy CSD1d < CSd2d.

When the inequality CSD1u> CSd2u and CSD1d <CSd2d are satisfied, the block-by-block luminance difference occurs for the reason described in the stripe arrangement portion of the pixels in the description section of the prior art herein.

The matrix type display device 200 employing a mosaic arrangement of pixels erases the block by block luminance difference according to the following principle with reference to FIG.

In the matrix display device 200, a black display is obtained when the liquid crystal applied voltage is higher than a predetermined voltage (reference voltage) and is obtained when the liquid crystal applied voltage is lower than the reference voltage (normally white mode).

16 illustrates a signal supplied to the source signal lines DS1 and DS2, the pixel electrodes DP1U and DP1D, and the gate signal lines DGU and DGD when a uniform cyan pattern is displayed on the display screen of the matrix display device 200. Is a waveform diagram of.

Since the liquid crystal applied voltage VP1U is CSD1u> CSD2u, it is greatly influenced by the signal VS1 supplied to the source signal line DS1. Since the liquid crystal applied voltage VP1D is CSD1d <CSD2d, it is greatly influenced by the signal VS2 supplied to the source signal line DS2. The luminance of the pixels corresponding to the pixel electrodes DP1U and DP1D changes in accordance with the respective effective values of the liquid crystal applied voltages VP1U and VP1D. As shown in FIG. 16, the effective value of the liquid crystal application voltage VP1D is larger than the effective value of the liquid crystal application voltage VP1U. However, the difference between the effective values of the liquid crystal applied voltages VP1U and VP1D shown in FIG. 16 is the difference between the effective values of the liquid crystal applied voltages VP1U and VP1D obtained in the stripe arrangement (prior art device) of the pixels shown in FIG. 23. Is less than Thus, the difference in luminance between the upper region and the lower region is reduced, and thus the block by block luminance difference is canceled.

The matrix display device 200 employs a mosaic arrangement of pixels. Therefore, the display signals (levels of FIGS. 13A and 13B, that is, the signals VS1 and VS2 of FIG. 16) supplied to the source signal line 211 change with respect to the red pixels, the green pixels, and the blue pixels in all horizontal scanning periods. By providing the display signal to the source signal line in this manner, the influence of the display signal supplied to the source signal line adjacent to the pixel electrode acting according to the effective value of the voltage of the pixel electrode through the parasitic capacitance can be reduced and thus the block by block The luminance difference can be canceled.

In the above description, a uniform cyan pattern is displayed on the display screen of the matrix display device 200. Even when the uniform pattern displayed on the display screen is another color, the erasing effect of the block by block luminance difference is obtained.

In the above description, the matrix display device 200 is driven by the source line inversion driving method (FIG. 1C). The erasing effect of the block-by-block luminance difference is obtained when the matrix display device 200 is driven by the field inversion driving method (Fig. 1A), the gate line inversion driving method (Fig. 1B), or the dot inversion driving method (Fig. 1D). Obtained.

The pixel array pattern is not limited to that shown in FIGS. 13A and 13B. For example, the pattern shown in Figs. 9A and 9B may be used in which pixels of the same color are discontinuous in the oblique direction. In this case, the inconvenience of obstructing the oblique line to be sensed can be eliminated.

The ratio of the length of the y direction: the length of the x direction of each pixel included in the matrix display device 200 is 3: 1 as described in detail with reference to FIGS. 11A and 11B (that is, each pixel in the y direction is "a"). Is a length (y-direction pixel pitch) and " b " This arrangement is the length of the display unit in the x direction; It is advantageous in that the ratio of the length in the y direction is 1: 1, and therefore data can be easily formed by a computer or the like. In this case, each gate signal line is connected to a red pixel electrode, a green pixel electrode, and a blue pixel electrode. The number of red pixel electrodes, the number of green pixel electrodes, and the number of blue pixel electrodes connected to each gate signal line are almost the same.

The matrix display device 200 has a structure shorter than the width of the source signal line so that the distance between two adjacent source signal lines improves the aperture ratio.

As described above, the matrix type display device 200 of Embodiment 2 of the present invention is one of various mosaic arrays of pixels and a field inversion driving method, a gate line inversion driving method, a source line inversion driving method or a dot inversion driving method. By adopting the method, it is possible to cancel the block by block luminance difference.

In the above description, RGB colors are assigned to the pixels. The present invention is applicable when cyan, magneta and yellow are assigned to the pixels.

As described above, the matrix type display device according to the present invention can prevent shadowing by adopting one of various mosaic arrangements of pixels and a source line inversion driving method or a dot inversion driving method.

Shadowing can be prevented even when the distance between two adjacent source signal lines is shorter than the width of the source signal line to improve the aperture ratio.

In addition, the matrix display device according to the present invention employs one of various mosaic arrangements of pixels, and block-by-block luminance by employing a field inversion driving method, a gate line inversion driving method, a source line inversion driving method or a dot inversion driving method. You can eliminate the car.

Various other modifications may be readily made by those skilled in the art without departing from the spirit and scope of the invention. Accordingly, the scope of the appended claims should not be limited to what is described herein, but rather should be construed broadly.

Claims (14)

A plurality of gate signal lines extending in a first direction; A gate signal line driver for driving the plurality of gate signal lines; A plurality of source signal lines extending in a second direction perpendicular to the first direction; A source signal line driver for driving the plurality of source signal lines; And It includes a plurality of pixel electrodes, The plurality of pixel electrodes are respectively connected to one corresponding source signal line among the plurality of source signal lines and one corresponding gate signal line among the plurality of gate signal lines; The plurality of source signal lines are assigned to at least one first pixel electrode assigned to a first color element among the plurality of pixel electrodes, at least one second pixel electrode assigned to a second color element, and a third color element. Connected to each of the at least one third pixel electrode; The source signal line driver supplies a first display signal to a first source signal line among the plurality of source signal lines, and polarizes the first display signal to a second source signal line adjacent to the first source signal line among the plurality of source signal lines. A matrix type display device which supplies the second display signal opposite thereto and inverts the polarity of the first display signal and the polarity of the second display signal every predetermined cycle. The matrix type display device of claim 1, wherein a portion of at least one of the plurality of pixel electrodes overlaps a portion of one of the plurality of source signal lines. The method of claim 2, wherein a distance between all two pixel electrodes adjacent in a first direction of the plurality of pixel electrodes is greater than a width of a source signal line among a plurality of source signal lines disposed between the two pixel electrodes. Short matrix display device. The voltage source driver of claim 1, wherein the voltages applied to two adjacent pixel electrodes of the at least one first pixel electrode, at least one second pixel electrode, and at least one third pixel electrode are of the same polarity. And a matrix type display device for driving the plurality of source signal lines. The voltage source of claim 1, wherein the source signal line driver has different polarities of voltages applied to two adjacent pixel electrodes of the at least one first pixel electrode, at least one second pixel electrode, and at least one third pixel electrode. And a matrix type display device for driving the plurality of source signal lines. The matrix of claim 1, wherein the number of the at least one first pixel electrode, the number of the at least one second pixel electrode, and the number of the at least one third pixel electrode connected to each of the plurality of source signal lines are the same. Type display device. The display device of claim 6, wherein the plurality of gate signal lines comprise at least one first pixel electrode assigned to a first color element among the plurality of pixel electrodes, at least one second pixel electrode assigned to a second color element, and Each connected to at least one third pixel electrode assigned to the third color element; The number of the at least one first pixel electrode, the number of the at least one second pixel electrode, and the number of the at least one third pixel electrode connected to each of the plurality of gate signal lines are equal to each other; A matrix display device in which the pitches of the plurality of pixel electrodes in the first direction are 1/3 of the pitches of the plurality of pixel electrodes in the second direction. The display device of claim 1, wherein the source signal line driver is further configured to provide a first external display signal corresponding to a first color element, a second external display signal corresponding to a second color element, and a third external display signal corresponding to a third color element. Receive; The source signal line driver includes a switch for selecting one of a first external display signal, a second external display signal, and a third external display signal, and drives the plurality of source signal lines in accordance with the selected external display signal. A plurality of gate signal lines extending in a first direction; A gate signal line driver for driving the plurality of gate signal lines; A plurality of source signal lines extending in a second direction perpendicular to the first direction; A source signal line driver for driving the plurality of source signal lines; And It includes a plurality of pixel electrodes, The plurality of pixel electrodes are respectively connected to one corresponding source signal line among the plurality of source signal lines and one corresponding gate signal line among the plurality of gate signal lines; The plurality of source signal lines are assigned to at least one first pixel electrode assigned to a first color element among the plurality of pixel electrodes, at least one second pixel electrode assigned to a second color element, and a third color element. Connected to each of the at least one third pixel electrode; A fourth pixel electrode in which the plurality of pixel electrodes are disposed between a first source signal line among the plurality of source signal lines and a second source signal line adjacent to the first source signal line among the plurality of source signal lines, and the first source A fifth pixel electrode disposed between a signal line and a second source signal line at a position different from that of the fourth pixel electrode; A first capacitor is generated between the fourth pixel electrode and the first source signal line, and a second capacitor is generated between the fourth pixel electrode and the second source signal line, and between the fifth pixel electrode and the first source signal line. A third capacitor is generated, and a fourth capacitor is generated between the fifth pixel electrode and the second source signal line, And a ratio of the first capacitor to the second capacitor is different from a ratio of the third capacitor and the fourth capacitor. 10. The matrix display device of claim 9, wherein a portion of at least one of the plurality of pixel electrodes overlaps a portion of one of the plurality of source signal lines. 12. The method of claim 10, wherein a distance between all two pixel electrodes adjacent in a first direction of the plurality of pixel electrodes is greater than a width of a source signal line among a plurality of source signal lines disposed between the two pixel electrodes. Short matrix display device. 10. The matrix of claim 9, wherein the number of the at least one first pixel electrode, the number of the at least one second pixel electrode, and the number of the at least one third pixel electrode connected to each of the plurality of source signal lines are the same. Type display device. The display device of claim 12, wherein the plurality of gate signal lines comprise at least one first pixel electrode assigned to a first color element among the plurality of pixel electrodes, at least one second pixel electrode assigned to a second color element, and Each connected to at least one third pixel electrode assigned to the third color element; The number of the at least one first pixel electrode, the number of the at least one second pixel electrode, and the number of the at least one third pixel electrode connected to each of the plurality of gate signal lines are equal to each other; A matrix display device in which the pitches of the plurality of pixel electrodes in the first direction are 1/3 of the pitches of the plurality of pixel electrodes in the second direction. 10. The display device of claim 9, wherein the source signal line driver comprises a first external display signal corresponding to a first color element, a second external display signal corresponding to a second color element, and a third external display signal corresponding to a third color element. Receive; The source signal line driver includes a switch for selecting one of a first external display signal, a second external display signal, and a third external display signal, and drives the plurality of source signal lines in accordance with the selected external display signal.