KR100294623B1 - Real time processing device of hdtv audio coder and method thereof - Google Patents

Abstract

The present invention relates to a real-time processing apparatus and a method of an HDTV audio encoder, and in particular, five slave boards (1) for performing subband analysis and psychoacoustic modeling; A master board 2 for channel matrixing, bit allocation, quantization, bit packing, and interface with a PC 5; A backplane board (3) connecting the slave boards (1) and the master board (2) to each other; An interface unit (4) for transmitting data transferred from the master board (2) to a bit string to a personal computer; A personal computer 5 for verifying the performance of the encoding system by decoding the bit stream transmitted to the MPEG standard decoding program; All bit rates, sampling rates and channels are composed of six channels of A / D converters (7) which converts audio signals output from the source (6) into analog 16-bit PCM digital data and transmits them to slave boards (1). It can be combined, supports dynamic transport channel switching and virtual encoding of the central channel, can be processed with only one processor when up-clocked to 50 MHz, and production costs can be reduced by reducing the number of processors used. It is possible to reduce encoding time delay in applications such as HDTV broadcasting, and to utilize it in applications of other processors or ASICs.

Description

Real-time processing device and method of HDTV audio encoder

The present invention relates to a real-time processing apparatus and method of an HDTV audio encoder using a general-purpose DPS, and more particularly, to the real-time processing up to 5.1 channels, 640Kbps at 48KHz sampling rate of MPEG-2 layer 2, all bit rates below , Sampling rate, and channel combination, and dynamic transmission channel switching and phantom coding of the central channel among the composite coding proposed by MPEG-2 as a method for performing multichannel coding more effectively. The speedup and optimization of each subroutine can be done by one processor when up-clocking the slave board execution routine that was processed by two processors to 50MHz. Multi-channel processing can be handled with only two processors using a fast algorithm. The production cost can be reduced by reducing the number of processors used, and the coding delay, which is an important problem in applications such as HDTV broadcasting, can be reduced. Optimized programs can be developed using other general-purpose DSP processors. It is invented so that it can be used for applications such as ASIC.

In general, the advantages of digital audio over analog audio are that the bandwidth and dynamic range are wide and there is no sound quality damage when copying.

Such digital audio technology is currently being applied to storage media such as compact disk (CD), mini disk (MD), digital compact cassette (DCC), compact disk-interactive (CD-I), and direct broadcasting satellite. It is also used for digital broadcasting through) and upcoming High Definition TeleVision (HDTV) broadcasting.

However, in order to reduce problems in transmission and storage, signal compression is inevitable, and an effective compression technique must be used in which the compressed and encoded audio signal is maintained to have almost the same subjective sound quality after decoding.

As a countermeasure, the Moving Picture Experts Group (MPEG) under the International Standard Organization (ISO) is applicable to broadcast media such as digital HDTV, and can be used for additional services such as multi-channel and voice multiplexing. In 1994, the MPEG-2 standard ISO / IEC 13818-3, capable of compressing CD-level digital audio at a bit rate of 6 to 40 Mbit / s, was added in order to handle more than 5 channels of audio. In November, it was decided that it was the final international standard and in February, 1997, a new standard was clearly defined which was unclear.

In order to preoccupy this technology, countries around the world are researching high-speed algorithms and single-chip manufacturing technologies. Actively developed, such as a decoder that is expected a lot of demand and a relatively small amount of calculation is manufactured on a single chip, but development is delayed in the case of encoders with limited demand, such as broadcasting stations, recording studios.

However, in order to actually use the MPEG-2 algorithm in a broadcast or multimedia system, an encoding and decoding system capable of real time processing is required, and implementing a coder having a large amount of computation in real time has been the biggest problem.

The present invention has been made to solve the above-mentioned problems, and it is possible to process up to 5.1 channels and 640Kbps in real time at 48KHz sampling rate of MPEG-2 layer 2, and all bit rates, sampling rates, and channel combinations below are possible. In addition, it can support dynamic transmission channel switching and virtual encoding of the central channel.It can be processed by only one processor when up-clocking to 50MHz. By applying the algorithm to process with only two processors, the production cost can be reduced by reducing the processor used, and the coding time delay, which is an important problem in applications such as HDTV broadcasting, can be reduced, as well as other processors or ASICs. A real-time processing device and method for HDTV audio encoder that can be used for application I want to give.

The object of the present invention, the five slave boards for receiving subchannel analysis and psychoacoustic modeling by receiving the respective channel audio data; A master board for channel matrixing, bit allocation, quantization, bit packing, and interface with a PC; A back plane board connecting the slave boards and the master board to each other; An interface unit for transferring data transmitted from the master board to a bit string to a personal computer; A personal computer (PC) for verifying the performance of the encoding system by decoding the bit stream transmitted to the MPEG standard decoding program; It consists of a 6-channel A / D converter that converts analog audio signals from sources such as a CD player or digital audio tape (DAT) into 16-bit PCM digital data and transmits them to the slave boards. Processing audio data in a parallel structure; Speeding up the computation by performing subband analysis with the FAST DCT algorithm; Exchanging data using dual port RAM between slave boards; Transferring the result of each slave board to the master through the dual port RAM; Master board hardware handing over data from slave board and processing it comprehensively; Significantly reducing the amount of computation using an efficient algorithm in allocating bits in the master board hardware; This can be achieved by finally performing the steps through the interface with the PC.

Therefore, it can process up to 5.1 channels and 640Kbps in real time at the 48KHz sampling rate of MPEG-2 Layer 2, enabling all bit rates, sampling rates, and channel combinations below it, and supporting dynamic transmission channel switching and virtual encoding of the central channel. It is possible to process only one processor when up-clocking to 50MHz, and multi-channel processing of the master board that can be processed in real time only with 4 processors is possible because it can be processed with only two processors by applying a high-speed algorithm. By reducing the number of processors, production costs can be reduced, and coding time delay, which is an important problem in applications such as HDTV broadcasting, can be reduced, and other processors or ASICs can be utilized.

Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the accompanying drawings.

1 is an overall block diagram of an apparatus of the present invention

Figure 2 is a block diagram of a slave board of the present invention device

3 is a detailed circuit diagram illustrating a data transfer state between two processors;

Figure 4 is a ready signal generating circuit diagram for adjusting the data transfer time of the present invention device

Figure 5 is a detailed block diagram of a master board of the present invention device

6 is a structural diagram illustrating data exchange between a master and a slave

7 is a circuit diagram illustrating data transfer between a master board and a PC.

8 is a task allocation algorithm of the encoding process by the present invention device

9 is a flowchart illustrating a synchronization process through interrupts between processors.

FIG. 10 is a program flowchart executed by processor-a in the slave board of FIG.

FIG. 11 is a block diagram of a matrix operation in FIG. 10.

12 is a block diagram of the input vector transform of FIG.

FIG. 13 is a program flowchart executed by processor-b in the slave board of FIG.

FIG. 14 is a program flowchart executed by processor-a in the master board of FIG.

15 is a buffer structure used in the apparatus of the present invention

FIG. 16 is a program flowchart executed by processor-b in the master board of FIG.

FIG. 17 is a graph illustrating the average distribution of bit allocation indexes for each sound source used as an experimental object in the present invention

18 is a prior bit allocation distribution diagram at 48 KHz, 128 Kbps.

19 to 23 are data showing the results of experiments using the present invention.

19 is a representative bit allocation MNR curve

20 is a diagram of MNR curve change according to pre-allocation (in case of electronic guitar)

21 is a diagram of MNR curve change according to pre-allocation (first frame)

22 is a diagram of MNR curve change according to pre-allocation (in case of violin)

23 is a change in the final MNR curve according to the bit rate

Explanation of symbols for main parts in the drawings

1: slave board 2: master board

3: backplane board 4: interface unit

5: personal computer 6: source

7: A / D converter

1 is a block diagram showing the overall block diagram of the apparatus of the present invention, Figure 2 is a block diagram of a slave board of the device of the present invention, Figure 3 shows a detailed circuit diagram showing a data transfer state between two processors, 4 shows a ready signal generating circuit diagram for adjusting the data transfer time of the device of the present invention, Figure 5 shows a detailed block diagram of a master board of the device of the present invention.

FIG. 6 is a structural diagram illustrating data exchange between a master and a slave, FIG. 7 is a circuit diagram of a data transfer circuit between a master board and a PC, and FIG. 8 is a work allocation algorithm of an encoding process through the apparatus of the present invention. 9 is a flowchart illustrating a synchronization process through interrupts between processors. FIG. 10 is a flowchart illustrating a program performed by processor-a in a slave board of FIG. 9. FIG. 11 is a flowchart illustrating a matrix operation of FIG. 10. Shows a block diagram.

FIG. 12 illustrates a block diagram of the input vector conversion of FIG. 11, FIG. 13 illustrates a program flowchart performed by the processor-b in the slave board of FIG. 9, and FIG. 14 illustrates the processor-in the master board of FIG. 9. FIG. 15 shows a program flowchart executed in a, FIG. 15 shows a buffer structure used in the apparatus of the present invention, FIG. 16 shows a program flowchart executed in the processor-b in the master board of FIG. 9, and FIG. FIG. 18 shows the average distribution of the bit allocation index for each sound source used in the present invention, and FIG. 18 shows the distribution of the prior bit allocation at 48 KHz and 128 Kbps.

19 to 23 are data showing the results of experiments using the present invention. FIG. 19 is a representative MNR curve before bit allocation, and FIG. 20 is a change diagram of the MNR curve according to pre-allocation (in the case of electronic guitar). 21 is an MNR curve change diagram (first plane) according to a pre-allocation, FIG. 22 is an MNR curve change diagram (in the case of a violin) according to a pre-assignment, and FIG. 23 is a final MNR curve change diagram according to a bit rate.

According to this, five slave boards 1 for receiving subchannel analysis and psychoacoustic modeling by receiving respective channel audio data;

A master board 2 for channel matrixing, bit allocation, quantization, bit packing, and interface with a PC 5;

A backplane board (3) connecting the slave boards (1) and the master board (2) to each other;

An interface unit (4) for transmitting data transferred from the master board (2) to a bit string to a personal computer;

A personal computer 5 for verifying the performance of the encoding system by decoding the bit stream transmitted to the MPEG standard decoding program;

It is composed of six channels of A / D converters (7) for converting audio signals output analog from a source (6) such as a CD player or a DAT to digital data of 16-bit PCM and transmitting them to the slave boards (1). It is a basic feature.

At this time, the slave boards 1, which are in charge of subband analysis and psychoacoustic model processing of one channel, use two processors-a, b (11) (12) called TMS320C30 as products of a specific company, and the subbands The master board, which handles bit allocation, quantization, and bit string formatting that binds and processes data from each channel after analysis and psychoacoustic model analysis, consists of one processor.

In addition, the system implemented in the present invention uses two processors in the master board (2) to perform the extended role of multi-channel processing, and at the same time not only the existing 33 MHz processor but also up to 50 MHz processor to expand the computational processing capability. It was also configured in consideration of use.

One additional processor is dedicated to the multi-channel bit allocation process. Several high-speed algorithms are applied to enable multi-channel encoding at high bit rates in the configured system, and execution time for each subroutine is optimized through memory allocation and iterative loops. The coding delay is minimized through proper work sharing and synchronization between the processors.

In addition, since there is a six-channel A / D converter 7 between the source 6 and the slave board 1, the input source 6 may be a phone output of a CD player or a digital audio tape (DAT). It is also possible to connect five microphones via an amplifier and directly input five channels of data.

At this time, some errors may occur due to the accuracy of the D / A output from the CD player or the DAT and the A / D converter 7, but it has been found experimentally that these errors can be almost ignored.

The 16-bit PCM sample converted as described above is stored and encoded in a memory using a serial port built into the processors of the slave boards 1, and as shown in FIG. 2, each processor in the slave boards 1 is counted. Two dual-port RAMs 13 are used to exchange data with each other and then perform respective routines.

In addition, the master board 2 receives the processed data from each slave board 1 using dual port RAM and performs bit allocation, quantization, and bit string formatting.

The final processed bit stream is transferred from the master board (2) to the PC (5) using the timer and serial port built into the processor, and from the PC (5) to the serial-to-parallel converter. Using the converter and direct memory access (DMA), the transferred bit stream is stored on the hard disk.

Stored data can be sent to a multi-channel D / A converter to play back the user's desired channel configuration to evaluate sound quality and to send it to a system for integration with video bitstreams.

The slave board 1 may be divided into five parts as shown in FIG. 2.

The first is the two processor-a, b (11) (12) sections, the second is the dual port RAM 13 section for transferring information between processors, and the third is the memory required for each processor to store programs or results. (14), the fourth is the dual port RAM 15 for data transfer between the slave board (1) and the master board (2), and the fifth is the decoding circuit part for changing the number of weights by decoding the memory address.

Since the MPEG-2 Layer 2 algorithm performs encoding using 1152 samples in one frame unit, encoding of the current frame must end between receiving the next frame 1152 samples (= 1152 / 44.1KHz = 26.1 msec). Since a large amount of computation is required in the psychoacoustic portion, one processor that receives a clock signal from the 33 MHz clock circuit 25 makes it difficult to process in real time.

Therefore, for real-time processing, a parallel processing technique in which two processors are used per channel and each processor operates simultaneously while pipelined processing must be used.

Among the results processed by the processor-a (11), the data necessary for the psychoacoustic modeling in the processor-b (12) are the maximum scale factor value and the power spectrum obtained through the FFT. The shared dual port RAM 13 between the slave processors a, b (11) 12 is used for transmission.

The dual port RAM 15 is used to exchange data between two processors in the slave board 1 and transfer information between the master and slave boards.

As shown in FIG. 2, dual port RAMs 13 are connected between fully symmetrical structures to facilitate information transfer between two processors, and one side of the dual port RAM 15 allocated to each processor is connected to the backplane. Back plane) (16) is used to transfer information with the master board (2).

The dual port RAMs 13 and 15 used have speeds that allow zero-weight access, making them suitable for real-time processing, and have a built-in BUSY pin to prevent collisions that can occur when accessing memory from both sides. Effective information transfer is possible.

In addition, it has an interrupt line for bidirectional communication, so if a system connected to one side writes data to a fixed address (7ffh on the left and 7feh on the right), the system automatically connects to the other system and the interrupt is automatically requested. It is easy to match the overall motivation of.

By using dual-port RAM, every processor can perform a given task and easily send and receive results, just like a system with only the memory allocated to it, without knowing the presence of other processors.

3 shows that two processors a, b (11) 12 use dual port RAM 13 to exchange data and generate an interrupt.

Each processor-a, b (11) 12 has an independent local memory and a ROM memory 14 of the same size as a RAM of 32K words.

The ROM memory 14 stores program codes necessary for the slave board 1, various tables, and programs for transferring these to the RAM to enable stand-alone system operation. Save the operation result of the step.

A fast ROM can be used to configure a standalone system, but the easy-to-use and inexpensive low-speed ROM facilitates system configuration by transferring all program code and data needed for encoding to fast RAM after reset.

GAL22V10 was used as the address decoding device.

It can use up to 12 inputs and 10 outputs, so it is suitable for decoding various control signals required for all memories in the slave board 1, and has a transfer delay of up to 7 nsec to access RAM in the circuit as zero weight. Is appropriate.

After all programs are completed, the interrupt vector table is constructed by using ROM. Since the speed of ROM is inaccessible to zero weight, the number of weights should be changed every time the ROM is accessed after an interrupt occurs.

This change in the number of weights cannot be handled by the software weight control function in the processor. This is because, when an interrupt occurs, the processor jumps to the interrupt address by referring to the interrupt vector table inside the processor.

Therefore, in order to perform such a task, the weight must be generated in hardware to automatically change the number of weights in RAM and ROM.

The processor has an RDY signal (Ready) that allows the number of weights to be changed in hardware.

Since RAM is accessible with zero weights, a circuit that increases the number of weights only when an address in the region where the ROM is located can be designed and input into the RDY signal to automatically adjust the number of weights.

Figure 4 shows such a ready signal generation circuit, where the number of weights can be adjusted by selecting one of the outputs of several flip-flops.

In addition, FIG. 5 shows an improved configuration of the master board 2. The master board 2 performing bit allocation, quantization, and bit string formatting on a maximum of five channels includes two processors-a, b ( 21) (22), dual port RAM 27, 96K ROM 23 and 64K RAM 24, clock circuits 25 and 26, and address decoding circuits for exchanging data between two processors as the slave board structure. It is connected to the dual port RAM of each slave board 1 through the backplane connector for data exchange with the slave board 1 (Fig. 6).

One processor has been added compared to the previous master board and logic 28 has been added to accept user requirements from the PC 5.

In addition, in order to build a stand-alone system, the size of ROM and RAM has been increased, and the processor to be mounted on the master board 2 has a speed of up to 50 MHz from a processor having a speed of up to 50 MHz. Dual clock circuits (25 and 26) have been added to support up to 33 MHz processors.

As a result of performing bit allocation, quantization, and bit string formatting on the channel based on 96Kbps bit rate in the existing master board, the execution time was about 12msec.

In the multi-channel processing, since the master board 2 must perform work on data of all channels, the execution time also increases in proportion to the number of channels.

It is concluded that it takes about 60msec by simply predicting the execution time for 5 channel data with 96Kbps bit rate per channel.

When the sampling frequency is 48KHz, one frame section is 24msec, so the real-time processing of multiple channels is not possible with the existing master board having one processor.

Therefore, since the improved master board 2 has two processors, if each processor is in charge of a routine of 24 msec, it can be said that up to 48 msec of real time processing is possible.

In addition, the replacement of the 50MHz processor will be completed within 33/50 of the existing 33MHz processor for the same amount of processing.

In other words, the calculation of the amount of 60 msec in the 33 MHz processor can be processed in about 39.6 msec.

Therefore, the numerical analysis that one channel is capable of real-time processing for five-channel input of 96 Kbps is available. After that, it is possible to process multi-channel data of higher bit rate through software performance improvement such as improvement of bit allocation process.

Since the master board 2 must process the results of up to five slave boards 1 together, it should be possible to exchange information with all slave boards 1.

Since the master board 2 is connected to the dual port RAM of each slave board 1 through the backplane 16, the slave board using the dual port RAM in each slave board as its local memory as shown in FIG. Exchange information with

Due to the influence of the dual port RAM connecting the master board 2 and the slave board 1, the master board 2 may operate as an independent system without recognizing the existence of the slave board 1.

In addition, in order to implement the MPEG-2 encoding algorithm, all systems must have the same synchronization signal, so that the reset circuit and the clock circuit in the master board 2 are connected to each slave board through the backplane 16.

The processor's serial port is connected to the IBM-PC's serial-to-parallel converter via the backplane 16 for final bitstream transmission, and another serial port to another interface circuit on the PC to accept user specifications. It is.

FIG. 7 shows the connection between the processor-b 22 and the interface board 4 and the PC 5 in the master board 2.

The serial port and timer inside the processor allow data transfers of up to approximately 8Mbps.

The master board 2 continuously receives data from the slave board 1 at regular time intervals in units of frames and processes necessary routines up to bit string formatting.

After bit string packing, the final bit string stored in the local RAM is transmitted to the PC 5 every frame.

The 50 MHz system clock input from the 50 MHz clock circuit 26 was divided into 16 by software to make 3.125 MHz, which was then used as a transmission clock for serial data transfer from the processor to the PC.

In addition, a frame synchronization signal indicating a 16-bit transmission was generated using a timer inside the processor. At the same time, this signal was transmitted to a PC, which was used by the PC to store data on the hard drive.

Therefore, the processor sends DX0, a serial data pin, FSX0 for transmitting data to the PC in 16-bit units, and CLKX0, a transmission clock, to the PC.

In the bit string receiving circuit in the interface board mounted in the SLOT (device for expanding the parallel port) of the PC 5, two 8-bit serial-to-parallel converters are sequentially connected to convert serially transmitted data into 16-bit data. do.

The FSX0 signal, which indicates that 16-bit data has been input, is used as the DMA request signal of the PC, and the converted 16-bit data is stored in the memory. Therefore, the processor makes a DMA request to the PC whenever 16-bit data is transmitted. In addition, the PC obtains 16-bit data transmitted only during the moment when a DACK (DMA Acknowledge) signal is generated and stores it in the hard disk.

Note that if you connect a decoder instead of a PC, you can apply the entire system without the serial-to-parallel converter.

The important point in configuring the software of MPEG-2 real time encoder is to support the best sound quality, high bit rate and various options under the performance of the implemented hardware.

For this purpose, it is necessary to apply a fast algorithm suitable for real-time implementation in each processing step, optimize each subroutine, and perform appropriate task sharing among processors based on their execution time.

The existing encoder consists of a slave board with two processors and a master board with one processor.

Since the routines processed by the slave board 1 can be processed independently for each channel, there is no separate burden due to multi-channel expansion, but the subroutines processed by the master board 2 exceed the execution time due to channel expansion. Problems have arisen.

In order to expand the role of the master board 2 due to the multi-channel expansion, one processor was reinforced as described above, but the computational power was still insufficient to support a high bit rate to obtain a sufficiently good sound quality.

As illustrated in FIG. 8, the MPEG-2 audio encoding algorithm implemented in the present invention can be roughly divided into tasks performed on the slave board 1 and tasks performed on the master board 2.

Task assignment is made depending on whether each subroutine can be processed independently for each channel, or whether all the channels should be processed together. It must be dealt with in (2).

The bit allocation process and the bit string formatting process must be carried out by the master board (2) because all channel information must be included together, and the subband analysis process or psychoacoustic model can directly obtain the results from the input samples of each channel. Therefore, the slave board 1 can process it.

When a task that can be processed in the slave board 1 is brought to the master board 2, the master board 2 needs to process up to 5 channel data sequentially, so that the calculation time is extended by five times or more and the workload is burdened. .

Therefore, the slave board 1 should process all possible tasks so that only the minimum result required for transmission is passed to the master board 2.

The master board (2) must process the bit allocation process, the quantization processed by the bit allocation information, and the bit string formatting process for transmission, which must have the psychoacoustic model results (SMR) of all channels. As the allocation process increases in number as the number of channels increases, the real time processing is impossible even if two processors are used in the master board 2.

In order to handle this efficiently, a pre-allocation algorithm is proposed and applied.

Table 1 shows the results of measuring the actual execution time of the bit allocation process by varying the number of channels.

Execution Time of Bit Allocation Process Execution time msec load 1 channel, 96 Kbps 2.1 8.8% 2 channels, 192 Kbps 10.3 42.9% 4 channels, 384 Kbps 41.7 173.7% 5 channels, 640 Kbps 62.5 260.0%

1. Assign and synchronize tasks between processors

The most desirable direction when allocating processor tasks for multi-channel processing is to finish the maximum possible tasks on the slave board 1 and to collect all the channel-specific data in the master board 2 so as to pack only the frame format.

However, in the bit allocation process, since the SMRs of all channels are compared and processed together, the master board 2 has no choice but to process them.

Quantization, which is performed differentially on subband samples according to the bit allocation result, can be performed independently for each channel, but is synchronized between the master board 2 and the slave board 1 due to the bit allocation process whose execution time is not constant. synchronization was difficult, and the master board 2 processed it.

When the quantization is performed in the master board 2, since the parallel processing is not performed and all of the 5 channels must be sequentially performed, the execution time of the master board 2 requires 5 times longer than that in the slave board 1.

FIG. 9 is a flowchart illustrating a synchronization process through interrupts between tasks allocated to each processor and processors based on the task assignment of FIG. 8.

From the input sample buffer to the slave DSP processor-b (12) is shown for one channel, and the processing of the master board (2) is shown for five channels.

At this time, the size of each region roughly represents the execution time.

Slave board 1 The processing up to DSP processor-b 12 is processed in parallel in the same way for each input sample on five slave boards 1.

The arrows in the figure indicate that the execution of each subroutine is completed and an interrupt is generated while passing data required for the next process to another processor through the dual port RAM.

While processing one frame, the input buffers are switched using two to receive new incoming samples. If each processor's subroutine processing does not finish before all 1152 next frame samples are received, a real-time processing failure occurs.

Sequentially, one frame processing procedure is performed first in the processor-a 11 in the slave board 1 which receives the input sample to use the FFT for the psychoacoustic model. Subsequently, the subband analysis filter bank process and scale factor coding, which can be started after all 1152 samples are input, are performed in the processor-a 11 in the slave board 1.

Since the psychoacoustic model of the processor-b 12 in the slave board 1 can be started only when the results up to the sound pressure for each subband obtained from the subband samples can be started, the processor-a (in the slave board 1) can be started. After all the frame work of 11) is finished, the processor-b 12 in the slave board 1 is interrupted.

Processor-a 11 in slave board 1 performs FFT and subband analysis on the second frame while processor-b 12 in slave board 1 performs the psychoacoustic model for the first frame. Done.

At this time, the master board 2 is in a standby state because the SMR, which is the result of the psychoacoustic model, can be started to allocate bits.

If the psycho-acoustic model is interrupted from the processor-b (12) in the slave board 1 to the master board 2 immediately after the psycho-acoustic model is finished, the execution time of the psychoacoustic model of each channel is not the same (varies greatly up to 5 msec). As a result, incorrect SMR data may be imported.

In order to prevent this problem, as shown in FIG. 9, the master board 2 is interrupted at the same time as the psychoacoustic model start timing of the second frame where all the psychoacoustic modeling must be completed, so that the bit allocation for the first frame can be started. Was used.

In this case, the second subband analysis is completed before processor-a (11) in the slave board (1) passes the subband samples of the first frame to the master board (2) so that the first subband samples can be preserved. A separate action was taken.

Since dual-port RAM with processors a, b (11) 12 in the slave board 1 is connected to processor a (21) in the master board 2, all data is transferred to the processor- in the master board (2). is received at a (21).

Master board 2 that has received subband samples, scale factor index, scale factor selection information, and SMR from processor-b 12 in slave board 1 from processor-a 11 in slave board 1 of each channel. The processor-a 21 in the N-th hand passes the SMR and scale factor selection information to the processor-b 22 in the master board 2 dedicated to bit allocation and enters the standby state until the next frame.

When the result data of each slave board 1 for the second frame comes in, the data necessary for bit allocation is passed to the processor-b 22 in the master board 2, and the quantization and bit string formatting processes for the first frame are performed. Will perform.

As such, after the data of the second frame comes in, the processor-a 21 in the master board 2 performing the first frame should have two data buffers.

If you do bit assignment as a predecessor in processor-a (21) in master board (2) and quantize and pack in processor-b (22) in master board (2), subband samples and scale factor indexes for 5 channels The above method was taken because it suffered time loss (about 1.6 msec) along with the hassle of passing the back through the dual port RAM.

The bit allocation process performed by the processor-b 21 in the master board 2 has a different execution time depending on the shape of the SMR curve.

When the processor-b (21) in the master board (2) is finished, an interrupt is generated to the processor-a (21) in the master board (2). At this time, depending on the frame, the processor-a (21) in the master board (2). In some cases, a PC transmission interrupt may conflict with an interrupt indicating a bit allocation result.

If an interrupt collision occurs, the transmission is not properly performed only for the frame, and thus a phenomenon that is not decoded occurs. To avoid this problem, interrupts from other processors must be interrupted while transferring the bit stream from processor-a 21 in the master board 2 to the PC.

2. Routines processed by processor-a in slave board

Designed for parallel processing with two processors, the slave board (1) is responsible for subband analysis, scale factor coding, and psychoacoustic modeling for one channel input.

Table 2 shows the execution time of the subroutines processed in the slave board 1 measured for the task assignment.

'Load' is a relative ratio of 24msec, which is the length of one frame (1152sample) interval, when the sampling frequency is 48KHz.

Real-time processing requires that the current frame be processed before all the next frame input comes in, so if one processor's load exceeds 100%, real-time processing is impossible.

Since the total load of the routine handled by the slave board 1 is 166.7%, if the task is properly allocated to the two processors, real time processing is possible.

Execution Time of Slave Board Processing Routines Execution time Processing CPU msec load Subband analysis 10.86 45.3% a Scale factor coating 2.18 9.1% a FFT & Power Spectrum 3.95 16.5% a Psychoacoustic model 17-23 95.8% b

Psychoacoustic models that require the most execution time can be performed only after the power spectrum obtained from the FFT result and the scale factor obtained through the subband analysis are performed.

In consideration of this point, the processor-b 12 in the slave board 1 is allocated to perform only the psychoacoustic model, and the remaining subroutines are allocated to the processor-a 11 in the slave board 1.

Since both the subband analysis process and the scale factor coding must be completed before the psychoacoustic model process of the processor-b 12 in the slave board 1 can be started, the subroutine of the processor-a 11 in the slave board 1 can be started. The subband analysis process with the highest load will also directly affect the overall coding delay.

Processor-a (11) in the slave board (1) receives input PCM samples for each channel and performs 1024-point FFT, subband analysis filter bank, scale factor calculation and coding for psychoacoustic model, wherein the slave A flowchart of the routine performed by processor-a in board 1 is shown in FIG.

In other words, when the serial port is set after the processor and the memory are initialized, input samples are received. The processor-a (11) in the slave board 1 needs to continuously receive input samples during each routine. There should be a separate interrupt routine for incoming input once every 44.1kHz.

Interrupt routines that take input samples must minimize the execution time as well as the registers used.

The register used in the interrupt routine must be programmed in consideration that it cannot be used by other routines on processor-a (11) in the slave board (1).

When 576 input samples come in, a 1024 point FFT is performed first by adding 448 samples of past frames. For synchronization with the master board processor, subband samples, scale factor indices, and scale factor selection information for previous frames are stored in local RAM and moved to dual port RAM after the FFT routine for the current frame.

Subsequently, when the input of 1152 samples of one frame size is all received, the subband analysis filter bank process is performed, wherein the subband analysis filter bank process is performed for the total amount allocated to processor-a (11) in the slave board (1). It takes 10.86msec, which takes up 64%, which accounts for 45.3% of the load for 24msec, the time to finish processing one frame.

In addition, since the psychoacoustic model and subsequent routines can be processed only when the subband analysis process is completed, it directly affects the overall time delay of encoding. In this implementation, a 32-64 inverse discrete cosine transform (IDCT) algorithm can be used to speed-up the 32 × 64 matrix operation included in such a long subband analysis process.

The scale factor is obtained from the subband sample after the filterbank analysis and coded, and the scale factor selection information is also found.

In addition, in order to reduce the processing time in the master board 2, even the scaling of subband samples is processed by the processor-a 11 in the slave board 1.

After the process up to this point, interrupts the processor-b 12 in the slave board 1 and the processor-a 21 in the master board 2 so that the necessary data can be taken and processed later. .

Processor-a 11 in slave board 1 again waits for all input samples to be filled for FFT processing for the next frame.

Next, the fast subband analysis algorithm will be described.

The subband analysis filter bank process of MPEG divides blocks by 32 sample units for 1 frame input 1152 samples to form an input vector composed of 72 elements by overlapping addition and inputs the subband analysis filter into 32 subband analysis filters. One subsample is obtained for each subband.

If the above process is performed 36 times, the analysis of one frame 1152 samples (= 32x36) is completed.

In order to perform subband analysis, it is required to go through a 32x64 analysis matrix as shown in FIG. 11, and an analysis matrix requiring multiplication and addition operation of 32x64 = 2048 in a routine that needs to be repeated 36 times for one frame processing is large in processing time. It is a burden.

Even if you use a processor DSP chip that can process multiplication and addition in one instruction cycle, the theoretical calculation time for the analysis matrix operation 2048 × 36 = 73728cycle ≒ 4.42msec You will get caught.

In this case, the elements M [i, k] of the analysis matrix of FIG. 11 have a form similar to the kernel of the Discrete Cosine Transform (DCT), together with the symmetry of the cosine function. By transforming to 32-point IDCT, we can use various fast DCT operations.

12 illustrates a process of transforming an input vector. In the fast IDCT algorithm, the DCT kernel uses a fast fourier transform (FFT) based on the similarity to the real part of the discrete fourier transform (DFT) kernel, and the development process of the FFT. Similarly, it can be broadly divided into a method of implementing a butterfly structure using a decimation on a time axis or a frequency axis.

As DCT's usage area expands, various algorithms have been developed that can perform the conversion quickly. Among them, the most suitable method to implement on the fabricated hardware is experimentally confirmed using Lee's high-speed IDCT algorithm.

When implementing algorithms with real hardware and assemblers, the number of operations is not the fastest because the number of operations related to multiplication and addition as well as the difficulty of preprocessing and postprocessing, pipeline structure, etc. are considered. none.

Lee's high-speed IDCT has no preprocessing compared to other high-speed IDCTs and only requires inputs to be in bitreverse order. Most general-purpose DSP chips have an addressing mode that makes it easy to implement them, and FFT also uses other FFT methods. Because it requires bitreverse process, it cannot be considered as additional burden.

However, the problem with Lee's high-speed IDCT is that the butterfly structure is rather complicated and the output also requires many data pointers for proper conversion, not the normal order.

3. Routines handled by processor-b in slave boards (psychological model)

13 is a flowchart of a routine performed by the processor-b in the slave board 1 dedicated to the psychoacoustic model process for finding the SMR value for each subband.

In other words, if the interrupt from the processor-a (11) in the slave board (1) enters the standby state after initializing the processor and memory, the FFT result power spectrum and the maximum scale factor value for each subband are received from the dual port RAM. Store in local RAM. Each subroutine will be processed in the order shown in the flowchart below.

In the psychoacoustic model process, the task of calculating the total masking curve takes up most of the execution time.In order to find the total masking curve, the process of exponentially calculating the individual masking curves expressed as log values and converting them back to log values This causes a demand for execution time.

Since the processor, which is a general-purpose DSP chip, does not have a separate operator capable of performing log and exponential operations, the log and exponential operations require a lot of execution time because each operation must be replaced with a Taylor series.

As a technique for quickly performing log operations when designing a DSP chip or ASIC core, various methods such as creating a log table in advance and replacing them and finding them using a convergence condition of a sequence are introduced.

They perform faster than using Taylor series, but they are less accurate and therefore suitable for fixed-point arithmetic, etc., but are not suitable for use with this encoder, which uses a floating-point arithmetic processor for high sound quality.

In order to reduce the execution time of the logarithmic and exponential calculations implemented in the present invention, the order of the Taylor series is minimized in the range where no error occurs in comparison with the results obtained on the PC. By absorbing the operation process processed by the subroutine into the program, it eliminates unnecessary initialization process and waste of time by 'CALL' (4 cycle) and 'RETURN' (4 cycle) instructions and optimizes the use of program cache memory. Further shortened.

4. Routines Performed on Processor-a in the Master Board

The master board 2 receives subband samples, scale factor indexes, scale factor selection information, and signal-to-mask ratio (SMR), which is a psychoacoustic modeling result, from each channel slave board 1, and allocates bits for each subband. After quantizing the subband samples based on the bit allocation information, a bit string is formatted and transmitted.

Unlike the subroutines in the slave board 1 performed for each channel, the subroutines processed by the master board 2 must process information of all channels together. Therefore, as the number of encoded channels increases, the processing time increases accordingly. When the number is higher, the processing time increases even if the bit rate is increased.

Receives the processed data from the slave board 1 for each channel, passes the SMR value to the processor-b 22 in the master board 2 dedicated to bit allocation, and takes charge of quantization and bit string formatting from the bit assigned result. The flowchart of the processor-a 21 in the master board 2 is shown in FIG.

In other words, after initializing the processor, it waits for an interrupt from the slave board 1, and in this case, the interrupt can be received from only one slave board 1 due to the hardware structure.

Therefore, it is designed to receive an interrupt at the start of the psychoacoustic model of the next frame as shown in FIG.

Upon receiving the interrupt, the SMR value and SCFSI, which are the psychoacoustic model results of each channel, are transmitted to the processor-b 22 in the master board 2 and other data are transferred to the local RAM.

At this time, the bit allocation process dedicated to the processor-b 22 in the master board 2 is the biggest obstacle to multi-channel processing with a large amount of computation.

The basic algorithm is that the bit allocation process finds the minimum value of the MNRs of each subband and raises the bit allocation index by one step. Since the quantization steps are defined differently according to subbands, different tables must be referred to.

In the assembler, since a memory array of two or more dimensions is impossible, the memory pointer cannot have both channel information and subband information necessary for referencing the bit allocation table.

In order to efficiently find the minimum MNR value in each channel subband and refer to the bit allocation table for the subband in the one-dimensional memory array, as shown in FIG. When the SMR of a channel is taken from processor-b 12 in board 1 and transferred to processor-b 22 in master board 2, the processor-b 22 in master board 2 is transferred in the order of FIG. It must be stored in local RAM.

In the case of the processor-a 21 in the master board 2, a buffer of each data is configured in a manner that is advantageous for the final bit string packing.

In case of 5 channels, MPEG-1 compatible 2 channels (Lo, Ro) are alternately packed in subband order, and the remaining 3 channels (C, LS, RS) are also mixed in order and packed. When moving subband samples, scale factor indexes, and scale factor selection information to local RAM, it is advantageous to configure the buffers in the order that they will be packed by MPEG-1 compatible 2-channel and extended 3-channel.

In addition, if the bit allocation index obtained from the processor-b 22 in the master board 2 is stored in the same manner, the quantization process is not performed five times for five channels in turn, but the number of subbands is increased to increase two and three channels. You only need to do this once for your channel.

In addition, since the data obtained from the slave board 1 will be used in the next frame, the memory of the processor-a 21 in the master board 2 should be divided into two buffers to switch pointers.

After the quantization and grouping operations are completed, the bit string packing operation is performed.

The bit stream of MPEG-2 can be divided into an MPEG-1 compatible bit string starting with a 32-bit header and an extension bit string starting with a 40-bit header.

If the bit rate does not exceed 384 Kbps, the extended bit string is not used because it can be accommodated in the MPEG-1 compatible bit string.

The bit stream generated by the encoder is cut into 16 bit units and stored in RAM for transmission to the PC or other transmission channel.

In consideration of the fact that the storage unit is 16 bits in the bit string packing process, the proper use of the 'OR' instruction can improve the execution time.

The extended bit string cannot be determined before the CRC search range of the extended bit string header because the range is known only after one frame format is packed in units of 16 bits. Therefore, the extended bit string is not formatted separately, but after the entire bit string formatting except for the extended bit string header is completed, the extended bit string header is added after the MPEG-1 compatible frame size is transmitted. Take the way.

In the practical application of the CRC routine, the bit string corresponding to the search range is sequentially searched after the remaining bit string is completely packed except for the position of the 16-bit CRC code, and the generated CRC-16 code is inserted into the bit string.

Once the formatting is completed, the bit stream can be transferred to a PC or other system using the serial port. In the serial transmission process, it is necessary to block any external interrupt to prevent bit string error.

After the transfer is finished, the bit allocation result value to be used in the next frame is received from the processor-b 22 in the master board 2, and it is rearranged in the local RAM for formatting.

5. Routines (bit assignments) performed by processor-b in master board (2)

The bit allocation process that requires the most execution time in the MPEG-2 encoding process is dedicated to the processor-b 22 in the master board 2.

A program flow diagram of the processor-b in the master board 2 is shown in FIG.

That is, when an interrupt comes from the processor-a 21 in the master board 2 after initializing the processor, the data required for bit allocation is moved to the local RAM and bit allocation for each subband of 5 channels is performed.

In the case of bit allocation performed while comparing all the SMR information of each channel, the execution time increases rapidly as the number of channels increases.

As shown in Table 1, as a result of experimenting with the processor in the master board (2), the bit allocation routine, which took about 10.3msec for 2 channel 192Kbps, took 41.7msec for 4 channel 384Kbps, which increases the processing time by 4 times. It takes 62.5msec to perform the 5-channel 640Kbps bit allocation, corresponding to 128Kbps per channel, according to the algorithm in MPEG.

This is 2.6 times greater than the real-time processing time of 24msec, so it can be said that multi-channel bit allocation with high bit rate is virtually impossible under the configured hardware environment.

The reason why the execution time of the bit allocation process increases rapidly with the increase of the channel and the bit rate can be seen from the bit allocation algorithm of MPEG.

The MNR is obtained from the difference between the SNR determined according to the quantization level and the SMR resulting from the psychoacoustic model, and 1 bit is allocated to the subband having the minimum MNR of each subband to improve the SNR of the band. Find the subband with the minimum MNR again from the curve and allocate one bit again.

Repeat this until all the available bits are allocated in one frame

Average of beat assignment according to the sound source Subband Average of bit allocation index Electromagnetic Strike Pop violin One 6.5 8.2 9.1 2 5.5 6.1 7.3 3 5.0 4.6 5.7 4 6.0 6.2 7.2 5 5.6 5.9 7.2 6 5.3 5.7 6.7 7 5.1 5.4 5.5 8 4.9 5.1 5.3 9 5.0 5.0 4.8 10 4.7 4.5 4.5 11 4.9 4.4 4.0 12 4.3 4.2 4.5 13 4.9 4.1 3.0 14 4.1 3.6 2.3 15 3.2 3.0 1.6 16 3.1 2.6 0.8 17 2.6 1.7 0.2 18 1.2 0.7 0.0 19 0.3 0.2 0.0 20 0.0 0.0 0.0 21 0 0 0 22 0 0 0 23 0 0 0 24 0 0 0 25 0 0 0 26 0 0 0 27 0 0 0

It is the basic algorithm to perform.

In this case, since the MNRs of all channels and all subbands are compared together without using the bits used for allocation in advance for each channel, the subbands to be compared increase in multiples.

The processor, a general-purpose DSP chip, does not have a separate instruction that is efficient to find the minimum value. Therefore, a comparison instruction must be implemented to find the minimum MNR. The branch instruction following the comparison breaks the pipeline structure, which is the greatest advantage of the high-speed DSP chip, and has four times longer execution cycles than a normal instruction.

Therefore, when a large number of comparison commands are entered, real-time processing becomes very disadvantageous. On the other hand, if the bit rate is increased, the number of bits to be allocated per frame increases by that much, which results in a larger number of times around the bit allocation loop.

Comparing the above two-channel 192Kbps and four-channel 384Kbps when the channel and the bit rate is doubled, respectively, can explain the experimental results of four times the execution time.

The software implemented in the present invention solves the problem of execution timeout through a pre-allocation algorithm.

After assigning the MNR value before the bit allocation of the 5 channels transmitted in advance and correcting the MNR accordingly, MPEG-specific bit allocation operation is performed on the remaining bit amount.

In addition, to reduce the comparison statement in the bit allocation process, the loop is eliminated without unnecessary comparisons in the initial allocation period, and finally the correct bit allocation is executed to finish the program. When the bit allocation operation is completed, an interrupt is sent to processor-a (21) in the master board (2) to indicate the end of execution.

The dictionary bit allocation algorithm is described below.

First, in order to implement a 62.5msec bit allocation process in real time with 5 channels of 640 Kbps, a method for simplifying the bit allocation algorithm must be devised.

In the case of MPEG, the bit allocation information is included in the bit string and transmitted to the decoding end, so that the encoder is given some autonomy to the bit allocation at a given bit rate. In order to reduce the bit allocation work, it is necessary to statistically analyze the SMR, which is the result of the psychoacoustic model, and the number of bits per subband allocated based on the psychoacoustic model.

By actively utilizing the statistical characteristics of beat allocation to improve performance, an average allocation table is created through actual beat assignment routines for various kinds of music sources, so that the number of bits that are always allocated for all sources is pre-allocated. You can think of applying the actual bit allocation algorithm only to the remaining number of bits.

In other words, the number of bits that are always allocated is an algorithm that allocates only the remaining bits in advance, so as not to repeat the loop unnecessarily every frame. For this purpose, the average bit allocation index distribution of each subband allocated at a bit rate of 128 Kbps per channel for sound sources with different sound pressure distributions is shown in Table 3 and Figure 17.

The data was obtained as the average of the bit allocation indices received from the decoder after 3000 frames were actually encoded for each sound source.

In this case, since the bit allocation indexes of subbands 1 to 3 have different quantization levels from the remaining subbands, the number of bits actually allocated to subbands 1 to 3 is 2 bits larger than the same index in the remaining subbands. Value.

The three sound sources selected experimentally are the electromagnetic guitar, the wide-band sound source, the violin with high sound pressure in the low frequency band, and the pop music showing the most general sound pressure distribution with various combinations.

17, it can be seen that the basic type of the bit allocation distribution is not significantly different for different sound sources, and many bits are mainly allocated to the low frequency band and are reduced toward the high frequency region, so that they are hardly allocated from the 20th subband or more. (In the 20th subband, 1 bit is allocated about 3 times per 100 frames in the electromagnetic sound source).

In the case of the violin, the allocation is very high in the low frequency bands 1 and 2 subbands, and instead is allocated from the 17th subband.

Electromagnetic strokes show a relatively flat allocation distribution from the third subband to the thirteenth subband, and then gradually decrease from the fourteenth subband.

In pop music, it has an intermediate shape of the assignment curves of the other two sound sources.

The number of beats to be pre-allocated to each subband was determined based on the average bit allocation distribution of the three sound sources so as to enable real-time processing (Table 4, FIG. 18).

Preallocated Bit Index Subband Bit allocation index 1,2 6 3 4 4,5,6 5 7,8 4 9,10,11,12 3 13,14 One 15-27 0

Based on the experimental results in Table 3, this value was determined experimentally so that the execution time load would not exceed 100%. It can be used only in the encoding process having a bit rate of 128 Kbps per channel.

In this way, to reduce the number of repetitive loops of the MPEG bit allocation algorithm, and to reduce the number of subbands to be compared, the experimental results show that the 22-27th subband, which is not allocated to any sound source at a bit rate of 128 Kbps per channel, is used for bits. Exclude from allocation comparison. As a result of combining the above two methods, the bit allocation process, which took 62.5msec in 5 channel 640Kbps, is processed in 17.5msec. In the same way, the bit allocation index can be averaged and pre-allocated appropriately for other bit rates that cannot be processed in real time to adjust the execution time.

Then, the performance of the pre-bit allocation algorithm is verified as follows.

Let's verify the performance by changing the MNR of the bit allocation algorithm using the pre-allocation chosen in Table 4.

Mask-to-Noise Ratio (MNR) is obtained from the difference between SNR and SMR, and noise at this time refers to quantization error.

The meaning of MNR is the ratio of mask and noise. If the MNR value of a subband is 0 dB or more, it means that all quantization errors in the subband are masked and inaudible to the human ear. Therefore, assuming that the SMR value obtained by the psychoacoustic model is correct, if the MNR of all subbands is made to be 0 dB or more, a reconstructed sound without perceptual distinction can be obtained.

The bit allocation process ultimately raises the MNR of each band to more than 0dB, so if the final MNR result processed by the method proposed above is satisfactory, it does not matter even if the MPEG original bit allocation algorithm and the allocated index distribution are slightly different. Do not.

19 is a three bit pre-allocation MNR curve for any audio signal with different sound pressure distributions at 48 KHz.

As mentioned earlier, electromagnetic guitar sound sources have a wider signal bandwidth, so subbands with MNRs of 0 dB or less are widely distributed. Violin sound sources go deeper at low frequencies instead of lower MNR values of 0 dB or less because most of the signals are gathered in the low frequency band. Has a distribution. In the case of the first frame signal, due to the zero padding considering the time delay of the filter bank, the MNR curve has a gentle shape because the signal sound pressure is low.

It can be seen that the MNR should be improved to 0 dB or more by appropriately assigning bits to 1 to 12 subbands for violins and 1 to 19 subbands for electromagnetic guitars.

When the number of bits allocated to each subband sample is increased by one bit, an MNR increase effect of about 6 dB can be obtained. The final MNR curve should ideally have a flat shape.

Now let's look at how each MNR curve changes through pre-allocation.

20, 21, and 22 show changes in the MNR curves when the MNR curves of FIG. 19 are pre-assigned for each subband by the size shown in Table 4, and when the MNR curves are completely finished until the final bit allocation process.

In the electromagnetic guitar sound source of FIG. 20, MNR is increased to 10 dB line by 5-8 subbands through pre-allocation, and then bits are added to 9-9 subbands mainly through the remaining bit allocation process.

The pre-assignment shows that the increased MNR value is not too high and is well in line with the average level after the last allocation. After all bit allocations are completed, the MNR has a flat distribution on the 10dB line, indicating that there is sufficient margin in the bit rate.

In the case of the MNR for the first frame of FIG. 21, 1 to 6 subbands are fully allocated through pre-allocation, and the MNR of the middle subband portion is reinforced through residual bit allocation. The final MNR curve is balanced at around 7dB and there is no MNR value below 0dB, so the quantization noise is completely masked.

In the case of the violin sound source of Fig. 22, in contrast to the previous two cases, the MNR value near the low frequency is still less than 0 dB even after the pre-allocation, so that the remaining allocation is made around the low frequency band, and the intermediate frequency band is sufficiently high through the pre-allocation. It has an MNR value. The average MNR value is higher than 15dB, which can be said to be the best sound source.

Three cases can verify that the pre-allocated bits chosen in Table 4 were appropriate for various sources. More pre-bit assignments in the low frequency band will be beneficial for sound sources such as the violin, but in the case of electromagnetic guitar sources, the MNR in the low frequency band will be too high.

Conversely, more pre-allocation to the mid-frequency band can lead to shorter beats in the low-frequency band for sources such as violins.

Many experiments with various sources indicate that the MNR curve before beat assignment does not deviate significantly from the three types in Figure 19. If there is a special sound source and the MNR curve is out of the above, the final MNR curve can always be greater than 0 dB over the entire band, since there is enough room for the bits to be allocated at a bit rate of 128 Kbps per channel.

As a result of comparing the encoded sound quality of MPEG original bit allocation method and pre-allocation method for various kinds of music, it is almost indistinguishable.

6. Experiment and Results

Performance evaluation of the MPEG-2 real-time audio encoder software implemented in the present invention can be divided into evaluation of execution time for each subroutine and evaluation of sound quality when the final bit string is decoded.

Connect the THX processor, which provides a 2-channel CD player and 5-channel analog sound source, to the Analog-to-Digital Converter, and then connect the output of the A / D to the serial port of each slave board to provide music data. Get

A six-channel A / D with a frame sync signal and a transmission clock for 16-bit transmission was fabricated and used in the experiment. Between the A / D converter 7 and the processor serial port of the slave board 1, Designed to allow direct connection without the need for additional circuits.

Since the analog output that is the sound source cannot provide a signal indicating the beginning and end of the music, the encoder's reset switch is used to adjust the range of music to be encoded.

To get data in 16-bit PCM format, connect the serial data line, frame sink, and transmit clock signal to the corresponding input pins of the processor.

Although MPEG-2 handles up to 5.1 channels, it supports various channel configurations such as basic 2 channels (L, R) or 3 channels (L, R, S), so we experimented with all possible channel combinations.

Each slave board 1 processes only one channel regardless of the channel configuration, so it can be used without changing the program, but the master program should be changed according to the channel configuration and bit rate.

Since the processor does not have a separate device for measuring program execution cycles, the execution time of each subroutine is measured using the number of input samples coming in at a predetermined time interval.

The execution time can be obtained by converting the difference in the number of input samples before and after the execution of the subroutine to be measured into time.

When the sampling frequency of the input sample is 48KHz and the system clock frequency is 33MHz, the relationship between the number of samples and the execution time is as follows.

▶

▶

▶ 1 Sample ≒ 343.7 Cycle

▶ 1 Frame = 1152 Samples = 1152 * 20.83 μS ≒ 24.0 msec

The optimized execution times of the subroutines processed in the slave board 1 of the system software implemented in the present invention are shown in Table 5. For subroutines whose execution time is not constant, the time of the longest time is indicated.

Execution Time of Slave Board Processing Routines CPU Subroutine Execution time (msec) load a Subband analysis 6.22 25.9% Scale factor coating 1.81 7.5% FFT & Power Spectrum 3.65 15.2% CPU-a total 11.68 48.7% b Psychoacoustic model 18.28 76.2% Slave overall run time 29.96 124.9%

The subband analysis process using Lee's high-speed DCT to replace the analytical matrix was performed in 6.22msec, which is 57.3% of the existing execution time of 10.86msec, showing the most improved performance.

At this time, it can be said that the subroutines executed in the processor-a 11 in the slave board 1 are actually faster than the measured time because an interrupt routine for continuously receiving input samples is performed during processing.

The psychoacoustic model of the processor-b 12 in the slave board 1 improves the execution time of 3.56 msec through optimization of the use of the assembly instructions. After the improvement, the sum of the 'loads' of the subroutines processed by the processor-a 11 in the slave board 1 does not exceed 50%.

Therefore, if the psychoacoustic model of the processor-b 12 in the slave board 1 is further improved to reduce the load to 50% or less, the processor use of the slave board 1 may be reduced to one.

The routines performed on the master board 2 vary in execution time because the amount of data to be processed varies depending on the number of channels and the bit rate. In the case of the bit allocation process that takes the most execution time as the channel increases, the execution time can be adjusted to enable real-time processing through pre-allocation.

Since up to 2 channels can be processed in real time without using pre-allocation regardless of the bit rate, the existing MPEG bit allocation algorithm is used, and more than 3 channels are pre-allocated according to the bit rate.

Table 6 shows the optimized execution times of the routines performed on the master board 2 for the 2-channel 192 Kbps and 5-channel 640 Kbps.

Through the pre-allocation, the execution time of the bit allocation process can be adjusted as much, and the rest of the routines do not change the execution time according to the bit rate so that the implemented encoder can process virtually all bit rates in real time.

Execution time of master board processing routine Processing CPU Subroutine 2 channels, 192 Kbps 5 channels, 640 Kbps (msec) load (msec) load b Bit allocation 7.03 29.3% 17.52 73.0% a Quantization 1.33 5.5% 3.42 14.3% Bit string format 2.38 9.9% 6.21 25.9% Bit string transfer 2.31 9.6% 7.52 31.3% CPU-a total 6.02 25.0% 17.15 71.5%

The execution time from the input frame of the first frame until the final bit string through the four processors can be calculated by looking at the synchronization process between the processors shown in Figure 9.

The start of work on the first frame of processor-a (21) in master board (2), the processor on which the last bit string is transmitted to the PC, is the subframe for the third frame of processor-a (11) in slave board (1). It is synchronized with the end of band analysis.

Therefore, the total coding delay until the first sample is input and the final bit string is transmitted is calculated as follows.

Coding Delay = (1 frame interval; time when input buffer is filled) + (2 frame interval)

+ (Subband section) + (master-a section)

= 24.0 + 2 * 24.0 + (4.64 + 0.37) + 17.15

= 94.16 (msec)

The bit stream generated using the real-time encoder implemented in the present invention is stored on a hard disk and then decoded using an MPEG multi-channel standard decoding program written in C to verify performance.

When the bit rate per channel is 64Kbps, it is easy to see that the decoded music has sound quality damage, but when it is 96Kbps, there is no big difference compared to the original sound for sound such as a narrow band violin and cello. When the bit rate per channel is 128Kbps, the reconstruction sound is hardly distinguished from the original sound.

If the bit rate rises further, it is hard to feel that the distortion of the sound quality by the manufactured A / D converter, the speaker and the amplifier used for reproduction is more severe than the sound quality loss due to the encoding, and compared with the sound quality at 128 Kbps. .

FIG. 23 shows the final MNR curve when bits are allocated at 64, 96, and 128 Kbps based on the SMR curves obtained for the same input sample at 44.1 KHz sampling frequency. As the bit rate increases, it can be seen that an MNR increase of about 6-10 dB is achieved in the bit-allocated band.

At 64 Kbps, the MNR of all allocated bands is still less than 0 dB, suggesting that there is an unmasked quantization noise.

At 96 Kbps, we can see that there are subbands where allocating bands have approached 0 dB but are not yet fully masked.

At a bit rate of 128Kbps, the MNR of the entire band is distributed over 5-10dB, and now it can be said that the quantization noise of all subbands is theoretically masked by the signal.

By comparing the final MNR curve according to the bit allocation of FIG. 23, the sound quality difference according to the bit rate of the encoded bit string may be described. The bit rate of 128Kbps per channel with no difference between the original sound and the subjective sound is about 2.67 bits per sample, which is about 6: 1 compression performance for PCM samples quantized to 16 bits.

The 5-channel PCM sample, which is decoded and stored on the hard disk, is a serial transmission card manufactured and sent to a digital-to-analog converter, which is converted into an analog signal and output to an amplifier for evaluation of sound quality.

As described above, the encoder software implemented according to the present invention has been processed in real time up to 5.1 channels and 640 Kbps at 48 KHz sampling rate of MPEG-2 layer 2, and thus all bit rates, sampling rates, and channel combinations below are possible. As a method for more effectively performing channel coding, dynamic transport channel switching and phantom coding of a central channel are supported among the composite coding proposed by MPEG-2.

The speedup and optimization of each subroutine can be done by one processor when up-clocking the slave board execution routine that was processed by two processors to 50MHz, and multi-channel processing of the master board that requires four processors to process in real time High-speed algorithms can be applied to only two processors, and the number of processors used can be reduced, reducing not only the production cost but also the coding delay, which is an important problem in applications such as HDTV broadcasting, and optimization. The developed program was developed using a general-purpose DSP processor, so it can be used for applications such as other processors and ASICs.

Claims (8)

Five slave boards 1 which receive respective channel audio data and perform subband analysis and psychoacoustic modeling; A master board 2 for channel matrixing, bit allocation, quantization, bit packing, and interface with a PC 5; A backplane board (3) connecting the slave boards (1) and the master board (2) to each other; An interface unit (4) for transmitting data transferred from the master board (2) to a bit string to a personal computer; A personal computer 5 for verifying the performance of the encoding system by decoding the bit stream transmitted to the MPEG standard decoding program; It is composed of six channels of A / D converters (7) for converting audio signals output analog from a source (6) such as a CD player or a DAT to digital data of 16-bit PCM and transmitting them to the slave boards (1). A real-time processing device for an HDTV audio encoder. The method according to claim 1, wherein the slave boards (1) are two processors-a, b (11) 12, dual port RAM 13 for transferring information between the processors, to store a predetermined program or result Memory 14 required for each processor, dual port RAM 15 for data transfer between slave board 1 and master board 2, and decoding circuit 16 for decoding the memory address to change the number of weights Real-time processing device of the HDTV audio encoder, characterized in that. The method of claim 1, wherein the master board (2) comprises two processors -a, b (21) (22) and 96K ROM (23) for performing bit allocation, quantization, and bit string formatting on up to five channels. 64K RAM 24, dual port RAM of each slave board 1 via a backplane connector for data exchange with reset and clock circuits 25 and 26, address decoding circuitry, and slave board 1; 27) a real-time processing device for an HDTV audio encoder. Processing audio data in a parallel structure; Speeding up the computation by performing subband analysis with the FAST DCT algorithm; Exchanging data using dual port RAM between slave boards; Transferring the result of each slave board to the master through the dual port RAM; Master board hardware handing over data from slave board and processing it comprehensively; Significantly reducing the amount of computation using an efficient algorithm in allocating bits in the master board hardware; Finally, the real-time processing method of the HDTV audio encoder, characterized in that consisting of a step through the interface with the PC. 5. The method of claim 4, wherein using dual port RAM between slave boards processes processor-a to subbands in the slave board and then passes the result to processor-b in the slave board using dual port RAM to model the remaining psychoacoustic. Real-time processing method of the HDTV audio encoder, characterized in that consisting of the process of performing. 5. The method of claim 4, wherein the step of passing each slave board result to the master board hardware using dual port RAM comprises: collecting each bit of audio data, which has already obtained subband analysis and psychoacoustic modeling, together with bit allocation, quantization, and bit stream. A real-time processing method of an HDTV audio encoder, characterized in that the process of performing the formatting. The method according to claim 4, wherein the efficient algorithm used in the bit allocation in the master board hardware measures the bit allocation degree for each subband statistically, and then allocates the number of bit allocations of the subbands allocated in advance to improve the overall execution time. Real-time processing method of the HDTV audio encoder, characterized in that for reducing. 5. The method of claim 4, wherein the interface to the PC is finally able to send the encoded bit stream to the decoder, or to create an interface card to send the encoded bit stream to the PC so that the encoded bit stream can be processed together with other data on the PC. Real-time processing method of the HDTV audio encoder, characterized in that.