KR100285324B1 - Cell apparatus of each channel of the ATM adaptation layer-2 - Google Patents

Abstract

The present invention can be used in the base station interface portion of the IMT-2000 control station, and can be used in all systems where AAL2 is used, and each channel of the asynchronous transmission mode adaptation layer-2 separating data for each channel of AAL2. It relates to a star cellization device.

The present invention provides an input selector (1) for selecting data to be stored in one of four input buffers, and an AAL2 first input buffer to an AAL2 fourth input buffer connected to an output terminal of the input selector (1). (2-5), a read control unit 6 for controlling a read operation according to the AAL2 packet format, and an AAL2 cell header processing unit 7 and CPS connected to the read control unit 6 for ATM header conversion. A packet processing unit 8, a padding processing unit 9 for dividing the output of the CPD packet processing unit 8 to separate AAL2 packets for each user, and storing data separated for each user in one of four output buffers. An AAL2 first output buffer to an AAL2 fourth output buffer 11-14, which is connected to the light control unit 10, an output terminal of the light control unit 10, and stores data, and the output buffer 11-14. IMT-2 consisting of an output selector 15 for selecting and outputting data of When AAL2 is used to transmit user voice information in 000 system, the present invention can be usefully applied.

Description

Cellization apparatus for each channel of asynchronous transmission mode adaptation layer-2 {Cell apparatus of each channel of the ATM adaptation layer-2}

The present invention can be used for the base station interface portion of the IMT-2000 control station, and can be used for all systems where AAL2 is used. In particular, the asynchronous transmission mode adaptation layer-2 for separating data for each channel of AAL2 can be used. A channelizing apparatus for each channel is provided.

In general, ATM Adaptation Layer 2 (AAL2) is an ITU-TI.363.2 standard that is efficient for transmitting delay-sensitive, short and variable packets.

The third generation mobile communication IMT-2000 is an ATM backbone system unlike the existing DCS or PCS.

In addition, AAL2 is used for packet transmission. AAL2 basically improves the transmission efficiency by putting voice data of several users in an ATM cell, and accordingly, when AAL2 is used, data must be divided again.

Conventional AAL2 is a relatively recent standard, and there are few systems using AAL2 until now, and commercial chips have not been proposed yet.

Until now, the system implemented with AAL2 is mostly dealt with software to separate voice packet data.

However, when this part is implemented in software, when the channel capacity increases and the channel speed increases, there is a limitation in the capacity to process all the disadvantages.

SUMMARY OF THE INVENTION The present invention has been made to solve such a conventional problem, and an object of the present invention is to perform channelization for each channel in the asynchronous transmission mode adaptation layer-2 for separating data for each channel of AAL2. This can be done in hardware rather than in software.

1 is a view showing the AAL2 and AAL2 'structure of the present invention

2 is an overall configuration diagram of the present invention

<Explanation of symbols for main parts of drawing>

1: input selector 2: AAL2 first input buffer

3: AAL2 second input buffer 4: AAL2 third input buffer

5: AAL2 4th input buffer 6: Lead control part

7: AAL2 cell header processing unit 8: CPS packet processing unit

9: padding processing unit 10: light control unit

11: AAL2 first output buffer 12: AAL2 second output buffer

13: AAL2 3rd output buffer 14: AAL2 4th output buffer

15: output selector

Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings.

FIG. 1 illustrates the AAL2 format 100 and the AAL2 'format 200. The structure of the AAL2 includes data of various users.

The CPS packet structure 300 included in both the AAL2 format 100 and the AAL2'200 includes an 8-bit CID for identifying a user channel, a 6-bit LI having CPS packet length information, and a user. It consists of a 5-bit UUI with information, a 5-bit HEC, and a CPS packet payload.

2 is an overall block diagram of the present invention, in which a part for separating voice packet data of AAL2 is designed in hardware.

That is, as shown, an input selector 1 for selecting to store the data coming into the input into one of the four input buffers, and AAL2 first to fourth inputs connected to the output terminal of the input selector 1. A buffer control unit 2-5, a read control unit 6 for controlling a read operation according to the AAL2 packet format, a read control unit 6 connected to the read control unit 6, and an AAL2 cell header processing unit 7 for ATM header conversion; A CPS packet processing unit 8, a padding processing unit 9 for dividing the output of the CPD packet processing unit 8 to separate AAL2 packets for each user, and storing data separated for each user in one of four output buffers. AAL2 first to fourth output buffers 11-14 for storing data connected to the light control unit 10, an output terminal of the light control unit 10, and data of the output buffer 11-14. It is composed of an output selection unit 15 for selecting and outputting.

The operation of the present invention configured as described above will be described.

First, FIG. 1 illustrates the AAL2 format 100 and the AAL2 'format 200. The structure of the AAL2 includes data of various users.

In the present invention, when separating data of several users, one user data, that is, one CPS packet is contained in one ATM cell.

The ATM cell separated into one user data is called an AAL2 'cell, and the user data (CPS packet) is included in the AAL2' cell payload portion, and the remaining part is padded (insert all zeros).

The data coming into the input is in AAL2 format, with the cell start signal indicating the beginning of the cell along with the input data.

Therefore, when the cell start signal is detected, the input selector 1 writes an empty buffer among the four AAL2 first to fourth input buffers 2-5 configured with 53 x 8-bit dual port RAM. The enable signal and the write address signal are output.

At this time, the signal indicating the empty buffer is In_buf1_avail or In_buf4_avail in the input selector 1.

Here, the initial values are all 0 and the priority is In_buf1_avail highest and In_buf4_avail lowest.

The input selector 1 determines In_buf4_avail from In_buf1_avail, selects 0 and selectively stores it in the input buffer.

For example, In_buf1_avail determines In_buf2_avail and selects and stores 0.

Also, if In_buf1_avail and In_buf2_avail are 1 and In_buf3_avail and In_buf4_avail are 0, the input selector 1 selects and stores the AAL2 third input buffer 4.

Here, In_buf1_avail becomes 1 when each write address is 52 and again becomes 0 when the read address specified by the read control unit 6 becomes 52. FIG.

The In_buf1_avail to In_buf4_avail are input to the lead controller 6.

Accordingly, the read controller 6 determines In_buf1_avail to In_buf4_avail, selects one of them, and designates a read operation.

For example, In_bufi_avail (i = 1-4) equaling 1 means the memory is full and ready to read.

When the memory to be read is selected, the read control unit 6 receives the enable signal and address specified by the AAL2 cell header processing unit 7, sends the read signal to the corresponding memory, and sends the read data back to the AAL2 cell header processing unit 7.

In addition, the CPS packet processing section 8 receives the specified enable signal and address signal, sends the CID value to the AAL2 cell header processing section 7, and sends the CPS packet data to the CPS packet processing section 8.

The AAL2 cell header processing unit 7 sends a read enable signal and a read address signal to the read control unit 6 so as to receive a 5-byte ATM cell header.

Next, the 5-byte ATM cell header and 1-byte CID read from the memory are received from the read controller 6, and the AAL2 cell header processing unit 7 receives these 5-byte ATM cell headers and 1-byte CID and receives the VPI or the like. The VCI is converted to generate a new 5 byte cell header and sent to the write control unit 10. In this case, the VPI or VCI mapping method may be different for each system.

The CPS packet processing section 8 interprets the OSF field in the start field after the 5-byte ATM header, specifies the start address of the first CPS packet, and specifies the L1 field (6 bits, length information of the packet) of the first packet. Parse and specify the last address of the first packet.

After AAL2 'conversion of the first packet is completed, start address and end address of the second packet are designated.

If the address of the specified packet spans two cells, wait until all the second cells are input, and then re-specify the address and enable if all are entered.

At this time, after reading the end address 52 of the first cell buffer, the read control unit 6 performs a switching operation to the second cell buffer.

The padding processor 9 inputs 0 to the rest of the CPS packet in the cell payload.

The write control unit 10 accepts the 5-byte value output from the AAL2 cell header processing unit 7 during the first 5 bytes of the write enable period, and the data output from the CPS packet processing unit 8 in the subsequent section (CPS packet). In the remaining sections, 0 is output from the padding processing unit 9 and written to the AAL2 first to fourth output buffers 11-14 composed of four 53x8 bit FIFOs.

At this time, the process of selecting an empty buffer among the four output buffers 11-14 selects and stores 0 among Out_buf1_avail to Out_buf4_avail, and Out_buf1_avai is the highest and Out_buf4_avail is the lowest.

On the other hand, the output selector 15 outputs from the first full among the output buffers of the AAL2 first to fourth output buffers 11-14, and the signal for selecting the output buffer is Out_buf1_avail to Out_buf4_avail. First, the output is one.

Subsequently, when 53 bytes of data are output, the corresponding Out_buf4_avail (i = 1 ~ 4) is set to 0 and stored again.

As described above, the present invention can be usefully applied when AAL2 is used to deliver user voice information in an IMT-2000 system, and has four 53 × 8-bit dual-port RAMs at the input and an output at the output. Equipped with a 53x8 bit FIFO, the ATM Forum standard Utopia Level can easily implement 1 or 2, which can easily interface with a chip with built-in Utopia functionality.

Claims (6)

An input selector 1 for selecting data to be stored in one of the four input buffers, and an AAL2 first input buffer to an AAL2 fourth input buffer connected to an output terminal of the input selector 1; 5), a read control unit 6 for controlling a read operation according to the AAL2 packet format, an AAL2 cell header processing unit 7 and a CPS packet processing unit connected to the read control unit 6 for ATM header conversion; 8), a padding processing unit 9 for padding the output of the CPD packet processing unit 8 to separate AAL2 packets for each user, and a light control unit for storing data separated for each user in one of four output buffers. (10), the AAL2 first output buffer to the AAL2 fourth output buffer 11-14, which is connected to the output terminal of the light control unit 10 and stores data, and the data of the output buffer 11-14. Characterized in that consisting of an output selecting unit 15 for selecting and outputting It is selhwa device for each channel in an asynchronous transfer mode adaptation layer-2. 2. The apparatus of claim 1, wherein one CPS packet, which is user data per ATM cell, is input and the remaining portion is padded. The apparatus of claim 1, wherein the write memory is designated by setting In_buf1_avail to In_buf4_avail in the input selector (1), and selecting 0 among them. The method of claim 3, wherein In_buf1_avail has the highest priority and In_buf4_avail has the lowest priority, so that the highest priority is selected first when there are two or more zeros. Channelized Cellizer. [4] The asynchronous transmission mode adaptation layer-2 according to claim 3, wherein when the write address is 52, the corresponding In_bufi_avail (i = 1 to 4) becomes 1 so that the write address cannot be written until it becomes 0 again. Channelized Cellizer. The method according to claim 1, wherein the CID is sent to the AAL2 header processing unit 7 and the CPS packet data is sent to the CPS packet processing unit 8 by receiving the enable signal and the address signal designated by the CPS packet processing unit 8. A channelization apparatus for each channel of the asynchronous transmission mode adaptation layer-2.