KR100260262B1 - A metal tip array forming method of fed - Google Patents

Abstract

PURPOSE: A method for forming a metal tip array of a field emission display device is provided to form a structure with a function as a collimator by using a simple semiconductor manufacturing process. CONSTITUTION: The first metal layer(13) is formed on a glass substrate(11). The first insulating layer(15) is formed on the first metal layer(13). The second metal layer(17) is formed on the first insulating layer(15). A photoresist layer pattern(19) is formed on the second metal layer(17). The first hole pattern is formed on the second metal layer(19). The photoresist layer pattern(19) is removed. The second insulating layer(23) is formed on a whole structure. The third metal layer(25) is formed on the second insulating layer(23). The second hole pattern is formed on the third metal layer(25). A hole of a stair shape is formed by etching the second and the first insulating layers(23,15). A metal tip(29) is formed on a lower end portion of the hole. The second insulating layer(23) is removed by a CMP(Chemical Mechanical Polishing) method. The remaining material is removed from the second metal layer(17).

Description

Metal tip array formation method of field emission device

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for forming a metal tip array of a field emission display (hereinafter referred to as a FED), and in particular, may serve as a collimator in a cathode array structure. The present invention relates to a method of forming a metal tip array of a field emission device capable of implementing a metal tip by inducing directional deposition on sputtered ions by forming a structure.

In general, the field emission device is a device that emits cold electrons due to the tunnel effect by applying a relatively low voltage, for example, a voltage of about 5 to 10V by using a phenomenon in which an electric field is concentrated on a sharp part of a tip. The FED is attracting attention as a next generation display device because it has both the high definition of the CRT and the light and thin advantages of a liquid crystal display (LCD).

In particular, the FED can not only manufacture the thin and thin, but also solve the problems of process yield, manufacturing cost, and enlargement, which are crucial disadvantages of the LCD.

That is, in case of LCD, even if one unit pixel is defective, the whole product is treated badly. However, FED has a smaller number of unit pixels in one pixel group, so even if one or two unit pixels are defective, There is no problem in operation, and the yield of the whole product is improved.

In addition, FED has advantages such as simple structure, low power consumption, low unit cost, and suitable for portable display device.

Initially, the FED is exposed to the outside by a cavity, and has a conical emitter (cathode) having a sharp portion, a gate arranged on both sides of the emitter, and an anode spaced apart from the gate. Each corresponds to the cathode, cate and anode of the CRT.

In the FED, a voltage is applied to the anode, for example, a voltage of about 500 to 10 mA, and electrons are emitted by an electric field concentrated at the top of the cathode, and the emitted electrons are emitted by an anode to which a positive voltage is applied. The phosphor is guided to emit the fluorescent material applied to the anode, and the gate controls the direction and amount of electrons.

However, in the early FED having the conical cathode as described above, some of the emitted electrons are induced to the gate, so that the gate current flows to control the electrons, and cations formed by colliding with the electrons between the cathode and the anode, Since the device is destroyed by collision, in order to prevent this, the inside of the device must be maintained in a high vacuum state, and there is a problem that it is difficult to uniformly manufacture a sharp conical cathode.

In addition, conventionally, in manufacturing the field emission device, a method of forming a conical emitter is mainly used by a process developed by Spindt.

In the manufacturing process for forming the spin type metal tip, an e-beam evaporator equipment is essentially used to form the metal tip in order to implement the shape of the tip.

In addition, conventional techniques have been proposed for attaching collimators to induce directional deposition in sputter equipment to facilitate the implementation of metal tips. That is, in the conventional method using sputtering, a collimator is installed between a metal target and a substrate to filter only vertical components of ions or particles having random movements and arbitrary directions. Directing towards the substrate leads to directional vertical deposition.

However, in the above case, there is a problem that attaches a collimator which is a separate device in the sputtering equipment is a big trouble.

Accordingly, an object of the present invention is to solve the above problems, and an object of the present invention is to form a structure capable of acting as a collimator in a cathode array structure so that sputtered ions can be directionally deposited on a substrate. It is to provide a method for forming a metal tip array of the field emission device that can be easier to implement.

1 to 6 are cross-sectional views showing the metal tip array manufacturing process step of the field emission device according to the technology of the present invention

7 is a perspective view of a field emission device of the metal tip is completed according to the method of the present invention

<Explanation of symbols for main parts of drawing>

11: glass substrate 13: first metal layer (cathode metal layer)

15: first insulating layer 17: second metal layer (gate metal layer)

19 photosensitive film pattern 21 first hole pattern

23: second insulating layer 25: third metal layer

27: second hole pattern 28: stepped hole

29: metal tip forming metal

Features of the metal tip array forming method of the field emission device according to the present invention for achieving the above object,

Sputtering a predetermined metal on the glass substrate to form a first metal layer having a predetermined thickness;

Forming a first insulating layer on the first metal layer;

Forming a second metal layer on the first insulating layer;

Forming a photoresist pattern on the second metal layer, and then forming a first hole pattern having a predetermined size in the second metal layer under the photoresist pattern;

Removing the upper photoresist pattern, and forming a second insulating layer in a predetermined thickness on the entire structure;

Forming a second hole pattern larger than the first hole pattern on the third metal layer by a photo masking operation after forming a third metal layer on the second insulating layer;

Etching the lower second insulating layer and the first insulating layer using the second hole pattern and the first hole pattern as a mask to form stepped holes;

Forming a metal tip on the lower end of the hole by sputtering a predetermined metal on the entire structure under appropriate conditions;

Firstly removing a portion from the upper portion of the structure to the lower portion of the second insulating layer by the CMP method;

And removing the upper layer portion remaining on top of the second metal layer using an etchant having a different metal etching selectivity.

Hereinafter, a method of forming a metal tip of a field emission device according to the present invention will be described in detail with reference to the accompanying drawings.

1 to 6 are cross-sectional views showing the metal tip array forming process step of the field emission device in the method of the present invention.

Referring to FIG. 1, a predetermined metal, for example, chromium (Cr) is sputtered on a glass substrate 11 to be coated with a predetermined thickness, for example, about 2000 to 3000 microns thick to form a first metal layer 13.

In this case, a predetermined metal layer (not shown) having different etching selectivity is formed on the first metal layer 13.

Next, an insulating layer is formed on the first metal layer 13, and a second metal layer 17 is formed again on the first metal layer 13.

At this time, the insulating layer is formed by Plasma Enhanced Chemical Vapor Deposition (PECVD), and the thickness thereof is 1 to 2 μm.

On the other hand, in the field emission device of the first metal layer 13, it becomes a cathode metal layer, and the second metal layer 17 is formed of a gate metal layer.

Referring to FIG. 2, after the photoresist pattern 19 is formed over the entire structure, the photoresist pattern 19 is used to have a predetermined size, for example, about 1 to 2 μm in the lower third metal layer 17. The hole pattern 21 is formed.

Referring to FIG. 3, after removing the upper photoresist pattern 19, a second insulating layer 23 having a predetermined thickness, for example, a thickness of 2 to 3 μm is formed.

Thereafter, a metal is deposited on the second insulating layer 23, and a second hole pattern 27 having a larger size than the first hole pattern 21 formed by the photo masking operation is formed.

In this case, the size of the second hole pattern 27 is approximately 2 to 4 μm, and the first hole tatten 21 disposed below the second hole pattern 27 is disposed at the center of the second hole pattern 27.

Referring to FIG. 4, the lower layer is etched by anisotropic etching using Reactive Ion Etching (hereinafter referred to as RIE) equipment, and the primary second insulating layer 23 and the lower second metal layer ( 17 and the first insulating layer 15 are etched to form stepped holes 28.

Referring to FIG. 5, the metal tip 31 is formed by sputtering a predetermined metal on the entire structure under appropriate conditions.

At this time, the sputtering conditions are 2mm Torr, 500watt, growth rate (growth rate) 920 ~ 890 Å / min, and the metal ions to proceed along the interior of the step-shaped hole 28 to act as a collimator.

Referring to FIG. 6, after removal of a predetermined portion of the upper layer, that is, (A-A ') by using chemical mechanical polishing (hereinafter referred to as CMP), another etchant having different metal etching selectivity is used. Thus, the upper portion of the gate metal 13, that is, the upper layer portion up to the line (B-B ') is lifted off.

FIG. 7 is a view showing a state in which the process in FIG. 6 is completed.

As described above, according to the method of the present invention, by forming a structure acting as a collimator in the cathode array structure through a simple semiconductor manufacturing process, the hassle of attaching a separate collimator in the sputtering device can be eliminated, The vertical component is applied to the ions to particles to facilitate the formation of the metal tip.

In addition, there is no need for an electron-beam scanning process using a conventional spin method, and no collimator is required, thereby reducing manufacturing costs by improving the manufacturing process yield.

Claims (10)

Sputtering a predetermined metal on the glass substrate to form a first metal layer having a predetermined thickness; Forming a first insulating layer on the first metal layer; Forming a second metal layer on the first insulating layer; Forming a photoresist pattern on the second metal layer, and then forming a first hole pattern having a predetermined size in the second metal layer under the photoresist pattern; Removing the upper photoresist pattern, and forming a second insulating layer in a predetermined thickness on the entire structure; Forming a second hole pattern larger than the first hole pattern on the third metal layer by a photo masking operation after forming a third metal layer on the second insulating layer; Etching the lower second insulating layer and the first insulating layer using the second hole pattern and the first hole pattern as a mask to form stepped holes; Forming a metal tip on the lower end of the hole by sputtering a predetermined metal on the entire structure under appropriate conditions; Firstly removing a portion from the upper portion of the structure to the lower portion of the second insulating layer by the CMP method; Removing an upper layer portion remaining on the upper portion of the second metal layer by using an etchant having a different metal etching selectivity, the method of forming a metal tip array of the field emission device. 2. The method of forming a metal tip array of a field emission device according to claim 1, wherein Cr is used as a metal of said first metal layer, and the thickness thereof is 2000 to 3000 mW. 2. The method of forming a metal tip array of a field emission device according to claim 1, wherein the first insulating layer is formed of a silicon oxide film and has a thickness of 2000 to 3000 mW. The method of claim 1, wherein the etching of the insulating layer is performed by a RIE method. 2. The method of forming a metal tip array of a field emission device according to claim 1, wherein the first insulating layer is formed by PECVD and has a thickness of 1 to 2 m. The method of claim 1, wherein the size of the first hole pattern formed in the second metal layer is 1 to 2 μm. The method of claim 1, wherein the thickness of the second insulating layer is 2 to 3 µm. The method of claim 1, wherein the second hole pattern formed on the third metal layer is 2 to 4 μm larger in size than the first hole pattern. The method of any one of claims 1, 7, or 8, wherein the first hole tatten is arranged so as to be located at a central portion of the second hole pattern. The method of claim 1, wherein the sputtering conditions for forming the metal tip are 2 mm Torr, 500 watts, and a growth rate of 920 to 890 kW / min.

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