KR100257758B1 - Double silicon substrate and method for manufacturing semiconductor device using the same - Google Patents

Abstract

PURPOSE: A double silicon plate and a manufacturing method of a semiconductor element using it are provided to increase align margin for the following process by automatically forming a field oxidation film and making the extended oxidation layer to be exposed upward. CONSTITUTION: A first semiconductor layer(207) functions as a body. A second semiconductor layer(201) provides an active area. An insulation film(204) is formed between the first semiconductor layer(207) and the second semiconductor layer(201). A conductor(206) contacts the first semiconductor layer(207) and the second semiconductor layer(201) passing through the insulation film(204). The insulation film(204) is extended to the side wall of the second semiconductor layer(201) to separate the elements.

Description

Double silicon substrate and semiconductor device manufacturing method using same

The present invention relates to a method for manufacturing a semiconductor device, and more particularly, to a method for manufacturing a semiconductor device using a silicon on insulator (SOI) substrate structure, which is a double silicon substrate having a buried oxide layer.

At present, the trend toward high integration, high speed, and low power consumption of semiconductor devices has been observed, and in view of these trends, fabrication of semiconductor devices using SOI substrates has been seen in many aspects, rather than manufacturing devices using conventional single crystal silicon substrates. This can be said to be advantageous.

1 is a cross-sectional view of a transistor formed on an SOI substrate according to the prior art, and includes a first silicon layer 1 serving as a support substrate, a buried oxide layer 2, and an active region. On the SOI substrate in which the two silicon layers 3 are sequentially stacked, the field oxide film 4 is formed, and the gate 5, the source 6a and the drain 6b are formed in a conventional transistor manufacturing process.

As described above, when fabricating a semiconductor device using an SOI substrate, the semiconductor device may have various advantages over a semiconductor device using a conventional single crystal silicon substrate, and the transistor using the SOI substrate may be bonded compared to a transistor using a general single crystal silicon substrate. The small junction capacitance increases the device's overall circuit speed, and can operate at lower voltages than conventional monocrystalline silicon substrates, reducing power consumption. In addition, since the active area of the device is completely isolated from the buried oxide layer and the field oxide film, it is completely irrelevant to latch-up and punchthrough between the active areas.

However, in the conventional device as shown in FIG. 1, as the first silicon layer serving as the support body is floating, the hot carrier generated in the active region is completely isolated from the device. It can't get out and build up in this area. This results in floating body effects such as parasitic BJT and Kink effects, resulting in various problems in device characteristics.

SUMMARY OF THE INVENTION An object of the present invention is to provide a semiconductor device having a passage through which hot carriers generated in an active region of an SOI substrate do not accumulate and exit, thereby improving device characteristics and a method of manufacturing the same.

Another object of the present invention is to provide a semiconductor device and a method of manufacturing the same, which does not require a separate field oxidation process, which simplifies the process.

It is still another object of the present invention to provide a semiconductor device having a large alignment margin in a manufacturing process and a method of manufacturing the same.

1 is a cross-sectional view of a state in which a transistor is formed on an SOI substrate according to the prior art.

2A to 2G are diagrams illustrating a semiconductor device manufacturing process according to an embodiment of the present invention.

3 is a cross-sectional view illustrating an SOI substrate structure according to the present invention.

* Names of symbols for main parts of the drawings

201: second silicon layer 207: first silicon layer

204: investment oxide layer 206: conductor

A dual semiconductor substrate of the present invention for achieving the above object, the first semiconductor layer serving as a support substrate; A second semiconductor layer providing an active region; An insulating layer formed between the first semiconductor layer and the second semiconductor layer; And a conductor penetrating the insulating layer to contact the first semiconductor layer and the second semiconductor layer. The insulating layer extends to the sidewall of the second semiconductor layer and device isolation is performed by the extended portion.

In addition, a characteristic semiconductor device manufacturing method of the present invention comprises: a first step of forming a plurality of uneven parts by selective etching using an element isolation mask on the entire surface of the first semiconductor substrate; A second step of forming an insulating film on the entire surface of the resultant product in which the first step is completed to achieve surface planarization; A third step of forming a contact hole by selectively etching the insulating layer on the iron portion of the first semiconductor substrate; Forming a conductive film in the contact hole so as to planarize the surface; A fifth step of attaching a second semiconductor substrate to the entire surface of the resultant product of which the fourth step is completed; And a sixth step of etching the rear surface of the first semiconductor substrate so that the insulating layer is exposed.

Hereinafter, with reference to the accompanying drawings will be described an embodiment of the present invention;

3 shows an SOI substrate structure according to the present invention. Referring to FIG. 3, in the SOI substrate according to the present invention, a buried oxide layer 204 is formed between the first silicon layer 207 serving as a support substrate and the second silicon layer 201 providing an active region. The first silicon layer 207 and the second silicon layer 201 are contacted through the conductor 206 penetrating through the buried oxide layer 204. In addition, the buried oxide layer 204 extends to the sidewall of the second silicon layer 201 to act as a device isolation oxide film to define an active region of the second silicon layer 201.

As shown in FIG. 3, when the first silicon layer 207 for the support substrate and the second silicon layer 201 for providing the active region are contacted, a device (transistor) can be manufactured so that hot carriers generated in the active region do not accumulate. In addition, in the device manufactured with the substrate having such a structure, the advantages of the device using the SOI substrate can be maintained while improving the characteristics of the semiconductor device, such as solving the floating body effect.

2A to 2G illustrate a semiconductor device manufacturing process according to an embodiment of the present invention, and FIGS. 2A to 2E illustrate a substrate manufacturing process according to an embodiment of the present invention.

First, as shown in FIG. 2A, a plurality of grooves 202 are formed by selectively dry etching the first silicon substrate 201 providing the active region. The protrusion 203 naturally occurs by the formation of the groove. In this case, an element isolation mask is used as a mask for selectively dry etching the first silicon substrate 201.

Next, as shown in FIG. 2B, the oxide layer 204 is formed on the entire surface of the first silicon substrate 201 such that the groove 202 is sufficiently filled and the surface thereof is planarized.

Subsequently, as illustrated in FIG. 2C, the oxide layer 204 on the protrusion 203 is selectively etched to form a contact hole 205 so that a predetermined portion of the protrusion 203 of the first silicon substrate 201 is exposed.

Next, as shown in FIG. 2D, the inside of the contact hole 205 is filled with a conductor 206 such as polysilicon so that the entire surface is flattened. The method of filling the contact hole 205 into the contact hole 205 may be a method of etching back after deposition and epitaxial growth.

Subsequently, as shown in FIG. 2E, the second silicon substrate 207 to be a supporting substrate is adhered on the conductor 206 and the oxide layer 204 having the overall planarized surface, and turned over until the oxide layer 204 is exposed. 1 The silicon substrate 201 is chemically mechanically polished (CMP). When the process up to this point is completed, the substrate manufacturing process according to the exemplary embodiment of the present invention is completed as described above, and the first silicon layer 201 and the second silicon layer 207 pass through the buried oxide layer 204. Contact through the conductor 206. In addition, the buried oxide layer 204 extends to the sidewall of the second silicon layer 201 to act as a device isolation oxide film to define an active region of the second silicon layer 201. Meanwhile, as shown in FIG. 2E, the oxide layer 204 automatically extended to the sidewall of the first silicon substrate 201 is exposed upward in the fabrication process of the device, so that the contact hole (205 in FIG. It is just aligned in alignment with).

Subsequently, as shown in FIG. 2F, p-wells and n-wells are formed in the second silicon substrate 207 by mask and ion implantation, respectively.

2G shows a state in which a transistor is completed by forming a gate, a source, and a drain on the first silicon substrate 201.

In the prior art, the active region is completely isolated from the field oxide film and the buried oxide layer, so that hot carriers generated in the active region are accumulated in the active region. However, in the present invention, a contact is formed between the double silicon substrates while having the characteristics of a general SOI device. Hot carriers can be released, and since the field oxide film is automatically formed by the buried oxide layer, a separate field oxide film forming process such as a LOCOS process is not required. In addition, the oxide layer automatically extended to the sidewalls of the first silicon substrate is exposed upward, which also has the advantage of increasing the alignment margin in the next process.

Claims (8)

A first semiconductor layer serving as a support substrate; A second semiconductor layer providing an active region; An insulating layer formed between the first semiconductor layer and the second semiconductor layer; And And a conductor contacting the first semiconductor layer and the second semiconductor layer through the insulating layer. The method of claim 1, The insulating layer extends to the sidewall of the second semiconductor layer and the device is separated by the extended portion. The method according to claim 1 or 2, Wherein said semiconductor layer is a silicon layer, said insulating layer is an oxide layer, and said conductor is polysilicon. A first step of forming a plurality of uneven parts on the front surface of the first semiconductor substrate by selective etching using an element isolation mask; A second step of forming an insulating film on the entire surface of the resultant product in which the first step is completed to achieve surface planarization; A third step of forming a contact hole by selectively etching the insulating layer on the iron portion of the first semiconductor substrate; Forming a conductive film in the contact hole so as to planarize the surface; A fifth step of attaching a second semiconductor substrate to the entire surface of the resultant product of which the fourth step is completed; And And etching the back surface of the first semiconductor substrate to expose the insulating layer. The method of claim 4, wherein Etching for forming the uneven portion on the front surface of the first semiconductor substrate is a semiconductor device manufacturing method comprising a dry etching. The method of claim 4, wherein A method of manufacturing a semiconductor device, wherein etching of the back surface of the first semiconductor substrate is performed by chemical / mechanical polishing. The method of claim 4, wherein Wherein said semiconductor substrate is a silicon substrate, said insulating film is an oxide film, and said conductive film is a polysilicon film. The method of claim 7, wherein The polysilicon film is a method of manufacturing a semiconductor device is formed by the step of etching or epitaxial growth after deposition.

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