KR100248431B1 - High power semiconductor laser - Google Patents
High power semiconductor laser Download PDFInfo
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- KR100248431B1 KR100248431B1 KR1019960062714A KR19960062714A KR100248431B1 KR 100248431 B1 KR100248431 B1 KR 100248431B1 KR 1019960062714 A KR1019960062714 A KR 1019960062714A KR 19960062714 A KR19960062714 A KR 19960062714A KR 100248431 B1 KR100248431 B1 KR 100248431B1
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- 239000004065 semiconductor Substances 0.000 title claims abstract description 80
- 239000000758 substrate Substances 0.000 claims abstract description 33
- 230000017525 heat dissipation Effects 0.000 claims abstract description 10
- 229910000679 solder Inorganic materials 0.000 claims abstract description 8
- 229910001218 Gallium arsenide Inorganic materials 0.000 claims description 35
- 238000005253 cladding Methods 0.000 claims description 33
- 238000000034 method Methods 0.000 claims description 22
- 229910000530 Gallium indium arsenide Inorganic materials 0.000 claims description 10
- 229910000980 Aluminium gallium arsenide Inorganic materials 0.000 claims description 5
- 238000001312 dry etching Methods 0.000 claims description 5
- 238000001039 wet etching Methods 0.000 claims description 5
- 230000015572 biosynthetic process Effects 0.000 claims description 3
- 230000005855 radiation Effects 0.000 claims 2
- 238000005530 etching Methods 0.000 abstract description 12
- 229910052751 metal Inorganic materials 0.000 abstract description 7
- 239000002184 metal Substances 0.000 abstract description 7
- 230000010355 oscillation Effects 0.000 abstract description 4
- 230000020169 heat generation Effects 0.000 abstract description 2
- 238000004519 manufacturing process Methods 0.000 description 13
- 238000000206 photolithography Methods 0.000 description 7
- 229910004298 SiO 2 Inorganic materials 0.000 description 5
- 239000000463 material Substances 0.000 description 5
- 230000003321 amplification Effects 0.000 description 3
- 150000001875 compounds Chemical class 0.000 description 3
- 238000002347 injection Methods 0.000 description 3
- 239000007924 injection Substances 0.000 description 3
- 238000003199 nucleic acid amplification method Methods 0.000 description 3
- 230000003287 optical effect Effects 0.000 description 3
- 229910052691 Erbium Inorganic materials 0.000 description 2
- NBIIXXVUZAFLBC-UHFFFAOYSA-N Phosphoric acid Chemical compound OP(O)(O)=O NBIIXXVUZAFLBC-UHFFFAOYSA-N 0.000 description 2
- QAOWNCQODCNURD-UHFFFAOYSA-N Sulfuric acid Chemical compound OS(O)(=O)=O QAOWNCQODCNURD-UHFFFAOYSA-N 0.000 description 2
- 238000007796 conventional method Methods 0.000 description 2
- 239000013078 crystal Substances 0.000 description 2
- 230000007423 decrease Effects 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- UYAHIZSMUZPPFV-UHFFFAOYSA-N erbium Chemical compound [Er] UYAHIZSMUZPPFV-UHFFFAOYSA-N 0.000 description 2
- 239000000835 fiber Substances 0.000 description 2
- 239000013307 optical fiber Substances 0.000 description 2
- 125000002524 organometallic group Chemical group 0.000 description 2
- 238000007747 plating Methods 0.000 description 2
- -1 GaAs compound Chemical class 0.000 description 1
- 229910004283 SiO 4 Inorganic materials 0.000 description 1
- 229910000147 aluminium phosphate Inorganic materials 0.000 description 1
- 238000001816 cooling Methods 0.000 description 1
- 230000006866 deterioration Effects 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 230000005284 excitation Effects 0.000 description 1
- 238000002488 metal-organic chemical vapour deposition Methods 0.000 description 1
- 238000000059 patterning Methods 0.000 description 1
- 239000012071 phase Substances 0.000 description 1
- 239000000243 solution Substances 0.000 description 1
- 239000012808 vapor phase Substances 0.000 description 1
- 238000000927 vapour-phase epitaxy Methods 0.000 description 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
- H01S5/00—Semiconductor lasers
- H01S5/02—Structural details or components not essential to laser action
- H01S5/024—Arrangements for thermal management
- H01S5/02407—Active cooling, e.g. the laser temperature is controlled by a thermo-electric cooler or water cooling
- H01S5/02415—Active cooling, e.g. the laser temperature is controlled by a thermo-electric cooler or water cooling by using a thermo-electric cooler [TEC], e.g. Peltier element
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
- H01S5/00—Semiconductor lasers
- H01S5/04—Processes or apparatus for excitation, e.g. pumping, e.g. by electron beams
- H01S5/042—Electrical excitation ; Circuits therefor
- H01S5/0425—Electrodes, e.g. characterised by the structure
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
- H01S5/00—Semiconductor lasers
- H01S5/20—Structure or shape of the semiconductor body to guide the optical wave ; Confining structures perpendicular to the optical axis, e.g. index or gain guiding, stripe geometry, broad area lasers, gain tailoring, transverse or lateral reflectors, special cladding structures, MQW barrier reflection layers
- H01S5/22—Structure or shape of the semiconductor body to guide the optical wave ; Confining structures perpendicular to the optical axis, e.g. index or gain guiding, stripe geometry, broad area lasers, gain tailoring, transverse or lateral reflectors, special cladding structures, MQW barrier reflection layers having a ridge or stripe structure
- H01S5/2202—Structure or shape of the semiconductor body to guide the optical wave ; Confining structures perpendicular to the optical axis, e.g. index or gain guiding, stripe geometry, broad area lasers, gain tailoring, transverse or lateral reflectors, special cladding structures, MQW barrier reflection layers having a ridge or stripe structure by making a groove in the upper laser structure
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- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Electromagnetism (AREA)
- Optics & Photonics (AREA)
- Geometry (AREA)
- Semiconductor Lasers (AREA)
Abstract
본 발명은 종래의 0.98㎛ 반도체 레이저가 고출력으로 동작할 때 발생하는 열을 효과적으로 발산시켜 반도체 레이저의 온도에 따른 발진파장 변화를 감소시키고 양자효율을 증가시켜 반도체 레이저의 특성을 향상시킨 새로운 0.98㎛ 반도체 레이저의 구조에 관한 것으로, 활성층 좌우의 빛이 유도되지 않는 영역을 식각한 다음 반도체 레이저 칩을 솔더를 이용하여 칩고정용기판에 접속하고, 칩고정용기판에 열발산을 위한 TEC를 접속한 구조를 갖는 반도체 레이저를 제조하였다.The present invention effectively dissipates the heat generated when the conventional 0.98㎛ semiconductor laser operates at high power, thereby reducing the oscillation wavelength change according to the temperature of the semiconductor laser and increasing the quantum efficiency to improve the characteristics of the semiconductor laser. The structure of the laser, the area in which light on the left and right sides of the active layer is not induced, the semiconductor laser chip is connected to the chip fixing substrate using solder, and the TEC for heat dissipation is connected to the chip fixing substrate. A semiconductor laser having was prepared.
이에 의해 본 발명의 반도체 레이저는 리지(ridge) 좌우의 활성층 영역을 식각하여 열 발생의 주된 원인인 활성층과 금속층간의 거리를 좁혀준 새로운 형태의 방열구조를 제공하는 것에 의해 반도체 레이저의 효율이 향상되었다.Accordingly, the semiconductor laser of the present invention improves the efficiency of the semiconductor laser by providing a new type of heat dissipation structure that narrows the distance between the active layer and the metal layer, which is the main cause of heat generation, by etching the active layer regions on the left and right of the ridge. It became.
Description
본 발명의 목적은 반도체 레이저의 활성층에서 발생하는 열을 효과적으로 발산시켜 외부양자효율이 증가되도록한 새로운 형태의 방열구조를 가지는 고출력 반도체 레이저를 제공하는데 있다.SUMMARY OF THE INVENTION An object of the present invention is to provide a high power semiconductor laser having a new heat dissipation structure in which the external quantum efficiency is increased by effectively dissipating heat generated in the active layer of the semiconductor laser.
본 발명은 반도체 레이저에 관한 것으로, 특히 새로운 형태의 방열구조를 갖는 고출력 반도체 레이저에 관한 것이다.BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to semiconductor lasers, and more particularly, to a high power semiconductor laser having a novel heat dissipation structure.
EDFA(Erbium Doped Fiber Amplifier)의 광원으로 사용되는 0.98㎛ 파장대에서 발진하는 반도체 레이저는 광출력이 클수록 광증폭율이 증가하게 된다.Semiconductor lasers oscillating in the wavelength range of 0.98㎛ used as the light source of the EDFA (Erbium Doped Fiber Amplifier) will increase the optical amplification rate as the light output increases.
이를 위해서는 높은 광출력을 내는 반도체 레이저가 필수적인 요건이 된다. 반도체 레이저의 특성을 좌우하는 요소 중의 하나인 활성층에서 발생하는 열을 효과적으로 조절하는 것이 높은 광출력을 안정적으로 출력하는데 필수적이다.For this purpose, a high-power semiconductor laser is an essential requirement. Effective control of the heat generated in the active layer, which is one of the factors that influence the characteristics of the semiconductor laser, is essential to stably output high light output.
종래의 경우 활성층에서 발생된 열은 주로 활성층위 클래드층을 경유하여 전극을 통해 TEC(Thermoelectric Cooler:이하, TEC라 한다)로 열이 전달되었다.In the conventional case, heat generated in the active layer was mainly transferred to the TEC (Thermoelectric Cooler: TEC) through the electrode via the cladding layer on the active layer.
종래의 반도체 레이저의 경우 활성층에서 발생하는 열이 활성층위 클래드층을 통하여 TEC로 전달되기 때문에 효과적인 온도 조절이 어려워 광출력이 증가될수록 온도는 향상되고, 이에 따라 발진파장이 변화되어 양자효율이 감소되는 문제점이 있었다.In the case of the conventional semiconductor laser, since the heat generated from the active layer is transferred to the TEC through the cladding layer on the active layer, effective temperature control is difficult. As the light output is increased, the temperature is increased, and thus the oscillation wavelength is changed to decrease the quantum efficiency. There was a problem.
제1도 내지 제3도는 종래의 0.98㎛ RWG(ridge waveguide) 반도체 레이저의 제작 방법을 나타낸다.1 to 3 show a conventional method for fabricating a 0.98 탆 RWG (ridge waveguide) semiconductor laser.
이하, 제1도 내지 제3도를 참조하여 종래의 기술에 따른 반도체 레이저의 제조방법을 설명하면 다음과 같다.Hereinafter, a method of manufacturing a semiconductor laser according to the prior art will be described with reference to FIGS. 1 to 3.
제1도를 참조하면, GaAs의 화합물 반도체 기판(1)위에 GaAs와 GaInP층과의 밴드 갭 차이에 따른 전류의 흐름이 방해되는 것을 막기 위한 GaInAsP완충층(2), GaInP 클래드층(3), GaInAsP 완충층(4), GaInAs/GaInAsP 활성층(5), GaInAsP 완충층(6), GaInP 클래드층(7), 리지(ridge) 형성시 식각 정지를 위한 GaAs층(8), GaInP 클래드층(9), GaInAsP 완충층(10), 오믹접촉 형성을 위한 GaAs 오믹층(11)의 순서로 유기금속 기상 결정성장 장비(MOVPE:Metal Organic Vapor Phase Epitaxy)를 이용하여 차례로 적층한다.Referring to FIG. 1, a GaInAsP buffer layer (2), a GaInP clad layer (3), and a GaInAsP layer are provided on the GaAs compound semiconductor substrate (1) to prevent the flow of current due to the difference in the band gap between the GaAs and GaInP layers. Buffer layer (4), GaInAs / GaInAsP active layer (5), GaInAsP buffer layer (6), GaInP cladding layer (7), GaAs layer (8), GaInP cladding layer (9), GaInAsP for etch stop during ridge formation The buffer layer 10 and the GaAs ohmic layer 11 for forming ohmic contact are sequentially stacked using an organometallic vapor phase crystal growth apparatus (MOVPE: Metal Organic Vapor Phase Epitaxy).
이어서, 제2도에 나타낸 바와 같이, 활성영역을 정의하기 위해 GaAs층(11)상에 Si3N4혹은 SiO4절연막(도시하지 않음)을 형성하고, 이를 패터닝하여 상기 GaAs층(11)의 소정부분이 노출되도록 패턴을 형성한 다음, 노출된 GaAs층(11), GaInAsP완충층(10), GaInP 클래드층(9) 및 GaAs층(8)을 습식식각 또는 건식식각법으로 차례로 제거하여 활성층의 폭이 2~3㎛, 채널폭 20㎛를 갖도록 형성한다.Subsequently, as shown in FIG. 2, an Si 3 N 4 or SiO 4 insulating film (not shown) is formed on the GaAs layer 11 to define an active region, and then patterned to form an active region of the GaAs layer 11. After the pattern is formed to expose a predetermined portion, the exposed GaAs layer 11, GaInAsP buffer layer 10, GaInP cladding layer 9, and GaAs layer 8 are sequentially removed by wet etching or dry etching. It is formed to have a width of 2 to 3 µm and a channel width of 20 µm.
다음, 제3도에 나타낸 바와 같이, 리지(ridge)에 전류를 주입시키기 위하여 잔존하는 Si3N4및 SiO2절연막을 제거한 후, 노출된 전면에 Si3N4혹은 SiO2로된 절연막(12)을 형성한다.Next, as shown in FIG. 3, the remaining Si 3 N 4 and SiO 2 insulating films are removed to inject current into the ridge, and then the insulating film 12 made of Si 3 N 4 or SiO 2 is exposed on the entire surface. ).
이어서, 상기 절연막(12)을 사진식각법으로 패터닝하여 리지(ridge)의 상단을 노출시켜 전류 주입구를 형성시킨 다음, 노출된 기판의 전면에 p측 전극(13)을 증착시키고 도금공정을 통하여 p측 전극을 2~3㎛ 두께로 형성시킨다.Subsequently, the insulating layer 12 is patterned by photolithography to expose the upper end of the ridge to form a current injection hole. Then, the p-side electrode 13 is deposited on the entire surface of the exposed substrate, and p is deposited through a plating process. The side electrode is formed to a thickness of 2 to 3 mu m.
이어서, n-GaAs 기판(1)을 100㎛ 정도만 남도록 뒷면을 연마한 다음 n측 전극(14)을 형성시켜 0.98㎛ RWG(Ridge Waveguide)반도체 레이저의 제작을 완료한다.Subsequently, the back surface of the n-GaAs substrate 1 is polished so that only about 100 μm is left, and the n-side electrode 14 is formed to complete the fabrication of a 0.98 μm RWG (Ridge Waveguide) semiconductor laser.
이상의 방법으로 반도체 레이저를 제작하게 되면 반도체 레이저에 전류를 주입할 경우 활성층에서 발생한 열은 활성층위 클래드층을 지나 전극을 통해 칩 외부의 TEC로 전달되며(제6도의 A경로 참조) TEC의 구동을 통해 온도가 조절 된다.When the semiconductor laser is manufactured by the above method, when the current is injected into the semiconductor laser, the heat generated in the active layer passes through the cladding layer on the active layer and is transferred to the TEC outside the chip through the electrode (see path A of FIG. 6). The temperature is controlled through
따라서, 상기와 같은 종래의 반도체 레이저는 칩 내부로부터 외부의 냉각소자까지의 열 전달 경로가 제한됨에 따라 효과적으로 온도조절이 이루어지지 못하고 특성이 열화되는 단점을 가지게 되었다.Therefore, the conventional semiconductor laser as described above has a disadvantage in that the temperature is not effectively controlled and characteristics are deteriorated as the heat transfer path from the inside of the chip to the external cooling element is limited.
따라서, 본 발명은 종래의 기술에 따른 문제점을 해결하기 위하여 고출력 레이저가 갖는 고 주입전류에서의 열에 의한 특성 열화를, 활성층 주위에 채널층을 형성시키고, 두꺼운 금속막을 형성시킴으로써 효과적으로 열을 발산시켜 소자의 발진 파장을 안정시키고 광 출력을 향상시킨 반도체 레이저를 제공하는데 있다.Therefore, in order to solve the problems according to the related art, the deterioration of characteristics due to heat at a high injection current of a high-power laser can effectively dissipate heat by forming a channel layer around the active layer and forming a thick metal film. To provide a semiconductor laser that stabilizes the oscillation wavelength and improves the light output.
상기와 같은 목적을 달성하기 위한 본 발명의 제1실시예에 따른 반도체 레이저는 GaAs기판위에 GaInAsP 완충층, GaInP 클래드층, GaInAsP 완충층, 활성층, GaInAsP 완충층, GaInP 클래드층, 식각정지를 위한 GaAs층, GaInP 클래드층, GaInAsP 완충층 및 오믹접촉 형성을 위한 고농도의 GaAs 오믹층이 차례로 적층되어 있으며, 상기 GaAs 오믹접촉층으로부터 활성층 아래의 GaInP클레드층의 소정의 깊이 까지 소정의 간격으로 단차를 가지는 오목부를 형성하는 것에 의해 리지가 형성되어 있고, 상면에 리지의 GaAs 오믹층과 접속되는 p측전극이 형성되어 있고, 기판의 이면에 n측 전극이 형성되어 RWG 구조를 가지는 반도체 레이저칩의 p측 전극이 솔더에 의해 칩고정용기판과 결합되고, 상기 칩 고정용기판에 TEC가 결합되어 있는 구조를 가지는 것을 특징으로 한다.The semiconductor laser according to the first embodiment of the present invention for achieving the above object is a GaInAsP buffer layer, GaInP cladding layer, GaInAsP buffer layer, active layer, GaInAsP buffer layer, GaInP cladding layer, GaAs layer for etching stop, GaInP on GaAs substrate A clad layer, a GaInAsP buffer layer, and a high concentration of GaAs ohmic layers for forming ohmic contacts are sequentially stacked, and recesses having a step at predetermined intervals from the GaAs ohmic contact layer to a predetermined depth of the GaInP clad layer under the active layer are formed. The ridge is formed, the p-side electrode connected to the GaAs ohmic layer of the ridge is formed on the upper surface, the n-side electrode is formed on the back surface of the substrate, and the p-side electrode of the semiconductor laser chip having the RWG structure is soldered. It is coupled to the chip fixing substrate by, characterized in that it has a structure in which the TEC is coupled to the chip fixing substrate.
상기와 같은 목적을 달성하기 위한 본 발명의 제2실시예에 따른 반도체 레이저는 InP 기판위에 클래드층, 활성층, 클래드층 및 오믹접촉 형성을 위한 InGaAs 오믹층이 형성되어 있고, 상기 오믹층으로부터 활성층 아래 클레드층의 소정의 깊이까지 단차를 가지는 오목부가 형성되어 있으며, 상기 오목부의 형성에 의해 오목부사이에 리지를 구비하고, 상기 리지의 오믹층과 접촉하여 상면에 형성된 p측전극과 기판의 이면에 n측 전극이 형성되어 RWG 구조를 가지는 반도체 레이저칩과 칩고정용기판이 솔더에 의해 접속되어 있고, 상기 솔더에 방열판으로서 TEC가 접속되어 있는 것을 특징으로 하는 방열구조를 갖는 것을 특징으로 한다.In the semiconductor laser according to the second exemplary embodiment of the present invention for achieving the above object, a cladding layer, an active layer, a cladding layer, and an InGaAs ohmic layer for forming ohmic contact are formed on an InP substrate, and under the active layer from the ohmic layer. A recess having a step up to a predetermined depth of the cladding layer is formed. A recess is formed between the recesses by the formation of the recess, and the p-side electrode formed on the upper surface in contact with the ohmic layer of the ridge is formed on the rear surface of the substrate. A n-side electrode is formed, and a semiconductor laser chip having an RWG structure and a chip fixing substrate are connected by solder, and a TEC is connected to the solder as a heat sink.
제1도는 종래의 고출력 레이저 제작을 위한 1차 성장 후의 반도체 레이저 구조.1 is a semiconductor laser structure after primary growth for fabricating a conventional high power laser.
제2도는 종래의 RWG(Ridge Waveguide) 반도체 레이저 제작을 위한 식각 공정후의 반도체 레이저 단면도.2 is a cross-sectional view of a semiconductor laser after an etching process for fabricating a conventional rigid waveguide (RWG) semiconductor laser.
제3도는 종래의 RWG 반도체 레이저 제작 후의 단면도.3 is a cross-sectional view of a conventional RWG semiconductor laser after fabrication.
제4도는 본 발명의 고출력 레이저 제작을 위한 식각공정 후의 반도체 레이저 단면도.4 is a cross-sectional view of a semiconductor laser after an etching process for fabricating a high power laser of the present invention.
제5도는 본 발명의 RWG 반도체 레이저 제작 후의 단면도5 is a cross-sectional view after fabrication of the RWG semiconductor laser of the present invention.
제6도는 본 발명의 RWG 반도체 레이저와 TEC의 조립도 및 열전달 경로도6 is an assembly diagram and a heat transfer path diagram of the RWG semiconductor laser and TEC of the present invention.
*도면의 주요부분에 대한 부호의 설명** Description of the symbols for the main parts of the drawings *
1:기판2:GaInAsP 완충층1: Substrate 2: GaInAsP buffer layer
3:n-GaInP 클래드 층4:GaInAsP 완충층3: n-GaInP cladding layer 4: GaInAsP buffer layer
5:GaInAs/GaInAsP 활성층6:GaInAsP 완충층5: GaInAs / GaInAsP active layer 6: GaInAsP buffer layer
7:p-GaInP 클래드 층8:GaAs 층7: p-GaInP cladding layer 8: GaAs layer
9:p-GaInP 클래드층10:p-GaInAsP 완충층9: p-GaInP clad layer 10: p-GaInAsP buffer layer
11:p+-GaAs 오믹층12:절연막11: p + -GaAs ohmic layer 12: insulating film
13:p측 전극14:n측 전극13: p-side electrode 14: n-side electrode
15:절연막16:p측 전극15: insulating film 16: p-side electrode
17:n측 전극18:TEC17: n-side electrode 18: TEC
19:숄더(solder)20:칩 고정용 기판19: shoulder 20: chip fixing substrate
EDFA의 광원으로 사용되는 0.98㎛ 파장대에서 발진하는 반도체 레이저는 광출력이 클수록 광증폭율이 증가하게 된다. 이를 위해서는 높은 광출력을 내는 반도체 레이저가 필수적인 요건이 된다. 반도체 레이저의 특성을 좌우하는 요소 중의 하나인 활성층에서 발생하는 열을 효과적으로 조절하는 것이 높은 광출력을 안정적으로 출력하는데 필수적이다.The semiconductor laser oscillating in the wavelength range of 0.98㎛ used as the light source of EDFA, the greater the light output, the higher the optical amplification factor. For this purpose, a high-power semiconductor laser is an essential requirement. Effective control of the heat generated in the active layer, which is one of the factors that influence the characteristics of the semiconductor laser, is essential to stably output high light output.
본 발명은 기존의 0.98㎛ 반도체 레이저의 활성층에서 발생하는 열을 효과적으로 제거시키기 위하여 활성층 주위를 깊이 1㎛, 폭 10㎛만큼 식각시켜 냄으로써 열 방출이 용이하도록 하는 새로운 반도체 레이저의 구조에 대한 것이다.The present invention relates to a structure of a new semiconductor laser that facilitates heat dissipation by etching around the active layer by 1 μm in depth and 10 μm in width to effectively remove heat generated in the active layer of the conventional 0.98 μm semiconductor laser.
본 발명의 상세한 실시예를 제4도 내지 제6도에 참조하여 본 발명의 제1실시예에 따른 반도체 레이저의 제조방법을 설명하면 다음과 같다.A detailed description of a method for manufacturing a semiconductor laser according to a first embodiment of the present invention with reference to Figures 4 to 6 as follows.
제4도는 본 발명의 반도체 레이저의 제조 공정단면도를 나타낸 것으로 리지를 형성하기 위해 단차를 가지는 오목부를 형성한 상태를 나타낸다.4 is a cross-sectional view of the manufacturing process of the semiconductor laser of the present invention, showing a state in which a recess having a step is formed to form a ridge.
본 발명이 반도체 레이저의 제조고정은 종래의 기술에 대하여 설명한 제1도와 제2도의 공정순서와 동일한 공정을 포함한다.The manufacturing fixation of the semiconductor laser of the present invention includes the same steps as those of the first and second drawings described with respect to the prior art.
즉, 제4도에 나타낸 바와 같이, n형 GaAs기판인 화합물 반도체 기판(1) 위에 GaAs와 GaInP 층과의 밴드 갭 차이에 따른 전류의 흐름이 방해되는 것을 막기 위한 n-GaInAsP 완충층(2), n-GaInP클래드층(3), GaInAsP 완충층(4), GaInAs/GaInAsP층(MQW:Multiple Quantum Well)으로 형성되는 활성층(5), GaInAsP 완충층(6), p-GaInP 클래드층(7), 리지 형성시 식각 정지를 위한 p-GaAs층(8), p-GaInP 클래드층(9), p-GaInAsP 완충층(10), 오믹접촉 형성을 위한 GaAs로된 오믹층(11)의 순서로 유기금속 기상 결정성장 장비를 이용하여 종래와 동일하게 적층한다.That is, as shown in FIG. 4, the n-GaInAsP buffer layer 2 for preventing the flow of current due to the band gap difference between the GaAs and GaInP layers on the compound semiconductor substrate 1, which is an n-type GaAs substrate, n-GaInP cladding layer (3), GaInAsP buffer layer (4), active layer (5) formed of GaInAs / GaInAsP layer (MQW: Multiple Quantum Well), GaInAsP buffer layer (6), p-GaInP cladding layer (7), ridge The organometallic gas phase is in the order of the p-GaAs layer (8), the p-GaInP clad layer (9), the p-GaInAsP buffer layer (10), and the ohmic layer (11) made of GaAs for forming ohmic contact. Laminate in the same manner as in the prior art using the crystal growth equipment.
이어서, 오믹층(11)위에 Si3N4혹은 SiO2절연막을 형성하고, 이를 사진식각 공정으로 패터닝하여 활성층의 폭이 2-3㎛, 채널 폭 20㎛를 유지하도록 절연막패드(도시하지 않음)을 형성한 다음, 상기 절연막패턴을 식각 마스크로 이용하여 노출된 오믹층(11)으로부터 p-GaAs층(8)까지 습식식각 혹은 건식식각 공정으로 제거하고, 잔존하는 절연막패턴을 HF계 식각용액을 이용하여 제거한다.Subsequently, an Si 3 N 4 or SiO 2 insulating film is formed on the ohmic layer 11 and patterned by a photolithography process so that the active layer has a width of 2-3 μm and a channel width of 20 μm (not shown). Next, the insulating film is removed by wet or dry etching from the exposed ohmic layer 11 to the p-GaAs layer 8 using the insulating film pattern as an etching mask, and the remaining insulating film pattern is removed from the HF etching solution. To remove.
그 다음, 전면에 Si3N4또는 SiO2로된 절연막(도시하지 않음)을 형성시키고, 이를 사진식각 공정으로 패터닝하여, 리지(ridge) 사이의 GaInP 클래드층(7)이 폭 10㎛으로 노출되도록 절연막패턴을 형성한다.Next, an insulating film (not shown) made of Si 3 N 4 or SiO 2 is formed on the entire surface, and it is patterned by a photolithography process so that the GaInP clad layer 7 between the ridges is exposed to a width of 10 μm. The insulating film pattern is formed as much as possible.
이때 형성되는 절연막패턴에 의해 노출되는 영역이 리지의 측벽으로부터 1.5-2㎛ 떨어져 위치하도록 형성한다. 이는 활성층에서 발생된 빔(beam)이 전극에 의해 방해되지 않고 충분히 유도(guiding)되도록 하기 위함이다.At this time, the region exposed by the insulating layer pattern is formed so as to be located 1.5-2㎛ away from the side wall of the ridge. This is to ensure that the beam generated in the active layer is sufficiently guided without being disturbed by the electrode.
이어서, 상기 절연막패턴을 식각 마스크로 이용하여 노출된 GaInP 클래드층(7)으로부터 GaInP 클래드층(3)의 소정깊이까지 식각되도록 황산계(H2SO4:H2O:H2O2) 및 인산계(HCl:H3PO4)를 이용한 선택 습식식각이나 건식식각을 이용하여 1㎛ 깊이로 식각하여 리지들 사이의 공간에 단차를 가지는 오목부를 형성한다.Subsequently, sulfuric acid-based (H 2 SO 4 : H 2 O: H 2 O 2 ) to be etched from the exposed GaInP cladding layer 7 to a predetermined depth of the GaInP cladding layer 3 using the insulating film pattern as an etching mask. Selective wet etching using phosphoric acid (HCl: H 3 PO 4 ) or etching using a dry etching to a depth of 1㎛ to form a recess having a step in the space between the ridges.
그 다음, 제5도에 도시한 바와 같이, 식각마스크로 사용된 절연막패턴을 제거한 다음 전면에 Si3N4또는 SiO2으로된 절연막(15)을 형성시키고, 사진식각법으로 절연막(15)을 패터닝하여 리지(ridge)상단, 예컨대 p+-GaAs으로 형성된 오믹층(11)의 표면을 소정의 폭으로 노출시켜 전류 주입구를 형성한다.Next, as shown in FIG. 5, after removing the insulating film pattern used as an etching mask, an insulating film 15 made of Si 3 N 4 or SiO 2 is formed on the entire surface, and the insulating film 15 is formed by photolithography. By patterning, the surface of the ohmic layer 11 formed of the ridge top, for example, p + -GaAs, is exposed to a predetermined width to form a current injection hole.
이어서, 노출된 기판의 전면에 금속을 증착시키고, 도금 공정을 통하여 P측전극(16)을 고전류에 견디도록 2-3㎛ 두께로 형성한다.Subsequently, metal is deposited on the entire surface of the exposed substrate, and the P-side electrode 16 is formed to have a thickness of 2-3 μm to withstand high current through the plating process.
그 다음, 기판(1)이 100㎛ 정도의 두께가 되도록 이면을 연마한 다음, 기판의 이면에 n측 전극(17)을 형성시킨다.Then, the back surface is polished so that the substrate 1 has a thickness of about 100 μm, and then the n-side electrode 17 is formed on the back surface of the substrate.
이어서, 제6도에 도시한 바와 같이, n측 전극이 형성된 반도체 레이저 칩을 솔더(도전성 접합물)(19)를 사용하여 칩고정용 기판(20)에 접합시키고, 상기 고정용기판(20)에 반도체 레이저로부터 발생하는 열을 외부로 방출시키기 위한 TEC(18)에 부착시켜 본 발명에 따른 반도체 레이저를 제조한다.Subsequently, as shown in FIG. 6, the semiconductor laser chip on which the n-side electrode is formed is bonded to the chip fixing substrate 20 using a solder (conductive bonding material) 19, and the fixing substrate 20 To the TEC 18 for dissipating heat generated from the semiconductor laser to the outside, thereby manufacturing the semiconductor laser according to the present invention.
또한, 본 발명의 제2실시예에 따른 반도체 레이저의 제조방법에 대하여 설명하면 다음과 같다.In addition, the manufacturing method of the semiconductor laser according to the second embodiment of the present invention will be described.
본 발명의 제2실시예에 따른 반도체 레이저의 제조방법은 상술한 제1실시예의 일부공정을 포함하며, 차이점은 화합물 반도체기판(1)위에 형성하는 반도체 물질층을 원하는 파장영역에 따라 변화시켜 제조하는 방법을 개시하고 있다.The manufacturing method of the semiconductor laser according to the second embodiment of the present invention includes some processes of the first embodiment described above, and the difference is that the semiconductor material layer formed on the compound semiconductor substrate 1 is manufactured by changing the layer of semiconductor material according to the desired wavelength range. A method of doing this is disclosed.
제2실시예에 따른 반도체 레이저는 InP 또는 GaAs으로된 화합물 반도체기판(1)상에 InP 또는 AlGaAs으로 형성되는 클래드층(3), GaInAs/GaInAsP 혹은 AlGaAs/GaAs로 형성되는 활성층(5), InP 또는 AlGaAs으로 형성된 클래드층(9) 및 InGaAs 또는 GaAs으로 형성되는 오믹층(11)을 차례로 적층시키고, 상기 제4도에서와 동일한 사진식각 공정에 의해 오믹층(11)을 1차식각하여 리지와 활성층을 정의하고, 2차 사진식각공정으로 상기 리지사이의 클래드층(9), 활성층(5) 및 클래드층(3)의 소정깊이까지를 식각하여 리지사이에 단차를 가지는 오목부를 형성한다.The semiconductor laser according to the second embodiment includes a cladding layer 3 formed of InP or AlGaAs on the compound semiconductor substrate 1 made of InP or GaAs, an active layer 5 formed of GaInAs / GaInAsP or AlGaAs / GaAs, and InP. Alternatively, the cladding layer 9 formed of AlGaAs and the ohmic layer 11 formed of InGaAs or GaAs are sequentially stacked, and the ohmic layer 11 is first etched by the same photolithography process as in FIG. An active layer is defined, and a recess having a step between the ridges is formed by etching the cladding layer 9, the active layer 5, and the cladding layer 3 between the ridges by a secondary photolithography process.
이후, 후속공정은 제1실시예와 동일하게 실시하여 반도체 레이저를 제조한다. 예컨대, 상기 제2실시예에서 기판(1)상에 형성되는 반도체물질층의 종류 및 적층되는 물질층수를 제외하고 나머지 공정조건은 제1실시예와 동일하다.Subsequently, a subsequent process is performed in the same manner as in the first embodiment to manufacture a semiconductor laser. For example, except for the type of semiconductor material layer formed on the substrate 1 and the number of material layers stacked in the second embodiment, the remaining process conditions are the same as in the first embodiment.
상술한 바와 같은 구조로 제조되는 본 발명의 반도체 레이저는 제6도에 나타낸 바와 같이, 솔더(19)가 새로이 형성시킨 채널까지 연결되므로 활성층에서 발생된 열이 종래의 반도체 레이저와 비교하여 활성층 옆에 형성된 금속전극(16)을 통해(B 혹은 C 경로) 용이하게 TEC(18)로 전달된다.As shown in FIG. 6, the semiconductor laser of the present invention manufactured with the structure as described above is connected to the channel newly formed by the solder 19, so that the heat generated in the active layer is adjacent to the active layer in comparison with the conventional semiconductor laser. It is easily delivered to the TEC 18 through the formed metal electrode 16 (B or C path).
또한, 활성층(5) 밑의 클래드층으로 발산되는 열도 금속전극(16)을 통해 발산되기 때문에 이전의 경우보다 활성층(5) 좌우로 방출되는 열이 많아져 효과적인 온도조절이 가능하게 된다.In addition, since the heat dissipated to the cladding layer under the active layer 5 is also dissipated through the metal electrode 16, the heat emitted to the left and right of the active layer 5 is increased more than before, thereby enabling effective temperature control.
본 발명의 실시예는 광섬유 증폭기용 여기 광원인 0.98㎛ 반도체 레이저 및 1.48㎛ 반도체 레이저뿐만 아니라 다른 파장에서 발진하는 반도체 레이저에도 동일하게 적용된다.Embodiments of the present invention are equally applicable to 0.98 탆 semiconductor lasers and 1.48 탆 semiconductor lasers as excitation light sources for optical fiber amplifiers, as well as semiconductor lasers oscillating at different wavelengths.
따라서 본 발명은 효과적으로 열이 방출됨에 따라 고출력 동작에서도 안정된 파장특성을 갖고 동일 인가전류 조건에서 기존의 구조에 비하여 광출력이 향상되는 고출력 반도체 레이저 구조가 제공된다.Accordingly, the present invention provides a high power semiconductor laser structure that has stable wavelength characteristics even at high power operation as the heat is effectively released and the light output is improved compared to the conventional structure under the same applied current conditions.
0.98㎛ 파장대에서 발진하는 반도체 레이저는 Er이 첨가된 광섬유 증폭기 EDFA:Erbium Doped Fiber Amplifier)의 광원으로 광섬유를 통과하는 신호를 증폭시키는데 사용된다. 따라서 0.98㎛ 반도체 레이저의 광출력이 클수록 EDFA의 광증폭율이 증가하게 된다.The semiconductor laser oscillating in the wavelength range of 0.98㎛ is used as a light source of Er-added fiber-optic amplifier EDFA (Erbium Doped Fiber Amplifier) to amplify the signal passing through the optical fiber. Therefore, the greater the light output of the 0.98㎛ semiconductor laser, the higher the optical amplification factor of EDFA.
이를 위해서는 높은 광출력을 낼 수 있는 0.98㎛ 반도체 레이저의 제작이 중요한 의미를 갖는다.For this purpose, the fabrication of a 0.98㎛ semiconductor laser capable of high light output is important.
특히, EDFA에 사용하기 위해서는 반도체 레이저의 광출력 향상이 EDFA모듈 제작에 있어서 중요한 요소중의 하나이다. 높은 광 출력을 얻기 위해서는 인가전류를 향상시켜야 하므로, 활성층의 온도는 점차로 증가하게 된다.In particular, for use in EDFA, improving the light output of semiconductor laser is one of the important factors in the production of EDFA module. In order to obtain high light output, the applied current must be improved, so that the temperature of the active layer is gradually increased.
이에 따라 출력되는 빔의 파장이 변화하고 외부양자효율이 감소하는 등 소자의 특성이 나빠지게 된다. 이 문제점을 해결하기 위해 본 발명에서는 고출력 동작에서 활성층에서 발생하는 열이 효과적으로 제거되도록 함으로써 온도에 따른 파장 변화로 인한 문제점을 해소시키고 광출력을 향상시킴으로써 소자의 특성을 향상시켰다.As a result, the characteristics of the device deteriorate, such as the wavelength of the output beam changes and the external quantum efficiency decreases. In order to solve this problem, in the present invention, the heat generated in the active layer is effectively removed in the high power operation to solve the problem caused by the wavelength change with temperature and improve the light output characteristics of the device.
활성층에서 발생되는 열을 효과적으로 발산시키기 위하여 활성층 주위에 채널을 형성시켰다. 이를 위해 기존의 방법에 의한 리지(ridge) 형성을 위한 식각 후에 전면에 절연막을 형성시키고 사진식각 공정을 통하여 공진기 길이 방향으로 활성층 좌우에 폭 10㎛, 깊이 1㎛의 채널을 형성시켰다.Channels were formed around the active layer to effectively dissipate heat generated in the active layer. To this end, an insulating film was formed on the entire surface after etching to form a ridge by the conventional method, and a channel having a width of 10 μm and a depth of 1 μm was formed on the left and right sides of the active layer in the resonator length direction through a photolithography process.
이에 따라 활성층에서 발생한 열이 활성층 좌우의 금속층을 통해 TEC(18)로 쉽게 발산되어 활성층(5) 주위의 오도가 종래의 경우보다 빠르게 조절된다.Accordingly, heat generated in the active layer is easily dissipated to the TEC 18 through the metal layers on the left and right sides of the active layer, so that the misconduct around the active layer 5 is controlled faster than in the conventional case.
본 발명의 효과는 다음과 같다. 고출력 반도체 레이저에서 발생하는 활성층 주위에서의 높은 열을 활성층 주위에 채널을 형성시켜 줌으로써 열의 발산이 용이하여지고 이에 따라 첫째, 반도체 레이저의 발진파장 안정화 둘째, 반도체 레이저의 양자효율 증가와 같은 반도체 레이저 특성 향상을 기대할 수 있다.The effects of the present invention are as follows. Heat generation is facilitated by forming channels around the active layer to generate high heat around the active layer generated by the high-power semiconductor laser. First, the oscillation wavelength of the semiconductor laser is stabilized. Second, semiconductor laser characteristics such as quantum efficiency increase of the semiconductor laser. You can expect an improvement.
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