KR100248159B1 - Method of forming sog layer with ion implantation in semiconductor device - Google Patents

Abstract

The present invention improves the characteristics of the SOG layer by the method of forming the SOG layer through ion implantation in the semiconductor device, thereby suppressing void generation due to structural limitations and wet etching during subsequent heat treatment and opening of the contact hole. It is about ensuring the safety of the device against chemicals.

In the semiconductor device according to the present invention for achieving the above object, a method of forming an SG layer through ion implantation is a process of forming an HSG-based SG layer on a semiconductor substrate, and ion in the SG layer. Performing implantation, and densification of the ion implanted ESO layer.

Description

Method of forming SG layer by ion implantation in semiconductor device

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for forming an insulating layer of a semiconductor device, and to employing hydrogen silsesquioxane (HSQ) in forming a silicon on glass (SOG) insulating layer on a wafer on which a semiconductor device is formed. As the degree of integration of semiconductor devices according to technology development increases, the gap formed when the distance between devices formed on a wafer by using conventional atmospheric pressure chemical vapor deposition (APCVD) is 0.18 μm or less. In order to fill the gap, a void due to the gap filling capability is generated and thus a bit line bridge is generated. At this time, HSK Suji is used as a material to fill the gap, in order to form stable interlayer dielectrics.

In particular, it is related to securing the safety of the device against chemicals during wet etching during the subsequent heat treatment and opening of the contact hole by converting the characteristics of the escaping gap for implantation into argon ion (Ar ⁺ ) into a high density oxide film.

Generally, a silicon oxide film is used as a dielectric material, which is formed by oxidizing and growing an exposed portion of a silicon substrate or polysilicon of an integrated circuit, or formed by chemical vapor deposition (CVD).

However, in the case of planarization, it is effective to form a silicon oxide film by flowing a starting material for forming a liquid silicon oxide film on an integrated circuit structure. In this case, the silicon oxide film formed on the semiconductor integrated circuit is generally formed by using a hydridosilane-based coating material such as HSK as a starting material.

HSK is well applied on an integrated circuit including a stepped surface to form a silicon oxide film having a high yield. The applied HSK is subjected to a primary drying process to remove the solvent, followed by a curing process which is heated between about 200 to 1000 degrees Celsius to form a desirable silicon oxide film. However, after primary drying, the incomplete conversion of HSK, a coating material, to the silicon oxide film is found on the stepped surface, especially in the case where the gap between steps is narrow or near trench, there is no complete curing and the gap between steps Incomplete curing is also found in the vicinity of the edge of the bottom of the stairs in this non-narrow area.

The conversion mechanism of HSK resin of H resin to silicon oxide film is the following reversible reaction.

HSK ↔ SiO ₂ + H ₂ ↑

Thus, the complete reaction to form the desired silicon oxide film depends on the ability of the hydrogen molecules to escape the coating material to direct the reaction direction of the equation above. This deviating capacity is lowered due to the reduced diffusion angle of the deep corners of the trenches on the substrate, between the steps of the narrowly spaced surfaces, or near the steps, with a reduced diffusion angle or through which the hydrogen gas can pass. do.

As a result, the conversion of the coating material into incomplete silicon oxide film can lead to undesirable consequences of hydrogen evolution in subsequent process steps, and also has a material with an expansion coefficient different from that of silicon oxide film completely cured on the integrated circuit and May result in etching characteristics.

In a conventional semiconductor device, a method of forming an SOG layer through ion implantation is as follows.

Polysilicon is deposited to form a word line on the semiconductor substrate on which the device is formed, and then a protective nitride film is deposited, and then word lines are formed through a photolithography process. After depositing a low pressure nitride film for forming a sidewall spacer on the formed word line, a buffer oxide film is formed by low pressure chemical vapor deposition (CVD) and then deposited by BCVD or USG by atmospheric chemical vapor deposition (APCVD). The gap is buried. If SOG is used, thermal curing is used. Then, after densification of the thin film formed by the atmospheric pressure chemical vapor deposition method through high temperature annealing, a protective layer is made of a silicon oxide film formed by low pressure chemical vapor deposition. In some cases, chemical mechanical polishing (CMP) is performed to ensure flatness of the protective layer.

1A to 1F are cross-sectional views showing a method of forming an insulating film for filling gaps between steps or elements in a step shape on a wafer in a semiconductor device according to the prior art.

In FIG. 1A, after the polysilicon 12 is deposited on the silicon substrate 11, the capping nitride layer 13 is deposited by low pressure chemical vapor deposition, and a word line pattern is formed by a photo process. The word line is then formed using an etching process.

In FIG. 1B, a low pressure chemical vapor deposition method is performed on the side surface of the word line, the side and top surfaces of the nitride film 13 remaining on the word line, and the exposed silicon substrate 11 to form sidewalls of the stepped word lines in cross-section. The nitride film 14 is deposited.

In FIG. 1C, the nitride film 14 is etched back to form the word line sidewall 14.

In Fig. 1D, the buffer oxide film 15 is formed by low pressure vapor deposition on the surface of the exposed substrate 11, the word line sidewalls and the remaining nitride film 13 by the low pressure vapor deposition.

In FIG. 1E, the layer 16 is formed by depositing BPSG or USG using atmospheric pressure chemical vapor deposition to a thickness sufficient to fill in the stepped gaps and remain in the drawing. In this case, when SOG is used, residual solvent in the layer 16 is removed using a thermal cure method. Thereafter, the BPSG, USG, or SOG layer 16, which has already been formed, is densified through a high temperature anneal at a high temperature.

In FIG. 1F, a silicon oxide film is formed on the formed BPSG, USG, or SOG layer 16 by low pressure chemical vapor deposition to form a capping layer 17 for planarization of the surface. In order to planarize, it is common to perform CMP (Chemical Mechanical Polishing) in some cases to secure an ILD process.

In the semiconductor device, when the distance between the stepped steps located below the BPSG or USG layer formed by the conventional method is 0.25 µm or less, void generation due to structural limitations cannot be suppressed.

In addition, in the spin-on gap filling process, since heat cure does not completely remove the solvent, it is easily etched by wet chemicals in the contact hole charting process. A bridge occurs.

Therefore, it is required to improve the trait of the oxide film that can compensate for the above disadvantages.

Accordingly, an object of the present invention is to suppress the generation of voids due to structural limitations and to the subsequent heat treatment and contact hole opening by improving the trait of the SOH layer in the method of forming a SOG layer through ion implantation in a semiconductor device. The present invention relates to ensuring the safety of devices against chemicals during wet etching.

That is, the present invention can suppress the occurrence of cracks due to void generation during filling due to the small gap between gaps by using the inorganic material of the H series as a gap filling material, in the prior art Solvent remaining in the line (line to line) between the steps completely removes the SOG film to form a stable film quality irrespective of the thickness of the SOG film to be formed, thereby making it resistant to the wet etching agent in the subsequent charter process It provides the stability of the process, and also adopts the ion implantation method has the advantage of easy depth control.

In the semiconductor device according to the present invention for achieving the above object, a method of forming an SG layer through ion implantation comprises the steps of forming an SG layer of a HSG series on a semiconductor substrate; Ion implantation into the Suji layer, and densification of the ion implanted Suji layer.

1A to 1F are cross-sectional views showing a method of forming an insulating film for filling gaps between steps or elements in a step shape on a wafer in a semiconductor device according to the prior art.

2A to 2G and 3A to 3C respectively illustrate chemical formulas of forming an SOH insulating layer using HSK and changing the chemical bonding of SOH during ion implantation and curing at high temperature. .

In general, in the manufacture of semiconductor devices, silicon oxide films are used as an insulating material between devices or layers, which are grown by oxidizing exposed portions of silicon substrates or polysilicon of integrated circuits or formed by chemical vapor deposition (CVD).

However, in the case of a planarization, it is common to form a silicon oxide film by flowing a starting material for forming a liquid silicon oxide film on the integrated circuit structure, that is, by applying it.

Formation of a silicon oxide film formed on a semiconductor integrated circuit is generally made of a starting material of a hydridosilane-like coating material such as HSK.

The use of thin film ceramic silica as a protective film or insulating film in electronic devices is well known in the art. The coating material exerts excellent properties to protect the substrate located below the film from the surroundings or effectively as an electrical nonconductor.

Nevertheless, the prior art requires high temperature and prolonged thermal budget for the oxidation and densification of HSK, and causes the damage or destruction of the substrate, so such a requirement is sensitive to most temperatures. This is not suitable if required.

A method of forming a silicon oxide film on various substrates including electronic devices using HSK resin is disclosed in US Pat. No. 4,756,977.

The hydridosilane resin is called HSK or H resin and has the following formula.

(H / SiO _3/2 ) _{n where} n is about 10 to 100 when fully condensed or hydrolyzed; HSi (OH) _x (OR) _y O _{z / 2 where} x = 0-2, y = 0-2, z = 1-3, x + y + z = 3 and the average value of y of the polymer is greater than zero. HSK as coating material is described in detail in US Pat. No. 5,145,723 (Ballance et al.).

As a prior art related to the present invention, there is a US Patent 5,429,990 for the SOG planarization process using the ion implantation method, and in the curing process in the case of using hydrogen silsesquioxane as a starting material for forming the silicon oxide film In respect of US Patent 5,456,952.

In the semiconductor device according to the present invention, a method of forming an SOG layer through ion implantation is performed by the following processes.

First, the uneven surface of the semiconductor substrate on which the device is formed is coated with an HSQ-based SOG layer as an interlayer insulating film, and ion implantation is performed using ions of atoms capable of ionizing ion implantation into the SOH layer. And annealing the ion implanted sedge layer in the chamber for densification, and forming a capping layer for securing flatness on the annealed sgio layer.

Hereinafter, the present invention will be described in detail with reference to the accompanying drawings.

2A to 2G and 3A to 3C, respectively, illustrate a process of forming an SOH insulating layer using HSK and a process in which chemical bonding of SOH is changed during ion implantation and curing at high temperature. Indicates.

In FIG. 2A, polysilicon 22 for word line formation is deposited on a silicon substrate 21 on which semiconductor devices are formed, and then a nitride film 33 or a silicon oxide film 33 for capping is deposited thereon. After deposition by low pressure chemical vapor deposition (LPCVD) to perform a photo-etch process (photo and etch) to remove a predetermined portion of the polysilicon layer 22 and the nitride film 33 to form a word line.

In FIG. 2B, an interlayer buffer silicon oxide film 24 is formed by depositing the upper and side surfaces of the formed word line and the exposed surface of the silicon substrate 21.

In FIG. 2C, the upper portion of the buffer silicon oxide film 24 is coated with HSC series spine glass (SOG). S-OJI is used as a tungsten insulating film because of its good flowability, but has a low density, which has low hygroscopicity, impact resistance, and abrasion resistance, and does not easily block impurities. The coated esot 25 is 0.05-5 μm from the exposed semiconductor substrate 21 so as to fill the gaps between the stepped word lines as shown in the cross sectional view and to sufficiently include the stepped shapes. It is formed in thickness.

In FIG. 3a or 2c, the chemical bonds of S-Oji in the process shown in FIG. 2-C are represented. In H-SQ-based S-O-Zi coated on the silicon oxide film 24 for buffer, silicon atoms are represented by one oxygen atom and one Covalently bonded to hydrogen atoms, two oxygen atoms are covalently bonded to two neighboring silicon atoms. At this time, the chemical formula of Eoji is represented by [HSiO _3/2 ] _n , and when analyzed by FTIR (FTIR), a peak of silicon-hydrogen bond appears on the left side of the silicon-oxygen bond peak.

In FIG. 2D, ion implantation is performed in the coating SOH layer 25 so that the intermolecular bonding state of the SSG layer 26 is excited in an excited state. At this time, the implantation ion can use all ionizable atoms and the amount of energy is 100 eV or more and the dose is 1E01 cm ^-2 or more. For example, the implantation ion uses argon ion (Ar ⁺ ). Energy of about 250 KeV and concentration of about 3E15.

FIG. 3b is a chemical formula of the process of the eosji when argon ion implantation shown in FIG. 2d, wherein the hydrogen atoms bonded to each silicon atom is weakened due to the ion implantation, the bond strength with the silicon atom is weakened. The tendency to form hydrogen molecules by bonding between them becomes stronger, and silicon atoms that lose hydrogen atoms are dangling as shown in the right side of the figure. As a result of analyzing the state at this time with F-thiaial, the silicon-hydrogen bond peak appears on the left side of the silicon-oxygen bond peak as in FIG. 3a, but the intensity of the peak is relatively small, indicating that the bond between silicon and hydrogen is broken. have.

In FIG. 2E, since the density of the ion implanted Suji layer is reduced, high temperature annealing is performed in a heating chamber at about 750 ° C. for densification to enhance the density. The S-oji layer 27 is formed. The annealing atmosphere at this time is air, nitrogen, oxygen (O ₂ ) or water vapor (H ₂ O), the amount is 0.1 sccm-900 sccm and the pressure inside the chamber is 0.01-1000 Torr.

3c or 2e illustrates a high temperature annealing process of the sedge layer in FIG. 2e, wherein hydrogen atoms in an excited state through the thermal curing process form hydrogen molecules to leave the sedge layer and Oxygen atoms are substituted to form a pure silicon oxide film (SiO ₂ ). At this time, the Fthiaal analysis results indicate that the silicon-hydrogen binding peak disappeared.

2F and 2G are respectively deposited on the silicon oxide film 27 having pure silicon oxide obtained through the above process to deposit an oxide film 28 for flatness by chemical vapor deposition to form a capping layer 28. A process of forming and optionally a chemical mechanical polishing (CMP) process is performed to form an oxide film 28 to secure high flatness.

In other words, the present invention is a method of forming a SOG layer through ion implantation in the semiconductor device when filling the gap due to the gap between the gap using the inorganic material of the H-S series as a gap filling material between the steps. It is possible to suppress the occurrence of cracks due to the generation of voids, and to remove the solvent remaining in the line (line to line) between the steps in the prior art completely stable regardless of the thickness of the SOG film to be formed By forming the film quality, it provides resistance to the wet etchant in the subsequent charter process to provide stability of the process, and also adopts the ion implantation method, which facilitates depth control.

Claims (14)

Forming an HSG-based SOG layer on the semiconductor substrate, Performing ion implantation into the Suji layer; Densification of the ion implanted ES layer A method for forming a SOG layer through ion implantation in a semiconductor device. The method of claim 1, wherein the SOH layer is used as an interlayer insulating layer. The method according to claim 1, wherein the thickness of the Suji layer is 0.05 to 5 ㎛ in the method of forming a SOG layer through ion implantation in the semiconductor device. The method of claim 1, wherein the ion implantation uses ions of all atoms that can be ionized. The method of claim 1, wherein the ion implantation is 100 eV or more and the scanning amount is 1E01 cm ^-2 or more. The method of claim 1, wherein the densification is performed in a chamber. The method of claim 6, wherein the pressure in the chamber is set to 0.01 to 1000 Torr. The method of claim 1, wherein the densification is performed at 400 to 1400 degrees Celsius. The method of claim 1, wherein the densification is performed using air, nitrogen, oxygen, or water vapor, and the amount thereof is 0.1 to 900 sccm. Coating a concave-convex surface of the semiconductor substrate on which the device is formed with an HSG-based SOG layer as an interlayer insulating film; Performing ion implantation into the sedge layer using ions of atoms capable of ionizing, Annealing the ion-implanted Suji layer in a chamber and densification; A method of forming a SOG layer through ion implantation in a semiconductor device comprising forming a capping layer for securing flatness in the annealed SG layer. The method according to claim 10, wherein the thickness of the Suji layer is 0.05 to 5 ㎛ in the method of forming a SOG layer through ion implantation in the semiconductor device. The method of claim 10, wherein the ion implantation uses ions of argon atoms. The semiconductor device of claim 10, wherein the annealing is performed at a temperature of 400-1400 degrees Celsius, a pressure of 0.01-1000 Torr., And an atmosphere of nitrogen, oxygen, or water vapor. Formation method. The method of claim 10, wherein the capping layer forms a silicon oxide film by chemical vapor deposition.

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