KR100223656B1 - Screen display method of device with mpeg video data decoder - Google Patents

Abstract

end. FIELD OF THE INVENTION The present invention relates to a screen display method when an MPEG video data decoder is operating in a fast playback mode.

I. An object of the present invention is to provide a method for displaying a screen at a constant speed as much as possible, independent of the bit rate of an input bit stream when the MPEG video data decoder is operating in the fast playback mode.

All. SUMMARY OF THE INVENTION A MPEG video data decoder having a memory for storing an input bitstream and a decoded screen, wherein the amount of data stored in the memory during the fast play mode operation is examined and Displaying the screen currently being displayed once again or skipping the screen to be decoded next, and displays the screen being displayed once more to prevent a momentary stop of the screen.

la. Important uses of the invention: It can be used for an apparatus for decoding MPEG video data using an optical disk, a magneto-optical disk, or the like.

Description

Screen display method of a device equipped with MPEG video data decoder

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for displaying a screen of an MPEG video data decoder, and more particularly, to an MPEG video data decoder capable of displaying a natural screen even under a fast play mode.

The main contents of multimedia are video and sound. If they are processed by simple PCM, there is a lot of difficulty in storing or transmitting because of excessive amount of data. Therefore, the key to the realization of multimedia is the efficient extrusion technology of video and sound. MPEG is a representative international standard for the compression and multiplexing of video and sound. Recently, MPEG-1 and MPEG-2 have been completed and applied to many fields, opening a full-fledged multimedia era. In particular, MPEG-2 can reproduce the quality of video that is received in general homes with information transmission rate of 10Mbps or less, and in the audio field, AC-3, an audio compressor method that can play multi-channel audio, has been introduced. You can enjoy it at home.

Hereinafter, an apparatus for decoding video data encoded using an MPEG will be described.

1 shows a block diagram of a general MPEG video data decoder. Referring to FIG. 1, first, a bit stream compressed in an MPEG format is transmitted to the decoder A by an external processor (not shown) that controls the MPEG non-video data decoder A. FIG. The bit stream may be reproduced and transmitted from a recording medium, or may be transmitted through a cable or a radio wave. Meanwhile, the coded data input unit 10 of the decoder A receives the bit stream and stores it in the bit stream buffer in the external memory 50 through a memory interface (hereinafter referred to as memory I / F) 20. As the external memory 50, DRAM which is generally inexpensive is used. The bitstream stored in the bitstream buffer in the external memory 50 is then input to the data decoder 30 to perform the actual MPEG video decoding operation. The digital video data decoded by the data decoder 30 is again recorded in the frame buffer area in the external memory 50 through the memory I / F unit 20. The MPEG video decoding operation may be decoded only by reading and referring to digital video data previously decoded and recorded in the frame buffer according to the type of data. In this case, the data decoder 30 must read a lot of data from the external memory 50. Meanwhile, the digital video output unit 40 reads the digital video data recorded in the frame buffer area of the external memory 50 at a predetermined time and outputs it to the outside.

The reason why the above-described decoder A does not directly output the output of the data decoder 30 to the frame buffer in the external memory 50 without directly outputting it externally is because of the sequence of video frames decoded in the form of MPEG video data and the actual display. This is because the order of the video frames being different is that the time to be decoded and the time to be actually displayed are different. Therefore, the digital video output unit 40 performs such a control function by controlling the above-described order and time using the frame buffer in the external memory 50. Further, when decoding MPEG video data with reference to data of another frame, the external memory 50 and the digital video output unit 40 for controlling the same are further required. As described above, the MPEG video data decoder A includes a data input unit 10, a memory I / F unit 20, a data decoder 30, and a digital video output unit 40. The data is written / read out to / from the external memory 50 through the memory I / F section 20 while operating in the same manner.

FIG. 2 is a diagram illustrating a picture structure of general NTSC MPEG data and shows a one second amount (30 frames). In FIG. 2, an I (Intra) picture represents an intra-frame coded image, a P (Predictive) picture represents an inter-frame forward predictive coded image, and a B (Bidirectionally Predictive) picture represents a bidirectional predictive coded image, respectively. Referring to FIG. 2, NTSC MPEG data displays 30 frames per second. At this time, the I picture is composed of 2 frames, the P picture is 8 frames, and the B picture is 20 frames, thereby forming 1 second MPEG data. Therefore, since there are the most B pictures that require two frames to decode the data, instead of displaying only the B pictures, if the data processing speed is sufficient and the input bit stream input speed is appropriate, the speed of fast play is 3; Playback is close to double speed. Hereinafter, the operation of the digital video output unit 40 in the fast playback mode will be described.

FIG. 3 is a flowchart illustrating a screen display operation of the longitudinal digital video output unit 40 of FIG. 1. The digital video output unit 40 performs the following operations whenever a vertical synchronous signal of a video is generated. do. First, in the fast playback mode, generally, only the I picture and the P picture are displayed without displaying the B picture or only the I picture. In this case, the order of the encoded pictures is the same as the order of the displayed pictures, and in general, since the synchronization is not performed with the audio, the pictures are output in the order of decoding without readjusting the display order. Accordingly, as shown in FIG. 3, the digital video output unit 40 displays a new screen (that is, the next screen) if there is a new picture to be displayed for each vertical synchronization signal input, and is currently decoding if there is no new screen to display. Or because there is no more data to decode, the current screen is displayed continuously until a new screen is displayed.

In general, MPEG video bitstreams are encoded at a variable bit rate (VBR) to obtain improved video quality. That is, when the average bit rate of a specific bitstream is 8M bps, there are 40 pictures in 8M bits at a specific position, and only 20 pictures can be in 8M bits of data at other positions. In addition, in the case of a system that delivers such a VBR bitstream to the MPEG video data decoder, there is a certain limitation in the transmission speed. Likewise, the MPEG video data decoder has a limited amount of data that can be processed for a predetermined time. Due to the characteristics of the VBR bitstream, the transfer rate limit of the system, and the processing speed limit of the MPEG video, when fast playback is implemented, normal fast playback is performed when processing low bit rate data. However, when processing the high bit rate part, the displayed speed is slowed down and it seems to be performed relatively late. When the screen for new display is not ready, the screen freezes momentarily. That is, from the user's point of view, it is judged that the speed of the fast playback is slowed down by displaying an unnatural screen in which the screen stops instantaneously and the screen does not stop at a constant speed in time. For example, 2M bps of data can be delivered to a decoder at a speed of 10Mbps to process the data, and when displaying I and P pictures, it is possible to display about 30 frames per second. However, 10m bps of data is delivered to the decoder at 10M bps to process the data, and when displaying I and P pictures, only 10 frames are displayed per second. Can be judged to be.

Accordingly, an object of the present invention is to provide a method capable of displaying a screen at a constant speed as much as possible, independent of the bit rate of an input bit stream when the MPEG video data decoder is operating in the fast playback mode.

According to an aspect of the present invention, there is provided an MPEG video data decoder having a memory for storing an input bitstream and a decoded picture.

During the Quick Play mode, the amount of data stored in the memory can be checked and the current screen being displayed can be displayed one more time, or the screen to be decoded next can be skipped and the currently displayed screen is displayed one more time. It is characterized by preventing a momentary stop.

1 is a block diagram of a general MPEG video data decoder.

Fig. 2 is a diagram illustrating a general picture of NTSC MPEG data.

FIG. 3 is a flowchart illustrating a screen display operation of the digital video output unit 40 of FIG. 1.

4 is a flowchart illustrating a screen display operation of the digital video output unit 40 according to an embodiment of the present invention.

Hereinafter, an operation according to an embodiment of the present invention will be described in detail with reference to the accompanying drawings.

4 is a flowchart illustrating an operation of displaying a screen of the digital video output unit 40 according to an embodiment of the present invention. The digital video output unit 40 is the next time a vertical synchronous signal of a video is generated. Perform the same operation. Referring to FIG. 4, first, when the vertical synchronization signal is input, the digital video output unit 40 checks whether there is a screen to be newly displayed in step 60. If there is no new screen, the digital video output unit 40 proceeds to step 62 to check whether the amount of data stored in the bitstream buffer in the external memory 50 is greater than or equal to the set value M. FIG. The meaning of the setting value M denotes a value which is set in advance to identify that the bit rate of the bitstream is high and low. If the amount of data stored in the bitstream buffer is greater than or equal to the set value M, the bit rate of the bitstream input to the decoder A is high. Therefore, the digital video output unit 40 proceeds to step 64. Next, the screen to be decoded is skipped and the current screen is displayed once more in step 66. This reduces the load to be processed for the bitstream having a high bit rate, thereby improving the decoding processing speed of the data decoder 30. For example, MPEG video data decoders that can handle up to 16M bps of data typically perform only 10 screens (I, P pictures) per second when fast playback is performed on 16M bps of data. This may be a fast play that moves very slowly from the user's point of view. Therefore, by eliminating some of the data to be processed, it is possible to improve the processing speed and to achieve fast and constant playback in time.

On the other hand, if the amount of data stored in the bitstream buffer in step 62 is less than or equal to the set value M, the input speed of the bitstream is slow. Therefore, the digital video output unit 40 waits for data to be input and decoded in step 66. The current screen is displayed once more. If there is no screen to be newly displayed, the digital video output unit 40 proceeds to step 68 and checks whether the number of screens stored in the frame buffer in the external memory 50 is greater than or equal to the set value N. The meaning of the set value N represents a value that is set in advance to identify whether fast playback is normally performed. If the number of screens in the frame buffer is greater than the set number N in step 68, it means that the fast playback is normally performed at the current speed. Therefore, the digital video output unit 40 proceeds to step 70 to display and view the next screen. The operation according to the embodiment of the invention ends. However, if the number of screens in the frame buffer is less than or equal to the set value N in step 68, the digital video output unit 40 proceeds to step 72 because it is necessary to determine whether the input speed of the bitstream is slow or whether the decoding processing speed of the data decoder 30 is slow. In operation 72, the digital video output unit 40 checks the absolute amount of data in the bitstream buffer in which the input bitstream is stored, that is, if the amount of data in the bitstream buffer is greater than or equal to the set value M, the absolute amount of data is large. In this case, the bit rate of the input bitstream is high, which means that the load of the data decoder 30 is large, so that the digital video output unit 40 proceeds to step 74 to display the next screen to be decoded. After skipping, proceed to step 70 to display the next screen that is currently decoded. The processing speed can be improved by reducing the amount of load to be processed by the decoder 30. If the data amount of the bitstream buffer is less than or equal to the set value M as a result of the 72 step test, the input speed of the bitstream is low. Since there is a screen to be displayed next but the number of screens stored in the frame buffer is insufficient, the digital video output unit 40 displays the current screen again in step 66 to display a smoother screen. The operation according to the example ends.

As described above, displaying the current screen once more means to maintain the current display screen for 1/30 seconds in the case of NTSC, and skipping the next decoding screen skips 1/30 seconds. As a result, the user can see the enhanced quick play screen without feeling this much.

As described above, the present invention provides a more natural display screen to the user by preventing the instantaneous still picture which may be caused by the delay of the input speed and the decoding processing speed of the bitstream when the MPEG video data decoder is operating in the fast playback mode. There is an advantage to this.

Claims (4)

In the MPEG video data decoder having a memory for storing the input bit stream and the decoded screen, During the Quick Play mode, the amount of data stored in the memory can be checked and the current screen being displayed can be displayed one more time, or the screen to be decoded next can be skipped and the currently displayed screen is displayed one more time. A method of displaying a screen of an MPEG video data decoder, characterized by preventing a momentary stop. The method of claim 1, wherein the data amount checking process is performed every time a vertical synchronization signal is generated. In the MPEG video data decoder having a memory for storing the input bit stream and the decoded screen, Checking whether there is a new screen to display during the quick play mode, If there is no screen to be newly displayed as a result of the inspection, the next screen to be decoded is skipped according to the amount of the bitstream stored in the memory and the current screen is displayed one more time or the current screen is continuously displayed until the decoding of the newly displayed data is completed. Display with the If there is a screen to be newly displayed as a result of the test, the number of screens stored in the memory is examined, and if the value is greater than or equal to the set value, the next screen is displayed. And displaying the current screen one more time or continuously displaying the current screen until the decoding of the new data to be displayed is completed. 4. The method of claim 3, wherein the presence or absence of data to be newly displayed is performed every time a vertical synchronization signal is generated.

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