KR0132954B1 - Add/drop multiplexer with one to seven atm cell processing - Google Patents

Abstract

The present invention relates to a branch / join multiplexer which is necessary when a subscriber node is connected to a ring in a subscriber access network having a ring type. The present invention relates to a state of data transmitted from a subscriber operating at a low speed to a single ring type subscriber access network. A first buffer control means (42) for generating a signal indicative of and controlling the transmission of data, generating a signal indicative of the status of the bypass data received from a single-ring subscriber access network operating at high speed and transmitting the data. Controlling the first and second buffer control means 42, 43 according to the second buffer control means 43 for controlling and the signals output from the first and second buffer control means 42, 43. And a cell mediation means 41.

Therefore, the present invention can be effectively used not only in a B-ISDN network based on ATM cells but also in a system for multiplexing cells at high speed while minimizing losses.

Description

1: 7 ATM Cell Branch / Coupling Multiplexer under Ring Structure

1 is a ring connection structure diagram of a giga-class ATM transceiver device to which the present invention is applied, FIG. 2 is a cell format diagram between subscriber transceiver devices, FIG. 3 is a 1: 7 ATM cell ADM connection diagram of FIG. 1, and FIG. Fig. 1 shows the detailed structure of the 1: 7 ATM cell ADM, FIG. 5 and FIG. 6 are transmission timing diagrams of FIG. 4, FIG. 7 is a 1: 7 arbitration timing diagram of FIG. 4, and FIG. 8 is a detailed configuration diagram of the cell arbitration section of FIG. .

* Explanation of symbols for the main parts of the drawings

1: Physical layer receiver 2: Cell receiver

3: multiplexer 4: ATM receiver

5: ATM transmitter 6: demultiplexer

7 cell transmitting unit 8 physical layer transmitting unit

9: 1: 7 ATM Cell Branch / Combination Multiplexer

41: cell arbitration unit 42, 43: buffer control unit FIFO1-FIFO18: buffer

The present invention relates to a 1: 7 ATM cell branch / complex multiplexer (ADM) under a ring structure which is necessary when a subscriber node is connected to a ring in a subscriber access network having a ring shape.

The future communication network will be developed into a communication network that can accommodate various information such as voice, data and video, and for this purpose, the broadband integrated information communication network is being standardized by ATM method. Therefore, in order to accommodate such various services, the broadband integrated telecommunication network should replace all existing subscriber networks with optical cables, unlike the narrow band integrated telecommunication network.

In particular, since the subscriber network accounts for 40-50% of the total investment of the communication network, research on this field has been actively conducted. The subscriber network of the broadband integrated telecommunication network can be configured in such a way that a separate cable is installed for each subscriber and a single cable is shared by a plurality of subscribers like a conventional telephone network.

The former method is easy to implement but is expected to consume a lot of cables. The latter approach uses protocols such as DQDB, FDI-II, and ATMR, which can accommodate information such as voice, data, and video, as well as provide services across large areas such as cities.

If the subscriber network is configured in this way, it can be economically configured because several subscribers share a single optical cable and can efficiently accommodate the broadcasting service that is expected to become the mainstream of the initial broadband integrated telecommunication network service. There is an advantage.

Therefore, in the economic aspect considering the efficiency of using optical cable, it is more efficient for subscriber access network to configure one cable in the form of ring shared by multiple subscribers.

To this end, ATM cell ADM is essential when accessing a subscriber node to a ring in a subscriber access network having a ring shape.

Existing ATM cell ADM is an ADM that transmits the data bypassed on the ring (bypass) and the data to be transmitted from the corresponding node by 1: 1, but the transmission speed on the ring is much higher than that provided by the node. Because the bandwidth is provided, multiplexing data in a 1: 1 ratio not only causes data transmission delays on the ring but also degrades the performance of the entire system.

In fact, if you want to provide a service where several transmission nodes exist, you can provide a service by providing a transmission speed of about 300Mbps using the existing ADM, but it does not use the full speed of the ring using fiber. .

Accordingly, an object of the present invention is to provide a 1: 7 ATM cell ADM capable of providing 155 Mbps for a transmission node and 1.25 Gbps for a ring connection.

In order to achieve the above object, the present invention provides a first buffer control means for generating a signal indicating a state of data transmitted from a subscriber operating at a low speed to a single ring type subscriber access network, and controlling data transmission. Second buffer control means for generating a signal indicating a state of the bypass data received from the subscriber access network in the form of a single ring, and controlling the transmission of the data, and a signal output from the first and second buffer control means. And cell arbitration means for controlling the first and second buffer control means.

Hereinafter, an embodiment of the present invention will be described in detail with reference to the accompanying drawings.

Figure 1 shows the internal structure of a connection node that connects a subscriber to a subscriber access network operating at 1.25Gbps.

The access node uses a total of 18 buffers (FIFO1-18) for transmitting and receiving data (cell) and data in the upper layer (ATM layer) of the node. Each buffer (FIFO1-18) has 512K bytes. Has the capacity of.

The present invention corresponds to a 1: 7 ATM cell branch / coupling multiplexer.

First, the operation of FIG. 1 is as follows.

The physical layer receiver 1 receives a signal transmitted at 1.25 Gbps through an optical fiber, stores it in a buffer FIFO10-FIFO13, and transfers the corresponding data to the cell receiver IMC-Rx 2. It consists of a TAXI Rx chip.

That is, all data on the ring are stored in the buffers (FIFO10-FIFO13) through the physical layer receiver 1 and transmitted to the corresponding node. Then, the data is transferred to the ATM receiver 4, which is the upper layer, and the node transmits the data. If it is not the receiving node to receive, the data is stored in a bypass buffer (FIFO6-FIFO9) and then multiplexed through the 1: 7 ATM cell ADM (9) to the neighbor node on the ring.

In addition, broadcast data is transmitted to the local station and transmitted to the neighbor node. As described above, the data (cell) read through the ring is transmitted to the local station or data to be received by another node on the ring and stored in the buffer (FIFO6-FIFO9) or buffer (FIFO14-FIFO17). The part to perform is the cell receiver 2.

In order to maximize the characteristics of the network having a ring-like structure, the efficiency of data transmission on the ring, and the ring utilization, the cell receiver 2 uses a combination of two methods, a transmission side elimination and a reception side elimination. In the case of data transmission, the node receiving the data uses the reception-side elimination technique in which the data is removed from the ring, and the transmission node removes the data from the ring for broadcast type data or abnormal data. Use side removal techniques.

That is, in the case of broadcast type data, all access nodes on the ring copy to the upper layer of the local station, and when the terminal finally returns to the transmitting node, the transmitting node removes it from the ring. As such, the cell receiver 2 stores the data received from the physical layer receiver 1, that is, data stored in the buffers FIFO10-FIFO17, in the buffers FIFO14-FIFO17 when the data is to be transmitted to the local station. In the case of data to be transmitted to another node, it is stored in a buffer (FIFO6-FIFO9).

In the case of broadcast data, the data is simultaneously stored in the buffers FIFO6-FIFO9 and the buffers FIFO14-FIFO17.

Finally, another function performed by the cell receiver 2 is a function of discarding the received data if it is data originally transmitted.

Data to be transmitted in the upper ATM layer is sequentially stored in the buffer, FIFO1, in the form of octets, ie octets, at a speed of 19.44 MHz (155 Mbps). Once the data stored in the byte stream is accumulated in the buffer FIFO1 over a certain number, the demultiplexer 6 is notified. Accordingly, the demultiplexer 6 sequentially reads one cell from the buffer FIFO1 and sequentially stores the cells in the buffer FIFO2-5.

In addition, in the case of a cell stored in the buffers FIFO10-FIFO13 through the physical layer receiver 1 and transmitted to the corresponding node, the data is transferred to the ATM receiver of the upper layer, when the node is not a receiving node to receive the data. Data is stored in a buffer (FIFO6-FIFO9), which is a bypass buffer, then multiplexed through a 1: 7 ATM cell ADM (9) and forwarded to neighboring nodes on the ring.

Figure 2 shows the format of data sent and received on the ring.

The communication between the subscriber access devices operates in the unit of 56 octet access device communication defined by 4 octets of header and 52 octets of payload based on ATM cells as shown in the cell format diagram between the second subscriber transceivers. Internally, the device handles every four octets. The communication function between the access devices is performed under the ATM layer in the protocol reference model of the broadband integrated information communication network user-network interface.

In FIG. 2, a link identifier (LID) is a field that allows a user to select a ring from among several rings. In this system, the physical layer has a ring shape by using an optical module. In one ring, there is a problem in operating the system, and in particular, when the ring fails, the entire system fails. Therefore, it is a field not to configure only one ring but to configure a plurality of rings so that data can be transmitted through another ring even if one ring fails.

Also, in FIG. 2, a destination unit identifier (DUID) is a value indicating a node that receives a data format. Since each node has its own unique node value, it compares the DUID value of the received data with its UID (Unit Identifier) and sends it to the upper layer if it is equal.

In FIG. 2, a source unit identifier (SUID) is an ID value of a node transmitting data. The reason for this field is that if the node to be received malfunctions or fails, the data will not be removed from the ring and will remain garbage on the ring. SUID should be placed to remove this data.

The remaining fields in FIG. 2 are those defined in the ATM standard.

3 illustrates a peripheral connection of a 1: 7 ATM cell ATM described with reference to FIG. 1, and an operation thereof will be described in detail with reference to FIG.

First, data to be transmitted from the upper layer of the local station is stored in the buffer FIFO1 in the form shown in FIG. 2 once as shown in FIG. When a certain number of octets are filled in the buffer FIFO1, the buffer FIFO1 notifies the demultiplexer 6 through its PAE * signal. After receiving the FIFO1 PAE signal, the demultiplexer 6 reads data from the buffer FIFO1 at a speed of 19.44 MHz (155 Mbps) and sequentially stores the data in the buffer FIFO2-5.

In addition, the data determined as data to be bypassed through the cell receiver 7 is stored in the buffers FIFO6-FIFO9.

Therefore, the data to be transmitted on the ring is stored in the buffer (FIFO2-5) and the buffer (FIFO6-9), and they are transmitted to the neighbor node at a speed of 1.25Gbps through the 1: 7 ATM ADM (9).

The data stored in the buffer (FIFO2-5) informs the 1: 7 ATM ADM (9) that there is data to be transmitted via the FIFO5 PAE * signal as shown in FIG. 3, and the data stored in the buffer (FIFO6-9) is FIFO9. The PAE * signal informs the 1: 7 ATM ADM 9 that there is data to transmit.

4 shows an internal configuration of a 1: 7 ATM cell ADM according to the present invention.

The 1: 7 ATM cell ADM according to the present invention is composed of buffer controllers 42 and 43 and cell arbitration unit 41 as shown in FIG.

The buffer controller 42 generates a signal indicating the state of data transmitted from the subscriber operating at a low speed to the single access subscriber access network and controls the transmission of the data. That is, the buffer controller 42 generates a supervisory signal according to whether or not there is data to be transmitted to the subscriber access network in the form of a single ring, outputs it to the cell arbiter 41, and transmits it under the control of the cell arbiter 41. The data is read continuously for one cell, or 53 octets, and output for transmission.

In other words, if there is data to be transmitted in the buffer FIFO2-5, a detection signal PAE * -1 (Active HIGH) indicating that there is transmission data is output to the cell arbiter 41, and the arbitration of the cell arbiter 41 is performed. As a result, data stored in the buffer FIFO2-5 is continuously read for 53 octets and output to the physical layer transmitter 8 for transmission.

The buffer control unit 43 generates a signal indicating the state of the detour data received from the single-ring subscriber access network operating at a high speed and controls the transmission of the data. That is, the buffer controller 43 generates a detection signal and outputs it to the cell arbiter 41 according to the control of the cell arbiter 41 according to whether or not there is detour data received from the single-ring subscriber access network. The bypass data is read continuously for 53 octets and output for transmission.

In other words, if there is detour data to be transmitted to the buffer FIFO6-9, a detection signal PAE * -2 (Active HIGH) indicating that the detour data exists is outputted to the cell arbiter 41, and According to the arbitration, the data stored in the buffer FIFO6-9 is continuously read for 53 octets and output to the physical layer transmitter 8 for transmission.

The cell arbiter 41 controls the buffer controllers 42 and 43 according to signals output from the buffer controllers 42 and 43. That is, the cell arbitration unit 41 receives 1: 7 statistical multiplexing when receiving the detection signals PAE * -1 and PAE * -2 indicating that there is data to be transmitted from the buffer controllers 42 and 43 and detour data. When receiving the detection signal indicating the other case, Hub-Polling multiplexing is performed.

The operation of the 1: 7 ATM cell branch / complex multiplexer under the ring structure configured as described above will be described with reference to FIGS. 5, 6, and 7.

The buffer controller 42 detects whether there is data to be transmitted to the buffers FIFO2-FIFO5, informs the cell mediation unit 41, and waits for a command.

In addition, the data determined to be transmitted from the cell receiver 2 to the adjacent node is stored in the buffers FIFO6-FIFO9, and the buffer controller 43 detects this and informs the cell arbitrator 41 of the state and waits for a command.

5 shows a timing diagram of a 1: 7 ATM cell branch / coupling multiplexer under a ring structure when data is transmitted from a local station.

That is, if there is data to be transmitted in the buffers FIFO2-FIFO5 and there is no data to be transmitted in the buffers FIFO6-FIFO9, the buffer controller 42 may transmit the cell arbitration unit 41 through the detection signal PAE * -1 (Active HIGH). In this case, the cell arbitration unit 41 transmits the FIFO25-START command to the buffer control unit 42.

Upon receiving the FIFO25-START command, the buffer controller 42 continuously reads data from the buffers FIFO2-FIFO5 for 53 octets and transmits the data to the physical layer.

On the contrary, if there is data to be transmitted in the buffers FIFO6-FIFO9 and there is no data to be transmitted in the buffers FIFO2-FIFO5, the buffer controller 43 transmits the cell arbitration unit 41 through the detection signal PAE * -2 (Active HIGH). The cell arbiter 41 transmits the FIFO69-START command to the buffer controller 43.

Like the buffer control section 42, the buffer control section 43 that receives the FIFO69-START command continues to read data for 53 octets, and the timing at this time is as shown in FIG. The lost data is thus transferred to the physical layer.

FIG. 7 shows the multiplexing of data in buffers FIFO2-FIFO5 and data in buffers FIFO6-FIFO9 through mediation in the ADM of the present invention.

If there is data to be transmitted in only one buffer as shown in FIG. 5 and FIG. 6, there is no problem in multiplexing and transmitting, but at any moment, there is data to be transmitted to both the buffers FIFO2-FIFO5 and FIFO6-FIFO9. Must have arbitration between them, and in the present invention, 1: 7 arbitration is performed in units of ATM cells.

That is, when there is data to be transmitted to both the buffers FIFO2-FIFO5 and FIFO6-FIFO9 at a moment, only the data in a specific buffer must be transmitted through an algorithm, which is performed by the cell arbiter 41. It will be described in detail with reference to FIG.

When the data in the buffers FIFO2-FIFO5 is being transferred, the drawing buffer FIFO2-FIFO5 receives a detection signal PAE * -2, which indicates that there is data to be bypassed, that is, data to be sent to the buffers FIFO6-FIFO9. Only one cell (53 octets) of the data is transmitted, and one cell is extracted from the data in the buffer (FIFO6-FIFO9) and transmitted. If one cell of data in the buffers (FIFO2-FIFO5) is transferred and there is data to be transmitted in the buffers (FIFO6-FIFO9), the data in the buffers (FIFO2-FIFO5) is not transmitted. Continue sending data in.

The data in the buffers (FIFO6-FIFO9) can repeat this process up to seven times, and the buffer (FIFO2-FIFO5) waits until there is data to be transmitted and resumes transmission.

If there are no more data to be transmitted to the buffer FIFO6-FIFO9 before transmitting 7 or more cells while reading the data of the buffers FIFO6-FIFO9, the data in the buffers FIFO2-FIFO5 are transferred immediately.

Therefore, if there is data in both the buffers FIFO2-FIFO5 and FIFO6-FIFO9, 1: 7 statistical multiplexing is performed. Otherwise, hub-polling multiplexing is performed.

Here, the functions and operations of the signals input to the respective portions of the buffer control sections 42 and 43 and the cell arbitration section 41 will be described.

The RCLK (Read Clock) signal is a read clock for reading data from the buffer, and REN (Read Enable) is a signal for reading data from the buffer. If the REN signal is '0' on the rising edge of the RCLK signal, it is sent to the buffer. From the data.

The OE (Output Enable) signal is a signal that actually shows the data read from the buffer on the data line using the RCLK and REN signals. That is, even if data is read through the REN signal, the data does not appear on the data bus unless the OE signal is set to '0'.

Programmable Almost Empty (PAE) signal is a signal that informs the buffer when some data is filled. It is a signal existing in the buffer itself and can be set to an arbitrary value desired by the user at initialization. In this case, the value is 1 cell because processing is performed in units of cells.

The STRBI (Strobe Input) signal is a G-TAXI control signal used as the physical layer of the present invention, and serves to help the G-TAXI transmitter and receiver accurately maintain data synchronization. In other words, if the STRBI signal is set to '1' in the first byte of the cell to be sent, the receiving side also accurately distinguishes data using this signal.

The COMMAND signal is a requirement for the G-TAXI chip, which G-TAXI requires for synchronous and self-managed system management. It acts as an overhead in a synchronous optical network (SONET).

As shown in FIG. 8, the cell arbitration unit 41 of FIG. 4 clears the AND gate 50 and the MX1-CLR signal, which are ANDed together with the F5-PAE signal and the MX1-CLR signal output from the buffer FIFO5. The F9-PAE signal and the MX2-CLR signal outputted from the flip-flop 52 and the buffer FIFO9 are used as data inputs, and the signal output from the AND gate 50 is a data input, and the CLK22 signal is a clock input. To the flip-flop 53 and the flip-flop 52, the AND gate 51 and the MX2-CLR signal to be multiplied are used as the clear signal, the signal output from the AND gate 51 is the data input, and the CLK22 signal is the clock input. The multiplexer 54 multiplexes the inverted F5-START signal and the power supply (Vcc) output from the signal, and the signal MX1-CLR is the clear signal, and the signal output from the multiplexer 54 is the clock input and the power supply (Vcc) is turned on. The flip-flop 55 and flip-flop 55 serving as data inputs The output signal is a multiplexer 56 that multiplexes the inverted F9-START signal output from the flip-flop 53 with the power supply Vcc and the MX2-CLR signal as a clear signal and the multiplexer 56 Signal output from the flip-flop 57, flip-flop (55, 57) using the signal output from the clock input, the power supply (Vcc) as the data input, the output signal as the selection signal of the multiplexer 54 A flip-flop that uses the OR gate 58 and OR gate 58 for ORing (PAE1-START, PAE2-START) as the data input, the CLK45 signal as the clock input, and the CLEAR1 signal as the clear signal. 59), an AND gate 60 negatively multiplying the signal PAE1-START output from the flip-flop 55 with the inverted R-CLR signal and a signal output from the AND gate 60 and the system ON are formed. Invert the reset signal CLEAR NOR gate 61 for outputting the MX1-CLR signal to the clear terminals of the lip flops 52 and 55, a signal PAE2-START output from the flip-flop 57, and an internal signal generated inside the cell arbitration unit. AND gate 62 inverts and negates the R-CLR1 signal, and inverts the signal and reset signal CLEAR output from AND gate 62 to the clear terminal of flip-flops 53 and 57. The NOR gate 63 outputs an MX2-CLR signal.

When the F5-PAE signal or the F9-PAE signal is input from the buffer controllers 42 and 43, the F5-START signal or the F9-START signal is generated and input to one input terminal A of the multiplexers 54 and 56 to receive MX2-. Generates a START signal. The generated MX2-START signal is transmitted to the buffer control unit 42 or the buffer control unit 43 and arbitrated, and then cleared through the clear signals MX1-CLR and MX2-CLR.

As described above, the present invention has an effect that can be efficiently used not only in the B-ISDN network based on ATM cells, but also in a system for multiplexing cells at high speed while minimizing losses.

Claims (4)

First buffer control means 42 for generating a signal indicating the status of data transmitted from a subscriber operating at a low speed to a single ring subscriber access network and controlling the transmission of data, and a subscriber having a high speed operating at a single ring. Second buffer control means 43 for generating a signal indicating a state of the detour data received from the access network and controlling transmission of data, and outputted from the first and second buffer control means 42 and 43; 1: 7 ATM cell branch / combination multiplexer under a ring structure, comprising cell arbitration means (41) for controlling the first and second buffer control means (42, 43) in accordance with a signal. The method according to claim 1, wherein the first buffer control means (42) generates a detection signal according to whether there is data to be transmitted to the subscriber access network in the form of a single ring, and outputs the detection signal to the cell arbitration means (41). A 1: 7 ATM cell branch / combination multiplexer under a ring structure, characterized in that it is configured to continuously read data for transmission for 53 octets and output for transmission under the control of the means (41). The method according to claim 1, wherein the second buffer control means (43) generates a detection signal according to whether there is any detour data received from a single ring type subscriber access network, and outputs the detection signal to the cell arbitration means (41). A 1: 7 ATM cell branch / combined multiplexer under a ring structure, configured to continuously read and output bypass data for 53 octets for transmission under the control of cell arbitration means (41). 2. The method according to claim 1, wherein the cell arbitration means 41 receives 1: 7 statistical multiplexing upon receiving a detection signal indicating that there is detour data and data to be transmitted from the first and second buffer control means 42, 43. And performing a hub-polling multiplexing upon receiving a detection signal representing the other cases.