KR0126660Y1 - Vertical mounted type package - Google Patents
Vertical mounted type packageInfo
- Publication number
- KR0126660Y1 KR0126660Y1 KR92016695U KR920016695U KR0126660Y1 KR 0126660 Y1 KR0126660 Y1 KR 0126660Y1 KR 92016695 U KR92016695 U KR 92016695U KR 920016695 U KR920016695 U KR 920016695U KR 0126660 Y1 KR0126660 Y1 KR 0126660Y1
- Authority
- KR
- South Korea
- Prior art keywords
- package
- mounting
- external element
- vertical
- signal input
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/12—Mountings, e.g. non-detachable insulating substrates
Landscapes
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
Abstract
본 고안은 DRAM 디바이스와 같은 외부소자를 함께 실장하는 수직실장형 패키지에 있어서 외부소자인 캐패시터를 패키지 몸체의 양단에 부착시켜 몰딩처리한 수직실장형 패키지 구조에 관한 것으로, 실장시 패키지의 지지부로 이용함과 동시에 외부소자를 실장시키기 위한 기판면적을 줄일 수 있으므로 패키지 실장밀도를 증가시킬 수 있어 향후 외부소자를 함께 수반하는 메모리 디바이스 패키지에 유용하다.The present invention relates to a vertically mounted package structure in which a capacitor, which is an external device, is attached to both ends of a package body in a vertically mounted package in which external devices such as a DRAM device are mounted together, and molded. At the same time, since the board area for mounting external devices can be reduced, package mounting density can be increased, which is useful for future memory device packages involving external devices.
Description
제1도는 종래 패키지의 일실시예의 구조도.1 is a structural diagram of one embodiment of a conventional package.
제2도는 종래 패키지의 또다른 실시예의 구조도.2 is a structural diagram of another embodiment of a conventional package.
제3도는 본 고안에 의한 패키지의 구조도.3 is a structural diagram of a package according to the present invention.
본 고안은 반도체 패키지에 관한 것으로, 특히 DRAM 디바이스에서 외부소자인 캐패시터를 디바이스내에 실장시켜 함께 패키징한 구조로 되어 실장시 패키지의 지지부로 사용할 수 있도록 한 수직 실장형 패키지에 관한 것이다.The present invention relates to a semiconductor package, and more particularly, to a vertically mounted package in which a capacitor, which is an external device in a DRAM device, is packaged together in a device to be packaged together so that the package can be used as a support part of the package.
최근에는 실장기판의 단위면적당 실장밀도를 증가시키기 위해 실장기판에 대해 디바이스의 칩을 수직실장하는 기술이 도입되는 추세이며, 종래의 ZIP(Zigzag In-line Package) 또는 SIP(Single In-line Package) 보다 패키지의 두께를 박형화하는 경향이다. 이러한 박형 수직 실장형 패키지는 패키지의 무게중심이 일반 평면 실장형 패키지에 비해 패키지의 상단에 위치하게 되므로 실장시 쓰러지는 문제가 발생하므로 패키지를 지지하기 위한 구조를 갖추고 있다.Recently, in order to increase the mounting density per unit area of the mounting board, a technology of vertically mounting the chip of the device with respect to the mounting board is introduced, and conventional ZIP (Zigzag In-line Package) or SIP (Single In-line Package) The thickness of the package tends to be thinner. The thin vertical mounting package has a structure for supporting the package because the center of gravity of the package is located at the top of the package as compared to the general flat mounting package, so that the collapse occurs during mounting.
제1도는 T.I 사의 수직 실장형 패키지(Vertical Package)의 구조를 도시한 것으로, 신호 입·출력단자인 리이드(1)와 몰딩수지로 몰딩되는 몸체부분(2)의 양끝을 연장하여 형성된 돌출부(2a)로 되어 있으며, 이후 PCB 등의 실장기판에 패키지를 실장할 때, 신호 입·출력 단자(1)는 솔더 리플로우(solder reflow)방법으로 실장기판의 솔더패턴 접합부에 접착시키며, 돌출부(2a)는 실장기판상에 형성되어 있는 구멍에 삽입함으로써 고정시키도록 되어 있다.FIG. 1 shows the structure of a vertical package of TI, and protrusions (2a) formed by extending both ends of the lead (1), which is a signal input / output terminal, and the body portion (2) molded with a molding resin. When the package is mounted on a mounting board such as a PCB, the signal input / output terminal 1 is bonded to the solder pattern joint of the mounting board by a solder reflow method, and the protrusion 2a. Is fixed by inserting it into a hole formed on the mounting substrate.
그러나 이와같은 구조로 된 수직 실장형 패키지는 몰딩되는 몸체 부분의 양끝이 연장되어 형성된 돌출부가 제작 및 취급과정에서 부러지기 쉽고, 패키지를 실장하는 기판에 돌출부의 크기와 형상에 맞는 구멍을 따로 형성해야할 뿐만 아니라, 패키지를 삽입할 때 돌출부의 형상에 맞는 정확한 구멍을 형성하기가 곤란하다.However, the vertically mounted package having such a structure is likely to be easily broken in the process of manufacturing and handling the protrusion formed by extending both ends of the molded body portion, and the hole for the size and shape of the protrusion must be separately formed in the substrate on which the package is mounted. In addition, when inserting the package, it is difficult to form an accurate hole that matches the shape of the protrusion.
제2도는 FUJITSU사의 수직표면 실장형 패키지(Vertical Surface Mount Package)의 구조를 도시한 것으로, 신호의 입·출력 단자인 리이드(1)와 디바이스 동작과는 무관한 금속재질의 더미 지지 리이드(1a)가 몰딩되는 몸체부분(2)의 양 끝 부분에 형성되어 있으며, 실장기판에 패키지를 실장할 때에는 상기 더미 지지 리이드(1a)를 신호 입·출력 단자(1)와 함께 실장기판상에 형성되어 있는 솔더패턴 접합부에 솔더링하게 된다.FIG. 2 shows the structure of a vertical surface mount package of FUJITSU Corporation. The lead 1, which is an input / output terminal of a signal, and a dummy support lead 1a made of metal independent of device operation. Is formed at both ends of the body portion 2 to be molded, and when the package is mounted on the mounting board, the dummy support lead 1a is formed on the mounting board together with the signal input / output terminals 1. It is soldered to the solder pattern joint.
그러나 상기 구조로 된 수직표면 실장형 패키지는 입·출력 단자(1)에 비해 더미 지지 리이드(1a)의 길이가 길게 형성되어 있어 상기 리이드(1a)가 구불어지거나 휘는 등 취급시 불편이 따른다. 제1도 및 제2도에서 (a)와 (b)는 각각 패키지의 정면도 및 측면도를 도시한 것이다.However, the vertical surface mount package having the above structure has a longer length of the dummy support lead 1a than the input / output terminal 1, resulting in inconvenience in handling such as bending or bending of the lead 1a. In Figures 1 and 2, (a) and (b) show front and side views of the package, respectively.
그런데, 상기 제1도 및 제2도와 같은 DRAM 디바이스는 통상적으로 외부소자인 캐패시터와 함께 기판에 되도록 구성되어 있으며, 패키지의 전원전압은 기판상에 형성된 금속패턴에 의해 외부소자인 캐패시터와 연결되므로 이에 따른 패키지의 실장면적이 커지게 되는 문제점이 있다.However, DRAM devices such as FIGS. 1 and 2 are generally configured to be on a substrate together with a capacitor which is an external element, and the power supply voltage of the package is connected to the capacitor which is an external element by a metal pattern formed on the substrate. There is a problem that the mounting area of the package increases.
따라서, 본 고안은 상기 종래 수직 실장형 패키지 구조에 따른 제반 문제점을 해결하기 위해 안출된 것으로, 외부소자인 캐패시터를 패키지 실장부 양끝에 부착시켜 몰딩처리하여 패키지의 지지부로 이용함과 동시에 패키지의 실장면적을 줄일 수 있는 수직 실장형 패키지를 제공하는데 그 목적이 있다.Therefore, the present invention was devised to solve various problems of the conventional vertically mounted package structure, by attaching a capacitor, which is an external element, to both ends of the package mounting portion, and molding the package to use as a support part of the package, and at the same time, the mounting area of the package. The purpose is to provide a vertically mounted package that can reduce the cost.
이하 첨부된 도면을 참조하여 본 고안을 설명한다.Hereinafter, the present invention will be described with reference to the accompanying drawings.
제3도는 외부소자를 패키지 실장부 양끝에 부착시켜 패키지 지지바로 이용한 본 고안의 수직실장형 패키지의 구조를 나타낸 것이다.Figure 3 shows the structure of the vertically mounted package of the present invention using an external element attached to both ends of the package mounting portion as a package support bar.
디바이스의 전원전압과 연결된 외부소자인 캐패시터(3)를 신호 및 입·출력 단자(1)가 배열된 패키지 몰딩 몸체부분(2)의 양끝에 부착시켜 몰딩처리하여 상기 입·출력 단자(1)와 동시에 패키징한 후 솔더 리플로우(solder reflow) 또는 열 압축 접착(Thermal Compression Bonding) 등이 방법으로 신호 입·출력 단자(1)와 함께 실장기판상의 솔더패턴 접합부에 접착시킨다.The capacitor 3, which is an external element connected to the power supply voltage of the device, is attached to both ends of the package molding body portion 2 in which the signal and the input / output terminals 1 are arranged and molded to process the input / output terminals 1 and At the same time, after packaging, solder reflow or thermal compression bonding is applied to the solder pattern joint on the mounting substrate together with the signal input / output terminals 1.
상기와 같이 본 고안은, 실장기판에 별도로 형성시켰던 외부소자를 패키지 몰딩몸체부분의 양단에 부착시켜 패키징처리함으로써, PCB 등의 기판에 실장시킬 때 패키지의 쓰러짐, 진동에 의한 이동등을 방지하는 지지대역할을 함은 물론 외부소자인 캐패시터를 실장시키기 위한 실장기판의 면적을 줄일 수 있어 실장밀도를 증가시킬 수 있다. 특히, 대용량 컴퓨터, 워크 스테이션(Work Station) 등과 같이 외부소자를 수반하는 DRAM 메모리 디바이스에서 유용하게 사용될 수 있다.As described above, the present invention attaches to both ends of the package molding body part an external element formed separately on the mounting substrate to package the support, thereby preventing the package from collapsing and moving due to vibration when mounted on a substrate such as a PCB. In addition to reducing the area of the mounting board for mounting a capacitor, which is an external device, the mounting density can be increased. In particular, the present invention can be usefully used in DRAM memory devices involving external devices such as large computers, work stations, and the like.
Claims (4)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR92016695U KR0126660Y1 (en) | 1992-09-02 | 1992-09-02 | Vertical mounted type package |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR92016695U KR0126660Y1 (en) | 1992-09-02 | 1992-09-02 | Vertical mounted type package |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| KR940008679U KR940008679U (en) | 1994-04-21 |
| KR0126660Y1 true KR0126660Y1 (en) | 1998-10-01 |
Family
ID=19339491
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| KR92016695U KR0126660Y1 (en) | 1992-09-02 | 1992-09-02 | Vertical mounted type package |
Country Status (1)
| Country | Link |
|---|---|
| KR (1) | KR0126660Y1 (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR19990000698A (en) * | 1997-06-10 | 1999-01-15 | 윤종용 | Semiconductor package with high heat dissipation |
-
1992
- 1992-09-02 KR KR92016695U patent/KR0126660Y1/en not_active IP Right Cessation
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR19990000698A (en) * | 1997-06-10 | 1999-01-15 | 윤종용 | Semiconductor package with high heat dissipation |
Also Published As
| Publication number | Publication date |
|---|---|
| KR940008679U (en) | 1994-04-21 |
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