KR0159365B1 - Apparatus for distributing and concentrating atm cell with bypassing function - Google Patents

Abstract

The present invention provides a cell bypassing function to the cell focusing and distributing device so that the integrated communication between processors connected to the same cell focusing and distributing device is performed without a separate exchange, thereby increasing the utilization rate of the cell focusing and distributing device and reducing the load of the switch. Its purpose is to provide a device that allows for less.

In the present invention, in the case of the cell focusing device, the processor link connection device 310 converts 1-bit data coming through the serial link 311 into 8-bit and stores it in the transmission FIFO 308. The FIFO controller 307 reads the data of the transmission FIFO 308 and sends it to the switch link connection device 303 through the buffer 305. At this time, the output selection logic reads the IDL 201 of FIG. 2, which is the starting point of the cell, and is a cell to be bypassed and transferred to the receiver 302 of the cell distribution and access device or through the switch link 301, the ATM central switch 103 Determine if the cell is sent to

In addition, the cell distribution device converts 1-bit data from the serial link 401 into 8-bits by the switch link connection device 402 and stores it in the buffer 404 and is valid by the valid cell detector 403. If determined, it is stored in the switch link cell FIFO 406. Cells bypassed in the cell concentrator of FIG. 3 are stored in the bypassing cell FIFO 407. The ARBITER 408 selects one of these two FIFOs and sends data to the processor link connection 410.

Description

AT cell distribution and concentrator with bypassing function

1 is a block diagram of an ATM switching system having a distributed structure.

2 is an internal cell format diagram of an ATM switch.

3 is a block diagram of a cell focusing apparatus according to the present invention.

4 is a block diagram of a cell distribution device according to the present invention.

* Explanation of symbols for the main parts of the drawings

303: switch link connecting device 304: demultiplexer (DMUX)

305: buffer 306: output selection logic

307: FIFO controller 308: transmit FIFO

309: cell boundary identification logic 310: processor link connection device

402: switch link connection device 403: effective cell detector

404: buffer 406: switching link cell FIFO

407: bypassing cell FIFO 408: ARBITER

409: Multiplexer (MUX) 410: Distribution FIFO

411: processor link connection device

The present invention relates to an ATM cell distribution and focusing apparatus, and more particularly to an ATM cell distribution and focusing apparatus having a bypassing function.

In the ATM switching system, which is the core technology of the broadband integrated information network, the control system has a structure in which processors are distributed through ATM switch links. For the smooth operation of the control system, a dedicated link must be established between the processors to communicate with each other. When constructing a dedicated switch link, a cell focusing and distributing device is required to allow multiple processors to share the switch link in order to increase link utilization.

The present invention provides a bypassing function to the cell focusing and distributing apparatus so that the processors connected to the same cell focusing and distributing apparatus can be communicated without going through a separate exchange, thereby increasing the utilization rate of the cell focusing and distributing apparatus and the load of the switch. The purpose is to provide a device to reduce the number of.

In order to achieve the above object, the cell focusing apparatus according to the present invention includes a processor link connecting apparatus for converting data received through a serial link, a transmission FIFO storing data through the processor link focusing apparatus, and reading data of the transmission FIFO. A FIFO controller output through a buffer, a demultiplexer for demultiplexing and outputting data from the transmission FIFO according to an output selection control signal, and a bypass enable signal received from the read enable signal and the transmission FIFO's idle signal And an output selection logic for controlling the demultiplexer by determining whether the cell is a cell or a cell to be sent to an ATM central switch through a switch link when delivered to a receiver of a cell distribution and access device.

Also, a buffer for storing the converted data from the serial link by the cell distribution device switch link connection device is received, and the most significant bit (MSB) of the data input to the buffer is received to determine whether the data cell input to the buffer is valid. An active cell detector for outputting a FIFO write enable signal, a switch link cell FIFO for receiving and storing data stored in the buffer according to the FIFO write enable signal of the effective cell detector, a cell bypassed by an external cell concentrator An arbiter for receiving a state information from the bypassing cell FIFO, the switch link cell FIFO, and the bypassing cell FIFO, and outputting a signal for controlling to select one of them; a control signal from the arbiter A multiplexer (MUX) for selecting and outputting one of an output of the switch link cell FIFO or the bypassing cell FIFO, and the multiplexer It receives the output of the document distribution according to the control of the arbiter and provided with a distributed FIFO to transfer data to the processor link connection.

Hereinafter, with reference to the accompanying drawings will be described an embodiment of the present invention;

1 is a configuration diagram of an ATM switching system having a distributed structure, and it can be seen that several processors 109, 110, 111, and 112 are connected to one cell focusing and distributing device 108. When the exchange wants to process the subscriber's call, the exchange sends and receives messages on a cell-by-processor basis between the network, the exchange, and the processor, depending on the call scenario. In general, in an exchange having a distributed structure as shown in FIG. 1, communication between processors may be achieved only by going to an ATM central switch 103 connecting a plurality of ATM local switches 102 to be exchanged. In this case, three bytes of the self-routing bytes 205 of FIG. 2 are used as routing information. This is a suitable method for communication between processors connected to different cell distribution and concentrators, but in the case of communication between processors connected to the same cell distribution and concentrator 108, ATM local switch 102 and ATM central switch. Unnecessary load is given to (103), and in case of overload, it becomes a factor that can considerably reduce the processing capacity of the exchanger. Therefore, in case of communication between processors 109, 110, 111, and 112 connected to the same cell distribution and concentrator 108, the cell distribution and concentrator 108 can directly route independently of the ATM central switch 103. Having the ability to do so will make the system more efficient. In the present invention, such a function is referred to as a bypassing function.

Now look more specifically as follows.

In an ATM switching system, four ATM local switches 102 are connected to an ATM central switch 103, and a plurality of subscriber interface devices 101 are connected to an ATM local switch 102, and to satisfy a service request of a subscriber. Processors 109, 110, 111, and 112 performing the necessary operations are connected via the switch link 106.

An example of communication between these processors is as follows. Processor 1 109 connected to cell distribution and concentrator 1 108 communicates with ATM local switch 1 102 and ATM local to communicate with processor 2 118 connected to cell distribution and concentrator 8 115. The communication between the two processors can be achieved only after the switch 113 and the link to the processor 2 118 through the cell distribution and focusing device 8 115 are established. However, in the case of the following example, there is considerable overhead. If the processor 1 109 connected to the cell distribution and concentrator 1 108 communicates with the processor 2 110 next to it, and there is no bypassing function, the ATM local switch 1 102 and It must go up to the ATM central switch 103 and back to the ATM local switch 1 102 to be distributed by the cell distribution and concentrator 1 108. In order to eliminate this overhead, the present invention has devised a bypassing function that can be directly routed by the cell distribution and focusing apparatus 1 (108).

2 shows the internal cell format of an ATM switch. In the figure, the upper three bytes 205 are addresses for internal self-routing of the ATM switch. IDL 201, which is the most significant bit of the first byte, represents an idle cell of 1 and a busy cell of 0. MTC, ASW_ORG, CDP, CSW, CET, ASW_DES are signals for controlling self-routing and other functions of ATM switches. It follows the ATM cell format, which is the remaining 53-byte ITU standard.

In the present invention, the inter-processor communication table connected to the same cell distribution and focusing apparatus is configured, and the processors 109, 110, 111, 112, etc. refer to the grouting table at the time of creation of the cell, which is an address for internal routing of the cell Write three bytes (205).

3 illustrates a cell focusing apparatus for focusing a cell input from the processor link 311 to the switch link 301. The processor link connection device 310 converts 1-bit data coming through the serial link 311 into 8 bits and stores the 8-bit data in the transmission FIFO 308. The FIFO controller 307 reads the data of the transmit FIFO 308 and sends it to the switch link connection device 303 through the buffer 305. At this time, the output selection logic reads the IDL 201 of FIG. 2 which is the starting point of the cell and bypasses the cell to be delivered to the receiver 302 of the cell distribution and connection device or through the switch link 301 or the ATM central switch 103. Determine if the cell is sent to

4 shows a cell distribution device for distributing cells input from the switch link 401 to the processor link 411. The 1-bit data from the serial link 401 by the switch link connection device 402 is converted into 8 bits and stored in the buffer 404, and the switch link cell FIFO is determined to be valid by the valid cell detector 403. Store at 406. Cells bypassed in the cell concentrator of FIG. 3 are stored in the bypassing cell FIFO 407. The ARBITER 408 selects one of these two FIFOs and sends data to the processor link connection 410.

The overall configuration and control method of the present invention will be described with reference to FIGS. 1, 2, 3, and 4 described above.

In the present invention, in the case of interprocessor communication connected to the same cell distribution and focusing apparatus, a routing table is configured to indicate that the cell is to be bypassed in the IDL 201 of FIG. 2, and the processor 109, 110, 111, 112, etc. ) Creates an upper 3 byte 205 which is an address for internal routing of the cell with reference to its routing table upon generation of the cell. The cell thus produced is transmitted to the processor link connection device 310 through the processor link 311. The cell is stored in the transmit FIFO 308 and the FIFO controller 307 reads data from the transmit FIFO 308 and stores it in the buffer 305. The output selection logic 306 reads the IDL 201, which is the first bit of the cell, and determines whether to bypass the cell. If the value of the IDL bit is '0' it is sent to the switch link 301, if it is '1' it is bypassed. The bypassed cells are stored in the bypassing cell FIFO 407 of the cell distribution and focuser of FIG. The ARBITER 408 selects one of the switch link cell FIFO 406 and the bypassing cell FIFO 407 and is transmitted to the processor through the processor link connector 411.

Therefore, the present invention constructed and operated as described above has the effect of increasing the utilization efficiency of the cell focusing and distributing apparatus and reducing the load of the switch by allowing direct communication between processors without passing through separate exchangers.

Claims (2)

A processor link connection device 310 for converting 1-bit data received through a serial link 311 into 8 bits, a transmission FIFO 308 for storing data through the processor link focusing device 310, and the transmission FIFO 308. The FIFO controller 307 reads the data of the data and outputs it through the buffer 305, the demultiplexer 304 demultiplexes and outputs the data from the transmission FIFO 308 according to the output selection control signal, and the FIFO controller ( The read enable signal of 307 and the idle 201 signal of the transmission FIFO 308 are received and bypassed, and are the cells to be delivered to the receiver 302 of the cell distribution and connection device or the ATM center through the switch link 301. And an output selection logic (306) for controlling the demultiplexer (304) by determining whether the cell is to be sent to a switch (103). A buffer 404 for storing the converted data from the serial link 401 by the switch link connection device 402, and a buffer 404 for receiving the most significant bit (MSB) of the data input to the buffer 404. The valid cell detector 403 for determining the validity of the data cell input to the FIFO write enable signal and outputting the data stored in the buffer 404 according to the FIFO write enable signal of the valid cell detector 403. A switch link cell FIFO 406 for receiving and storing, a bypassing cell FIFO 407 for storing a cell bypassed from an external cell concentrator, the switch link cell FIFO 406 and a bypassing cell FIFO 407. An arbiter (ARBITER; 408) for receiving the state information from the controller and outputting a control signal to select one of the switch link cell FIFOs (406) or bypassing according to a control signal from the arbiter (408). Select one of the outputs of the cell FIFO 407 A distribution FIFO 410 which receives a multiplexer (MUX) 409 and an output of the multiplexer 409 and distributes the data under the control of the arbiter 408 to transmit data to the processor link connection device 410. Cell dispensing apparatus characterized in that it comprises.