JPWO2006120722A1 - Manufacturing method of semiconductor device - Google Patents

Abstract

SUMMARY OF THE INVENTION An object of the present invention is to provide a method for manufacturing a semiconductor device capable of stricter and simpler process management than in the past while using a nondestructive inspection in the management of a process having a step of forming holes in a semiconductor wafer. There is. The method of manufacturing a semiconductor device according to the present invention specifies one hole in a plurality of holes formed in a semiconductor wafer as a measurement target hole, the shape or diameter of the hole top in the measurement target hole, and the hole bottom in the measurement target hole. Non-destructively measuring the shape or diameter of the hole and the bottom state or bottom residue in the hole to be measured, and determining the shape or diameter of the hole top, the shape or diameter of the hole bottom, It is characterized in that the process management of the semiconductor device is performed based on the state or the residue on the bottom.

Description

  The present invention relates to a method for manufacturing a semiconductor device. The present invention also relates to a technique for performing a process evaluation during the manufacturing process of a semiconductor device using an electron beam, an ion beam, light, or an electromagnetic wave.

  A semiconductor device generally has tens of millions or more holes called contact holes or via holes. These holes are usually formed by performing a process called etching. Since these holes are holes for conducting electricity, it is necessary to confirm whether or not they have a desired finished shape.

  FIG. 16 is a partial cross-sectional view showing an example of a hole formed in a semiconductor wafer. An oxide film 202 is formed on the surface of a silicon substrate 201 that is a semiconductor wafer. Holes are formed so as to penetrate the oxide film 202, that is, so that the surface of the silicon substrate 201 is exposed. The diameter of the opening of the hole is the hole top diameter d1. The diameter of the bottom of the hole is the hole bottom diameter d2. In addition, there may be a residue 203 made of the etching residue of the oxide film 202, a film formed by oxidation of silicon on the bottom of the hole, or a resist residue at the bottom of the hole.

  As a method for nondestructively observing the quality of contact holes, via holes, etc., observation by CDSEM is known. CDSEM is a kind of high-performance electron microscope, which collects and images secondary electrons generated by scanning an electron beam on a sample (silicon substrate 201), and measures the length of the hole top diameter d1 and the hole opening. Ability to observe the shape.

  Observation or length measurement by CDSEM is the only management means of the hole formation process in the current semiconductor process. In a mass production factory such as a factory, the hole top diameter d1 is measured by the CDSEM after the hole forming process.

  On the other hand, the inventor of the present application is a method (EBSCOPE substrate current method) for irradiating a semiconductor wafer with an electron beam and using a substrate current, which is a current flowing through the semiconductor wafer at the time of irradiation, to evaluate the quality of the process of the semiconductor device. (See, for example, Patent Documents 1 to 3).

  The EBSCOPE substrate current method is a method in which, for example, a semiconductor wafer that has been etched is irradiated with an electron beam having a constant energy for several seconds, and the state of the process is known from the magnitude or polarity of the substrate current generated at that time. is there. For example, 0 to several Kev is used as the electron beam energy, and a picoampere (pA) or nanoampere (nA) is used as the current amount.

  In this EBSCOPE substrate current method, if the process results for two semiconductor wafers are the same, the same substrate current is generated, and if the process results are different, whether the process performed by generating different currents is the same as the standard state Can be judged. Furthermore, in this method, the hole bottom diameter d2 can also be directly measured using the waveform of the substrate current generated when the sample is scanned with the electron beam.

Japanese Patent No. 3334750 Japanese Patent No. 3292159 Japanese Patent No. 3175765

  However, in the past, due to technical limitations, only the management of the hole top diameter d1 by CDSEM has been performed, and no other quantities required for the evaluation of hole formation have been measured. In recent years, as mentioned in the background art, techniques for measuring individual parts of a hall structure are being devised. However, there has been a problem that means for relatively easily knowing whether or not the process has been optimized by measuring the hole structure as a whole or comprehensively has not been put into practical use.

  For this reason, even in the hole forming process, process management is performed using only one measured quantity of the hole top diameter d1, and as a result, sufficient process management is not performed and a defective product is created. It was.

  Conventionally, cross-sectional observation by SEM (scanning electron microscope) has existed as a destructive inspection. FIG. 17 is a flowchart showing a process evaluation method for a semiconductor device using SEM. First, the same pattern is formed on a plurality of semiconductor wafers by using photolithography for evaluation of etching characteristics (step S101).

  Then, a process is performed on each semiconductor wafer while changing the etching level (step S102). Next, the resist is peeled off to obtain a measurement target sample (step S103). Next, the semiconductor wafer is broken by FIB (focused ion beam) or manually to expose the cross section of the hole (step S104). Next, the cross section of the hole is observed using SEM or TEM (transmission microscope) (step S105). Based on this observation result, an optimum etching condition is selected (step S106).

  However, a semiconductor wafer inspected by SEM or TEM cannot be used as a product because it is broken by FIB or hand. Therefore, in the process evaluation of semiconductor devices using SEM or TEM, a small number sampling inspection is performed for each lot. In addition, in the process evaluation by SEM or TEM, since it takes a lot of time to prepare a sample, a very small number of points such as several points are measured per semiconductor wafer. Furthermore, since a part of a valuable hole structure may be lost due to the sample preparation, there is a problem that a place to be observed cannot be observed.

  Therefore, in the process evaluation by SEM or TEM, the number of analysis samples necessary for truly optimizing the process is not reached, there is no guarantee that the measured sample points are representative, and depending on how the samples are cut out Hurt the sample itself, and there was a problem that a true analysis result could not be obtained.

  In the miniaturization process after 90 nm, since the resolution of SEM is insufficient, it is necessary to use TEM. However, this method takes more time and labor and is not practical.

  The present invention has been made in order to solve such a problem of the prior art. In the management of a process having a process of forming holes in a semiconductor wafer, the non-destructive inspection is used and more strictly than in the past. It is an object of the present invention to provide a method for manufacturing a semiconductor device that can be easily managed.

In order to solve the above-described problem, the semiconductor device manufacturing method of the present invention specifies one hole in a plurality of holes formed in a semiconductor wafer as a measurement target hole, and the shape or diameter of the hole top in the measurement target hole, The shape or diameter of the hole bottom in the measurement target hole and the bottom state or bottom residue in the measurement target hole are measured nondestructively, and the shape or diameter of the hole top and the shape of the hole bottom are measured. Alternatively, the process management of the semiconductor device is performed based on the diameter and the bottom state or the bottom residue.
According to the semiconductor device manufacturing method of the present invention, one hole formed in the semiconductor wafer is set as a measurement target hole. Then, the process management is performed by measuring the shape of the hole top, the shape of the hole bottom, the state of the hole bottom, and the like of the measurement target hole. Accordingly, whether or not a specific hole to be measured is normally formed can be evaluated comprehensively and comprehensively, and process management can be performed more strictly and accurately than in the past. That is, in the conventional CDSEM, since the shape of the hole top for a specific measurement target hole is only measured, strict process management cannot be performed. In addition, although the conventional EBSCOPE substrate current method can achieve a hole bottom diameter (hole bottom diameter), the shape of a specific measurement target hole or the like has not been measured as a whole. In addition, the process management using SEM or TEM has a problem that enormous time and cost are required and the semiconductor wafer to be measured is damaged. According to the present invention, strict and accurate process management can be performed while avoiding these disadvantages. Therefore, according to the present invention, a high-performance semiconductor device can be manufactured at low cost.

In the method for manufacturing a semiconductor device of the present invention, the measurement of the shape or diameter of the hole top includes a process of measuring secondary electrons and reflected electrons generated by irradiating the semiconductor wafer with an electron beam. It is characterized by.
According to the method for manufacturing a semiconductor device of the present invention, the measurement of the shape of the hole top and the like can be performed nondestructively using the CDSEM in the entire measurement for one hole.

Further, in the method for manufacturing a semiconductor device of the present invention, the measurement of the shape or diameter of the hole bottom is a process of measuring a substrate current, which is a current generated in the semiconductor wafer by irradiating the semiconductor wafer with an electron beam. It is characterized by having.
According to the semiconductor device manufacturing method of the present invention, the measurement of the shape of the hole bottom and the like can be performed nondestructively using the EBSCOPE substrate current method in the entire measurement of one hole.

Further, in the method of manufacturing a semiconductor device of the present invention, the measurement of the bottom state or the bottom residue measures a substrate current which is a current generated in the semiconductor wafer by irradiating the semiconductor wafer with an electron beam. It has the process to perform.
According to the method for manufacturing a semiconductor device of the present invention, in the entire measurement for one hole, measurement of the state of the hole bottom or a residue can be performed nondestructively using the EBSCOPE substrate current method. .

Further, in the method for manufacturing a semiconductor device of the present invention, the shape or diameter of the hole top is a predetermined value, the shape or diameter of the hole bottom is a predetermined value, and further, the bottom state or the bottom residue is When it is in a predetermined state, it is determined that the measurement target hole is normally formed.
According to the semiconductor device manufacturing method of the present invention, when all three elements such as the shape of the hole top, the shape of the hole bottom, and the state of the bottom are all appropriate, the measurement target hole is formed normally. Can be determined. Therefore, as compared with the conventional case where process management is performed by one element, process management can be performed with extremely high accuracy.

In the semiconductor device manufacturing method of the present invention, the non-destructive measurement may be performed by irradiating the semiconductor wafer with an electron beam such that an electron beam trajectory crosses the measurement target hole. And a substrate current waveform which is a waveform of a current generated in the semiconductor wafer during the irradiation, and the shape or diameter of the hole top is determined using the waveform of the secondary electrons. Measure, measure the shape or diameter of the hole bottom using the substrate current waveform, and irradiate the measurement target hole with an electron beam that is thicker than the electron beam that crosses the measurement target hole for a certain period of time. And an EBS value that is a value obtained by dividing the substrate current generated when the substrate is generated by the current incident on the semiconductor wafer by the thick electron beam. Is the diameter of the hole top, the diameter of the hole bottom, characterized by performing on the basis of the EBS value.
According to the semiconductor device manufacturing method of the present invention, the shape and the like of the hole top can be measured by CDSEM, the shape and the like of the hole bottom can be measured in the line scan mode of the EBSCOPE substrate current method, and the hole in the blanket mode of the EBSCOPE substrate current method. The bottom residue can be measured. Here, the line scan mode of the EBSCOPE substrate current method is a mode in which the sample is irradiated with a finely focused electron beam as in the case of CDSEM. The blanket mode of the EBSCOPE substrate current method is a mode in which a thick electron beam with a constant energy is irradiated to a sample for a predetermined time.

The method for manufacturing a semiconductor device according to the present invention is characterized in that the secondary electron waveform and the substrate current waveform are waveforms obtained simultaneously by irradiation of the electron beam onto the semiconductor wafer.
According to the method for manufacturing a semiconductor device of the present invention, the shape of the hole top and the shape of the hole bottom can be measured simultaneously by scanning with one electron beam. Therefore, according to the present invention, it is possible to perform strict process management more quickly and at low cost.

The semiconductor device manufacturing method of the present invention is characterized in that the process management of the semiconductor device is performed based on the hole arrangement density in the semiconductor wafer and the measurement result.
According to the semiconductor device manufacturing method of the present invention, process management can be performed based on the hole top shape, hole bottom shape, hole bottom state, and the like of the measurement target hole and the hole arrangement density. Therefore, more precise and accurate process management can be performed.

In the semiconductor device manufacturing method of the present invention, the process management of the semiconductor device is performed based on the layout (array pattern or layout pattern) regarding the holes in the semiconductor wafer and the result of the measurement. Features.
According to the semiconductor device manufacturing method of the present invention, process management can be performed based on the shape of the hole top of the hole to be measured, the shape of the hole bottom, the state of the hole bottom, and the like, and the layout of the hole. Therefore, more precise and accurate process management can be performed.

The method for manufacturing a semiconductor device of the present invention includes a process in which the measurement of the shape or diameter of the hole top measures secondary electrons and reflected electrons generated by irradiating the semiconductor wafer with an electron beam. The measurement of the shape or diameter of the hole bottom has a process of measuring a current generated in the semiconductor wafer by irradiating the semiconductor wafer with an electron beam, and is obtained by measuring the hole top and the hole bottom. Based on the obtained data, an image and a numerical value indicating the shape of the hole top and an image and a numerical value indicating the shape of the hole bottom are displayed on a display device.
According to the semiconductor device manufacturing method of the present invention, the shape of the hole top and the shape of the hole bottom for a specific measurement target hole can be displayed on the screen. This display can be executed without damaging the semiconductor wafer to be measured, and can be executed at a much lower cost and faster than SEM and TEM. Therefore, according to the present invention, a high-performance semiconductor device can be manufactured at low cost.

The method for manufacturing a semiconductor device according to the present invention is characterized in that the shape or diameter of the hole top, the shape or diameter of the hole bottom, and the bottom state or bottom residue are displayed on a display device. And
According to the semiconductor device manufacturing method of the present invention, it is possible to display the overall and overall structure of a specific measurement target hole on a screen. This display can be executed without damaging the semiconductor wafer to be measured, and can be executed at a much lower cost and faster than SEM and TEM. Therefore, according to the present invention, a high-performance semiconductor device can be manufactured at low cost.

  According to the present invention, very strict non-destructive hole process management is possible. Strict hole process management directly contributes to improving yield in semiconductor manufacturing. Since any hole desired to be managed can be selected as a measurement target, it can be applied to an actual semiconductor device having any layout. In the present invention, a product device can be directly measured, and it is not necessary to prepare a test wafer.

In the present invention, a laser beam or the like can be applied instead of the electron beam.
It is also possible to obtain the same measurement result as in the case of the electron beam by using the laser beam in the same manner as the electron beam. That is, in order to know the hole top diameter, the hole bottom diameter, the hole bottom residue, and the like, a scatterometry measurement value using a laser beam diffraction phenomenon may be used.

In the present invention, it goes without saying that electromagnetic waves or ions can be used as probes (instead of electron beams). Further, the present invention is not limited to the three elements of the hole top, the hole bottom, and the hole bottom residue, and it goes without saying that other elements may be measured and added to the evaluation target.
In addition, even if the present invention is not the same hole, the same effect as described above can be obtained even if neighboring holes that are considered to have undergone substantially the same process and their average measured values are used for process management. Needless to say.

3 is a flowchart showing a method for manufacturing a semiconductor device according to the first embodiment of the present invention. It is explanatory drawing which shows the outline | summary of CDSEM used with the manufacturing method of a semiconductor device same as the above. It is explanatory drawing which shows the outline | summary of EBSCOPE used with the manufacturing method of a semiconductor device same as the above. It is a top view which shows an example of arrangement | positioning of the shot with respect to a semiconductor wafer. It is the top view shown in detail about one shot in FIG. It is a figure which shows the table | surface of the value which should be managed in the manufacturing method of the semiconductor device of 1st Embodiment. It is a figure which shows the set of the process management for performing the optimal process in the manufacturing method of the semiconductor device of 1st Embodiment. It is a flowchart which shows the manufacturing method of the semiconductor device which concerns on 2nd Embodiment of this invention. It is a figure which shows an example of the measured value acquired in 2nd Embodiment. It is a figure which shows an example of the measured value acquired in 2nd Embodiment. It is a figure which shows an example of the measured value acquired in 2nd Embodiment. It is explanatory drawing which shows the modification of 2nd Embodiment. It is a figure which shows EBSCOPE used with the manufacturing method of the semiconductor device which concerns on 3rd Embodiment of this invention. It is a figure which shows the manufacturing method of the semiconductor device which concerns on 4th Embodiment of this invention. It is a figure which shows the manufacturing method of the semiconductor device which concerns on 5th Embodiment of this invention. It is a figure which shows the manufacturing method of the semiconductor device which concerns on 5th Embodiment of this invention. It is a figure which shows the manufacturing method of the semiconductor device which concerns on 5th Embodiment of this invention. It is a figure which shows the manufacturing method of the semiconductor device which concerns on 6th Embodiment of this invention. It is a top view which shows the manufacturing method of the semiconductor device which concerns on 7th Embodiment of this invention. It is sectional drawing which shows the manufacturing method of the semiconductor device which concerns on 7th Embodiment of this invention. It is a fragmentary sectional view showing an example of a hole formed in a semiconductor wafer. It is a flowchart which shows the process evaluation method of the semiconductor device using SEM.

Explanation of symbols

11, 21, 71, 81 ... Electron beam source 12, 22, 72 ... Deflection electrode 13, 23, 73 ... Electron beam 14, 24, 74 ... Measurement sample 15, 25, 75 ... XY stage 16, 26, 76 ... Two Secondary electron detector 17, 27, 77 ... Chamber 18, 28, 78 ... DC power supply 29, 79 ... Ammeter 40 ... Semiconductor wafer 41 ... Shot 41a, 41b, 41c, 41d ... Chip 41ak ... Chip origin 41k ... Shot origin 42 ... shot interval 82 ... secondary electron waveform 85 ... substrate current waveform

  Next, the best mode for carrying out the present invention will be described with reference to the drawings.

(First embodiment)
FIG. 1 is a flowchart showing a method for manufacturing a semiconductor device according to the first embodiment of the present invention. In the present embodiment, a method for achieving the object of the present invention by using a combination of existing apparatuses is shown. FIG. 2 is an explanatory view showing an outline of a CDSEM used in the method for manufacturing a semiconductor device. FIG. 3 is an explanatory view showing an outline of EBSCOPE (EBSCOPE substrate current method) used in the manufacturing method of the semiconductor device.

  First, one hole in the plurality of holes formed in the semiconductor wafer is selected and specified as the measurement target hole A (step S1).

  That is, it is necessary to select the measurement target hole A from a very large number of holes existing on one semiconductor wafer. In order to select the measurement target hole A, information for identifying the measurement target hole A is required. In order to select a specific hole existing on the semiconductor wafer, an XY orthogonal coordinate system constructed when a specific point on the semiconductor wafer is taken as the coordinate origin is used. A semiconductor device is usually designed in a coordinate system using XY orthogonal coordinates.

  FIG. 4 is a plan view showing an example of shot arrangement on a semiconductor wafer. Semiconductor devices are manufactured using photographic exposure techniques. That is, all the layout information of the semiconductor device is recorded on what is called a mask corresponding to the film of the camera. By applying light to the mask (exposure), layout information on the mask is transferred to the semiconductor wafer 40. The range that can be exposed at one time is called a shot 41 and has a size of about 2 cm × 3 cm. Accordingly, there are about 20 shots 41 on one 8-inch semiconductor wafer 40. The shots 41 are arranged in an orderly manner in the vertical and horizontal directions, and the shot positions are uniquely determined by the designation of columns and rows in the semiconductor wafer 40. Further, a shot interval 42 is provided between the shots 41.

  FIG. 5 is a plan view showing in more detail one shot 41 in FIG. As shown in FIG. 5, in one shot 41, an area called a chip or a plurality of chips 41a, 41b, 41c, 41d that finally functions as one semiconductor device is formed. A shot interval 42 which is an interval between the shots 41 and 41 is not necessarily constant and is arbitrary. Therefore, the coordinates designated by the XY coordinate axes stretched over the entire semiconductor wafer 40 do not necessarily correspond to one hole. Therefore, in order to designate one measurement target hole A, designation is made with reference to the origin of the XY coordinate system independently stretched inside the shot 41 or the chips 41a, 41b, 41c, 41d on the semiconductor wafer 40.

  More specifically, in order to accurately designate one hole, first, the column and row of the shot 41 or the chips 41a, 41b, 41c and 41d are designated. Next, the electron beam irradiation position is moved to the XY coordinate position representing the measurement target position obtained with respect to the shot origin 41k or the chip origin 41ak using the precision stage.

  The position of the hole on the layout (design position) and the position of the hole actually produced do not necessarily match due to manufacturing errors. Therefore, using the pattern matching technique, the measurement target hole A is accurately extracted from the holes appearing at the XY coordinate positions. When it is difficult to extract the measurement target hole A by only one pattern matching, the pattern matching is performed as many times as necessary to extract the measurement points for the measurement target hole A.

  Next, the hole top diameter of the measurement target hole A selected in step S1 is measured by CDSEM (step S2).

  The CDSEM performed in step S2 will be described with reference to FIG. The CDSEM is called a critical dimension SEM and is a kind of scanning electron microscope. The CDSEM includes an electron beam source 11, a deflection electrode 12, an XY stage 15, a secondary electron detector 16, a chamber 17, and a DC power source 18. An electron beam source 11, a deflection electrode 12, a measurement sample 14, an XY stage 15, and a secondary electron detector 16 are disposed in a chamber 17 that forms a vacuum container.

  The CDSEM is an apparatus that uses an electron beam 13 having a short wavelength instead of light conventionally used to supplement the resolution of an optical microscope, and can obtain an image resolution of about several nanometers. The principle of operation is similar to that of a CRT television. While a cathode ray tube TV scans a light emitting layer provided on a glass screen sequentially with an electron beam having a diameter of about 0.1 mm to form an image, the CDSEM shows the object (measurement sample 14) itself to be observed. Scan with an electron beam. Here, the measurement sample 14 is, for example, a semiconductor wafer 40 and is placed on the XY stage 15 described above.

  The electron beam 13 is emitted from the electron beam source 11. The energy source of the electron beam source 11 is a DC power source 18. Further, the electron beam 13 emitted from the electron beam source 11 is narrowed down to about several nm by the polarizing electrode 12 or the like. The narrower the electron beam 13 is, the higher the image resolution is.

  The electron beam 13 is irradiated so as to fill the observation target object (measurement target hole A of the semiconductor wafer 40) sequentially. Irradiation is performed by moving the XY stage 15 in the XY directions. Then, secondary electrons generated on the surface of the sample due to the irradiation are detected by the secondary electron detector 16, and the detected signal is converted into an electric signal waveform and then imaged.

  An image obtained by such a CDSEM is, for example, an aggregate of pixels made up of 512 × 512 pixels, and the luminance of each pixel corresponds to the amount of secondary electrons detected. From this image, the hole top diameter (surface diameter) of the measurement target hole A can be obtained by extracting the edge of the measurement target hole A using a differential method, a half-width method, a Laplacian method, or a Sobel method.

  Next, the hole bottom diameter (hole bottom diameter) of the measurement target hole A selected in step S1 is measured by the EBSCOPE line scan mode (step S3).

  The EBSCOPE line scan mode performed in step S3 will be described with reference to FIG. The EBSCOPE is performed when the measurement sample (semiconductor wafer 40) is irradiated with the electron beam 23 as described in Japanese Patent No. 3334750, Japanese Patent No. 3292159, Japanese Patent No. 3175765, and the like cited in the “Background Art” column. Is a device that measures the substrate current generated by the ammeter 29 or the like.

  That is, the EBSCOPE includes an electron beam source 21, a deflection electrode 22, an XY stage 25, a secondary electron detector 26, a chamber 27, a DC power supply 28, and an ammeter 29. An electron beam source 21, a deflection electrode 22, a measurement sample 24, an XY stage 25, a secondary electron detector 26, and an ammeter 29 are arranged in a chamber 27 that forms a vacuum container.

  The electron beam source 21 emits an electron beam 23 using a DC power supply 28 as an energy source. The electron beam 23 emitted from the electron beam source 21 is narrowed down by the polarizing electrode 22 or the like. The electron beam 23 is applied to the measurement sample (semiconductor wafer 40) 24. Secondary electrons generated on the sample surface by the irradiation are detected by the secondary electron detector 16, and a current (substrate current) generated by the measurement sample 24 by the irradiation is measured by an ammeter 29.

  In EBSCOPE, there is a measurement method called a line scan mode in which the electron beam 23 is narrowed down and irradiated to the measurement sample 24 as in the CDSEM. When the same hole as the hole (measurement target hole A) observed by CDSEM is measured using EBSCOPE in the line scan mode, the relative value of the hole bottom diameter is obtained from the waveform of the measured substrate current. Further, by calibrating the length using a standard sample as the measurement sample 24, it is possible to convert the relative value of the hole bottom diameter into an absolute value.

  Next, the bottom state or bottom residue of the measurement target hole A selected in step S1 is measured by the blanket mode of EBSCOPE (step S4).

  The EBSCOPE blanket mode performed in step S3 will be described with reference to FIG. In addition to the line scan mode, EBSCOPE has a measurement mode called a blanket mode in which a measurement sample 24 is irradiated with a thick electron beam 23 having a constant energy for a predetermined time.

  This blanket mode can sensitively detect the state of the thin film at the bottom of the hole. The output result of the blanket mode is expressed by a value called an EBS value obtained by averagely evaluating the substrate current value flowing at the time of measurement. That is, the EBS value is a value obtained by dividing the substrate current generated when the measurement sample 24 is irradiated with the relatively thick electron beam 23 for a certain period of time by the current incident on the measurement sample 24 by the thick electron beam 23. With this EBS value, it is possible to measure the bottom state of the measurement target hole A or the bottom residue. That is, the EBS value when there is an abnormality such as the state of the bottom of the hole A to be measured being oxidized or there is a residue such as an etching residue is different from the normal EBS value without them. .

  Next, the hole top diameter, hole bottom diameter and hole bottom residue of the measurement target hole A measured in steps S2, S3 and S4 are compared with standard values to determine whether the measurement target hole A is non-defective (step). S5, S6).

  That is, it is determined whether the measured hole top diameter, hole bottom diameter, and hole bottom residue are within the allowable design range. Specifically, it is performed as follows. First, as shown in step S2, the hole top diameter is measured using the CDSEM for the measurement target hole A selected for process management, and the measured value is stored in the storage device. The measurement by CDSEM is performed by automatic measurement for accuracy.

  The hole top diameter stored in the storage device is compared with the design reference value by the CPU. For example, if the hole has a design value with a diameter of 0.1 μm, the allowable range is 0.1 μm ± 0.01 μm. When this allowable value is exceeded, a warning signal is issued.

  Next, as shown in step S3, the hole bottom diameter of the measurement target hole A is measured using EBSCOPE and recorded in the storage device. The movement (navigation) to the measurement point is the same as in the case of CDSEM. The measurement target hole A is irradiated with an electron beam, and the substrate current waveform is measured. Edge extraction processing is performed from the substrate current waveform, and the hole bottom diameter is measured.

  Next, the measured hole bottom diameter is compared with a design reference value. For example, if the hole is designed with a diameter of 0.05 μm, the allowable range is 0.05 μm ± 0.005 μm. If the design tolerance is not met, a warning is issued.

  As described above, if a hole that passes two criteria for the measurement values in steps S2 and S3 is selected, a hole manufactured according to the design value can be selected in terms of shape.

  In addition, the hole has an important characteristic (element) that does not appear in the design value of the hole shape that gives a geometric definition, but affects the final electric characteristic. That is the state of the hole bottom interface. At the bottom of the hole, there remains an oxide film of nanometer order, a film due to oxidation of the material at the bottom of the hole itself, or a resist residue or a cleaning residue, which has a decisive influence on the operation of the electronic device.

  These characteristics can be measured in the EBSCOPE blanket mode performed in step S4, and the measured values are expressed in units of the EBS values. This measured value has a property of being negative if an oxide film is at the bottom of the hole, or positive if it is a resist.

  The same measurement target hole A as the hole measured in the EBSCOPE line scan mode is measured in the EBSCOPE blanket mode and stored in the storage means. The EBS value is an evaluation amount unique to the apparatus shown in FIG. 3, and there is no CAD data used in the current semiconductor device design corresponding to the EBS value. Therefore, the reference value for the EBS value is obtained by conducting an experiment in advance.

  For example, when a measurement value of 100 EBS is selected as a reference value as an index indicating a good hole bottom state, ± 10 EBS can be set as an allowable range. The EBS value measured in step S4 is compared with this reference value, and a non-defective hole is selected.

  The semiconductor device manufacturing method of this embodiment may be compared with the standard value one by one in each measurement of the hole top diameter, hole bottom diameter, hole bottom residue, etc. in steps S2, S3, S4. , S3, and S4, all three measurements may be compared with the standard value. Further, the order of steps S2, S3, and S4 is not limited to the above order, and can be changed mutually.

  In steps S2 and S3, the hole top diameter and the hole bottom diameter are measured. Instead, the shape of the hole top and the shape of the hole bottom may be measured. In this case, the reference value in step S5 is a reference value for the shape of the hole top, the shape of the hole bottom, the state of the bottom, and the like.

  FIG. 6 is a diagram showing an example of a table summarizing values to be managed in the semiconductor device manufacturing method of the present embodiment. As shown in FIG. 6, a non-defective hole can be managed with three process indexes of a hole top diameter, a hole bottom diameter, and an EBS value.

  FIG. 7 is a diagram showing a set of process managements for performing an optimum process in the semiconductor device manufacturing method of the present embodiment. As shown in FIG. 7, in this embodiment, hole top diameter management, hole bottom diameter management, and EBS value (residue) management are performed for one measurement target hole A. Therefore, according to the present embodiment, it becomes possible to perform extremely strict management as compared with the management using only the hole top diameter using the CDSEM, which is performed in the conventional semiconductor device process management, and a semiconductor device with much higher reliability. Can be manufactured.

(Second Embodiment)
FIG. 8 is a flowchart showing a method for manufacturing a semiconductor device according to the second embodiment of the present invention. FIG. 8 shows an example in which a process is optimized using the process evaluation method of the first embodiment.

First, the same pattern for evaluating etching characteristics is formed on a plurality of equivalent semiconductor wafers using a photolithographic method (step S11).
In the pattern formed in step S11, several different hole patterns having parameters such as arrangement density and size are formed.

  Next, a process is performed on each semiconductor wafer while changing the etching level (step S12).

  Next, for strict measurement, the resist is peeled off in the same manner for each semiconductor wafer to obtain a measurement target sample (step S13).

Next, the measurement target hole A is selected from the many holes formed in the measurement target sample, as shown in the first embodiment, and measured (step S14).
This measurement is, for example, a hole top diameter, a hole bottom diameter, and an EBS value. Therefore, for example, the hole top diameter is measured by CDSEM, and the hole bottom diameter and the EBS value are measured by EBSCOPE. In addition, you may measure using SCI and SEM.

  The process optimization is performed with the goal that the holes as designed are made uniform in one semiconductor wafer as a whole. Accordingly, a plurality of measurement target locations in step S14 are set to such an extent that the in-plane distribution of the semiconductor wafer can be measured.

  FIG. 9A, FIG. 9B, and FIG. 9C are diagrams illustrating an example of measurement values acquired in step S14. FIG. 9A shows the measurement values on the plane of the semiconductor wafer 40 in shades of color. FIG. 9B is a graph showing measured values for the hole top diameter. FIG. 9C is a graph showing measured values for the hole bottom diameter.

  Among the etching levels used in the experiment, the best is the one with the hole top diameter and hole bottom diameter closest to the design values and the smallest in-plane distribution of the hole top diameter, hole bottom diameter and EBS value. Select as a process.

  There is another measure of robustness in the best process. The semiconductor process performs the same process on many semiconductor wafers and mass-produces semiconductor devices. However, the performance of the semiconductor manufacturing apparatus varies depending on the daily operation. Even in such a case, it is desirable to form holes having desired characteristics. In order to select such a process condition, it is only necessary to investigate the variation characteristic of the process result that appears when the process condition is varied. A generally known method for this is the Taguchi method, and the hole top diameter, hole bottom diameter, and EBS value may be used as the evaluation index. By using the above method, the most robust process can be selected (step S15).

  Since the EBSCOPE shown in FIG. 3 has the secondary electron detector 26, the hole top diameter can be measured using only the EBSCOPE. Accordingly, the hole top diameter, hole bottom diameter, hole residue, and the like can be measured only by EBSCOPE without using CDSEM as in the manufacturing method shown in FIG. In such a case, hall management is performed as follows.

  Although the order can be changed, first, the electron beam is scanned with respect to the measurement target hole B selected for the hole formation process management, and the hole top diameter is measured using the secondary electrons generated at that time. And store it in the storage device. Next, the EBSCOPE line scan mode is applied to the same measurement target hole B as described above, and the hole bottom diameter is measured and stored in the storage device. Next, the EBSCOPE blanket mode is applied to the same measurement target hole B as described above to obtain an EBS value representing the hole bottom information and store it in the storage device. The three stored values are sequentially compared with the reference value for each value, and the performance of the hall is evaluated from the comparison result.

  FIG. 10 is an explanatory view showing a modification of the present embodiment. That is, FIG. 10 shows a state in which the measurement result of step S14 is displayed on the display device as an image or a numerical value. The screen 50 shows the shape of the hole top measured by SEM. On the screen 50, an image 51 indicating the shape of the hole top and numerical data 52 regarding the shape of the hole top are displayed. Also, hole top measurement memories Mx2 and My2 for visually recognizing the absolute value of the image 51 are also displayed. The screen 50 may be displayed by data measured by EBSCOPE shown in FIG.

  The screen 60 shows the shape of the hole bottom measured by the EBSCOPE line scan mode. On the screen 60, an image 61 indicating the shape of the hole bottom and numerical data 62 regarding the shape of the hole bottom are displayed. Also, hole bottom measurement memories Mx1 and My1 for visually recognizing the absolute value of the image 61 are also displayed.

  The screen 50 and the screen 60 may be displayed simultaneously on one display screen, or may be displayed separately. In addition to the screens 50 and 60, an image and a numerical value indicating the state of the bottom of the hole may be displayed on the display device.

  According to this modification, it is possible to display the overall and overall structure of the specific measurement target hole on the screen. This display can be executed without damaging the semiconductor wafer to be measured, and can be executed rapidly and at a much lower cost.

(Third embodiment)
FIG. 11 is a diagram showing EBSCOPE used in the method for manufacturing a semiconductor device according to the third embodiment of the present invention. The basic configuration of the EBSCOPE of this embodiment is the same as that of the EBSCOPE in FIG. And EBSCOPE of this embodiment is
An electron beam source 71, a deflection electrode 72, an XY stage 75, a secondary electron detector 76, a chamber 77, a DC power supply 78, and an ammeter 79 are configured. An electron beam source 71, a deflection electrode 72, a measurement sample 74, an XY stage 75, a secondary electron detector 76, and an ammeter 79 are arranged in a chamber 77 that forms a vacuum container.

  EBSCOPE can simultaneously measure the secondary electrons and the substrate current when scanning the electron beam 73 by adjusting internal parameters of the apparatus such as the amount of irradiation current, irradiation speed, and irradiation energy. Therefore, for example, the hole top diameter and the hole bottom diameter of the measurement target hole C selected for the hole etching process management can be measured simultaneously.

  In this way, the measured values of the hole top diameter and the hole bottom diameter are obtained for the same measurement target hole C and for the same position in the measurement target hole C. Accordingly, the effectiveness of the measured values of the hole top diameter and the hole bottom diameter as evaluation data is increased, and a more accurate evaluation of the hole performance is possible.

(Fourth embodiment)
FIG. 12 is a diagram showing a method for manufacturing a semiconductor device according to the fourth embodiment of the present invention. In this embodiment, the Si substrate 84 that is a semiconductor wafer is used as a measurement sample. An oxide film 83 is formed on the surface of the Si substrate 84, and a hole penetrating the oxide film 83 is formed. The electron beam 81 is scanned across the hole (line scan measurement). Then, the hole top diameter d1, the hole bottom diameter d2, and the state of the hole bottom are measured by EBSCOPE.

  In EBSCOPE, the wave height h1 of the substrate current waveform 85 measured during the line scan measurement can be measured. The wave height h1 may include information indicating the hole bottom state similar to the information obtained in the blanket mode. Therefore, for the purpose of improving the measurement speed, the hole top diameter d1 is measured from the secondary electron waveform 82, the hole bottom diameter d2 is measured from the substrate current waveform 85, and the substrate current is measured. The hole bottom state is measured from the wave height h1. These three measurements are performed simultaneously, and the measured values are stored in a storage device. The hall is managed by comparing the stored value with a predetermined reference value.

(Fifth embodiment)
13A, 13B, and 13C are views showing a method of manufacturing a semiconductor device according to the fifth embodiment of the present invention. That is, FIG. 13A, FIG. 13B, and FIG. 13C show examples of the cross-sectional shape of holes in a semiconductor device.

  The cross-sectional shape of a hole in a recent semiconductor device includes not only a circle but also an ellipse as shown in FIG. 13A or other shapes. In order to accurately evaluate the hole diameters, it is necessary to approximate the shape according to each hole and extract the feature amount.

  In the line scan mode of EBSCOPE, a normal CDSEM performs a linear electron beam scan on a specific location and measures the length, whereas a plurality of electron beam scans are performed so as to cover the entire hole. Perform hole edge extraction. From the extracted hole edge, a mathematical approximation curve corresponding to the hole shape is generated, and the diameter, minor axis, major axis, center position, distortion amount, roughness (see FIG. 13B), hole top from the approximate curve feature amount Center coordinates and hole bottom center coordinates or their deviation (see FIG. 13C), hole formation angle, hole depth, and the like. There are also some reference values for these indicators, and there is a strict tolerance. Therefore, target values are determined and managed by using the measurement amounts necessary for the process management as a table.

(Sixth embodiment)
FIG. 14 is a diagram showing a method for manufacturing a semiconductor device according to the sixth embodiment of the present invention. That is, FIG. 14 shows a plan view of one chip 90 in the semiconductor wafer. In the chip 90, a plurality of holes H1 and H2 are formed.

  The process evaluation index is rarely determined by the characteristics of one hole, and the characteristics of several hole assemblies are important. For example, it is known that the performance of a hole varies depending on a load effect called a microloading effect. Therefore, different process results are generally obtained even if the same process is performed depending on the density at which holes are formed.

  For example, when it is known that the isolated hole (H1) tends to have a smaller finish, the hole performance standard can be linked with the hole density and expressed as a function of the hole density. In this way, it is possible to distinguish and manage a group that tends to be small and easy to create a hole on average from a group that tends to be large, or to use different evaluation criteria for holes having different hole formation densities. Therefore, more detailed process management is possible. For example, the index 1 is used for the hole H1 having a low hole density, and the index 2 is used for the hole H2 having a high hole density.

(Seventh embodiment)
15A and 15B are diagrams illustrating a method for manufacturing a semiconductor device according to a seventh embodiment of the present invention. That is, FIG. 15A and FIG. 15B show one chip 100 in a semiconductor wafer. 15A shows a plan view, and FIG. 15B shows a cross-sectional view at position X1-X2.

  A groove 101 is formed on the surface of the chip 100. A plurality of holes H are formed at equal intervals along the groove 101 in the formation region of the groove 101. In addition to the region where the groove 101 is formed, a plurality of holes H are formed. The arrangement of holes H (layout R2) outside the region where the groove 101 is formed is different from the arrangement of holes H (layout R1) in the region where the groove 101 is formed.

  The holes H are formed on the entire surface of the semiconductor wafer by an etching process. Therefore, in order to determine whether or not the hole H is formed as designed, it is necessary to know the nature of the hole H formed in the entire semiconductor wafer. Etching is performed by forming plasma, but it is generally known that distribution occurs in the wafer surface. The shape is concentric or inclined in one direction.

  Therefore, for example, about 100 points are taken in the surface of the semiconductor wafer, and the hole top diameter, hole bottom diameter, hole bottom residue, etc. of the hole H are measured. In general, the degree of completion of the hole H has a load effect called a microloading effect, and even a hole having the same hole diameter varies depending on the peripheral layout. Therefore, the holes H at the same place in the layout are selected as measurement points, and the variation is evaluated. The variation can be evaluated by an amount using a standard deviation such as 3 sigma.

  For example, the evaluation of the quality of one etching process is performed using the average value of hole top diameter, average value of hole bottom diameter, average value of hole residue (EBS value), 3 sigma value of in-plane variation of hole top diameter, hole Evaluation is based on 3 sigma value of in-plane variation of bottom diameter and 3 sigma value of in-plane variation of hole residue (EBS value).

  One semiconductor device includes various layouts, and the standard values may be different for each layout. At that time, management is performed by separating the management level by layout. For example, for hole H in layout R1, the average value of the hole top diameter, the average value of the hole bottom diameter, the average value of the hole residue (EBS value), the 3 sigma value of in-plane variation of the hole top diameter, the hole bottom diameter 3 sigma value of in-plane variation and 3 sigma value allowable value of in-plane variation of hole residue (EBS value) are set.

  Regarding the hole H in the layout R2, the average value of the hole top diameter, the average value of the hole bottom diameter, the average value of the hole residue (EBS value), the 3 sigma value of the in-plane variation of the hole top diameter, the in-plane diameter of the hole bottom An allowable value of 3 sigma value of variation and 3 sigma value of in-plane variation of hole residue (EBS value) is set. As described above, according to the present embodiment, it is possible to individually and finely provide a standard value or an index of the process finish.

  As mentioned above, although embodiment of this invention was described, the manufacturing method of the semiconductor device of this invention is not limited to the above-mentioned embodiment, A various change can be added in the range which does not deviate from the summary of this invention. Of course.

  The present invention can accurately measure the holes formed in the semiconductor wafer by measuring the current flowing in the measurement sample such as the semiconductor wafer and the secondary electrons by the irradiation of the electron beam, and strictly the semiconductor device manufacturing process. Can be managed. Therefore, the present invention is useful not only for various semiconductor device manufacturing methods but also for various semiconductor device manufacturing apparatuses.

Claims (11)

One hole in a plurality of holes formed in a semiconductor wafer is specified as a measurement target hole,
Non-destructively measuring the shape or diameter of the hole top in the measurement target hole, the shape or diameter of the hole bottom in the measurement target hole, and the bottom state or bottom residue in the measurement target hole,
A method of manufacturing a semiconductor device, comprising: managing a process of the semiconductor device based on a shape or diameter of the hole top, a shape or diameter of the hole bottom, and a state of the bottom or a residue on the bottom.   2. The semiconductor device according to claim 1, wherein the measurement of the shape or diameter of the hole top includes a process of measuring secondary electrons and reflected electrons generated by irradiating the semiconductor wafer with an electron beam. Manufacturing method.   The measurement of the shape or diameter of the hole bottom includes a process of measuring a substrate current that is a current generated in the semiconductor wafer by irradiating the semiconductor wafer with an electron beam. Semiconductor device manufacturing method.   2. The measurement of the bottom state or the bottom residue includes a process of measuring a substrate current which is a current generated in the semiconductor wafer by irradiating the semiconductor wafer with an electron beam. The manufacturing method of the semiconductor device of description.   When the shape or diameter of the hole top is a predetermined value, the shape or diameter of the hole bottom is a predetermined value, and the bottom state or bottom residue is in a predetermined state, the measurement target hole is 2. The method of manufacturing a semiconductor device according to claim 1, wherein the semiconductor device is determined to be normally formed. The non-destructive measurement is
Irradiating the semiconductor wafer with an electron beam so that a trajectory of the electron beam crosses the measurement target hole;
Detecting a waveform of secondary electrons generated during the irradiation and a substrate current waveform which is a waveform of a current generated in the semiconductor wafer during the irradiation;
Using the waveform of the secondary electrons, measure the shape or diameter of the hole top,
Using the substrate current waveform, measure the shape or diameter of the hole bottom,
An electron beam that is thicker than the electron beam that crosses the measurement target hole is irradiated to the measurement target hole for a certain period of time, and the substrate current generated by this irradiation is a current that is incident on the semiconductor wafer by the thick electron beam. Measure the EBS value divided by
Semiconductor device process management
2. The method of manufacturing a semiconductor device according to claim 1, wherein the method is performed based on a diameter of the hole top, a diameter of the hole bottom, and an EBS value.   7. The method of manufacturing a semiconductor device according to claim 6, wherein the waveform of the secondary electrons and the waveform of the substrate current are waveforms obtained simultaneously by irradiation of the electron beam onto the semiconductor wafer.   2. The method of manufacturing a semiconductor device according to claim 1, wherein the process management of the semiconductor device is performed based on a hole arrangement density in the semiconductor wafer and a result of the measurement.   2. The process for manufacturing a semiconductor device according to claim 1, wherein the process management of the semiconductor device is performed based on a layout (an arrangement pattern or an arrangement pattern) regarding holes in the semiconductor wafer and a result of the measurement. Method. The measurement of the shape or diameter of the hole top has a process of measuring secondary electrons and reflected electrons generated by irradiating the semiconductor wafer with an electron beam,
The measurement of the shape or diameter of the hole bottom has a process of measuring a current generated in the semiconductor wafer by irradiating the semiconductor wafer with an electron beam,
An image and a numerical value indicating the shape of the hole top, and an image and a numerical value indicating the shape of the hole bottom are displayed on a display device based on data acquired by measurement of the hole top and the hole bottom. A method for manufacturing a semiconductor device according to claim 1.   2. The semiconductor device manufacturing method according to claim 1, wherein the shape or diameter of the hole top, the shape or diameter of the hole bottom, and a state of the bottom or a residue on the bottom are displayed on a display device. Method.