JPS6364687A - Disk player - Google Patents

Abstract

PURPOSE:To read a retrieval code even if a spindle drive motor does not attain a prescribed speed by controlling the delay time of one delay input signal from a multiplier in a demodulator according to the level of an output that a balanced demodulator reproduces and demodulates. CONSTITUTION:When an address retrieval is specified, a detection level signal S6 in an integration circuit 13 for a demodulation signal generated by a balanced demodulator circuit 8 for a reproduction FM signal from a pickup 5 is below a prescribed value because a spindle motor 2 does not attain a prescribed speed. The delay time of a variable delay circuit 9 is increased through a comparator 17 and an inverter 12, and the output level of the multiplier 10 rises. An address and code detection circuit 18 and the like read addresses and codes even if the motor 2 does not attain the prescribed speed. Therefore time required for retrieving addresses can be considerably shortened.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a disc player for playing a disc, such as a video disc, which is played while being rotated at a constant linear velocity.

[Summary of the invention]

In the address search mode, the present invention detects the output level of a balanced demodulator that demodulates the reproduction signal of the pickup device, and depending on the detected level, the two-man power of the multiplier constituting the balanced demodulator is By controlling at least one of the inputs to maintain the output level at a predetermined level regardless of the speed of the motor, it is possible to read the address code from the output, thereby shortening the waiting time for address search. It was designed to achieve this.

[Conventional technology]

Commercially available video disks record an FM video signal obtained by modulating a carrier wave with a center frequency of, for example, 8.5 MHz with a video signal. Further, an address signal used for address search is recorded in the 17th and 18th horizontal scanning periods in the vertical blanking period of this FM video signal. This address signal consists of a pulse train signal having an address code consisting of rlJ, "0".

A video disc player that plays such a video disc rotates the disc at a constant linear velocity depending on the position of an optical or capacitive pickup device. That is, when the pick amplifier device is at the innermost circumference of the disk, the spindle motor that rotates the disk is rotated at the fastest speed (for example, about 1800 r, p, m), and when the pickup device is at the outermost circumference, the spindle motor is rotated at the slowest speed (for example, approximately 600 r, p, m). By controlling the rotational speed of the motor according to the position of the pick amplifier device in this way,
The center frequency of the reproduced FM video signal obtained from the pickup device is always set to a predetermined 8.5 MHz. This reproduced FM video signal is generated by a balanced demodulator.
The signal is demodulated by an M demodulator.

When performing an address search, when an address is specified, the pick amplifier device first moves to the vicinity of the specified address and plays the disc. 17.1 of the video signal obtained from the FM demodulator that demodulates this reproduced FM video signal.
The address signal in the eighth horizontal scanning period is detected, and the tracking of the pickup device is controlled so that the address code matches the designated address code. The address signal is detected by comparing the pulse train signal in the 17th and 18th horizontal scanning periods with a predetermined slice level.

Thus, when the pickup device is waiting at a certain position on the disk, the disk is rotating at a rotational speed corresponding to that position. When an address is specified in this state, the pink-up device is quickly moved close to the specified address by the pink-up moving mechanism. Normal playback will not occur unless the rotational speed of the disc is increased or decreased in accordance with the moved position. That is, when the pickup device moves from the standby position to the inner circumference side, the rotational speed needs to be increased, and when the pickup device moves from the standby position to the outer circumference side, the rotational speed needs to be decreased. However, even if the pickup device is moved, the rotation of the spindle motor cannot be quickly increased or decelerated to a predetermined amount in response to this, and the motor gradually increases its speed from the speed at the original position. Or decelerate to reach a predetermined speed.

If the speed of the motor does not increase sufficiently to reach a speed corresponding to the position of the pick amplifier device, the output level of the FM demodulator will become low. For this reason, the level of the address signal cannot sufficiently exceed the predetermined slice level, and in some cases may not reach the slice level at all. As a result, the address code cannot be read correctly.

Furthermore, if the speed of the motor is not sufficiently reduced and exceeds the speed corresponding to the position of the pick amplifier device, the frequency of the reproduced FM video signal increases. As a result, the influence of noise and the like appears, and the output level of the FM demodulator becomes abnormally high, making it impossible to read the address code normally.

For this reason, conventionally, when performing an address search, when the pickup device is moved, the motor speeds up or decelerates immediately to read the address code, and if the address code cannot be read correctly, the motor speeds up or decelerates further. I tried to repeat the process of reading the address code again.

[Problem that the invention seeks to solve]

As mentioned above, in conventional address searches, speeding up or deceleration of the spindle motor and reading of the address code are repeated alternately, so the waiting time until the specified address is detected is very short. This could take up to 10 seconds. An audio compact disc is a disc that is played at a constant linear velocity, but address searches are performed relatively quickly. This is because compact discs are small and lightweight, so the load on the motor is light, and the speed can therefore be easily controlled. On the other hand, video discs are heavy and large, causing wind damage, etc., which increases the load on the motor, and therefore requires a significant amount of time to change the speed.

The present invention is designed to shorten the time required to search for an address by making it possible to read the address code while the pickup device is moving and the motor is speeding up or decelerating.

[Means for solving problems]

The present invention includes means for detecting the magnitude of the output signal obtained from the balanced demodulator when performing an address search, and a means for detecting the magnitude of the output signal obtained from the balanced demodulator according to the detected level. means for controlling the delay time.

(Function) Even when the big amplifier device is near the designated address and the motor is speeding up or decelerating, the delay time is controlled according to the speed of the motor and the output level of the demodulator is adjusted. Since the address code can be set to a predetermined level, it becomes possible to read the address code.

〔Example〕

FIG. 1 shows a first embodiment of the invention.

In FIG. 1, a video disc 1 is rotationally driven by a spindle motor 2. As shown in FIG. This motor 2 is controlled by a system controller 3 through a speed control circuit 4 to maintain a constant linear velocity. Further, an optical or capacitive type pink-up device W5 moves the disk 1 shown by arrows a and b by a pickup moving mechanism 6 based on instructions from the system controller 3.
The lens is moved in the radial direction and in the focus direction.

A reproduced FM video signal obtained from the pickup device 5 is supplied to an FM demodulation circuit 8 through an amplifier 7. This F
The M demodulation circuit 8 includes a variable delay time delay circuit 9 and a multiplier 1.
0 and a low-pass filter 11, etc., constitute a balanced demodulation circuit. The output of the multiplier 10 is supplied to the low-pass filter 11 and also to an integrating circuit 13 composed of a resistor R+ and a capacitor C1.

It is now assumed that the pink-up device 5 is waiting at a certain position on the disk 1, and at this time the motor 2 is rotated by the speed control circuit 4 at a speed corresponding to the position of the big amplifier device 5.

When performing an address search in this state, an address designation signal S0 is input to the system controller 3. As a result, the pickup moving mechanism 6 immediately moves to the pink-up device 5.
is moved in the direction of arrow a or b to near the indicated address. At this time, the motor 2 is accelerated or decelerated, but as described above, it does not reach the predetermined speed immediately. The pickup device 5 reproduces the disc 1, and the reproduced FM video signal S1 shown in FIG.
The signal S2 is applied to one input terminal of the signal S2, and is delayed by a time T1 in the delay circuit 9, resulting in a signal S2 shown in FIG. This signal S2 is applied to the other input terminal of multiplier IO. As a result, from the multiplier 10, the pulse width T+ shown in FIG.
A signal S3 having .sigma.

The signal S3 is integrated by the low-pass filter 11 to become a signal S4 having a waveform close to the original video signal, and this signal S4 passes through the amplifier 14 and de-emphasis circuit 15 to become the original video signal S, and the output terminal 1
It is output from 6.

At the same time, the signal S3 is integrated by the integrating circuit 13.

The cutoff frequency of this integrating circuit 13 is, for example, several hundred
kHz, and is selected to be sufficiently lower than the cutoff frequency of the low-pass filter 11, for example, 5M) (2. Therefore, the integrated output signal S6 of the integrating circuit 13
represents the change in the DC component of the video signal. This signal S6 has characteristics as shown in FIG. 3 with respect to the input frequency of the FM demodulation circuit 8. That is, in FIG. 1, as the frequency at the input end of the FM demodulation circuit 8 is increased, the level of the signal S6 tends to increase. Note that, for this characteristic, a linear region indicated by f,1 is used.

The signal S6 is applied to a comparator 17 and compared with the reference voltage V1. This reference voltage vl is set so that the input frequency of the FM demodulation circuit 8 is the center frequency (8, 5) of the reproduced FM video signal S1.
The magnitude is selected to correspond to the demodulated output level at the time of MHz). Therefore, the level of the signal S obtained from the comparator 17 and the signal S, which is the difference between the voltage
The magnitude corresponds to the difference between the current position of the knob device 5 and the predetermined speed.

This signal S is inverted by an inverter 12 to become a signal S, and this signal S is applied to a delay circuit 9 to control its delay time T. This delay circuit 9 has a characteristic that the delay time TI is controlled by the signal Sll as shown by curve A in FIG.

As this delay circuit 9, for example, a variable delay time type circuit formed by connecting CMOS inverters in multiple stages is used.

A variable delay time type delay circuit formed by connecting CMOS impulses in multiple stages can change the delay time T1 as shown by curve A in FIG. 4 by changing its power supply voltage.

Note that the signal S is used as the power supply voltage.

For example, if the pickup device 5 moves from the standby position to the inner circumferential side indicated by the arrow a, the motor 2 will speed up, but since the speed of the motor 2 is initially insufficient, the frequency of the signal S1 will increase. is low. Therefore, at this time, the level of the signal S is reduced due to the characteristics shown in FIG. Therefore, the signal S7 also becomes small. Since this signal S, is inverted by the inverter 12, the signal S8 becomes large. Therefore, the delay time T+ increases, and the pulse width of the signal S3 in FIG. 2 widens, thereby raising the level of the signal S to a predetermined level.

A portion of the signal S is applied to the address code detection circuit 18. The address code detection circuit 18 reads the address code by comparing the address signals included in the 17th and 18th horizontal scanning periods of the signal S with a predetermined slice level, as described above. In this case, the above signal S.

Since the level of the address signal is sufficiently high, the level of the pulse of the address signal can sufficiently exceed the predetermined slice level, and the address code can be read normally. That is, even if the speed of the motor 2 is not a predetermined speed, the address code can be read, thereby reducing the time required for address search.

Furthermore, if the pickup device W5 moves from the standby position to the outer circumferential side indicated by the arrow, the motor 2 is decelerated, but since the speed of the motor 2 is initially high, the frequency of the signal S becomes high. There is.

Therefore, at this time, the level of the signal S is increased according to the characteristics shown in FIG. Therefore, the signal S.

Therefore, the signal S8 becomes large and the delay time T becomes small. Therefore, the pulse width of the signal S3 becomes narrower, and the signal S is lowered to a predetermined level.

Therefore, the address code detection circuit 18 can read the address code normally. That is, even if the speed of the motor 2 is not a predetermined speed, the address code can be read, thereby reducing the time required for address search.

The address code read by the address code detection circuit 18 is decoded by a decoder 19 and then applied to the system controller 3. The system controller 3 controls the pickup moving mechanism 6 to control the tracking of the pick amplifier device 5 until the read address code and the designated address code are matched. The pulse width of the pulse forming the address signal changes depending on the speed change of the motor 2, but the decoder 9 is designed so that it can be decoded even if the duty ratio of this pulse changes to, for example, about 4:6. is done/is being done.

FIG. 5 shows a second embodiment of the present invention, and parts corresponding to those in FIG. 1 are given the same reference numerals.

In this embodiment, a second variable delay time delay circuit 20 is connected to the input terminal of the multiplier 10 in FIG.
0 and the output of amplifier 7, and its delay time T2
is controlled by the signal S7. Curve B in FIG. 4 shows the characteristics of the delay time T2 of the delay circuit 20 with respect to the signal S7, and the curve A shown in FIG.
has the opposite tendency.

According to the above configuration, when the speed of the motor 2 is increased, the signal S7 becomes smaller and the delay time T2 of the delay circuit 20 becomes smaller, and the signal S8 becomes larger and the delay time T1 of the delay circuit 9 becomes longer. . As a result, two delay circuits 9.
The delay time difference between S20 and S20 becomes smaller, which causes the signal S3 to
The pulse width of the signal S is widened and the signal S is controlled to a predetermined level. Furthermore, when the motor 2 is decelerated, the delay time difference increases due to the opposite effect to that described above, and the pulse width of the signal S3 is narrowed, thereby causing the signal S to reach a predetermined level.
controlled.

According to the first and second embodiments described above, when the pickup device 5 is moved and the speed increase or deceleration of the motor 2 is started when searching for an address, the output video signal S is immediately activated.
Since the level of , is controlled to an appropriate level, motor 2
The address code can now be read even when the address code has not reached a predetermined size. This can reduce the time required for address search.

〔Effect of the invention〕

According to the present invention, when searching for an address, it is possible to read the address code even while the motor has not reached a predetermined speed depending on the position of the pickup device, and therefore the waiting time for the address search is significantly reduced compared to the conventional method. can do.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing an embodiment of the present invention, FIG. 2 is a timing chart showing the operation of FIG. 1, FIG. 3 is a characteristic diagram of the FM demodulation circuit, FIG. 4 is a characteristic diagram of the delay circuit, and FIG. Figure 5 shows the second embodiment. This is a diagram. In addition, in the symbols used in the drawings, 1--...-----------1---Video disk 2-----...-----... Spindle motor 4・−・−・−・−・−・−−−−m−Speed control circuit 5−・−・−・・−・・−・Pickup device 8−−−−−−−−−− ---FM demodulation circuit 9 consisting of a balanced demodulator--1.--... Variable delay time delay circuit 10---------- - Multiplier 13...---------- Integrating circuit 17--
・−・−・−１１−−−Comparator 18−・−・−・・−・
This is the number one code detection circuit.

Claims (1)

[Scope of Claims] The disc is rotatably driven at a constant linear velocity according to the position of the pickup device, has an address search function based on an address signal recorded on the disc, and has a playback signal obtained from the pickup device. In a disc player configured to perform demodulation using a balanced demodulator, means is provided for detecting the magnitude of the output signal of the balanced demodulator when performing the address search, and the balanced demodulator is configured to perform demodulation according to the detected level. A disc player characterized in that the delay time of at least one of two input signals of a multiplier constituting a demodulator is controlled.