JPS6354616A - Microcomputer system - Google Patents

Abstract

PURPOSE:To record a system state and the time at which a power source is disconnected, by recording the system state and the time at which the power source is disconnected to a management table in a nonvolatile memory which is backed up by a backup power source. CONSTITUTION:When access to a storage device 7 is required, the contents of an access status setting memory of the storage device 7 which is provided in an interface 8 are set, for instance, to '1' at the time of 'reading', and to '2' at the time of 'writing', and set to '0' for showing 'in the course of non-access' at the time point when those processing is ended. If a power source disconnection interrupting signal is inputted from a signal line 6, an MPU 1 shifts the processing to a power source disconnection interrupting routine, reads out an access status of the storage device 7 from the access status setting memory in the interface 8 in the course of said routine, and also, reads out time of that time from a timepiece 10, and records both these data as a pair in an access status area 11 and a time area 12 of the latest position of the management table in a CMOS RAM 4.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a microcomputer system in which the system state at the time of power-off is recorded.

[Conventional technology]

FIG. 3 is a block diagram showing a conventional microcomputer system disclosed in, for example, Japanese Patent Application Laid-Open No. 61-88317. In the figure, 1 is a microprocessor (hereinafter referred to as MPU
), 2 is the main memory, and 3 is a read-only memory for initial program loading (hereinafter referred to as IPL ROM).
), 4 is CMOS random access memory (hereinafter referred to as CMOS RAM), and 5 is this CMOS
Back amplifier power supply connected to S RAM 4, 6
is a signal line that transmits a power-off interrupt signal to the M P Ul;
9 is the MPU 1, main memory 2, IPLROM 3,
This is a bus that connects the CMOS RAM 4 and the like.

Further, the CMO8RAM4 is connected to the backup power supply 5.
It is backed up by , and acts as non-volatile memory.

Next, the operation will be explained. When the power of the microcomputer system configured in this way is cut off, the M
The PU 1 executes a power-off interrupt routine in response to a power-off interrupt signal from the signal line 6 . In this power-off interrupt routine, MPU 1 stores information (one bit of information is sufficient) in 0MO8RAM to inform IPLROM3 that it is necessary to perform power-on processing when the system starts next time. Set it in 4.

[Problem that the invention seeks to solve]

Since conventional microcomputer systems have L2 configured as shown above, it is possible to check whether the power was turned on at system startup or whether the system was simply reset. The time when the power was cut off, more specifically, whether or not the storage device was being accessed at the time of the power cut, and the possibility that the memory contents of the storage device were destroyed due to the power being cut off unexpectedly during the access. The problem was that it was not possible to check later whether or not there was sex.

The present invention has been made to solve the above-mentioned problems, and an object of the present invention is to provide a microcomputer system that can record the system status and time when the power is turned off.

[Means for solving problems]

The microcomputer system according to the present invention has a management table in a non-volatile memory that records the system state and time at the time of power-off, and updates the management table by a power-off interrupt routine executed when the power is turned off. It is something.

[Effect]

The management table in this invention (= records the time and system status at that time in the management table by executing a power-off interrupt routine when the power is turned off, and provides this management table in a non-volatile memory backed up by a backup power supply, Read this later to know when the power was turned off and what the system status was at that time.

〔Example〕

An embodiment of the present invention will be described below with reference to the drawings. 1st
In the figure, 1 is the MPU, 2 is the main memory, and 3 is the IP
L ROM, 4 is 0M which acts as non-volatile memory
O3RAM, 5 is a backup power supply, 6 is a traffic light, and 9 is a bus, which are equivalent to those given the same reference numerals in FIG.

Next, 7 is an external storage device such as a magnetic disk, 8 is an interface of this storage device 7, and 10 is a clock, and this interface 8 and the clock 10 are connected to the bus 9.

In addition, FIG. 2 shows 0MO3 which is backed up by the backup power supply 5 and acts as a non-volatile memory.
FIG. 3 is a configuration diagram showing an example of a management table arranged in RAMJ. In the figure, 11 is an access status area, 12 is a time area, and these areas are 1
As a pair, the access status indicating the access state of the storage device 7 when the 'a source was cut off, and the time at that time are recorded, respectively. This management table includes a plurality of sets of such access status areas 11 and time areas 12.

Next, the operation will be explained. MPUI is main memory 2
Processing is executed according to the program in the interface 8, but when it becomes necessary to access the storage device 7, the contents of the memory for setting the access status of the storage device 7 provided in the interface 8 are transferred to the storage device 7 at that time. According to the access state, for example, it is set to 111 when "reading" and 12' when "writing", and when those processes are completed, it is reset to 101 indicating that no access is being performed.

If a power-off interrupt signal is received from the signal a6 while such processing is being performed, the MPU 1 moves to the power-off interrupt routine ζ;
storage device 7 from the memory for access status setting in
At the same time, the current time is read from the clock 10, and both of these data are recorded as a set in the access status area 11 and time area 12 at the latest position of the management table in 0MO8RAMJ.

The 0MO3RAM 4 in which this management table is provided is backed up by the backup power supply 5 and serves as a non-volatile memory, and its stored contents will not be damaged even if the power is cut off. Therefore, later on, this 0MO8R
By reading the contents of the management table from AM4, you can find out when the instantaneous power outage occurred and what the access status of the storage device 7 was at that time. It is possible to easily judge whether or not the

Note that in the above embodiment, the information recorded in the management table is limited to two pieces: the access status indicating the access state of the storage device γ and the power-off time.
In order to make analysis easier when the storage device 7 is destroyed, the system status may be recorded, including detailed information such as accessed track and sector position data. .

Furthermore, in the above embodiment, information is set in the management table only when the power is turned off, but the time at system start may also be set in the same way. If you can read the new information from the management table and identify that the information was not set when the power was turned off, then the current startup of the system was not caused by turning on the power after the power was turned off, but by the operator's reset operation. It can be determined that there is.

Furthermore, although the memory for setting the access status of the storage device 7 is shown as being located within the interface 8, it may also be located within the main memory 2.

〔Effect of the invention〕

As described above, according to the present invention, the state of the system at the time of power-off and the time are recorded in the management table in the non-volatile memory backed up by the backup power supply. Check whether the power was turned off, when a momentary power outage occurred, and whether there is a possibility that the power was interrupted while writing to the storage device and the contents of the storage device were destroyed. This has the effect of providing a microcomputer system that can be easily examined.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing a microcomputer system according to an embodiment of the present invention, FIG. 2 is a block diagram showing an example of its management table, and FIG. 3 is a block diagram showing a conventional microcomputer system. 1 is MPU, 2 is main memory, 3FiIPLROM,
4 is a non-volatile memory (0MO3RAM), 5 is a backup power supply, 6 is a signal line, 7 is a storage device, 8 is an interface, 9 is a bus, and 10 is a clock. In the figures, the same reference numerals indicate the same or equivalent parts. Patent Applicant: Mitsubishi Electric Co., Ltd. Bar-Toku, Attorney-at-Law, Patent Attorney 1) Hiroshi Akira: ′, ′(
Figure 1 Figure 2

Claims (1)

[Claims] A microcomputer system comprising a microprocessor and a main memory connected to the microprocessor via a bus and storing programs for performing processing, the system comprising a nonvolatile memory connected to the bus and backed up by a constant backup power supply. hand,
A management table is provided in this non-volatile memory to record the system state and time at the time of power-off of the microcomputer system, and when the microprocessor receives a power-off interrupt signal at power-off, it processes a power-off interrupt routine. The microcomputer system is characterized in that the system status at the time of power-off and the time of occurrence are recorded in the management table in association with each other.