JPS6338878B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a multilayer printed wiring board and a method for manufacturing the same, and particularly to a multilayer printed wiring board and a method for manufacturing the same.
The present invention relates to a high-density multilayer printed wiring board having holes (blind via holes). In conventional printed wiring boards, not only holes for inserting components but also via holes are penetrated, and a conductor layer is generally formed on the inner wall of the hole by plating or the like.

In addition, as multilayer printed wiring boards (hereinafter referred to as multilayer boards) become more multilayered, some of the inner layers have embedded via holes (inner layer via holes, etc.).
A design with an inner layer via hole is also adopted. In recent years, attempts have been made to increase the density of packaging due to the performance and economic needs of electronic devices.

For this reason, not only are electronic devices such as ICs and LSIs becoming more highly integrated and faster, but printed wiring boards on which these devices are mounted are also becoming more dense.

Two designs have been made to increase the density of printed wiring boards. That is, the first attempt is to increase the number of conductor layers to increase the number of layers, and the second attempt is to pass many wires between the grids.

However, this results in an increase in via holes connecting the interlayer conductor layers in the first attempt. Particularly, when the via hole 4 is provided as a through hole in the printed wiring board as shown in FIG. 1, the wiring performance of the second attempt described above is significantly hindered. This has been addressed by reducing the diameter of the via hole 4, but as the number of layers increases, the board thickness also increases, and the ratio of board thickness/hole diameter (aspect ratio) increases, which reduces the productivity of printed boards. is significantly inhibited.
In addition, in fields that require ultra-high density, so-called buried via holes, which are multi-layered with 10 or more layers and have via holes in the inner layers, have been adopted, but although they are satisfactory in terms of performance, they are not economical. Looking at it, it did not satisfy all needs. In addition, demand for multilayer boards is expected to increase, especially in office automation equipment (OA equipment).
A need has arisen to solve the aforementioned problems in multilayer boards.

For this reason, as an attempt, “Making 100,000”
Making 100000Circuits fit
where at most 6000fit berore；Electronic、
August 2, 1979), the wiring capacity is improved by the use of blind via holes (i.e., blind holes) shown in FIG. 2C.

However, from a manufacturing perspective, “Lasers in Electronics”
Circuits Manufacturing, July 1981)” or “Copper Plating Mudband Multilayer Board”
Advanced Multilayer Boards; IPC 1976
As introduced in ``Fall Meeting'', a multilayer plate 1 as shown in Fig. 2A is formed using a laser or a drill.
Blind Via Hall 4-11, 4-1
2 is drilled on one side at a time as shown in FIG. 2C, resulting in inefficiency. Furthermore, in laser drilling, as shown in FIG. 2B, the outermost copper foil of the multilayer board 1 at the position P where the via hole is to be drilled is removed by etching, and then the via hole is drilled. The disadvantage is that it increases.

On the other hand, when drilling with a drill, it is necessary to control the depth of the drill in the thickness direction of the printed board, but when manufacturing printed boards, variation in board thickness between lots is unavoidable, and the enlarged view in Figure 2 E The disadvantage is that the distance d between the bottom of the via hole 4-11 and the copper foil 2-3 of the third layer conductor circuit shown in FIG. Furthermore, after drilling a via hole, a conductor layer is formed on the entire surface including the inner wall by electroless plating, but if the outermost insulating layers 1a-1 and 1a-3 in FIG. 2D are thick, (i ) It is difficult to form a uniform conductor layer, and (ii) residues of surface treatment liquid such as plating liquid remain in the via hole, which is unfavorable in terms of reliability.

An object of the present invention is to provide a method for manufacturing a high-density multilayer board having blind via holes, which eliminates the structural drawbacks of the conventional multilayer board.

According to the present invention, blind vias connecting conductor circuits located in the outermost layer and the layer next to the outermost layer are provided.
A multilayer printed wiring board and a method for manufacturing the same are obtained, characterized in that the inner space of the hole is filled with a resin and is further completely covered with an insulating layer of a conductor layer exposed at the outermost layer of the blind via hole.

Hereinafter, embodiments of the present invention will be described in detail with reference to FIGS. 3A to 3K.

FIG. 3K shows a multilayer board obtained by the method of the present invention, with blind via holes 4-11, 4-
Inside 12 is resin layer 1 used as pre-preg.
b', and the upper and lower surfaces are completely covered with a permanent mask 9 having insulation and chemical resistance.

Next, the present invention will be explained step by step.

Figure 3A shows a copper-clad laminate 1a-1 (for example, a glass cloth base material/epoxy resin laminate with a thickness of 0.10 mm) in which via holes are formed.
Copper foil (for example, electrolytic copper foil with a thickness of 0.018 mm) 2-1 and 2-2 forming the conductor layer pattern of the second layer
have.

First, as shown in FIG. 3B, the copper-clad laminate 1a-1 is
Via hole 4-1 was drilled in
Furthermore, a conductor layer 6 is formed on the entire surface including the via hole 4-1 by known electroless copper plating and electroplating means, and the first and second conductor layers, that is, the copper foil 2-1 are formed. , 2-2.

Next, as shown in FIG. 3D, the desired circuit pattern portions on the surfaces of the copper foils 2-1 and 2-2 are covered with a photosensitive dry film resist 7 using a known tenting method, and then unnecessary conductors are removed. Layer 6 and the copper foils 2-1 and 2-2 below it are removed by etching to form a conductor layer pattern of layer 1-2 (1a-1) of the multilayer board (FIG. 3E). Next, as shown in Figure 3F,
5 to 6 layers 1a- obtained by the same method as described above
3 and 3 to 4 with only the power supply ground pattern formed.
layer (1a-2: for example, a laminate with 0.070 mm copper foil pasted on both sides of a 0.5 mm thick glass cloth base epoxy resin) and prepreg layers 1b-1, 1b-2
(For example, two sheets each of 0.15 mm thick glass cloth base epoxy resin-impregnated prepregs) are combined, and layers 1 to 2 1a-1 of Fig. 3E are placed on top of the prepreg, and then the pressure is 10 to 40 kg. / ^cm2 , heating 170℃・40~80
The thickness is
A six-layer laminate 1 of 1.4 to 1.6 mm is obtained (FIG. 3G).
At this time, the via holes 4-1 and 4-2 shown in Figure 3F are so-called non-through blind vias.
Holes 4-11 and 4-12 are formed, and prepregs 1b-1 and 1b- are formed inside these holes.
It is completely filled with resin 1b' flowing out from 2. Next, a hole for inserting a component or a hole for connecting a conductor in an inner layer below the next layer is drilled as a through hole 3 (FIG. 3H). Next, in order to make the through hole 3 conductive, a catalyst such as palladium is adsorbed onto the inner wall of the through hole 3 and the surface of the laminate 1 to form a catalyst layer 8 (FIG. 3I). Next, in order to prevent unnecessary conductor layers from being formed on the surface of the laminate 1, a permanent mask 9 having insulation and chemical resistance (for example, a solder resist for electroless plating: S-22 manufactured by Taiyo Ink, etc.) is applied. )
When it is deposited on the desired portion, the planned via holes 4-11 and 4-12 are also protectively coated at the same time (FIG. 3J).

Next, when electroless copper plating is applied to the entire surface, the through hole 3
The inner walls and exposed copper-plated conductor layer 10 are formed, resulting in a multilayer printed wiring board of the present invention having the desired blind via holes (FIG. 3K).

As described above, the multilayer printed wiring board having blind via holes obtained by the present invention has the following advantages compared to conventional ones: (i) The inside of the blind via hole is completely made of the same resin as the laminate. Filled. (ii) Blind via holes are completely covered with a permanent mask. (iii) Via during multilayer molding
The holes completely remove air between the laminate and the pre-preg, allowing molding to be performed at lower pressure than usual.

As a result, in multilayer printed wiring boards with a conventional structure, residues of processing liquid were found in blind via holes and problems such as corrosion were observed, but this problem has been resolved. Furthermore, there are no voids between the layers, and the thickness tolerance between the layers has been improved to less than half that of the conventional method.

In addition, from a manufacturing perspective, special means such as lasers,
Alternatively, holes can be formed by stacking a large number of laminates instead of using non-mass production methods such as drilling non-through holes on each side, which significantly improves productivity and allows multilayer boards with uniform electrical properties to be obtained. can. Furthermore, the reliability of the inner layer connection of the blind via hole can be improved, and the wiring capacity can be significantly improved.

[Brief explanation of the drawing]

FIG. 1 is a cross-sectional view of a conventional multilayer printed wiring board.
FIGS. 2A to 2E are cross-sectional views showing the manufacturing process of a conventional multilayer printed wiring board. 3A to 3J are cross-sectional views showing the manufacturing process of the multilayer printed wiring board of the present invention. Figure 3 K
FIG. 2 is a cross-sectional view of the multilayer printed wiring board of the present invention. 1... (Multilayer molded) laminate, 1a-1
...Laminated plate forming 1 to 2 layers, 1a-2...3
Laminated plate forming ~4 layers, 1a-3...Laminated plate forming 5-6 layers, 1b-1~1b-2...2~
Pre-preg layer forming between 3 layers and between 4 to 5 layers,
1b'...Resin filled in the blind via hole, 2-1 to 2-6...Copper foil forming 1 to 6 conductor layers, 3...Throughout for inserting components or connecting the power supply to the inner layer Hole, 4...Through via hole connecting between signal layers, 4-1, 4-2...1 to 2
vias in the laminate forming the 5-6 layers.
Hall, 4-11, 4-12...1~2 layers, 5~
Blind via hole connecting 5 layers,
5...Conductor layer formed simultaneously in the through hole and blind via hole, 6...1a-1 and 1a-
2 laminate board and via hole 4-1,
4-2 conductor layer formed, 7... photosensitive dry film resist, 8... catalyst layer, 9... (insulating, chemical resistant) permanent mask, 10... electroless copper plating conductor layer , p...Position where the via hole is bored, d...Distance between the bottom of the via hole and the third layer conductor circuit.

Claims (1)

[Claims] 1. A blind via connecting a conductor circuit in the outermost layer and a conductor circuit located in the layer next to the outermost layer.
1. A multilayer printed wiring board characterized in that the space inside the hole is filled with resin, and the conductor layer on the surface of the blind via hole is completely covered with an insulating layer. 2. A method for manufacturing a multilayer printed wiring board, characterized by comprising the following steps. (a) Two sets of laminates each having a through hole and having a conductor circuit pattern formed in advance are placed on the outermost layer, and one or more sets of laminates and a prepreg layer have a conductor circuit pattern formed in advance on the inside thereof. The process of inserting the laminate and then applying pressure and heating to form a multilayer laminate. (a) A step of providing through holes in desired portions of the multilayer laminate. (c) A step of catalytically activating the multilayer laminate having the through holes. (d) A step of covering a desired portion of the multilayer laminate which has been subjected to the catalyst activation treatment, including the blind via hole which has been made conductive in advance, with a permanent mask having insulating properties. (E) A step of forming a conductive layer by electroless copper plating on desired parts including the inner walls of the through holes of the multilayer laminate in which the desired parts are coated with a permanent mask.