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JPS633207Y2 - - Google Patents

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Publication number
JPS633207Y2
JPS633207Y2 JP13743082U JP13743082U JPS633207Y2 JP S633207 Y2 JPS633207 Y2 JP S633207Y2 JP 13743082 U JP13743082 U JP 13743082U JP 13743082 U JP13743082 U JP 13743082U JP S633207 Y2 JPS633207 Y2 JP S633207Y2
Authority
JP
Japan
Prior art keywords
phase shifter
fet
drain
electrode
source
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP13743082U
Other languages
Japanese (ja)
Other versions
JPS5942602U (en
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP13743082U priority Critical patent/JPS5942602U/en
Publication of JPS5942602U publication Critical patent/JPS5942602U/en
Application granted granted Critical
Publication of JPS633207Y2 publication Critical patent/JPS633207Y2/ja
Granted legal-status Critical Current

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  • Waveguide Switches, Polarizers, And Phase Shifters (AREA)

Description

【考案の詳細な説明】 この考案は、半導体基板に構成し、FETを制
御素子として用いたマイクロ波の位相を制御する
半導体移相器の高性能化に関するものである。
[Detailed Description of the Invention] This invention relates to improving the performance of a semiconductor phase shifter that is constructed on a semiconductor substrate and uses an FET as a control element to control the phase of microwaves.

また、この考案は半導体移相器の種々の形式の
うちローデツドライン形に関するものである。
Furthermore, this invention relates to a loaded line type among various types of semiconductor phase shifters.

第1図に従来のローデツドライン形半導体移相
器の構造の一例を示す。図中1は半導体基板、2
は地導体、3は地導体2と共に構成されるマイク
ロストリツプ線路の主線路、4は同じく分岐線
路、5はFET、6はFET5のドレイン電極、7
は同じくソース電極、8は同じくゲート電極、9
はソース電極7と地導体2を接続する貫通導体、
10はゲート電極にバイアスを印加するためのマ
イクロストリツプ線路からなるバイアス回路であ
る。
FIG. 1 shows an example of the structure of a conventional loaded line type semiconductor phase shifter. In the figure, 1 is a semiconductor substrate, 2
is the ground conductor, 3 is the main line of the microstrip line configured together with the ground conductor 2, 4 is the branch line as well, 5 is the FET, 6 is the drain electrode of the FET 5, 7
is the same source electrode, 8 is the same gate electrode, and 9 is the same source electrode.
is a through conductor connecting the source electrode 7 and the ground conductor 2,
10 is a bias circuit consisting of a microstrip line for applying a bias to the gate electrode.

主線路3に概略1/4波長間隔で2本の分岐線路
4を接続し、分岐線路4の他の一端にはFET5
が接続された構成である。このような構成を有す
る半導体移相器は、ゲート電極8へ印加するバイ
アス電圧を変えることにより、ドレイン・ソース
間がマイクロ波に対して示すインピーダンスを変
え、分岐線路4と主線路3の接続点からFET5
側を見たインピーダンスを同時に容量性から誘導
性へ、又は、その逆へと変えることにより、主線
路を伝搬するマイクロ波の位相を変え、移相器と
して動作している。
Two branch lines 4 are connected to the main line 3 at approximately 1/4 wavelength intervals, and an FET 5 is connected to the other end of the branch line 4.
This is a configuration in which the two are connected. In the semiconductor phase shifter having such a configuration, by changing the bias voltage applied to the gate electrode 8, the impedance shown between the drain and source to microwaves is changed, and the connection point between the branch line 4 and the main line 3 is changed. From FET5
By simultaneously changing the impedance viewed from the side from capacitive to inductive or vice versa, the phase of the microwave propagating through the main line is changed, and it operates as a phase shifter.

ところで、ローデツドライン形半導体移相器
は、2個のFETの特性に差があると、移相器の
位相特性、損失特性、反射特性が劣化する。その
ため、2個のFETの特性が揃うことが要求され
るが一般に、同一の半導体基板に構成された場合
でも異なるFET間には特性のバラツキが見られ、
この種半導体移相器を製作する上での問題となつ
ていた。
By the way, in a loaded line type semiconductor phase shifter, if there is a difference in the characteristics of two FETs, the phase characteristics, loss characteristics, and reflection characteristics of the phase shifter deteriorate. Therefore, it is required that the characteristics of the two FETs be the same, but in general, there are variations in characteristics between different FETs even when they are configured on the same semiconductor substrate.
This has been a problem in manufacturing this type of semiconductor phase shifter.

この考案は、上記問題を解決するため、1個の
FETのドレイン、ゲートを分離し、ソースを共
通にした構成を有するFETをローデツドライン
形半導体移相器に用い、FETの特性の不揃いに
よる移相器特性の劣化を無くすことを目的とした
もので以下図面について詳細に説明する。
This idea solves the above problem by using one
The purpose is to use a FET with a configuration in which the drain and gate of the FET are separated and the source is common in a loaded line type semiconductor phase shifter, and to eliminate deterioration of the phase shifter characteristics due to uneven characteristics of the FET. The drawings will be explained in detail below.

第2図、第3図はこの考案の実施例であつて、
ここで用いられるFET11はドレイン及びゲー
トをそれぞれ2分し、それぞれ第1のドレイン電
極12、第2のドレイン電極13及び第1のゲー
ト電極14、第2のゲート電極15を構成し、ソ
ースは共通にして共通ソース電極16を貫通導体
9によつて地導体2と接続した構成である。
Figures 2 and 3 are examples of this invention.
The FET 11 used here has a drain and a gate divided into two, each forming a first drain electrode 12, a second drain electrode 13, a first gate electrode 14, and a second gate electrode 15, and the source is common. In this configuration, the common source electrode 16 is connected to the ground conductor 2 by a through conductor 9.

また、第1のドレイン電極12は、一方の分岐
線路4に、第2のドレイン電極13は、もう一方
の分岐線路4に接続され、これら分岐線路4の一
端は、主線路3に概略1/4波長の間隔を持つて接
続されている。
Further, the first drain electrode 12 is connected to one branch line 4, and the second drain electrode 13 is connected to the other branch line 4, and one end of these branch lines 4 is connected to the main line 3 by approximately 1/2. They are connected with a spacing of 4 wavelengths.

さらに、第1のゲート電極14、第2のゲート
電極15には、ゲートにバイアス電圧を印加する
ためのバイアス回路10が接続されている。
Further, a bias circuit 10 for applying a bias voltage to the gates is connected to the first gate electrode 14 and the second gate electrode 15.

上記構成の半導体移相器は、バイアス回路10
を介して印加されるバイアス電圧を変えることに
より、第1のドレインとソース、第2のドレイン
とソース間がマイクロ波に対して示すインピーダ
ンスが変わり、主線路3に概略1/4波長間隔で装
荷されるサセプタンス値が変化するため、主線路
3を伝搬するマイクロ波の位相が変わり移相器と
して動作している。
The semiconductor phase shifter having the above configuration includes a bias circuit 10
By changing the bias voltage applied through the , the impedance shown to microwaves between the first drain and source and between the second drain and source changes, and the main line 3 is loaded at approximately 1/4 wavelength intervals. Since the susceptance value changes, the phase of the microwave propagating through the main line 3 changes, and the main line 3 operates as a phase shifter.

このように構成された移相器では、FET11
内の第1のドレイン電極12、第1のゲート電極
14と共通のソース電極16及び、第2のドレイ
ン電極13、第2のゲート電極15と共通のソー
ス電極16が極めて接近した位置に製作されそれ
ぞれ似かよつた特性となる。そのため、第1のド
レインとソース間及び第2のドレインとソース間
がマイクロ波に対して示すインピーダンスが等し
くなり、このFET11を用いて製作したローデ
ツドライン形半導体移相器は、FETの特性不揃
いによる性能劣化を防ぐことができる。
In the phase shifter configured in this way, FET11
A source electrode 16 common to the first drain electrode 12 and the first gate electrode 14 and a source electrode 16 common to the second drain electrode 13 and the second gate electrode 15 are fabricated in extremely close positions. Each has similar characteristics. Therefore, the impedance shown to microwaves between the first drain and source and between the second drain and source becomes equal, and the loaded line type semiconductor phase shifter manufactured using this FET 11 has the same characteristics as the FETs. It is possible to prevent performance deterioration due to

なお以上は、主線路が直線的に配置された場合
について説明したが、この考案は、これに限らず
第4図に示すように、分岐線路4間の主線路3を
折り曲げ伝搬方向に小形化を図つた半導体移相器
に適用しても良い。
Although the above description has been given of the case where the main line is arranged linearly, the present invention is not limited to this and may be applied to a semiconductor phase shifter in which the main line 3 between the branch lines 4 is bent to reduce the size in the propagation direction, as shown in FIG.

また、この考案による半導体移相器は、縦続接
続して多ビツトデイジタル移相器として使用して
も良く、第5図に示すようにスイツチドレイン形
半導体移相器17など他の形式の半導体移相器と
共に縦続接続して用いても良い。
Further, the semiconductor phase shifter according to this invention may be used as a multi-bit digital phase shifter by cascade connection, and other types of semiconductor phase shifters such as a switched drain type semiconductor phase shifter 17 as shown in FIG. It may also be used in cascade connection with a phaser.

以上のように、この考案に係る半導体移相器で
は、概略1/4波長間隔で主線路に接続される2本
の分岐線路の先端に特性の類似したFETを装荷
できるため、特性の良好な移相器が実現できる。
As described above, in the semiconductor phase shifter according to this invention, FETs with similar characteristics can be loaded at the tips of two branch lines connected to the main line at approximately 1/4 wavelength intervals, so that FETs with good characteristics can be installed. A phase shifter can be realized.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は従来のローデツドライン形半導体移相
器の構造を示す斜視図、第2図、第3図はこの考
案の一実施例を示す斜視図、第4図、第5図はこ
の考案による他の実施例を示す斜視図である。 図中1は半導体基板、2は地導体、3は主線
路、4は分岐線路、5はFET、6はドレイン電
極、7はソース電極、8はゲート電極、9は貫通
導体、10はバイアス回路、11はFET、12
は第1のドレイン電極、13は第2のドレイン電
極、14は第1のゲート電極、15は第2のゲー
ト電極、16は共通ソース電極である。なお図
中、同一あるいは相当部分には同一符号を付して
示してある。
Fig. 1 is a perspective view showing the structure of a conventional loaded line semiconductor phase shifter, Figs. 2 and 3 are perspective views showing an embodiment of the invention, and Figs. 4 and 5 are perspective views of the invention. It is a perspective view showing other examples by. In the figure, 1 is a semiconductor substrate, 2 is a ground conductor, 3 is a main line, 4 is a branch line, 5 is an FET, 6 is a drain electrode, 7 is a source electrode, 8 is a gate electrode, 9 is a through conductor, and 10 is a bias circuit , 11 is FET, 12
is a first drain electrode, 13 is a second drain electrode, 14 is a first gate electrode, 15 is a second gate electrode, and 16 is a common source electrode. In the drawings, the same or corresponding parts are designated by the same reference numerals.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 半導体基板に構成したFETと、上記半導体基
板に構成したマイクロストリツプ線路を接続して
成る半導体移相器において、上記マイクロストリ
ツプ線路から成る主線路に概略1/4波長間隔で、
同じくマイクロストリツプ線路から成る2本の分
岐線路の一端を接続し、上記2本の分岐線路の他
の一端はFETの第1のドレイン電極と第2のド
レイン電極にそれぞれ接続し、上記第1及び第2
の各ドレイン電極に対し、共通に設けられた上記
FETのソース電極を接地し、上記FETの第1の
ドレインとソース間の第1のゲート電極及び第2
のドレインとソース間の第2のゲート電極にバイ
アス電圧を印加する手段を具備したことを特徴と
する半導体移相器。
In a semiconductor phase shifter formed by connecting an FET configured on a semiconductor substrate and a microstrip line configured on the semiconductor substrate, the main line consisting of the microstrip line is connected at approximately 1/4 wavelength intervals,
One end of two branch lines also made of microstrip lines is connected, and the other ends of the two branch lines are connected to the first drain electrode and the second drain electrode of the FET, respectively. 1st and 2nd
For each drain electrode of
The source electrode of the FET is grounded, and the first gate electrode and the second gate electrode between the first drain and source of the FET are grounded.
A semiconductor phase shifter comprising means for applying a bias voltage to a second gate electrode between the drain and source of the semiconductor phase shifter.
JP13743082U 1982-09-10 1982-09-10 semiconductor phase shifter Granted JPS5942602U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP13743082U JPS5942602U (en) 1982-09-10 1982-09-10 semiconductor phase shifter

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP13743082U JPS5942602U (en) 1982-09-10 1982-09-10 semiconductor phase shifter

Publications (2)

Publication Number Publication Date
JPS5942602U JPS5942602U (en) 1984-03-19
JPS633207Y2 true JPS633207Y2 (en) 1988-01-27

Family

ID=30308687

Family Applications (1)

Application Number Title Priority Date Filing Date
JP13743082U Granted JPS5942602U (en) 1982-09-10 1982-09-10 semiconductor phase shifter

Country Status (1)

Country Link
JP (1) JPS5942602U (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH1174717A (en) * 1997-06-23 1999-03-16 Nec Corp Phased array antenna system

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0745969B2 (en) * 1985-11-25 1995-05-17 松下電器産業株式会社 Hot water heater with additional heating function
JPH0745968B2 (en) * 1985-11-25 1995-05-17 松下電器産業株式会社 Hot water heater with additional heating function

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH1174717A (en) * 1997-06-23 1999-03-16 Nec Corp Phased array antenna system

Also Published As

Publication number Publication date
JPS5942602U (en) 1984-03-19

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