JPS63277958A - Automatic outward appearance inspection device - Google Patents

Abstract

PURPOSE:To make confirming operation efficient by deciding only one defect coordinate as a representative defect coordinate when the distance between coordinates of defect coordinate data is smaller than a predetermined distance. CONSTITUTION:A linear sensor 2 reads a print pattern on a printed circuit board 1 which is driven and controlled, and its image signal is stored in an image memory 7 through a binary coding circuit 6. A defect deciding circuit 8 compares image data on a wiring pattern sent from the image memory 7 with image data on a standard wiring pattern to decide its defect, and stores the coordinate data on the defect part in a defect coordinate memory A9 in order. An arithmetic circuit 10 read defect coordinates out, computes mutual distances of all the coordinates, and puts coordinates whose mutual distances are smaller than the constant value, in a defect coordinate group which is caused by one defect of the wiring pattern. Further, coordinates whose mutual distances are larger than the constant value are regarded as defect coordinates as to the defect of the wiring pattern and stored in defect coordinate memory B11.

Description

Detailed Description of the Invention [Industrial Application Field] The present invention relates to an automatic appearance inspection device for printed wiring boards, and in particular, to visual defect confirmation work performed by an operator after the automatic inspection by the inspection device is completed. The present invention relates to an automatic visual inspection device that makes it possible to limit the number of defective cylinders to be checked to the minimum necessary and prevent a decrease in the efficiency of defect checking work.

[Conventional technology]

As a conventional technique related to an automatic appearance inspection device that inspects pattern wiring of a printed wiring board using optical means and detects defects in the pattern, for example, the Journal of the Institute of Electronics and Communication Engineers '8
415 Vow J67-CNo. 5 (pages 435 to 442) "Automated visual inspection of printed circuit board patterns" is known. This type of conventional technology uses a large number of feature extraction operators for defect detection to determine the quality of a wiring pattern, and an outline of this defect detection method will be explained with reference to the drawings.

FIG. 4 is a diagram illustrating an overview of a method for detecting defects in wiring patterns according to the prior art. In FIG. 4, 41 is a pattern to be inspected, 42 is a standard pattern, 43 is an inspection device, 4
4 is a detected defect pattern.

In FIG. 4, the inspection device 43 first detects an X in the pattern to be inspected 41 and the standard pattern 42.

Extract the pattern of the boundary line of the pattern in the Y direction.

The inspection device 43 compares the pattern boundary line data extracted from the respective patterns 41 and 42 for each corresponding portion, detects a portion where there is a mismatch, and outputs the detection result as a detected defect pattern 44. In the case of the illustrated example, patterns b and C are shown as defects as the defect pattern 44, but as can be understood from the inspection pattern 41 and the standard pattern 42, the patterns b and C shown as defects are The boundary line patterns on both sides of the missing portion a of the wiring pattern in FIG.

In this way, the inspection apparatus according to the prior art detects defects in the wiring pattern using the boundary line pattern, so when the feature extraction operator extracts the boundary line mismatch,
In the four directions of 45" and -45@, and when extracting discrepancies in minute patterns, features that are slightly different independently in the four directions of X, Y, 45" and -45@ are treated as one defect. This method extracts multiple defects for one defect and outputs their coordinates.

[Problem that the invention seeks to solve]

The above-mentioned conventional technology extracts multiple defects for one defect and outputs their coordinates, so when performing defect confirmation after obtaining the inspection result, one defect is checked many times. There was a problem in that the amount of work required for this was large.

An object of the present invention is to solve the problems of the prior art and output one defect coordinate for one defect,
An object of the present invention is to provide an automatic appearance inspection device for pattern wiring that can improve the efficiency of confirmation work.

[Means for solving problems]

According to the present invention, the purpose is to calculate the distance between the coordinates of a plurality of pieces of defect coordinate data determined to be defects by the feature extraction operator, and the calculated distance between the coordinates is
If the two defect coordinates are within a predetermined distance, the two defect coordinates are considered to be caused by one defect pattern, and only one defect coordinate is made to correspond to one defect pattern, and that coordinate is output as the representative defect coordinate. This is achieved by

[Effect]

All coordinates of locations determined to be defective by the defect determination circuit are temporarily stored in a memory, and after the inspection is completed, distances between the coordinates stored in the memory are calculated. As a result of the calculation, coordinates that are separated by a certain distance or more are stored in the memory again as coordinates indicating a defect on each side. Also,
For coordinates that are less than a certain interval, representative coordinates are calculated for each group of coordinates with a small interval according to a certain rule,
These representative coordinates are stored again in the memory as coordinates indicating one defect. With such a procedure, for one defect, one coordinate indicating the defect can be stored in the memory, and the number of times required for confirmation in the subsequent defect confirmation step can be minimized.

〔Example〕

EMBODIMENT OF THE INVENTION Hereinafter, one embodiment of the automatic visual inspection apparatus according to the present invention will be described in detail with reference to the drawings.

FIG. 1 is a block diagram showing an embodiment of the present invention, FIG. 2 is a diagram explaining the functions of a memory for storing defect coordinates and an arithmetic circuit, and FIG. 3 is a block diagram showing the configuration of the arithmetic circuit. . In Figures 1 to 3, 1 is a printed circuit board, 2 is a one-dimensional sensor, 3 is a stand, 4 is an X-axis motor, 5 is a Y-axis motor, 6 is a binarization circuit, 7 is an image memory, 8 1 is a defect determination circuit, 9 is a defect coordinate memory A, 10 is an arithmetic circuit, 11 is a defect coordinate memory B112 is a defect coordinate output circuit, and 13 is an X.

Y-axis motor control circuit, 14.15.22.24 is a buffer memory, 16.17.18.19 is a separation circuit, 20.
21 is an arithmetic unit, 23 is a determination circuit, and 25 is a coordinate determination circuit.

As shown in FIG. 1, an embodiment of the automatic visual inspection apparatus according to the present invention includes a pedestal 3 that holds a printed circuit board 1 to be inspected and is driven by X-axis and Y-axis motors 4 and 5; An X- and Y-axis motor control circuit 13 that drives and controls the axis and Y-axis motors 4.5, a one-dimensional sensor 2 that reads the printed pattern on the printed circuit board 1, and processes the pattern reading data from the -dimensional sensor 2. and a processing section that outputs the defect coordinates of the pattern. The processing unit also includes a binarization circuit 6 for the pattern read signal from the -dimensional sensor 2, an image memory 7 that holds data from the binarization circuit 6, and a combination of the pattern read data in the image memory 7 and the standard pattern. a defect determination circuit 8 that determines a defect pattern by comparing the data with the data;
A defect coordinate memo+7 A 9 that temporarily stores the coordinate data from the defect determination circuit 8, and a calculation circuit that processes the coordinate data in the memory memory 9 and determines one representative coordinate for one pattern defect. 10, a defect coordinate memory B11 that holds the representative defect coordinates from the arithmetic circuit 10, and a defect coordinate output circuit 12 that outputs the defect coordinates to the outside.

In such a configuration, the printed circuit board 1 is illuminated by a light source (not shown), and the pedestal 3 is connected to the X and Y axis motor control circuit 1.
3, and when the start of inspection is instructed, the -dimensional sensor 2 detects the printed circuit board 1 through an optical system (not shown).
Read the printed pattern above. The image signal of the read pattern is binarized by the binarization circuit 6 and stored in the image memory 7.
is stored as two-dimensional image data. The image memory 7 is composed of a shift register, and the X-axis motor 4
The frame 3 is driven, and the -dimensional sensor 2 sequentially stores image data obtained by scanning the printed circuit board l and binarizing the image signal, and sequentially shifts out old image data. ing. The defect determination circuit 8 includes an image memory 7
Defects in the wiring pattern in the image memory 7 are determined by a known technique such as comparing the image data of the wiring pattern sent from the image memory A9 with the image data of the standard wiring pattern, and the coordinate data of the defective part is stored in the defect coordinate memory A9. are stored sequentially. The arithmetic circuit 1O reads the defect coordinates stored in the defect coordinate memory A9, calculates the distance between all the coordinates, and determines that the coordinates whose mutual distance is within a certain value are caused by one defect in the wiring pattern. Assuming that the defect coordinates are a group of defect coordinates, one coordinate is considered to be a representative coordinate for one defect in a wiring pattern, and if the distance between them is a certain value or more, both defect coordinates are defect coordinates for a defect in a different wiring pattern. , respectively, defect coordinate memory Bll
Store in. These defect coordinates are output as inspection results via the defect coordinate output circuit 12.

Next, an example of the defect coordinates stored in the defect coordinate memory A, 89.11 and the function of the arithmetic circuit 10 will be explained with reference to FIG.

In the defect coordinate memory A9, defect coordinates corresponding to the pattern defect portion detected by the defect determination circuit 8 are stored in order from the address “00” with the smallest address. The calculation circuit 10 reads out two defect coordinates in order from the smallest address and calculates the distance between them. That is, the arithmetic circuit 10 calculates the defect coordinates (X, Y.) of address "00" = (010m, 050 Tsuru)
and defect coordinates of address “01” (X+, Y+) = (0
50 am, 020 Tsuru) and find the distance between them (X
s −x+)” + (yo −y+)”.

In this case, the distance between them is 5 (In). The determination circuit 23 in the arithmetic circuit 10 determines whether two defect coordinates given in advance are caused by the same pattern defect. By comparing the predetermined distance between the two defect coordinates from the defect coordinate memory A9, it is possible to determine whether these two defect coordinates are caused by the same pattern defect. For example, if the specified mutual distance given in advance is 40 m.
If so, the address “00” mentioned above.

The defect coordinates stored at "01" are determined to be caused by defects in different wiring patterns, and the defect coordinate determination circuit 25 first transfers the defect coordinates at address "00" to address "00" in the defect coordinate memory Bll. 00” and store it as is.

Next, the arithmetic circuit 10 calculates the address "
The same calculation and determination as described above are performed on the coordinate data of "Ol" and "02", and when it is determined that both defect coordinates are not caused by the same wiring pattern defect, the address 101" is determined.
The defect coordinates of are stored in the address "01" of the defect coordinate memory BIO.

For example, if the specified mutual distance is set to 60 cranes, the addresses "00も," in the defect coordinate memory 9
The defect coordinates of "01" are determined by the determination circuit 23 in the arithmetic circuit 10 to be caused by the same wiring pattern defect.In this case, first, the coordinates of address "01" are stored in the defect coordinate determination circuit 25. The arithmetic circuit 10 calculates the mutual distance between the coordinates of addresses "00" and "02" and compares and determines this mutual distance with the designated mutual distance.As a result, the address "00" and "02" are If the distance between the coordinates of `` and 02'' is larger than the designated distance and the determination circuit 23 determines that these two defects are due to defects in different wiring patterns, the coordinates of address ``00'' are determined to be defective. Coordinate determination circuit 2
5, and the determination circuit 25 stores the coordinates of the younger address "00" in the address "00" of the defective coordinate memory Bll. In this case, it is determined that the defect coordinates at addresses "00" and "01" in the defect coordinate memory A9 are caused by the same wiring pattern defect, and the defect coordinates at addresses "00" and "01" in the defect coordinate memory A9 are determined to be caused by the same wiring pattern defect. This means that the coordinate of "00" is selected and stored at address "00" of the defect coordinate memory 11.

On the other hand, addresses "00" and "0" of the defect coordinate memory A9 mentioned above
If it is determined that both defect coordinates are caused by a defect in the same wiring pattern in the defect coordinate determination of ``2'', this address ``0'' is determined.
The coordinates of ``2'' are temporarily held in the defect coordinate determination circuit 25. Next, the calculation circuit 10 calculates the mutual distance between the coordinates of addresses ``00'' and ``03'' in the defect coordinate memory A9, and When it is determined that the defect is caused by a wiring pattern defect with different defect coordinates, the coordinates of this address "00" are stored in the address "OO" of the defect coordinate memo IJ B 11. In this case, the coordinates of this address "00" are stored in the address "OO" of the defect coordinate memory A9. “00”, “01” and “
The defect coordinates of 02'' are determined to be caused by the same wiring pattern defect, and the coordinates of address ``00'' of defect coordinate memory A9 are selected as the representative coordinates corresponding to this wiring pattern defect, and the coordinates of address ``00'' of defect coordinate memory Bll are selected. The calculation circuit 10 similarly processes the coordinates of all addresses in the defect coordinate memo +7A9, and stores one defect corresponding to one wiring pattern defect. Coordinates are selected and stored in the defect coordinate memory Bll.

The arithmetic circuit 10 that performs such operations is configured as shown in FIG. 3, for example. That is, the arithmetic circuit 10
As shown in FIG. 3, the buffer memory 1 reads and stores the defect coordinates at two addresses in the defect coordinate memory 9.
4.15, and a buffer memory 22.24 in which the same defect coordinates as these buffer memories 14.15 are stored,
Separation circuits 16 to 19 that separate the defect coordinates in the buffer memory 14 and 15 into X and Y coordinates, respectively, and a calculator 20 that calculates mutual distances between X and Y coordinates, respectively.
．． 21, and a determination circuit 2 that calculates the mutual distance between two coordinates based on the calculation results of these calculating units 20 and 21, and compares the mutual distance with a specified mutual distance set in advance.
3 and a coordinate determining circuit 25.

In the arithmetic circuit shown in FIG. 3, the buffer memory 14.
22 stores the coordinate of the smaller address among the two coordinates from the defect coordinate memory A9, and the buffer memory 15
．． 24 stores the coordinates of the address on the older number side. When the determination circuit 23 determines that the distance between the two defect coordinates is smaller than the designated distance and that the two defect coordinates are caused by the same wiring pattern defect, the determination circuit 23 stores the buffer memory 24
After sending a command to transfer the coordinates to the coordinate determining circuit 25, a clear command is sent to both buffer memories 22 and 24. As a result, the coordinate determination circuit 25 temporarily holds the coordinates from the buffer memory 24, and
．． 24 is cleared.

In addition, if the distance between the two defect coordinates is larger than the distance for determination (, if it is determined that the two defect coordinates are caused by different wiring pattern defects, the determination circuit 23
These buffer memories 22 .
24.

Among the coordinates from the buffer memory 22.24, the coordinate determining circuit 25 stores the coordinates located at the smaller address in the defect coordinate memory A9 in the defect coordinate memory B41, and clears the coordinates at that address in the defect coordinate memory 9. A command is issued to the defect coordinate memory A9.

The arithmetic circuit 10 sequentially performs the above-described processing on the two coordinates from the defect coordinate memory 9, thereby identifying one defect corresponding to one wiring pattern defect, as already explained with reference to FIG. The coordinates can be detected and sequentially stored in the defect coordinate memory Bll.

In the above-mentioned embodiment, the defect coordinates determined by the defect determination circuit are once stored in the defect coordinate memory A, and then the coordinates in the defect coordinate memory A are processed according to a certain rule to correspond to one wiring pattern defect. One defect coordinate is detected and stored in the defect coordinate memory B. However, in the present invention, each time the defect determination circuit outputs the defect coordinate, the coordinate is processed in real time and determined. (Also, the defect coordinate memory A and the defect coordinate memory B may be used by dividing the same memory into areas.

〔Effect of the invention〕

As explained above, according to the present invention, defects are pointed out using only one defect coordinate for one wiring pattern defect, so the amount of confirmation work after the inspection is completed can be significantly reduced. .

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing an embodiment of the present invention, FIG. 2 is a diagram explaining the functions of a memory for storing defect coordinates and an arithmetic circuit, and FIG. 3 is a block diagram showing the configuration of the arithmetic circuit. 4
The figure is a diagram illustrating an overview of a conventional method for detecting defects in wiring patterns. 1-...-printed circuit board, 2--one-dimensional sensor, 3---mounting frame, 4---X-axis motor, 5--
...Y-axis motor, 6-...-binarization circuit, ? ---
---... Image memory, 8...-- Defect determination circuit,
9.--.--Defect coordinate memory A, 10--.1.
- Arithmetic circuit, 11-... Defect coordinate memory B, 12.
・-----Defect coordinate output circuit, 13-...--X,
Y-axis motor control circuit, 14.15.22.24...
--- Buffer memory, 16.17.18.19 ---
---Separation circuit, 20゜21----Arithmetic unit, 23
....--Judgment circuit, 25--.--Coordinate determination circuit. Figure 1 1: Printing times 2: Ichiriki 3t (Nzu 3: fJ! Value 4: x Glaze 5: Vmt-dajI2 Figure 13 Fuyame Ruri 16-1
9: Reiji 20.21 m: @Nk 23: #1 Kasumi Kaiei 25 Nil Axillary Round Kidney Diagram 4

Claims (1)

[Claims] 1. In an automatic visual inspection device that reads a wiring pattern of a printed circuit board to be inspected, determines a defect in the wiring pattern, and outputs defect coordinates, the mutual distance between the defect coordinates is calculated. , to output one defect coordinate corresponding to one wiring pattern defect by finding a plurality of defect coordinates caused by the same wiring pattern defect and selecting one defect coordinate from among the plurality of defect coordinates. An automatic appearance inspection device featuring: 2. The plurality of defective coordinates caused by the same wiring pattern defect are coordinates whose mutual distances are within a predetermined distance. The automatic appearance inspection device according to item 1.